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Moved Validation_LFR_TIME_MANAGEMENT from designs to tests directory...
Moved Validation_LFR_TIME_MANAGEMENT from designs to tests directory Changed test directory Validation_LFR_TIME_MANAGEMENT in LFR_time_management. Added LFR_MANAGMENT_TIME_FINE_DELTA register into apb_lfr_management module at address 0x30 : * LFR_MANAGMENT_TIME_FINE_DELTA ( 8 downto 0) : ft_counter_lsb value * LFR_MANAGMENT_TIME_FINE_DELTA (24 downto 9) : ft value * LFR_MANAGMENT_TIME_FINE_DELTA (26 downto 25) : + ft_counter_lsb_MAX_VALUE = 379 when "00" + ft_counter_lsb_MAX_VALUE = 380 when "01" + ft_counter_lsb_MAX_VALUE = 381 when "10" Updated LFR_time_managment testbench.
Alexis Jeandet - - Load All Authors

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tsmc13.rc
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/ designs / EGSE_ICI / tsmc13.rc
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set_attribute lib_search_path {. /usr/local/synlibs/TSMG13F210D3_1.1/lib}
set_attribute library {"tsmg13f210t3_wc_108V_125C.lib" "/home/jiri/ibm/vhdl/temic/atc18/allmem.lib" } /
include leon3mp.rc
include atc18cond.rc
define_clock -period 5000 -name clock1 clk
synthesize -to_mapped
report_area
report_timing