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------------------------------------------------------------------------------
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-- This file is a part of the LPP VHDL IP LIBRARY
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-- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 3 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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-------------------------------------------------------------------------------
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-- Author : Jean-christophe Pellion
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-- Mail : jean-christophe.pellion@lpp.polytechnique.fr
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-------------------------------------------------------------------------------
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LIBRARY IEEE;
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USE IEEE.numeric_std.ALL;
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USE IEEE.std_logic_1164.ALL;
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LIBRARY grlib;
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USE grlib.amba.ALL;
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USE grlib.stdlib.ALL;
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LIBRARY techmap;
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USE techmap.gencomp.ALL;
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LIBRARY gaisler;
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USE gaisler.sim.ALL;
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USE gaisler.memctrl.ALL;
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USE gaisler.leon3.ALL;
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USE gaisler.uart.ALL;
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USE gaisler.misc.ALL;
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USE gaisler.spacewire.ALL;
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LIBRARY esa;
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USE esa.memoryctrl.ALL;
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LIBRARY lpp;
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USE lpp.lpp_memory.ALL;
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USE lpp.lpp_ad_conv.ALL;
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USE lpp.lpp_lfr_pkg.ALL; -- contains lpp_lfr, not in the 206 rev of the VHD_Lib
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USE lpp.lpp_top_lfr_pkg.ALL; -- contains top_wf_picker
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USE lpp.iir_filter.ALL;
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USE lpp.general_purpose.ALL;
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USE lpp.lpp_lfr_management.ALL;
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USE lpp.lpp_leon3_soc_pkg.ALL;
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--library proasic3l;
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--use proasic3l.all;
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ENTITY lfr_subsystem IS
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GENERIC (
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Mem_use : INTEGER := use_RAM
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);
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PORT (
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clk_25 : IN STD_LOGIC;
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LFR_soft_rstn : IN STD_LOGIC;
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rstn_25 : IN STD_LOGIC;
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-- SAMPLE
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sample_s : IN Samples(7 DOWNTO 0);
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sample_val : IN STD_LOGIC;
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-- APB
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apbi_ext : IN apb_slv_in_type;
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apbo_ext : OUT apb_slv_out_type;
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-- AHB
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ahbi_m_ext : IN AHB_Mst_In_Type;
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ahbo_m_ext : OUT AHB_Mst_Out_Type;
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-- TIME
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coarse_time : IN STD_LOGIC_VECTOR(31 DOWNTO 0); -- todo
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fine_time : IN STD_LOGIC_VECTOR(15 DOWNTO 0); -- todo
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--
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bias_fail_sw : OUT STD_LOGIC;
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--
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debug_vector : OUT STD_LOGIC_VECTOR(11 DOWNTO 0);
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debug_vector_ms : OUT STD_LOGIC_VECTOR(11 DOWNTO 0)
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);
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END lfr_subsystem;
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ARCHITECTURE beh OF lfr_subsystem IS
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SIGNAL LFR_rstn : STD_LOGIC;
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BEGIN -- beh
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LFR_rstn <= LFR_soft_rstn AND rstn_25;
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lpp_lfr_1 : lpp_lfr
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GENERIC MAP (
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Mem_use => Mem_use,
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tech => inferred,--tech,
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nb_data_by_buffer_size => 32,
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--nb_word_by_buffer_size => 30,
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nb_snapshot_param_size => 32,
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delta_vector_size => 32,
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delta_vector_size_f0_2 => 7, -- log2(96)
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pindex => 15,
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paddr => 15,
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pmask => 16#fff#,
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pirq_ms => 6,
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pirq_wfp => 14,
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hindex => 2,
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top_lfr_version => X"020153", -- aa.bb.cc version
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-- AA : BOARD NUMBER
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-- 0 => MINI_LFR
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-- 1 => EM
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-- 2 => EQM (with A3PE3000)
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DEBUG_FORCE_DATA_DMA => 0)
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PORT MAP (
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clk => clk_25,
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rstn => LFR_rstn,
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sample_B => sample_s(2 DOWNTO 0),
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sample_E => sample_s(7 DOWNTO 3),
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sample_val => sample_val,
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apbi => apbi_ext,
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apbo => apbo_ext,
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ahbi => ahbi_m_ext,
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ahbo => ahbo_m_ext,
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coarse_time => coarse_time,
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fine_time => fine_time,
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data_shaping_BW => bias_fail_sw,
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debug_vector => debug_vector,
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debug_vector_ms => OPEN);
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END beh;
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