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source compile.synp
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add_file -vhdl -lib work config.vhd
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add_file -vhdl -lib work ahbrom.vhd
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add_file -vhdl -lib work leon3mp.vhd
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add_file -edif ../../netlists/xilinx/Spartan3/grfpw_0_unisim.edf
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add_file -edif ../../netlists/xilinx/Spartan3/grfpw4_0_unisim.edf
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add_file -edif ../../netlists/xilinx/Spartan3/grlfpw_0_unisim.edf
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add_file -edif ../../netlists/xilinx/Spartan3/grlfpw4_0_unisim.edf
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add_file -constraint default.sdc
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#implementation: "synplify"
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impl -add synplify
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#device options
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set_option -technology Spartan3E
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set_option -part xc3s1600e
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set_option -speed_grade -4
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#compilation/mapping options
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set_option -symbolic_fsm_compiler 0
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set_option -resource_sharing 0
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set_option -use_fsm_explorer 0
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set_option -write_vhdl 1
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#set_option -disable_io_insertion 0
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#map options
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set_option -frequency 70
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set_option -top_module leon3mp
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#set result format/file last
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project -result_file "synplify/leon3mp.edf"
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#implementation attributes
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set_option -vlog_std v95
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set_option -compiler_compatible 0
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set_option -package fg320
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set_option -pipe 1; set_option -retiming 1; set_option -write_apr_constraint 0
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impl -active "synplify"
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