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----------------------------------------------------------------------------
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-- This file is a part of the GRLIB VHDL IP LIBRARY
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-- Copyright (C) 2004 GAISLER RESEARCH
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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--
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-- See the file COPYING for the full details of the license.
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--
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------------------------------------------------------------------------------
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-- Entity: memctrl
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-- File: memctrl.vhd
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-- Author: Jiri Gaisler - Gaisler Research
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-- Description: Memory controller package
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------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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library grlib;
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use grlib.amba.all;
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library gaisler;
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use gaisler.memctrl.all;
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package memoryctrl is
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component mctrl
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generic (
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hindex : integer := 0;
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pindex : integer := 0;
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romaddr : integer := 16#000#;
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rommask : integer := 16#E00#;
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ioaddr : integer := 16#200#;
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iomask : integer := 16#E00#;
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ramaddr : integer := 16#400#;
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rammask : integer := 16#C00#;
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paddr : integer := 0;
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pmask : integer := 16#fff#;
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wprot : integer := 0;
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invclk : integer := 0;
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fast : integer := 0;
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romasel : integer := 28;
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sdrasel : integer := 29;
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srbanks : integer := 4;
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ram8 : integer := 0;
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ram16 : integer := 0;
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sden : integer := 0;
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sepbus : integer := 0;
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sdbits : integer := 32;
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sdlsb : integer := 2;
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oepol : integer := 0;
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syncrst : integer := 0;
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pageburst : integer := 0;
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scantest : integer := 0;
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mobile : integer := 0
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);
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port (
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rst : in std_ulogic;
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clk : in std_ulogic;
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memi : in memory_in_type;
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memo : out memory_out_type;
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ahbsi : in ahb_slv_in_type;
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ahbso : out ahb_slv_out_type;
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apbi : in apb_slv_in_type;
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apbo : out apb_slv_out_type;
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wpo : in wprot_out_type;
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sdo : out sdram_out_type
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);
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end component;
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end;
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