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------------------------------------------------------------------------------
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-- This file is a part of the GRLIB VHDL IP LIBRARY
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-- Copyright (C) 2003 - 2008, Gaisler Research
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-- Copyright (C) 2008 - 2010, Aeroflex Gaisler
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--
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-- This program is free software; you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation; either version 2 of the License, or
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-- (at your option) any later version.
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--
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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--
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-- You should have received a copy of the GNU General Public License
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-- along with this program; if not, write to the Free Software
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-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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--============================================================================--
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-- Design unit : DMA2AHB_Package (package declaration)
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--
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-- File name : dma2ahb_pkg.vhd
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--
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-- Purpose : Interface package for AMBA AHB master interface with DMA input
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--
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-- Reference : AMBA(TM) Specification (Rev 2.0), ARM IHI 0011A,
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-- 13th May 1999, issue A, first release, ARM Limited
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-- The document can be retrieved from http://www.arm.com
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-- AMBA is a trademark of ARM Limited.
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-- ARM is a registered trademark of ARM Limited.
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--
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-- Note : Naming convention according to AMBA(TM) Specification:
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-- Signal names are in upper case, except for the following:
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-- A lower case 'n' in the name indicates that the signal
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-- is active low.
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-- Constant names are in upper case.
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-- The least significant bit of an array is located to the right,
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-- carrying the index number zero.
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--
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-- Limitations : See DMA2AHB VHDL core
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--
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-- Library : gaisler
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--
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-- Authors : Aeroflex Gaisler AB
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--
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-- Contact : mailto:support@gaisler.com
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-- http://www.gaisler.com
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--
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-- Disclaimer : All information is provided "as is", there is no warranty that
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-- the information is correct or suitable for any purpose,
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-- neither implicit nor explicit.
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--
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--------------------------------------------------------------------------------
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-- Version Author Date Changes
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--
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-- 1.4 SH 1 Jul 2005 Support for fixed length incrementing bursts
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-- Support for record types
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-- 1.5 SH 1 Sep 2005 New library gaisler
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-- 1.6 SH 20 Sep 2005 Added transparent HSIZE support
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-- 1.7 SH 6 Dec 2007 Added syncrst generic
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--------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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library grlib;
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use grlib.amba.all;
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package DMA2AHB_Package is
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-----------------------------------------------------------------------------
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-- Direct Memory Access to AMBA AHB Master Interface Types
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-----------------------------------------------------------------------------
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type DMA_In_Type is record
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Reset: Std_Logic;
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Address: Std_Logic_Vector(32-1 downto 0);
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Data: Std_Logic_Vector(32-1 downto 0);
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Request: Std_Logic; -- access requested
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Burst: Std_Logic; -- burst requested
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Beat: Std_Logic_Vector(1 downto 0); -- incrementing beat
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Size: Std_Logic_Vector(1 downto 0); -- size
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Store: Std_Logic; -- data write requested
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Lock: Std_Logic; -- locked Transfer
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end record;
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type DMA_Out_Type is record
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Grant: Std_Logic; -- access accepted
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OKAY: Std_Logic; -- write access ready
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Ready: Std_Logic; -- read data ready
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Retry: Std_Logic; -- retry
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Fault: Std_Logic; -- error occured
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Data: Std_Logic_Vector(32-1 downto 0);
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end record;
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-- constants for HBURST definition (used with dma_in_type.Beat)
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constant HINCR: Std_Logic_Vector(1 downto 0) := "00";
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constant HINCR4: Std_Logic_Vector(1 downto 0) := "01";
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constant HINCR8: Std_Logic_Vector(1 downto 0) := "10";
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constant HINCR16: Std_Logic_Vector(1 downto 0) := "11";
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-- constants for HSIZE definition (used with dma_in_type.Size)
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constant HSIZE8: Std_Logic_Vector(1 downto 0) := "00";
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constant HSIZE16: Std_Logic_Vector(1 downto 0) := "01";
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constant HSIZE32: Std_Logic_Vector(1 downto 0) := "10";
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-----------------------------------------------------------------------------
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-- Direct Memory Access to AMBA AHB Master Interface
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-----------------------------------------------------------------------------
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component DMA2AHB is
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generic(
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hindex: in Integer := 0;
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vendorid: in Integer := 0;
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deviceid: in Integer := 0;
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version: in Integer := 0;
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syncrst: in Integer := 1;
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boundary: in Integer := 1);
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port(
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-- AMBA AHB system signals
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HCLK: in Std_ULogic;
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HRESETn: in Std_ULogic;
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-- Direct Memory Access Interface
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DMAIn: in DMA_In_Type;
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DMAOut: out DMA_OUt_Type;
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-- AMBA AHB Master Interface
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AHBIn: in AHB_Mst_In_Type;
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AHBOut: out AHB_Mst_Out_Type);
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end component DMA2AHB;
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end package DMA2AHB_Package; --===============================================--
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