##// END OF EJS Templates
Commit Message Age Author Refs
load previous
r595:eb603d70d051
register the data outputed by ADC_driver
pellion
0
r594:a9702b7364d2
temp : update ADC driver - conversion part clocked by clk_49 (49.152 MHz) - cnv_clk = clk_49.152/100 with duty cycle of 50% - 3 period for each Ren, - Data sampling during the 2nd cycle of Ren, - each 2 data input, 1 data output (@)
pellion
0
r593:173a643f1c9c
temp
pellion
0
r592:7b23905bc9f6
temp
pellion
JC
0
r591:e0250657227b
ADD SDC constraint
pellion
JC
0
r590:f6390d699855
merge simu_with_leon3 (add lpp_dma_SEND16B_FIFO2DMA)
pellion
JC
0
r589:ebd290519818
update ok ??
pellion
0
r588:86f47bdf2a6e
force ADC output to constant or ramp.
pellion
0
r587:f2c158b74433
global reset delayed in function of ram_nbusy signal (waiting 16 falling edge).
pellion
0
r586:e44412efb127
temp JC
pellion
0
r585:fd7ec3818c5e
temp Alexis
pellion
0
r584:e4c118ae5ff2
update version
pellion
0
r583:3d475eacd91a
LFR-EQM 2.1.71
pellion
0
r582:3fed66e2161d
Simulation without RAM_CEL
pellion
0
r581:006d69890bba
custom dma : update lock generation into LPP_DMA's FSM state (Just for test)
pellion
0
r580:f4e8c3120b82
custom dma : update transition's condition between FSM state "ARBITER" and "CTRL"
pellion
0
r579:da926ab85276
Étiquette (LFR-EQM) 2-1-70 ajoutée à la révision bcb5a865d2bb
pellion
JC
0
r578:3cb99769151e
Étiquette (MINI-LFR) 0-1-70 ajoutée à la révision bcb5a865d2bb
pellion
JC
0
r577:bcb5a865d2bb
LFR-EQM et MINI-LFR x.1.70
pellion
0
r576:4347a39d5ac8
custom dma ready to test on board
pellion
0
load next
< 1 2 3 4 5 6 7 .. 33 >
showing 20 out of 656 commits