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1 | ------------------------------------------------------------------------------ | |||
|
2 | -- This file is a part of the LPP VHDL IP LIBRARY | |||
|
3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS | |||
|
4 | -- | |||
|
5 | -- This program is free software; you can redistribute it and/or modify | |||
|
6 | -- it under the terms of the GNU General Public License as published by | |||
|
7 | -- the Free Software Foundation; either version 2 of the License, or | |||
|
8 | -- (at your option) any later version. | |||
|
9 | -- | |||
|
10 | -- This program is distributed in the hope that it will be useful, | |||
|
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |||
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |||
|
13 | -- GNU General Public License for more details. | |||
|
14 | -- | |||
|
15 | -- You should have received a copy of the GNU General Public License | |||
|
16 | -- along with this program; if not, write to the Free Software | |||
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |||
|
18 | ------------------------------------------------------------------------------- | |||
|
19 | ---------------------------------------------------------------------------------- | |||
|
20 | -- Company: | |||
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21 | -- Engineer: | |||
|
22 | -- | |||
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23 | -- Create Date: 08:44:41 10/14/2010 | |||
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24 | -- Design Name: | |||
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25 | -- Module Name: Top_LCD - Behavioral | |||
|
26 | -- Project Name: | |||
|
27 | -- Target Devices: | |||
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28 | -- Tool versions: | |||
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29 | -- Description: | |||
|
30 | -- | |||
|
31 | -- Dependencies: | |||
|
32 | -- | |||
|
33 | -- Revision: | |||
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34 | -- Revision 0.01 - File Created | |||
|
35 | -- Additional Comments: | |||
|
36 | -- | |||
|
37 | ---------------------------------------------------------------------------------- | |||
|
38 | library IEEE; | |||
|
39 | use IEEE.STD_LOGIC_1164.ALL; | |||
|
40 | use ieee.numeric_std.all; | |||
|
41 | library grlib; | |||
|
42 | use grlib.amba.all; | |||
|
43 | use grlib.stdlib.all; | |||
|
44 | use grlib.devices.all; | |||
|
45 | library lpp; | |||
|
46 | use lpp.amba_lcd_16x2_ctrlr.all; | |||
|
47 | use lpp.LCD_16x2_CFG.all; | |||
|
48 | use lpp.lpp_amba.all; | |||
|
49 | ||||
|
50 | entity apb_lcd_ctrlr is | |||
|
51 | generic ( | |||
|
52 | pindex : integer := 0; | |||
|
53 | paddr : integer := 0; | |||
|
54 | pmask : integer := 16#fff#; | |||
|
55 | pirq : integer := 0; | |||
|
56 | abits : integer := 8); | |||
|
57 | port ( | |||
|
58 | rst : in std_ulogic; | |||
|
59 | clk : in std_ulogic; | |||
|
60 | apbi : in apb_slv_in_type; | |||
|
61 | apbo : out apb_slv_out_type; | |||
|
62 | LCD_data : out STD_LOGIC_VECTOR (7 downto 0); | |||
|
63 | LCD_RS : out STD_LOGIC; | |||
|
64 | LCD_RW : out STD_LOGIC; | |||
|
65 | LCD_E : out STD_LOGIC; | |||
|
66 | LCD_RET : out STD_LOGIC; | |||
|
67 | LCD_CS1 : out STD_LOGIC; | |||
|
68 | LCD_CS2 : out STD_LOGIC; | |||
|
69 | SF_CE0 : out std_logic | |||
|
70 | ); | |||
|
71 | end apb_lcd_ctrlr; | |||
|
72 | ||||
|
73 | architecture Behavioral of apb_lcd_ctrlr is | |||
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74 | ||||
|
75 | signal FramBUFF : STD_LOGIC_VECTOR(16*2*8-1 downto 0); | |||
|
76 | signal CMD : std_logic_vector(10 downto 0); | |||
|
77 | signal Exec : std_logic; | |||
|
78 | signal Ready : std_logic; | |||
|
79 | signal LCD_CTRL : LCD_DRVR_CTRL_BUSS; | |||
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80 | ||||
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81 | ||||
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82 | ||||
|
83 | constant REVISION : integer := 1; | |||
|
84 | ||||
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85 | constant pconfig : apb_config_type := ( | |||
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86 | 0 => ahb_device_reg (VENDOR_LPP, LPP_LCD_CTRLR, 0, REVISION, 0), | |||
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87 | 1 => apb_iobar(paddr, pmask)); | |||
|
88 | ||||
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89 | ||||
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90 | --type FRM_Buff_El is std_logic_vector(31 downto 0); | |||
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91 | type FRM_Buff_Reg is array(31 downto 0) of std_logic_vector(31 downto 0); | |||
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92 | ||||
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93 | ||||
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94 | type LCD_ctrlr_Reg is record | |||
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95 | CTRL_Reg : std_logic_vector(31 downto 0); | |||
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96 | FRAME_BUFF : FRM_Buff_Reg; | |||
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97 | end record; | |||
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98 | ||||
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99 | signal r : LCD_ctrlr_Reg; | |||
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100 | ||||
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101 | ||||
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102 | begin | |||
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103 | ||||
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104 | LCD_data <= LCD_CTRL.LCD_DATA; | |||
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105 | LCD_RS <= LCD_CTRL.LCD_RS; | |||
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106 | LCD_RW <= LCD_CTRL.LCD_RW; | |||
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107 | LCD_E <= LCD_CTRL.LCD_E; | |||
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108 | ||||
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109 | ||||
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110 | LCD_RET <= '0'; | |||
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111 | LCD_CS1 <= '0'; | |||
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112 | LCD_CS2 <= '0'; | |||
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113 | ||||
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114 | SF_CE0 <= '1'; | |||
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115 | ||||
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116 | CMD(7 downto 0) <= r.CTRL_Reg(7 downto 0); --CMD value | |||
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117 | CMD(9 downto 8) <= r.CTRL_Reg(9 downto 8); --CMD tempo value | |||
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118 | ||||
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119 | r.CTRL_Reg(10) <= Ready; | |||
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120 | ||||
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121 | Driver0 : LCD_16x2_ENGINE | |||
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122 | generic map(50000) | |||
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123 | Port map(clk,rst,FramBUFF,CMD,Exec,Ready,LCD_CTRL); | |||
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124 | ||||
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125 | FRM_BF : for i in 0 to 15 generate | |||
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126 | FramBUFF((8*(i+1))-1 downto 8*i) <= r.FRAME_BUFF(i)(7 downto 0); | |||
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127 | end generate; | |||
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128 | ||||
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129 | ||||
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130 | process(rst,clk) | |||
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131 | begin | |||
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132 | if rst = '0' then | |||
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133 | r.CTRL_Reg(9 downto 0) <= (others => '0'); | |||
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134 | apbo.prdata <= (others => '0'); | |||
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135 | Exec <= '0'; | |||
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136 | elsif clk'event and clk = '1' then | |||
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137 | ||||
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138 | --APB Write OP | |||
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139 | if (apbi.psel(pindex) and apbi.penable and apbi.pwrite) = '1' then | |||
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140 | case apbi.paddr(7 downto 2) is | |||
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141 | when "000000" => | |||
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142 | r.CTRL_Reg(9 downto 0) <= apbi.pwdata(9 downto 0); | |||
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143 | when others => | |||
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144 | writeC: for i in 1 to 32 loop | |||
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145 | if TO_INTEGER(unsigned(apbi.paddr(abits-1 downto 2))) =i then | |||
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146 | r.FRAME_BUFF(i-1) <= apbi.pwdata; | |||
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147 | end if; | |||
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148 | end loop; | |||
|
149 | end case; | |||
|
150 | end if; | |||
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151 | ||||
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152 | --APB READ OP | |||
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153 | if (apbi.psel(pindex) and apbi.penable and (not apbi.pwrite)) = '1' then | |||
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154 | case apbi.paddr(7 downto 2) is | |||
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155 | when "000000" => | |||
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156 | apbo.prdata <= r.CTRL_Reg; | |||
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157 | when others => | |||
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158 | readC: for i in 1 to 32 loop | |||
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159 | if TO_INTEGER(unsigned(apbi.paddr(abits-1 downto 2))) =i then | |||
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160 | apbo.prdata(7 downto 0) <= r.FRAME_BUFF(i-1)(7 downto 0); | |||
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161 | Exec <= '1'; | |||
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162 | end if; | |||
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163 | end loop; | |||
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164 | end case; | |||
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165 | else | |||
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166 | Exec <= '0'; | |||
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167 | end if; | |||
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168 | ||||
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169 | end if; | |||
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170 | apbo.pconfig <= pconfig; | |||
|
171 | end process; | |||
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172 | ||||
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173 | ||||
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174 | ||||
|
175 | end Behavioral; | |||
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176 | ||||
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177 | ||||
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178 | ||||
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179 | ||||
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180 | ||||
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181 |
@@ -1,137 +1,167 | |||||
1 | ------------------------------------------------------------------------------ |
|
1 | ------------------------------------------------------------------------------ | |
2 | -- This file is a part of the LPP VHDL IP LIBRARY |
|
2 | -- This file is a part of the LPP VHDL IP LIBRARY | |
3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS |
|
3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS | |
4 | -- |
|
4 | -- | |
5 | -- This program is free software; you can redistribute it and/or modify |
|
5 | -- This program is free software; you can redistribute it and/or modify | |
6 | -- it under the terms of the GNU General Public License as published by |
|
6 | -- it under the terms of the GNU General Public License as published by | |
7 | -- the Free Software Foundation; either version 2 of the License, or |
|
7 | -- the Free Software Foundation; either version 2 of the License, or | |
8 | -- (at your option) any later version. |
|
8 | -- (at your option) any later version. | |
9 | -- |
|
9 | -- | |
10 | -- This program is distributed in the hope that it will be useful, |
|
10 | -- This program is distributed in the hope that it will be useful, | |
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | -- GNU General Public License for more details. |
|
13 | -- GNU General Public License for more details. | |
14 | -- |
|
14 | -- | |
15 | -- You should have received a copy of the GNU General Public License |
|
15 | -- You should have received a copy of the GNU General Public License | |
16 | -- along with this program; if not, write to the Free Software |
|
16 | -- along with this program; if not, write to the Free Software | |
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | ------------------------------------------------------------------------------- |
|
18 | ------------------------------------------------------------------------------- | |
19 |
|
19 | |||
20 | library ieee; |
|
20 | library ieee; | |
21 | use ieee.std_logic_1164.all; |
|
21 | use ieee.std_logic_1164.all; | |
22 |
|
22 | library grlib; | ||
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23 | use grlib.amba.all; | |||
|
24 | use grlib.stdlib.all; | |||
|
25 | use grlib.devices.all; | |||
23 |
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26 | |||
24 |
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27 | |||
25 | package amba_lcd_16x2_ctrlr is |
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28 | package amba_lcd_16x2_ctrlr is | |
26 |
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29 | |||
27 |
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30 | |||
28 | type LCD_DRVR_CTRL_BUSS is |
|
31 | type LCD_DRVR_CTRL_BUSS is | |
29 | record |
|
32 | record | |
30 | LCD_RW : std_logic; |
|
33 | LCD_RW : std_logic; | |
31 | LCD_RS : std_logic; |
|
34 | LCD_RS : std_logic; | |
32 | LCD_E : std_logic; |
|
35 | LCD_E : std_logic; | |
33 | LCD_DATA : std_logic_vector(7 downto 0); |
|
36 | LCD_DATA : std_logic_vector(7 downto 0); | |
34 | end record; |
|
37 | end record; | |
35 |
|
38 | |||
36 | type LCD_DRVR_SYNCH_BUSS is |
|
39 | type LCD_DRVR_SYNCH_BUSS is | |
37 | record |
|
40 | record | |
38 | DRVR_READY : std_logic; |
|
41 | DRVR_READY : std_logic; | |
39 | LCD_INITIALISED : std_logic; |
|
42 | LCD_INITIALISED : std_logic; | |
40 | end record; |
|
43 | end record; | |
41 |
|
44 | |||
42 |
|
45 | |||
43 | type LCD_DRVR_CMD_BUSS is |
|
46 | type LCD_DRVR_CMD_BUSS is | |
44 | record |
|
47 | record | |
45 | Word : std_logic_vector(7 downto 0); |
|
48 | Word : std_logic_vector(7 downto 0); | |
46 | CMD_Data : std_logic; --CMD = '0' and data = '1' |
|
49 | CMD_Data : std_logic; --CMD = '0' and data = '1' | |
47 | Exec : std_logic; |
|
50 | Exec : std_logic; | |
48 | Duration : std_logic_vector(1 downto 0); |
|
51 | Duration : std_logic_vector(1 downto 0); | |
49 | end record; |
|
52 | end record; | |
50 | type LCD_CFG_Tbl is array(0 to 4) of std_logic_vector(7 downto 0); |
|
53 | type LCD_CFG_Tbl is array(0 to 4) of std_logic_vector(7 downto 0); | |
51 |
|
54 | |||
52 |
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55 | |||
53 |
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56 | |||
54 | component LCD_16x2_DRIVER is |
|
57 | component LCD_16x2_DRIVER is | |
55 | generic( |
|
58 | generic( | |
56 | OSC_Freq_MHz : integer:=60 |
|
59 | OSC_Freq_MHz : integer:=60 | |
57 | ); |
|
60 | ); | |
58 | Port ( reset : in STD_LOGIC; |
|
61 | Port ( reset : in STD_LOGIC; | |
59 | clk : in STD_LOGIC; |
|
62 | clk : in STD_LOGIC; | |
60 | LCD_CTRL : out LCD_DRVR_CTRL_BUSS; |
|
63 | LCD_CTRL : out LCD_DRVR_CTRL_BUSS; | |
61 | SYNCH : out LCD_DRVR_SYNCH_BUSS; |
|
64 | SYNCH : out LCD_DRVR_SYNCH_BUSS; | |
62 | DRIVER_CMD : in LCD_DRVR_CMD_BUSS |
|
65 | DRIVER_CMD : in LCD_DRVR_CMD_BUSS | |
63 | ); |
|
66 | ); | |
64 | end component; |
|
67 | end component; | |
65 |
|
68 | |||
66 |
|
69 | |||
67 |
|
70 | |||
68 | component amba_lcd_16x2_driver is |
|
71 | component amba_lcd_16x2_driver is | |
69 | Port ( reset : in STD_LOGIC; |
|
72 | Port ( reset : in STD_LOGIC; | |
70 | clk : in STD_LOGIC; |
|
73 | clk : in STD_LOGIC; | |
71 | Bp0 : in STD_LOGIC; |
|
74 | Bp0 : in STD_LOGIC; | |
72 | Bp1 : in STD_LOGIC; |
|
75 | Bp1 : in STD_LOGIC; | |
73 | Bp2 : in STD_LOGIC; |
|
76 | Bp2 : in STD_LOGIC; | |
74 | LCD_data : out STD_LOGIC_VECTOR (7 downto 0); |
|
77 | LCD_data : out STD_LOGIC_VECTOR (7 downto 0); | |
75 | LCD_RS : out STD_LOGIC; |
|
78 | LCD_RS : out STD_LOGIC; | |
76 | LCD_RW : out STD_LOGIC; |
|
79 | LCD_RW : out STD_LOGIC; | |
77 | LCD_E : out STD_LOGIC; |
|
80 | LCD_E : out STD_LOGIC; | |
78 | LCD_RET : out STD_LOGIC; |
|
81 | LCD_RET : out STD_LOGIC; | |
79 | LCD_CS1 : out STD_LOGIC; |
|
82 | LCD_CS1 : out STD_LOGIC; | |
80 | LCD_CS2 : out STD_LOGIC; |
|
83 | LCD_CS2 : out STD_LOGIC; | |
81 | SF_CE0 : out std_logic |
|
84 | SF_CE0 : out std_logic | |
82 | ); |
|
85 | ); | |
83 | end component; |
|
86 | end component; | |
84 |
|
87 | |||
85 |
|
88 | |||
86 |
|
89 | |||
87 | component FRAME_CLK_GEN is |
|
90 | component FRAME_CLK_GEN is | |
88 | generic(OSC_freqKHz : integer := 50000); |
|
91 | generic(OSC_freqKHz : integer := 50000); | |
89 | Port ( clk : in STD_LOGIC; |
|
92 | Port ( clk : in STD_LOGIC; | |
90 | reset : in STD_LOGIC; |
|
93 | reset : in STD_LOGIC; | |
91 | FRAME_CLK : out STD_LOGIC); |
|
94 | FRAME_CLK : out STD_LOGIC); | |
92 | end component; |
|
95 | end component; | |
93 |
|
96 | |||
94 |
|
97 | |||
95 |
|
98 | |||
96 | component LCD_2x16_DRIVER is |
|
99 | component LCD_2x16_DRIVER is | |
97 | generic( |
|
100 | generic( | |
98 | OSC_Freq_MHz : integer:=60; |
|
101 | OSC_Freq_MHz : integer:=60; | |
99 | Refresh_RateHz : integer:=5 |
|
102 | Refresh_RateHz : integer:=5 | |
100 | ); |
|
103 | ); | |
101 | Port ( clk : in STD_LOGIC; |
|
104 | Port ( clk : in STD_LOGIC; | |
102 | reset : in STD_LOGIC; |
|
105 | reset : in STD_LOGIC; | |
103 | FramBUFF : in STD_LOGIC_VECTOR(16*2*8-1 downto 0); |
|
106 | FramBUFF : in STD_LOGIC_VECTOR(16*2*8-1 downto 0); | |
104 | LCD_data : out STD_LOGIC_VECTOR (7 downto 0); |
|
107 | LCD_data : out STD_LOGIC_VECTOR (7 downto 0); | |
105 | LCD_RS : out STD_LOGIC; |
|
108 | LCD_RS : out STD_LOGIC; | |
106 | LCD_RW : out STD_LOGIC; |
|
109 | LCD_RW : out STD_LOGIC; | |
107 | LCD_E : out STD_LOGIC; |
|
110 | LCD_E : out STD_LOGIC; | |
108 | LCD_RET : out STD_LOGIC; |
|
111 | LCD_RET : out STD_LOGIC; | |
109 | LCD_CS1 : out STD_LOGIC; |
|
112 | LCD_CS1 : out STD_LOGIC; | |
110 | LCD_CS2 : out STD_LOGIC; |
|
113 | LCD_CS2 : out STD_LOGIC; | |
111 | STATEOUT: out std_logic_vector(3 downto 0); |
|
114 | STATEOUT: out std_logic_vector(3 downto 0); | |
112 | refreshPulse : out std_logic |
|
115 | refreshPulse : out std_logic | |
113 | ); |
|
116 | ); | |
114 | end component; |
|
117 | end component; | |
115 |
|
118 | |||
116 |
|
119 | |||
117 | component LCD_CLK_GENERATOR is |
|
120 | component LCD_CLK_GENERATOR is | |
118 | generic(OSC_freqKHz : integer := 50000); |
|
121 | generic(OSC_freqKHz : integer := 50000); | |
119 | Port ( clk : in STD_LOGIC; |
|
122 | Port ( clk : in STD_LOGIC; | |
120 | reset : in STD_LOGIC; |
|
123 | reset : in STD_LOGIC; | |
121 | clk_1us : out STD_LOGIC); |
|
124 | clk_1us : out STD_LOGIC); | |
122 | end component; |
|
125 | end component; | |
123 |
|
126 | |||
124 | component LCD_16x2_ENGINE is |
|
127 | component LCD_16x2_ENGINE is | |
125 | generic(OSC_freqKHz : integer := 50000); |
|
128 | generic(OSC_freqKHz : integer := 50000); | |
126 | Port ( clk : in STD_LOGIC; |
|
129 | Port ( clk : in STD_LOGIC; | |
127 | reset : in STD_LOGIC; |
|
130 | reset : in STD_LOGIC; | |
128 | DATA : in std_logic_vector(16*2*8-1 downto 0); |
|
131 | DATA : in std_logic_vector(16*2*8-1 downto 0); | |
129 | CMD : in std_logic_vector(10 downto 0); |
|
132 | CMD : in std_logic_vector(10 downto 0); | |
130 | Exec : in std_logic; |
|
133 | Exec : in std_logic; | |
131 | Ready : out std_logic; |
|
134 | Ready : out std_logic; | |
132 | LCD_CTRL : out LCD_DRVR_CTRL_BUSS |
|
135 | LCD_CTRL : out LCD_DRVR_CTRL_BUSS | |
133 | ); |
|
136 | ); | |
134 | end component; |
|
137 | end component; | |
135 |
|
138 | |||
136 |
|
139 | |||
|
140 | ||||
|
141 | component apb_lcd_ctrlr is | |||
|
142 | generic ( | |||
|
143 | pindex : integer := 0; | |||
|
144 | paddr : integer := 0; | |||
|
145 | pmask : integer := 16#fff#; | |||
|
146 | pirq : integer := 0; | |||
|
147 | abits : integer := 8); | |||
|
148 | port ( | |||
|
149 | rst : in std_ulogic; | |||
|
150 | clk : in std_ulogic; | |||
|
151 | apbi : in apb_slv_in_type; | |||
|
152 | apbo : out apb_slv_out_type; | |||
|
153 | LCD_data : out STD_LOGIC_VECTOR (7 downto 0); | |||
|
154 | LCD_RS : out STD_LOGIC; | |||
|
155 | LCD_RW : out STD_LOGIC; | |||
|
156 | LCD_E : out STD_LOGIC; | |||
|
157 | LCD_RET : out STD_LOGIC; | |||
|
158 | LCD_CS1 : out STD_LOGIC; | |||
|
159 | LCD_CS2 : out STD_LOGIC; | |||
|
160 | SF_CE0 : out std_logic | |||
|
161 | ); | |||
|
162 | end component; | |||
|
163 | ||||
|
164 | ||||
|
165 | ||||
|
166 | ||||
137 | end; |
|
167 | end; |
@@ -1,8 +1,9 | |||||
1 | amba_lcd_16x2_ctrlr.vhd |
|
1 | amba_lcd_16x2_ctrlr.vhd | |
|
2 | apb_lcd_ctrlr.vhd | |||
2 | FRAME_CLK.vhd |
|
3 | FRAME_CLK.vhd | |
3 | LCD_16x2_CFG.vhd |
|
4 | LCD_16x2_CFG.vhd | |
4 | LCD_16x2_DRVR.vhd |
|
5 | LCD_16x2_DRVR.vhd | |
5 | LCD_16x2_ENGINE.vhd |
|
6 | LCD_16x2_ENGINE.vhd | |
6 | LCD_2x16_DRIVER.vhd |
|
7 | LCD_2x16_DRIVER.vhd | |
7 | LCD_CLK_GENERATOR.vhd |
|
8 | LCD_CLK_GENERATOR.vhd | |
8 | Top_LCD.vhd |
|
9 | Top_LCD.vhd |
@@ -1,75 +1,76 | |||||
1 | ------------------------------------------------------------------------------ |
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1 | ------------------------------------------------------------------------------ | |
2 | -- This file is a part of the LPP VHDL IP LIBRARY |
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2 | -- This file is a part of the LPP VHDL IP LIBRARY | |
3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS |
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3 | -- Copyright (C) 2009 - 2010, Laboratory of Plasmas Physic - CNRS | |
4 | -- |
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4 | -- | |
5 | -- This program is free software; you can redistribute it and/or modify |
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5 | -- This program is free software; you can redistribute it and/or modify | |
6 | -- it under the terms of the GNU General Public License as published by |
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6 | -- it under the terms of the GNU General Public License as published by | |
7 | -- the Free Software Foundation; either version 2 of the License, or |
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7 | -- the Free Software Foundation; either version 2 of the License, or | |
8 | -- (at your option) any later version. |
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8 | -- (at your option) any later version. | |
9 | -- |
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9 | -- | |
10 | -- This program is distributed in the hope that it will be useful, |
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10 | -- This program is distributed in the hope that it will be useful, | |
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
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11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | -- GNU General Public License for more details. |
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13 | -- GNU General Public License for more details. | |
14 | -- |
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14 | -- | |
15 | -- You should have received a copy of the GNU General Public License |
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15 | -- You should have received a copy of the GNU General Public License | |
16 | -- along with this program; if not, write to the Free Software |
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16 | -- along with this program; if not, write to the Free Software | |
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | ------------------------------------------------------------------------------- |
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18 | ------------------------------------------------------------------------------- | |
19 |
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19 | |||
20 | library ieee; |
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20 | library ieee; | |
21 | use ieee.std_logic_1164.all; |
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21 | use ieee.std_logic_1164.all; | |
22 | library grlib; |
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22 | library grlib; | |
23 | use grlib.amba.all; |
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23 | use grlib.amba.all; | |
24 | -- pragma translate_off |
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24 | -- pragma translate_off | |
25 | use std.textio.all; |
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25 | use std.textio.all; | |
26 | -- pragma translate_on |
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26 | -- pragma translate_on | |
27 |
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27 | |||
28 |
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28 | |||
29 |
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29 | |||
30 | package lpp_amba is |
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30 | package lpp_amba is | |
31 |
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31 | |||
32 | constant VENDOR_LPP : amba_vendor_type := 16#19#; |
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32 | constant VENDOR_LPP : amba_vendor_type := 16#19#; | |
33 |
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33 | |||
34 | -- LPP device ids |
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34 | -- LPP device ids | |
35 |
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35 | |||
36 | constant ROCKET_TM : amba_device_type := 16#001#; |
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36 | constant ROCKET_TM : amba_device_type := 16#001#; | |
37 | constant otherCore : amba_device_type := 16#002#; |
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37 | constant otherCore : amba_device_type := 16#002#; | |
38 | constant LPP_SIMPLE_DIODE : amba_device_type := 16#003#; |
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38 | constant LPP_SIMPLE_DIODE : amba_device_type := 16#003#; | |
39 | constant LPP_MULTI_DIODE : amba_device_type := 16#004#; |
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39 | constant LPP_MULTI_DIODE : amba_device_type := 16#004#; | |
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40 | constant LPP_LCD_CTRLR : amba_device_type := 16#005#; | |||
40 |
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41 | |||
41 |
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42 | |||
42 | component APB_SIMPLE_DIODE is |
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43 | component APB_SIMPLE_DIODE is | |
43 | generic ( |
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44 | generic ( | |
44 | pindex : integer := 0; |
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45 | pindex : integer := 0; | |
45 | paddr : integer := 0; |
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46 | paddr : integer := 0; | |
46 | pmask : integer := 16#fff#; |
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47 | pmask : integer := 16#fff#; | |
47 | pirq : integer := 0; |
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48 | pirq : integer := 0; | |
48 | abits : integer := 8); |
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49 | abits : integer := 8); | |
49 | port ( |
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50 | port ( | |
50 | rst : in std_ulogic; |
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51 | rst : in std_ulogic; | |
51 | clk : in std_ulogic; |
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52 | clk : in std_ulogic; | |
52 | apbi : in apb_slv_in_type; |
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53 | apbi : in apb_slv_in_type; | |
53 | apbo : out apb_slv_out_type; |
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54 | apbo : out apb_slv_out_type; | |
54 | LED : out std_ulogic |
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55 | LED : out std_ulogic | |
55 | ); |
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56 | ); | |
56 | end component; |
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57 | end component; | |
57 |
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58 | |||
58 |
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59 | |||
59 | component APB_MULTI_DIODE is |
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60 | component APB_MULTI_DIODE is | |
60 | generic ( |
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61 | generic ( | |
61 | pindex : integer := 0; |
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62 | pindex : integer := 0; | |
62 | paddr : integer := 0; |
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63 | paddr : integer := 0; | |
63 | pmask : integer := 16#fff#; |
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64 | pmask : integer := 16#fff#; | |
64 | pirq : integer := 0; |
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65 | pirq : integer := 0; | |
65 | abits : integer := 8); |
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66 | abits : integer := 8); | |
66 | port ( |
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67 | port ( | |
67 | rst : in std_ulogic; |
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68 | rst : in std_ulogic; | |
68 | clk : in std_ulogic; |
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69 | clk : in std_ulogic; | |
69 | apbi : in apb_slv_in_type; |
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70 | apbi : in apb_slv_in_type; | |
70 | apbo : out apb_slv_out_type; |
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71 | apbo : out apb_slv_out_type; | |
71 | LED : out std_logic_vector(2 downto 0) |
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72 | LED : out std_logic_vector(2 downto 0) | |
72 | ); |
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73 | ); | |
73 | end component; |
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74 | end component; | |
74 |
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75 | |||
75 | end; |
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76 | end; |
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