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Clone from https://hephaistos.lpp.polytechnique.fr/rhodecode/HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib

EQM debug
pellion -
r566:69ac13e4d137 JC
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@@ -18,7 +18,7 LIBRARY lpp;
18 18 USE lpp.lpp_sim_pkg.ALL;
19 19 USE lpp.lpp_lfr_sim_pkg.ALL;
20 20 USE lpp.lpp_lfr_apbreg_pkg.ALL;
21 USE lpp.lpp_lfr_time_management_apbreg_pkg.ALL;
21 USE lpp.lpp_lfr_management_apbreg_pkg.ALL;
22 22
23 23
24 24 ENTITY testbench IS
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@@ -34,7 +34,7 USE techmap.gencomp.ALL;
34 34 LIBRARY lpp;
35 35 USE lpp.lpp_sim_pkg.ALL;
36 36 USE lpp.lpp_lfr_apbreg_pkg.ALL;
37 USE lpp.lpp_lfr_time_management_apbreg_pkg.ALL;
37 USE lpp.lpp_lfr_management_apbreg_pkg.ALL;
38 38
39 39 PACKAGE lpp_lfr_sim_pkg IS
40 40
@@ -195,8 +195,8 PACKAGE BODY lpp_lfr_sim_pkg IS
195 195 CONSTANT ADDR_BASE_TIME_MANAGMENT : IN STD_LOGIC_VECTOR(31 DOWNTO 8))
196 196 IS
197 197 BEGIN
198 UART_WRITE(TX,tx_period,ADDR_BASE_TIME_MANAGMENT & ADDR_LFR_TM_CONTROL , X"00000000");
199 UART_WRITE(TX,tx_period,ADDR_BASE_TIME_MANAGMENT & ADDR_LFR_TM_TIME_LOAD , X"00000000");
198 UART_WRITE(TX,tx_period,ADDR_BASE_TIME_MANAGMENT & ADDR_LFR_MANAGMENT_CONTROL , X"00000000");
199 UART_WRITE(TX,tx_period,ADDR_BASE_TIME_MANAGMENT & ADDR_LFR_MANAGMENT_TIME_LOAD , X"00000000");
200 200 END;
201 201
202 202 PROCEDURE LAUNCH_SPECTRAL_MATRIX(
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