Makefile
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| text/x-makefile
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r543 | #GRLIB=../.. | ||
| VHDLIB=../.. | ||||
| SCRIPTSDIR=$(VHDLIB)/scripts/ | ||||
| GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh) | ||||
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r639 | TOP=testbench | ||
| BOARD=LFR-EQM | ||||
| include $(VHDLIB)/boards/$(BOARD)/Makefile_RTAX.inc | ||||
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r543 | DEVICE=$(PART)-$(PACKAGE)$(SPEED) | ||
| UCF=$(GRLIB)/boards/$(BOARD)/$(TOP).ucf | ||||
| QSF=$(GRLIB)/boards/$(BOARD)/$(TOP).qsf | ||||
| EFFORT=high | ||||
| XSTOPT= | ||||
| SYNPOPT="set_option -pipe 0; set_option -retiming 0; set_option -write_apr_constraint 0" | ||||
| #VHDLSYNFILES=config.vhd ahbrom.vhd leon3mp.vhd | ||||
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r639 | VHDLSYNFILES= IIR_CEL_TEST.vhd tb.vhd IIR_CEL_TEST_v3.vhd generator.vhd | ||
| VHDLSIMFILES= tb.vhd | ||||
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r543 | SIMTOP=testbench | ||
| #SDCFILE=$(GRLIB)/boards/$(BOARD)/synplify.sdc | ||||
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r639 | PDC=$(VHDLIB)/boards/$(BOARD)/LFR_EQM_RTAX.pdc | ||
| SDC=$(VHDLIB)/boards/$(BOARD)/LFR_EQM_altran_syn_fanout.sdc | ||||
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r543 | BITGEN=$(GRLIB)/boards/$(BOARD)/default.ut | ||
| CLEAN=soft-clean | ||||
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r639 | TECHLIBS = axcelerator | ||
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r543 | |||
| LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \ | ||||
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r639 | tmtc openchip hynix ihp gleichmann micron usbhc opencores | ||
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r543 | |||
| DIRSKIP = b1553 pcif leon2 leon2ft crypto satcan ddr usb ata i2c \ | ||||
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r639 | pci grusbhc haps slink ascs can pwm greth coremp7 spi ac97 \ | ||
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r543 | ./amba_lcd_16x2_ctrlr \ | ||
| ./general_purpose/lpp_AMR \ | ||||
| ./general_purpose/lpp_balise \ | ||||
| ./general_purpose/lpp_delay \ | ||||
| ./lpp_bootloader \ | ||||
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r639 | ./lfr_management \ | ||
| ./lpp_sim \ | ||||
| ./lpp_sim/CY7C1061DV33 \ | ||||
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r543 | ./lpp_cna \ | ||
| ./lpp_uart \ | ||||
| ./lpp_usb \ | ||||
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r639 | ./dsp/lpp_fft \ | ||
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r543 | |||
| FILESKIP = i2cmst.vhd \ | ||||
| APB_MULTI_DIODE.vhd \ | ||||
| APB_MULTI_DIODE.vhd \ | ||||
| Top_MatrixSpec.vhd \ | ||||
| APB_FFT.vhd \ | ||||
| lpp_lfr_apbreg.vhd \ | ||||
| CoreFFT.vhd | ||||
| include $(GRLIB)/bin/Makefile | ||||
| include $(GRLIB)/software/leon3/Makefile | ||||
| ################## project specific targets ########################## | ||||