defconfig
243 lines
| 5.0 KiB
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|
TextLexer
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|
r14 | # | ||
| # Automatically generated make config: don't edit | ||||
| # | ||||
| # | ||||
| # Synthesis | ||||
| # | ||||
| # CONFIG_SYN_INFERRED is not set | ||||
| # CONFIG_SYN_ALTERA is not set | ||||
| # CONFIG_SYN_AXCEL is not set | ||||
| # CONFIG_SYN_PROASIC is not set | ||||
| # CONFIG_SYN_PROASICPLUS is not set | ||||
| # CONFIG_SYN_PROASIC3 is not set | ||||
| # CONFIG_SYN_ATC18 is not set | ||||
| # CONFIG_SYN_IHP25 is not set | ||||
| # CONFIG_SYN_LATTICE is not set | ||||
| # CONFIG_SYN_RH_LIB18T is not set | ||||
| # CONFIG_SYN_RHUMC is not set | ||||
| # CONFIG_SYN_SPARTAN2 is not set | ||||
| # CONFIG_SYN_SPARTAN3 is not set | ||||
| # CONFIG_SYN_VIRTEX is not set | ||||
| # CONFIG_SYN_VIRTEXE is not set | ||||
| # CONFIG_SYN_VIRTEX2 is not set | ||||
| CONFIG_SYN_VIRTEX4=y | ||||
| # CONFIG_SYN_INFER_RAM is not set | ||||
| # CONFIG_SYN_INFER_PADS is not set | ||||
| # CONFIG_SYN_NO_ASYNC is not set | ||||
| # | ||||
| # Clock generation | ||||
| # | ||||
| # CONFIG_CLK_INFERRED is not set | ||||
| # CONFIG_CLK_HCLKBUF is not set | ||||
| # CONFIG_CLK_ALTDLL is not set | ||||
| # CONFIG_CLK_LATDLL is not set | ||||
| # CONFIG_CLK_LIB18T is not set | ||||
| # CONFIG_CLK_CLKDLL is not set | ||||
| CONFIG_CLK_DCM=y | ||||
| CONFIG_CLK_MUL=7 | ||||
| CONFIG_CLK_DIV=10 | ||||
| # CONFIG_PCI_CLKDLL is not set | ||||
| # CONFIG_CLK_NOFB is not set | ||||
| # CONFIG_PCI_SYSCLK is not set | ||||
| CONFIG_LEON3=y | ||||
| CONFIG_PROC_NUM=1 | ||||
| # | ||||
| # Processor | ||||
| # | ||||
| # | ||||
| # Integer unit | ||||
| # | ||||
| CONFIG_IU_NWINDOWS=8 | ||||
| CONFIG_IU_V8MULDIV=y | ||||
| # CONFIG_IU_MUL_LATENCY_4 is not set | ||||
| CONFIG_IU_MUL_LATENCY_5=y | ||||
| # CONFIG_IU_MUL_MAC is not set | ||||
| # CONFIG_IU_SVT is not set | ||||
| CONFIG_IU_LDELAY=1 | ||||
| CONFIG_IU_WATCHPOINTS=2 | ||||
| # CONFIG_PWD is not set | ||||
| CONFIG_IU_RSTADDR=00000 | ||||
| # | ||||
| # Floating-point unit | ||||
| # | ||||
| # CONFIG_FPU_ENABLE is not set | ||||
| # | ||||
| # Cache system | ||||
| # | ||||
| CONFIG_ICACHE_ENABLE=y | ||||
| CONFIG_ICACHE_ASSO1=y | ||||
| # CONFIG_ICACHE_ASSO2 is not set | ||||
| # CONFIG_ICACHE_ASSO3 is not set | ||||
| # CONFIG_ICACHE_ASSO4 is not set | ||||
| # CONFIG_ICACHE_SZ1 is not set | ||||
| # CONFIG_ICACHE_SZ2 is not set | ||||
| CONFIG_ICACHE_SZ4=y | ||||
| # CONFIG_ICACHE_SZ8 is not set | ||||
| # CONFIG_ICACHE_SZ16 is not set | ||||
| # CONFIG_ICACHE_SZ32 is not set | ||||
| # CONFIG_ICACHE_SZ64 is not set | ||||
| # CONFIG_ICACHE_SZ128 is not set | ||||
| # CONFIG_ICACHE_SZ256 is not set | ||||
| # CONFIG_ICACHE_LZ16 is not set | ||||
| CONFIG_ICACHE_LZ32=y | ||||
| CONFIG_DCACHE_ENABLE=y | ||||
| CONFIG_DCACHE_ASSO1=y | ||||
| # CONFIG_DCACHE_ASSO2 is not set | ||||
| # CONFIG_DCACHE_ASSO3 is not set | ||||
| # CONFIG_DCACHE_ASSO4 is not set | ||||
| # CONFIG_DCACHE_SZ1 is not set | ||||
| # CONFIG_DCACHE_SZ2 is not set | ||||
| CONFIG_DCACHE_SZ4=y | ||||
| # CONFIG_DCACHE_SZ8 is not set | ||||
| # CONFIG_DCACHE_SZ16 is not set | ||||
| # CONFIG_DCACHE_SZ32 is not set | ||||
| # CONFIG_DCACHE_SZ64 is not set | ||||
| # CONFIG_DCACHE_SZ128 is not set | ||||
| # CONFIG_DCACHE_SZ256 is not set | ||||
| # CONFIG_DCACHE_LZ16 is not set | ||||
| CONFIG_DCACHE_LZ32=y | ||||
| CONFIG_DCACHE_SNOOP=y | ||||
| # CONFIG_DCACHE_SNOOP_FAST is not set | ||||
| CONFIG_CACHE_FIXED=0 | ||||
| # | ||||
| # MMU | ||||
| # | ||||
| CONFIG_MMU_ENABLE=y | ||||
| # CONFIG_MMU_COMBINED is not set | ||||
| CONFIG_MMU_SPLIT=y | ||||
| CONFIG_MMU_REPARRAY=y | ||||
| # CONFIG_MMU_REPINCREMENT is not set | ||||
| # CONFIG_MMU_I2 is not set | ||||
| # CONFIG_MMU_I4 is not set | ||||
| CONFIG_MMU_I8=y | ||||
| # CONFIG_MMU_I16 is not set | ||||
| # CONFIG_MMU_I32 is not set | ||||
| # CONFIG_MMU_D2 is not set | ||||
| # CONFIG_MMU_D4 is not set | ||||
| CONFIG_MMU_D8=y | ||||
| # CONFIG_MMU_D16 is not set | ||||
| # CONFIG_MMU_D32 is not set | ||||
| # | ||||
| # Debug Support Unit | ||||
| # | ||||
| CONFIG_DSU_ENABLE=y | ||||
| CONFIG_DSU_ITRACE=y | ||||
| # CONFIG_DSU_ITRACESZ1 is not set | ||||
| CONFIG_DSU_ITRACESZ2=y | ||||
| # CONFIG_DSU_ITRACESZ4 is not set | ||||
| # CONFIG_DSU_ITRACESZ8 is not set | ||||
| # CONFIG_DSU_ITRACESZ16 is not set | ||||
| CONFIG_DSU_ATRACE=y | ||||
| # CONFIG_DSU_ATRACESZ1 is not set | ||||
| CONFIG_DSU_ATRACESZ2=y | ||||
| # CONFIG_DSU_ATRACESZ4 is not set | ||||
| # CONFIG_DSU_ATRACESZ8 is not set | ||||
| # CONFIG_DSU_ATRACESZ16 is not set | ||||
| # | ||||
| # VHDL debug settings | ||||
| # | ||||
| # CONFIG_IU_DISAS is not set | ||||
| # CONFIG_DEBUG_PC32 is not set | ||||
| # | ||||
| # AMBA configuration | ||||
| # | ||||
| CONFIG_AHB_DEFMST=0 | ||||
| CONFIG_AHB_RROBIN=y | ||||
| # CONFIG_AHB_SPLIT is not set | ||||
| CONFIG_AHB_IOADDR=FFF | ||||
| CONFIG_APB_HADDR=800 | ||||
| # | ||||
| # Debug Link | ||||
| # | ||||
| CONFIG_DSU_UART=y | ||||
| # CONFIG_DSU_JTAG is not set | ||||
| CONFIG_DSU_ETH=y | ||||
| # CONFIG_DSU_ETHSZ1 is not set | ||||
| CONFIG_DSU_ETHSZ2=y | ||||
| # CONFIG_DSU_ETHSZ4 is not set | ||||
| # CONFIG_DSU_ETHSZ8 is not set | ||||
| # CONFIG_DSU_ETHSZ16 is not set | ||||
| CONFIG_DSU_IPMSB=C0A8 | ||||
| CONFIG_DSU_IPLSB=0045 | ||||
| CONFIG_DSU_ETHMSB=00007A | ||||
| CONFIG_DSU_ETHLSB=CC0055 | ||||
| # | ||||
| # Peripherals | ||||
| # | ||||
| # | ||||
| # Memory controllers | ||||
| # | ||||
| # | ||||
| # Leon2 memory controller | ||||
| # | ||||
| CONFIG_MCTRL_LEON2=y | ||||
| # CONFIG_MCTRL_8BIT is not set | ||||
| CONFIG_MCTRL_16BIT=y | ||||
| # CONFIG_MCTRL_5CS is not set | ||||
| # CONFIG_MCTRL_SDRAM is not set | ||||
| # | ||||
| # DDR266 SDRAM controller | ||||
| # | ||||
| CONFIG_DDRSP=y | ||||
| CONFIG_DDRSP_INIT=y | ||||
| CONFIG_DDRSP_FREQ=100 | ||||
| CONFIG_DDRSP_COL=9 | ||||
| # CONFIG_DDRSP_64M is not set | ||||
| # CONFIG_DDRSP_128M is not set | ||||
| CONFIG_DDRSP_256M=y | ||||
| # CONFIG_DDRSP_512M is not set | ||||
| # CONFIG_DDRSP_1G is not set | ||||
| # | ||||
| # On-chip RAM/ROM | ||||
| # | ||||
| # CONFIG_AHBROM_ENABLE is not set | ||||
| # CONFIG_AHBRAM_ENABLE is not set | ||||
| # | ||||
| # Ethernet | ||||
| # | ||||
| CONFIG_GRETH_ENABLE=y | ||||
| CONFIG_GRETH_GIGA=y | ||||
| # | ||||
| # UARTs, timers and irq control | ||||
| # | ||||
| CONFIG_UART1_ENABLE=y | ||||
| # CONFIG_UA1_FIFO1 is not set | ||||
| # CONFIG_UA1_FIFO2 is not set | ||||
| # CONFIG_UA1_FIFO4 is not set | ||||
| CONFIG_UA1_FIFO8=y | ||||
| # CONFIG_UA1_FIFO16 is not set | ||||
| # CONFIG_UA1_FIFO32 is not set | ||||
| CONFIG_IRQ3_ENABLE=y | ||||
| CONFIG_GPT_ENABLE=y | ||||
| CONFIG_GPT_NTIM=2 | ||||
| CONFIG_GPT_SW=8 | ||||
| CONFIG_GPT_TW=32 | ||||
| CONFIG_GPT_IRQ=8 | ||||
| CONFIG_GPT_SEPIRQ=y | ||||
| # CONFIG_GPT_WDOGEN is not set | ||||
| CONFIG_GRGPIO_ENABLE=y | ||||
| CONFIG_GRGPIO_WIDTH=8 | ||||
| CONFIG_GRGPIO_IMASK=0000 | ||||
| # | ||||
| # VHDL Debugging | ||||
| # | ||||
| # CONFIG_DEBUG_UART is not set | ||||