top_libero.prj
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martin
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r100 | KEY LIBERO "9.1" | ||
Alexis Jeandet
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r181 | KEY CAPTURE "9.1.3.4" | ||
KEY DEFAULT_IMPORT_LOC "" | ||||
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r100 | KEY DEFAULT_OPEN_LOC "" | ||
Alexis Jeandet
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r181 | KEY ProjectID "ef446e1c-1d6a-43a8-a14a-ebd5dda7bc29" | ||
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r100 | KEY HDLTechnology "VHDL" | ||
KEY VendorTechnology_Family "ProASIC3L" | ||||
Alexis Jeandet
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r181 | KEY VendorTechnology_Die "IS8X8M2LDP" | ||
KEY VendorTechnology_Package "fg256" | ||||
KEY ProjectLocation "C:\opt\VHD_Lib\designs\ProjetBlanc-LeonLPP-A3PE3kL" | ||||
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r100 | KEY SimulationType "VHDL" | ||
KEY Vendor "Actel" | ||||
Alexis Jeandet
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r181 | KEY ActiveRoot "ahbrom::work" | ||
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r100 | LIST REVISIONS | ||
VALUE="Impl1",NUM=1 | ||||
VALUE="Impl2",NUM=2 | ||||
CURREV=2 | ||||
ENDLIST | ||||
LIST LIBRARIES | ||||
grlib | ||||
synplify | ||||
techmap | ||||
spw | ||||
eth | ||||
opencores | ||||
gaisler | ||||
esa | ||||
fmf | ||||
spansion | ||||
gsi | ||||
lpp | ||||
cypress | ||||
ENDLIST | ||||
LIST LIBRARY_grlib | ||||
ALIAS=grlib | ||||
COMPILE_OPTION=COMPILE | ||||
ENDLIST | ||||
LIST LIBRARY_synplify | ||||
ALIAS=synplify | ||||
COMPILE_OPTION=COMPILE | ||||
ENDLIST | ||||
LIST LIBRARY_techmap | ||||
ALIAS=techmap | ||||
COMPILE_OPTION=COMPILE | ||||
ENDLIST | ||||
LIST LIBRARY_spw | ||||
ALIAS=spw | ||||
COMPILE_OPTION=COMPILE | ||||
ENDLIST | ||||
LIST LIBRARY_eth | ||||
ALIAS=eth | ||||
COMPILE_OPTION=COMPILE | ||||
ENDLIST | ||||
LIST LIBRARY_opencores | ||||
ALIAS=opencores | ||||
COMPILE_OPTION=COMPILE | ||||
ENDLIST | ||||
LIST LIBRARY_gaisler | ||||
ALIAS=gaisler | ||||
COMPILE_OPTION=COMPILE | ||||
ENDLIST | ||||
LIST LIBRARY_esa | ||||
ALIAS=esa | ||||
COMPILE_OPTION=COMPILE | ||||
ENDLIST | ||||
LIST LIBRARY_fmf | ||||
ALIAS=fmf | ||||
COMPILE_OPTION=COMPILE | ||||
ENDLIST | ||||
LIST LIBRARY_spansion | ||||
ALIAS=spansion | ||||
COMPILE_OPTION=COMPILE | ||||
ENDLIST | ||||
LIST LIBRARY_gsi | ||||
ALIAS=gsi | ||||
COMPILE_OPTION=COMPILE | ||||
ENDLIST | ||||
LIST LIBRARY_lpp | ||||
ALIAS=lpp | ||||
COMPILE_OPTION=COMPILE | ||||
ENDLIST | ||||
LIST LIBRARY_cypress | ||||
ALIAS=cypress | ||||
COMPILE_OPTION=COMPILE | ||||
ENDLIST | ||||
LIST FileManager | ||||
VALUE "<project>\ahbrom.vhd,hdl" | ||||
STATE="utd" | ||||
Alexis Jeandet
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r181 | TIME="1367568565" | ||
martin
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r100 | SIZE="8992" | ||
ENDFILE | ||||
VALUE "<project>\config.vhd,hdl" | ||||
STATE="utd" | ||||
Alexis Jeandet
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r181 | TIME="1367568565" | ||
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r100 | SIZE="6294" | ||
ENDFILE | ||||
VALUE "<project>\leon3mp.vhd,hdl" | ||||
STATE="utd" | ||||
Alexis Jeandet
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r181 | TIME="1367568565" | ||
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r100 | SIZE="13693" | ||
ENDFILE | ||||
ENDLIST | ||||
LIST UsedFile | ||||
ENDLIST | ||||
LIST NewModulesInfo | ||||
ENDLIST | ||||
LIST AssociatedStimulus | ||||
ENDLIST | ||||
LIST Other_Association | ||||
ENDLIST | ||||
LIST SimulationOptions | ||||
UseAutomaticDoFile=true | ||||
IncludeWaveDo=false | ||||
Type=max | ||||
RunTime=1000ns | ||||
Resolution=1ps | ||||
VsimOpt= | ||||
EntityName=testbench | ||||
TopInstanceName=<top>_0 | ||||
DoFileName= | ||||
DoFileName2=wave.do | ||||
DoFileParams= | ||||
DisplayDUTWave=false | ||||
LogAllSignals=false | ||||
DumpVCD=false | ||||
VCDFileName=power.vcd | ||||
ENDLIST | ||||
LIST ModelSimLibPath | ||||
UseCustomPath=FALSE | ||||
LibraryPath= | ||||
ENDLIST | ||||
LIST GlobalFlowOptions | ||||
GenerateHDLAfterSynthesis=FALSE | ||||
GenerateHDLAfterPhySynthesis=FALSE | ||||
RunDRCAfterSynthesis=FALSE | ||||
AutoCheckConstraints=TRUE | ||||
UpdateViewDrawIni=TRUE | ||||
UpdateModelSimIni=TRUE | ||||
NoIOMode=FALSE | ||||
GenerateHDLFromSchematic=TRUE | ||||
FlashProInputFile=pdb | ||||
SmartGenCompileReport=T | ||||
ENDLIST | ||||
LIST PhySynthesisOptions | ||||
ENDLIST | ||||
LIST Profiles | ||||
NAME="Synplify AE" | ||||
FUNCTION="Synthesis" | ||||
TOOL="Synplify" | ||||
LOCATION="C:\Actel\Libero_v9.1\Synopsys\synplify_E201009A-1\bin\synplify_pro.exe" | ||||
PARAM="" | ||||
BATCH=0 | ||||
EndProfile | ||||
NAME="ModelSim AE" | ||||
FUNCTION="Simulation" | ||||
TOOL="ModelSim" | ||||
LOCATION="C:\Actel\Libero_v9.1\Model\win32acoem\modelsim.exe" | ||||
PARAM="" | ||||
BATCH=0 | ||||
EndProfile | ||||
NAME="WFL" | ||||
FUNCTION="Stimulus" | ||||
TOOL="WFL" | ||||
LOCATION="syncad.exe" | ||||
PARAM="-pwflite" | ||||
BATCH=0 | ||||
EndProfile | ||||
NAME="FlashPro" | ||||
FUNCTION="Program" | ||||
TOOL="FlashPro" | ||||
LOCATION="C:\Actel\Libero_v9.1\Designer\bin\FlashPro.exe" | ||||
PARAM="" | ||||
BATCH=0 | ||||
EndProfile | ||||
ENDLIST | ||||
LIST ProjectState5.1 | ||||
ENDLIST | ||||
LIST ExcludePackageForSimulation | ||||
ENDLIST | ||||
LIST ExcludePackageForSynthesis | ||||
ENDLIST | ||||
LIST IncludeModuleForSimulation | ||||
ENDLIST | ||||
LIST CDBOrder | ||||
ENDLIST | ||||
LIST UserCustomizedFileList | ||||
ENDLIST | ||||
LIST OpenedFileList | ||||
DESIGNFLOW: | ||||
Alexis Jeandet
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r181 | ACTIVE_VIEW:0 | ||
martin
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r100 | ENDLIST | ||