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#ifndef FSW_PARAMS_H_INCLUDED
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#ifndef FSW_PARAMS_H_INCLUDED
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2
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#define FSW_PARAMS_H_INCLUDED
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2
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#define FSW_PARAMS_H_INCLUDED
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#include "grlib_regs.h"
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#include "fsw_params_processing.h"
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#include "fsw_params_processing.h"
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#include "fsw_params_nb_bytes.h"
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#include "fsw_params_nb_bytes.h"
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#include "tm_byte_positions.h"
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#include "tm_byte_positions.h"
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#include "ccsds_types.h"
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#include "ccsds_types.h"
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#define GRSPW_DEVICE_NAME "/dev/grspw0"
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#define GRSPW_DEVICE_NAME "/dev/grspw0"
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#define UART_DEVICE_NAME "/dev/console"
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#define UART_DEVICE_NAME "/dev/console"
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typedef struct ring_node
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typedef struct ring_node
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{
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{
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struct ring_node *previous;
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struct ring_node *previous;
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struct ring_node *next;
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struct ring_node *next;
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unsigned int sid;
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unsigned int sid;
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unsigned int coarseTime;
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unsigned int coarseTime;
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unsigned int fineTime;
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unsigned int fineTime;
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int buffer_address;
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int buffer_address;
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unsigned int status;
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unsigned int status;
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} ring_node;
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} ring_node;
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//************************
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//************************
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// flight software version
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// flight software version
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// this parameters is handled by the Qt project options
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// this parameters is handled by the Qt project options
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#define NB_PACKETS_PER_GROUP_OF_CWF 8 // 8 packets containing 336 blk
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#define NB_PACKETS_PER_GROUP_OF_CWF 8 // 8 packets containing 336 blk
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#define NB_PACKETS_PER_GROUP_OF_CWF_LIGHT 4 // 4 packets containing 672 blk
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#define NB_PACKETS_PER_GROUP_OF_CWF_LIGHT 4 // 4 packets containing 672 blk
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#define NB_SAMPLES_PER_SNAPSHOT 2688 // 336 * 8 = 672 * 4 = 2688
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#define NB_SAMPLES_PER_SNAPSHOT 2688 // 336 * 8 = 672 * 4 = 2688
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#define TIME_OFFSET 2
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#define TIME_OFFSET 2
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#define TIME_OFFSET_IN_BYTES 8
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#define TIME_OFFSET_IN_BYTES 8
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//#define WAVEFORM_EXTENDED_HEADER_OFFSET 22
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//#define WAVEFORM_EXTENDED_HEADER_OFFSET 22
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#define NB_BYTES_SWF_BLK (2 * 6)
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#define NB_BYTES_SWF_BLK (2 * 6)
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#define NB_WORDS_SWF_BLK 3
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#define NB_WORDS_SWF_BLK 3
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#define NB_BYTES_CWF3_LIGHT_BLK 6
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#define NB_BYTES_CWF3_LIGHT_BLK 6
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//#define WFRM_INDEX_OF_LAST_PACKET 6 // waveforms are transmitted in groups of 2048 blocks, 6 packets of 340 and 1 of 8
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//#define WFRM_INDEX_OF_LAST_PACKET 6 // waveforms are transmitted in groups of 2048 blocks, 6 packets of 340 and 1 of 8
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#define NB_RING_NODES_F0 3 // AT LEAST 3
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#define NB_RING_NODES_F0 3 // AT LEAST 3
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#define NB_RING_NODES_F1 5 // AT LEAST 3
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#define NB_RING_NODES_F1 5 // AT LEAST 3
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#define NB_RING_NODES_F2 5 // AT LEAST 3
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#define NB_RING_NODES_F2 5 // AT LEAST 3
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#define NB_RING_NODES_F3 3 // AT LEAST 3
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#define NB_RING_NODES_F3 3 // AT LEAST 3
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//**********
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//**********
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// LFR MODES
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// LFR MODES
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#define LFR_MODE_STANDBY 0
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#define LFR_MODE_STANDBY 0
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#define LFR_MODE_NORMAL 1
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#define LFR_MODE_NORMAL 1
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#define LFR_MODE_BURST 2
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#define LFR_MODE_BURST 2
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#define LFR_MODE_SBM1 3
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#define LFR_MODE_SBM1 3
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#define LFR_MODE_SBM2 4
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#define LFR_MODE_SBM2 4
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#define TDS_MODE_LFM 5
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#define TDS_MODE_LFM 5
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#define TDS_MODE_STANDBY 0
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#define TDS_MODE_STANDBY 0
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#define TDS_MODE_NORMAL 1
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#define TDS_MODE_NORMAL 1
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#define TDS_MODE_BURST 2
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#define TDS_MODE_BURST 2
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#define TDS_MODE_SBM1 3
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#define TDS_MODE_SBM1 3
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#define TDS_MODE_SBM2 4
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#define TDS_MODE_SBM2 4
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#define THR_MODE_STANDBY 0
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#define THR_MODE_STANDBY 0
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#define THR_MODE_NORMAL 1
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#define THR_MODE_NORMAL 1
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#define THR_MODE_BURST 2
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#define THR_MODE_BURST 2
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#define RTEMS_EVENT_MODE_STANDBY RTEMS_EVENT_0
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#define RTEMS_EVENT_MODE_STANDBY RTEMS_EVENT_0
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#define RTEMS_EVENT_MODE_NORMAL RTEMS_EVENT_1
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#define RTEMS_EVENT_MODE_NORMAL RTEMS_EVENT_1
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#define RTEMS_EVENT_MODE_BURST RTEMS_EVENT_2
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#define RTEMS_EVENT_MODE_BURST RTEMS_EVENT_2
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#define RTEMS_EVENT_MODE_SBM1 RTEMS_EVENT_3
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#define RTEMS_EVENT_MODE_SBM1 RTEMS_EVENT_3
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#define RTEMS_EVENT_MODE_SBM2 RTEMS_EVENT_4
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#define RTEMS_EVENT_MODE_SBM2 RTEMS_EVENT_4
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#define RTEMS_EVENT_MODE_SBM2_WFRM RTEMS_EVENT_5
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#define RTEMS_EVENT_MODE_SBM2_WFRM RTEMS_EVENT_5
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#define RTEMS_EVENT_NORM_BP1_F0 RTEMS_EVENT_6
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#define RTEMS_EVENT_NORM_BP1_F0 RTEMS_EVENT_6
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#define RTEMS_EVENT_NORM_BP2_F0 RTEMS_EVENT_7
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#define RTEMS_EVENT_NORM_BP2_F0 RTEMS_EVENT_7
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#define RTEMS_EVENT_NORM_ASM_F0 RTEMS_EVENT_8 // ASM only in NORM mode
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#define RTEMS_EVENT_NORM_ASM_F0 RTEMS_EVENT_8 // ASM only in NORM mode
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#define RTEMS_EVENT_NORM_BP1_F1 RTEMS_EVENT_9
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#define RTEMS_EVENT_NORM_BP1_F1 RTEMS_EVENT_9
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#define RTEMS_EVENT_NORM_BP2_F1 RTEMS_EVENT_10
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#define RTEMS_EVENT_NORM_BP2_F1 RTEMS_EVENT_10
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#define RTEMS_EVENT_NORM_ASM_F1 RTEMS_EVENT_11 // ASM only in NORM mode
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#define RTEMS_EVENT_NORM_ASM_F1 RTEMS_EVENT_11 // ASM only in NORM mode
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#define RTEMS_EVENT_NORM_BP1_F2 RTEMS_EVENT_12
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#define RTEMS_EVENT_NORM_BP1_F2 RTEMS_EVENT_12
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#define RTEMS_EVENT_NORM_BP2_F2 RTEMS_EVENT_13
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#define RTEMS_EVENT_NORM_BP2_F2 RTEMS_EVENT_13
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#define RTEMS_EVENT_NORM_ASM_F2 RTEMS_EVENT_14 // ASM only in NORM mode
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#define RTEMS_EVENT_NORM_ASM_F2 RTEMS_EVENT_14 // ASM only in NORM mode
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#define RTEMS_EVENT_SBM_BP1_F0 RTEMS_EVENT_15
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#define RTEMS_EVENT_SBM_BP1_F0 RTEMS_EVENT_15
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#define RTEMS_EVENT_SBM_BP2_F0 RTEMS_EVENT_16
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#define RTEMS_EVENT_SBM_BP2_F0 RTEMS_EVENT_16
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#define RTEMS_EVENT_SBM_BP1_F1 RTEMS_EVENT_17
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#define RTEMS_EVENT_SBM_BP1_F1 RTEMS_EVENT_17
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#define RTEMS_EVENT_SBM_BP2_F1 RTEMS_EVENT_18
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#define RTEMS_EVENT_SBM_BP2_F1 RTEMS_EVENT_18
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#define RTEMS_EVENT_BURST_BP1_F0 RTEMS_EVENT_19
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#define RTEMS_EVENT_BURST_BP1_F0 RTEMS_EVENT_19
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#define RTEMS_EVENT_BURST_BP2_F0 RTEMS_EVENT_20
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#define RTEMS_EVENT_BURST_BP2_F0 RTEMS_EVENT_20
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#define RTEMS_EVENT_BURST_BP1_F1 RTEMS_EVENT_21
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#define RTEMS_EVENT_BURST_BP1_F1 RTEMS_EVENT_21
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#define RTEMS_EVENT_BURST_BP2_F1 RTEMS_EVENT_22
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#define RTEMS_EVENT_BURST_BP2_F1 RTEMS_EVENT_22
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//****************************
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//****************************
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// LFR DEFAULT MODE PARAMETERS
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// LFR DEFAULT MODE PARAMETERS
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// COMMON
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// COMMON
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#define DEFAULT_SY_LFR_COMMON0 0x00
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#define DEFAULT_SY_LFR_COMMON0 0x00
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#define DEFAULT_SY_LFR_COMMON1 0x10 // default value 0 0 0 1 0 0 0 0
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#define DEFAULT_SY_LFR_COMMON1 0x10 // default value 0 0 0 1 0 0 0 0
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// NORM
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// NORM
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#define DFLT_SY_LFR_N_SWF_L 2048 // nb sample
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#define DFLT_SY_LFR_N_SWF_L 2048 // nb sample
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#define DFLT_SY_LFR_N_SWF_P 300 // sec
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#define DFLT_SY_LFR_N_SWF_P 300 // sec
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#define DFLT_SY_LFR_N_ASM_P 3600 // sec
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#define DFLT_SY_LFR_N_ASM_P 3600 // sec
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#define DFLT_SY_LFR_N_BP_P0 4 // sec
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#define DFLT_SY_LFR_N_BP_P0 4 // sec
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#define DFLT_SY_LFR_N_BP_P1 20 // sec
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#define DFLT_SY_LFR_N_BP_P1 20 // sec
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#define DFLT_SY_LFR_N_CWF_LONG_F3 0 // 0 => production of light continuous waveforms at f3
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#define DFLT_SY_LFR_N_CWF_LONG_F3 0 // 0 => production of light continuous waveforms at f3
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#define MIN_DELTA_SNAPSHOT 16 // sec
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#define MIN_DELTA_SNAPSHOT 16 // sec
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// BURST
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// BURST
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#define DEFAULT_SY_LFR_B_BP_P0 1 // sec
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#define DEFAULT_SY_LFR_B_BP_P0 1 // sec
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#define DEFAULT_SY_LFR_B_BP_P1 5 // sec
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#define DEFAULT_SY_LFR_B_BP_P1 5 // sec
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// SBM1
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// SBM1
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#define DEFAULT_SY_LFR_S1_BP_P0 1 // sec
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#define DEFAULT_SY_LFR_S1_BP_P0 1 // sec
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#define DEFAULT_SY_LFR_S1_BP_P1 1 // sec
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#define DEFAULT_SY_LFR_S1_BP_P1 1 // sec
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// SBM2
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// SBM2
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#define DEFAULT_SY_LFR_S2_BP_P0 1 // sec
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#define DEFAULT_SY_LFR_S2_BP_P0 1 // sec
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#define DEFAULT_SY_LFR_S2_BP_P1 5 // sec
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#define DEFAULT_SY_LFR_S2_BP_P1 5 // sec
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// ADDITIONAL PARAMETERS
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// ADDITIONAL PARAMETERS
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#define TIME_BETWEEN_TWO_SWF_PACKETS 30 // nb x 10 ms => 300 ms
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#define TIME_BETWEEN_TWO_SWF_PACKETS 30 // nb x 10 ms => 300 ms
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#define TIME_BETWEEN_TWO_CWF3_PACKETS 1000 // nb x 10 ms => 10 s
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#define TIME_BETWEEN_TWO_CWF3_PACKETS 1000 // nb x 10 ms => 10 s
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// STATUS WORD
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// STATUS WORD
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#define DEFAULT_STATUS_WORD_BYTE0 0x0d // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits
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#define DEFAULT_STATUS_WORD_BYTE0 0x0d // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits
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#define DEFAULT_STATUS_WORD_BYTE1 0x00
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#define DEFAULT_STATUS_WORD_BYTE1 0x00
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//
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//
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#define SY_LFR_DPU_CONNECT_TIMEOUT 100 // 100 * 10 ms = 1 s
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#define SY_LFR_DPU_CONNECT_TIMEOUT 100 // 100 * 10 ms = 1 s
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#define SY_LFR_DPU_CONNECT_ATTEMPT 3
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#define SY_LFR_DPU_CONNECT_ATTEMPT 3
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//****************************
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//****************************
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//*****************************
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//*****************************
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// APB REGISTERS BASE ADDRESSES
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// APB REGISTERS BASE ADDRESSES
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#define REGS_ADDR_APBUART 0x80000100
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#define REGS_ADDR_APBUART 0x80000100
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#define REGS_ADDR_GPTIMER 0x80000300
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#define REGS_ADDR_GPTIMER 0x80000300
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#define REGS_ADDR_GRSPW 0x80000500
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#define REGS_ADDR_GRSPW 0x80000500
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#define REGS_ADDR_TIME_MANAGEMENT 0x80000600
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#define REGS_ADDR_TIME_MANAGEMENT 0x80000600
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#define REGS_ADDR_GRGPIO 0x80000b00
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#define REGS_ADDR_GRGPIO 0x80000b00
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125
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#define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00
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#define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00
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//#define REGS_ADDR_WAVEFORM_PICKER 0x80000f50
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127
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//#define REGS_ADDR_WAVEFORM_PICKER 0x80000f50
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#define REGS_ADDR_WAVEFORM_PICKER 0x80000f54 // PDB >= 0.1.28
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128
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#define REGS_ADDR_WAVEFORM_PICKER 0x80000f54 // PDB >= 0.1.28
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#define REGS_ADDR_VHDL_VERSION 0x80000ff0
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#define REGS_ADDR_VHDL_VERSION 0x80000ff0
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#define APBUART_CTRL_REG_MASK_DB 0xfffff7ff
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#define APBUART_CTRL_REG_MASK_DB 0xfffff7ff
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#define APBUART_CTRL_REG_MASK_TE 0x00000002
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#define APBUART_CTRL_REG_MASK_TE 0x00000002
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// scaler value = system_clock_frequency / ( baud_rate * 8 ) - 1
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// scaler value = system_clock_frequency / ( baud_rate * 8 ) - 1
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#define APBUART_SCALER_RELOAD_VALUE 0x00000050 // 25 MHz => about 38400
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#define APBUART_SCALER_RELOAD_VALUE 0x00000050 // 25 MHz => about 38400
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//**********
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//**********
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// IRQ LINES
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// IRQ LINES
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#define IRQ_SM_SIMULATOR 9
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#define IRQ_SM_SIMULATOR 9
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#define IRQ_SPARC_SM_SIMULATOR 0x19 // see sparcv8.pdf p.76 for interrupt levels
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#define IRQ_SPARC_SM_SIMULATOR 0x19 // see sparcv8.pdf p.76 for interrupt levels
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#define IRQ_WAVEFORM_PICKER 14
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#define IRQ_WAVEFORM_PICKER 14
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#define IRQ_SPARC_WAVEFORM_PICKER 0x1e // see sparcv8.pdf p.76 for interrupt levels
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#define IRQ_SPARC_WAVEFORM_PICKER 0x1e // see sparcv8.pdf p.76 for interrupt levels
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#define IRQ_SPECTRAL_MATRIX 6
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#define IRQ_SPECTRAL_MATRIX 6
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#define IRQ_SPARC_SPECTRAL_MATRIX 0x16 // see sparcv8.pdf p.76 for interrupt levels
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#define IRQ_SPARC_SPECTRAL_MATRIX 0x16 // see sparcv8.pdf p.76 for interrupt levels
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//*****
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//*****
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// TIME
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// TIME
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#define CLKDIV_SM_SIMULATOR (10416 - 1) // 10 ms => nominal is 1/96 = 0.010416667, 10417 - 1 = 10416
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147
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#define CLKDIV_SM_SIMULATOR (10416 - 1) // 10 ms => nominal is 1/96 = 0.010416667, 10417 - 1 = 10416
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149
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#define TIMER_SM_SIMULATOR 1
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148
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#define TIMER_SM_SIMULATOR 1
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150
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#define HK_PERIOD 100 // 100 * 10ms => 1s
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149
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#define HK_PERIOD 100 // 100 * 10ms => 1s
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151
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#define SY_LFR_TIME_SYN_TIMEOUT_in_ms 2000
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150
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#define SY_LFR_TIME_SYN_TIMEOUT_in_ms 2000
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152
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#define SY_LFR_TIME_SYN_TIMEOUT_in_ticks 200 // 200 * 10 ms = 2 s
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151
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#define SY_LFR_TIME_SYN_TIMEOUT_in_ticks 200 // 200 * 10 ms = 2 s
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153
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152
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154
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//**********
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153
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//**********
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155
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// LPP CODES
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154
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// LPP CODES
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156
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#define LFR_SUCCESSFUL 0
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155
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#define LFR_SUCCESSFUL 0
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157
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#define LFR_DEFAULT 1
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156
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#define LFR_DEFAULT 1
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158
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#define LFR_EXE_ERROR 2
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157
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#define LFR_EXE_ERROR 2
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159
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158
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160
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//******
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159
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//******
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161
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// RTEMS
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160
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// RTEMS
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162
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#define TASKID_RECV 1
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161
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#define TASKID_RECV 1
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163
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#define TASKID_ACTN 2
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162
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#define TASKID_ACTN 2
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164
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#define TASKID_SPIQ 3
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163
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#define TASKID_SPIQ 3
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165
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#define TASKID_STAT 4
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164
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#define TASKID_STAT 4
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166
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#define TASKID_AVF0 5
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165
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#define TASKID_AVF0 5
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167
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#define TASKID_SWBD 6
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166
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#define TASKID_SWBD 6
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168
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#define TASKID_WFRM 7
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167
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#define TASKID_WFRM 7
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169
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#define TASKID_DUMB 8
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168
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#define TASKID_DUMB 8
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170
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#define TASKID_HOUS 9
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169
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#define TASKID_HOUS 9
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171
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#define TASKID_PRC0 10
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170
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#define TASKID_PRC0 10
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172
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#define TASKID_CWF3 11
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171
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#define TASKID_CWF3 11
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173
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#define TASKID_CWF2 12
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172
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#define TASKID_CWF2 12
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174
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#define TASKID_CWF1 13
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173
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#define TASKID_CWF1 13
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175
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#define TASKID_SEND 14
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174
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#define TASKID_SEND 14
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176
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#define TASKID_WTDG 15
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175
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#define TASKID_WTDG 15
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177
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#define TASKID_AVF1 16
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176
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#define TASKID_AVF1 16
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178
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#define TASKID_PRC1 17
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177
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#define TASKID_PRC1 17
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179
|
#define TASKID_AVF2 18
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178
|
#define TASKID_AVF2 18
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180
|
#define TASKID_PRC2 19
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179
|
#define TASKID_PRC2 19
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181
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|
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180
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|
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182
|
#define TASK_PRIORITY_SPIQ 5
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181
|
#define TASK_PRIORITY_SPIQ 5
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183
|
#define TASK_PRIORITY_WTDG 20
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182
|
#define TASK_PRIORITY_WTDG 20
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|
184
|
#define TASK_PRIORITY_HOUS 30
|
|
183
|
#define TASK_PRIORITY_HOUS 30
|
|
185
|
#define TASK_PRIORITY_CWF1 35 // CWF1 and CWF2 are never running together
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|
184
|
#define TASK_PRIORITY_CWF1 35 // CWF1 and CWF2 are never running together
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|
186
|
#define TASK_PRIORITY_CWF2 35 //
|
|
185
|
#define TASK_PRIORITY_CWF2 35 //
|
|
187
|
#define TASK_PRIORITY_SWBD 37 // SWBD has a lower priority than WFRM, this is to extract the snapshot before sending it
|
|
186
|
#define TASK_PRIORITY_SWBD 37 // SWBD has a lower priority than WFRM, this is to extract the snapshot before sending it
|
|
188
|
#define TASK_PRIORITY_WFRM 40
|
|
187
|
#define TASK_PRIORITY_WFRM 40
|
|
189
|
#define TASK_PRIORITY_CWF3 40 // there is a printf in this function, be careful with its priority wrt CWF1
|
|
188
|
#define TASK_PRIORITY_CWF3 40 // there is a printf in this function, be careful with its priority wrt CWF1
|
|
190
|
#define TASK_PRIORITY_SEND 45
|
|
189
|
#define TASK_PRIORITY_SEND 45
|
|
191
|
#define TASK_PRIORITY_RECV 50
|
|
190
|
#define TASK_PRIORITY_RECV 50
|
|
192
|
#define TASK_PRIORITY_ACTN 50
|
|
191
|
#define TASK_PRIORITY_ACTN 50
|
|
193
|
#define TASK_PRIORITY_AVF0 60
|
|
192
|
#define TASK_PRIORITY_AVF0 60
|
|
194
|
#define TASK_PRIORITY_AVF1 70
|
|
193
|
#define TASK_PRIORITY_AVF1 70
|
|
195
|
#define TASK_PRIORITY_PRC0 100
|
|
194
|
#define TASK_PRIORITY_PRC0 100
|
|
196
|
#define TASK_PRIORITY_PRC1 100
|
|
195
|
#define TASK_PRIORITY_PRC1 100
|
|
197
|
#define TASK_PRIORITY_AVF2 110
|
|
196
|
#define TASK_PRIORITY_AVF2 110
|
|
198
|
#define TASK_PRIORITY_PRC2 110
|
|
197
|
#define TASK_PRIORITY_PRC2 110
|
|
199
|
#define TASK_PRIORITY_STAT 200
|
|
198
|
#define TASK_PRIORITY_STAT 200
|
|
200
|
#define TASK_PRIORITY_DUMB 200
|
|
199
|
#define TASK_PRIORITY_DUMB 200
|
|
201
|
|
|
200
|
|
|
202
|
#define MSG_QUEUE_COUNT_RECV 10
|
|
201
|
#define MSG_QUEUE_COUNT_RECV 10
|
|
203
|
#define MSG_QUEUE_COUNT_SEND 50
|
|
202
|
#define MSG_QUEUE_COUNT_SEND 50
|
|
204
|
#define MSG_QUEUE_COUNT_PRC0 10
|
|
203
|
#define MSG_QUEUE_COUNT_PRC0 10
|
|
205
|
#define MSG_QUEUE_COUNT_PRC1 10
|
|
204
|
#define MSG_QUEUE_COUNT_PRC1 10
|
|
206
|
#define MSG_QUEUE_COUNT_PRC2 5
|
|
205
|
#define MSG_QUEUE_COUNT_PRC2 5
|
|
207
|
#define MSG_QUEUE_SIZE_SEND 810 // 806 + 4 => TM_LFR_SCIENCE_BURST_BP2_F1
|
|
206
|
#define MSG_QUEUE_SIZE_SEND 810 // 806 + 4 => TM_LFR_SCIENCE_BURST_BP2_F1
|
|
208
|
#define ACTION_MSG_SPW_IOCTL_SEND_SIZE 24 // hlen *hdr dlen *data sent options
|
|
207
|
#define ACTION_MSG_SPW_IOCTL_SEND_SIZE 24 // hlen *hdr dlen *data sent options
|
|
209
|
#define MSG_QUEUE_SIZE_PRC0 20 // two pointers and one rtems_event + 2 integers
|
|
208
|
#define MSG_QUEUE_SIZE_PRC0 20 // two pointers and one rtems_event + 2 integers
|
|
210
|
#define MSG_QUEUE_SIZE_PRC1 20 // two pointers and one rtems_event + 2 integers
|
|
209
|
#define MSG_QUEUE_SIZE_PRC1 20 // two pointers and one rtems_event + 2 integers
|
|
211
|
#define MSG_QUEUE_SIZE_PRC2 20 // two pointers and one rtems_event + 2 integers
|
|
210
|
#define MSG_QUEUE_SIZE_PRC2 20 // two pointers and one rtems_event + 2 integers
|
|
212
|
|
|
211
|
|
|
213
|
#define QUEUE_RECV 0
|
|
212
|
#define QUEUE_RECV 0
|
|
214
|
#define QUEUE_SEND 1
|
|
213
|
#define QUEUE_SEND 1
|
|
215
|
#define QUEUE_PRC0 2
|
|
214
|
#define QUEUE_PRC0 2
|
|
216
|
#define QUEUE_PRC1 3
|
|
215
|
#define QUEUE_PRC1 3
|
|
217
|
#define QUEUE_PRC2 4
|
|
216
|
#define QUEUE_PRC2 4
|
|
218
|
|
|
217
|
|
|
219
|
//*******
|
|
218
|
//*******
|
|
220
|
// MACROS
|
|
219
|
// MACROS
|
|
221
|
#ifdef PRINT_MESSAGES_ON_CONSOLE
|
|
220
|
#ifdef PRINT_MESSAGES_ON_CONSOLE
|
|
222
|
#define PRINTF(x) printf(x);
|
|
221
|
#define PRINTF(x) printf(x);
|
|
223
|
#define PRINTF1(x,y) printf(x,y);
|
|
222
|
#define PRINTF1(x,y) printf(x,y);
|
|
224
|
#define PRINTF2(x,y,z) printf(x,y,z);
|
|
223
|
#define PRINTF2(x,y,z) printf(x,y,z);
|
|
225
|
#else
|
|
224
|
#else
|
|
226
|
#define PRINTF(x) ;
|
|
225
|
#define PRINTF(x) ;
|
|
227
|
#define PRINTF1(x,y) ;
|
|
226
|
#define PRINTF1(x,y) ;
|
|
228
|
#define PRINTF2(x,y,z) ;
|
|
227
|
#define PRINTF2(x,y,z) ;
|
|
229
|
#endif
|
|
228
|
#endif
|
|
230
|
|
|
229
|
|
|
231
|
#ifdef BOOT_MESSAGES
|
|
230
|
#ifdef BOOT_MESSAGES
|
|
232
|
#define BOOT_PRINTF(x) printf(x);
|
|
231
|
#define BOOT_PRINTF(x) printf(x);
|
|
233
|
#define BOOT_PRINTF1(x,y) printf(x,y);
|
|
232
|
#define BOOT_PRINTF1(x,y) printf(x,y);
|
|
234
|
#define BOOT_PRINTF2(x,y,z) printf(x,y,z);
|
|
233
|
#define BOOT_PRINTF2(x,y,z) printf(x,y,z);
|
|
235
|
#else
|
|
234
|
#else
|
|
236
|
#define BOOT_PRINTF(x) ;
|
|
235
|
#define BOOT_PRINTF(x) ;
|
|
237
|
#define BOOT_PRINTF1(x,y) ;
|
|
236
|
#define BOOT_PRINTF1(x,y) ;
|
|
238
|
#define BOOT_PRINTF2(x,y,z) ;
|
|
237
|
#define BOOT_PRINTF2(x,y,z) ;
|
|
239
|
#endif
|
|
238
|
#endif
|
|
240
|
|
|
239
|
|
|
241
|
#ifdef DEBUG_MESSAGES
|
|
240
|
#ifdef DEBUG_MESSAGES
|
|
242
|
#define DEBUG_PRINTF(x) printf(x);
|
|
241
|
#define DEBUG_PRINTF(x) printf(x);
|
|
243
|
#define DEBUG_PRINTF1(x,y) printf(x,y);
|
|
242
|
#define DEBUG_PRINTF1(x,y) printf(x,y);
|
|
244
|
#define DEBUG_PRINTF2(x,y,z) printf(x,y,z);
|
|
243
|
#define DEBUG_PRINTF2(x,y,z) printf(x,y,z);
|
|
245
|
#else
|
|
244
|
#else
|
|
246
|
#define DEBUG_PRINTF(x) ;
|
|
245
|
#define DEBUG_PRINTF(x) ;
|
|
247
|
#define DEBUG_PRINTF1(x,y) ;
|
|
246
|
#define DEBUG_PRINTF1(x,y) ;
|
|
248
|
#define DEBUG_PRINTF2(x,y,z) ;
|
|
247
|
#define DEBUG_PRINTF2(x,y,z) ;
|
|
249
|
#endif
|
|
248
|
#endif
|
|
250
|
|
|
249
|
|
|
251
|
#define CPU_USAGE_REPORT_PERIOD 6 // * 10 s = period
|
|
250
|
#define CPU_USAGE_REPORT_PERIOD 6 // * 10 s = period
|
|
252
|
|
|
251
|
|
|
253
|
struct param_local_str{
|
|
252
|
struct param_local_str{
|
|
254
|
unsigned int local_sbm1_nb_cwf_sent;
|
|
253
|
unsigned int local_sbm1_nb_cwf_sent;
|
|
255
|
unsigned int local_sbm1_nb_cwf_max;
|
|
254
|
unsigned int local_sbm1_nb_cwf_max;
|
|
256
|
unsigned int local_sbm2_nb_cwf_sent;
|
|
255
|
unsigned int local_sbm2_nb_cwf_sent;
|
|
257
|
unsigned int local_sbm2_nb_cwf_max;
|
|
256
|
unsigned int local_sbm2_nb_cwf_max;
|
|
258
|
};
|
|
257
|
};
|
|
259
|
|
|
258
|
|
|
260
|
#endif // FSW_PARAMS_H_INCLUDED
|
|
259
|
#endif // FSW_PARAMS_H_INCLUDED
|