HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/JEANDET/lfr_common_headers Commit - r74:7053a75ef0a5

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#ifndef FSW_PARAMS_H_INCLUDED

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#ifndef FSW_PARAMS_H_INCLUDED

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#define FSW_PARAMS_H_INCLUDED

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#define FSW_PARAMS_H_INCLUDED

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#include "fsw_params_processing.h"

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#include "fsw_params_processing.h"

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#include "fsw_params_nb_bytes.h"

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#include "fsw_params_nb_bytes.h"

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#include "tm_byte_positions.h"

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#include "tm_byte_positions.h"

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#include "ccsds_types.h"

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#include "ccsds_types.h"

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#include "stdint.h"

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#include "stdint.h"

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/*

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/*

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* RTEMS CONFIG

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* RTEMS CONFIG

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*

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*

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*/

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*/

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#define GRSPW_DEVICE_NAME "/dev/grspw0"

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#define GRSPW_DEVICE_NAME "/dev/grspw0"

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#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER

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#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER

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#define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER

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#define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER

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#define CONFIGURE_MAXIMUM_TASKS 23 // number of tasks concurrently active including INIT

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#define CONFIGURE_MAXIMUM_TASKS 23 // number of tasks concurrently active including INIT

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#define CONFIGURE_RTEMS_INIT_TASKS_TABLE

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#define CONFIGURE_RTEMS_INIT_TASKS_TABLE

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#define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE)

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#define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE)

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#define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32

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#define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32

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#define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100

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#define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100

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#define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT)

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#define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT)

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#define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT)

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#define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT)

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#define CONFIGURE_MAXIMUM_DRIVERS 16

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#define CONFIGURE_MAXIMUM_DRIVERS 16

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#define CONFIGURE_MAXIMUM_PERIODS 6 // [hous] [load] [avgv]

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#define CONFIGURE_MAXIMUM_PERIODS 6 // [hous] [load] [avgv]

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#define CONFIGURE_MAXIMUM_TIMERS 6 // [spiq] [link] [spacewire_reset_link]

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#define CONFIGURE_MAXIMUM_TIMERS 6 // [spiq] [link] [spacewire_reset_link]

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#define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5

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#define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5

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#ifdef PRINT_STACK_REPORT

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#ifdef PRINT_STACK_REPORT

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#define CONFIGURE_STACK_CHECKER_ENABLED

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#define CONFIGURE_STACK_CHECKER_ENABLED

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#endif

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#endif

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//*******

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//*******

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// MACROS

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// MACROS

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#ifdef PRINT_MESSAGES_ON_CONSOLE

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#ifdef PRINT_MESSAGES_ON_CONSOLE

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#define PRINTF(x) printf(x);

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#define PRINTF(x) printf(x);

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#define PRINTF1(x,y) printf(x,y);

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#define PRINTF1(x,y) printf(x,y);

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#define PRINTF2(x,y,z) printf(x,y,z);

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#define PRINTF2(x,y,z) printf(x,y,z);

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#else

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#else

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#define PRINTF(x) ;

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#define PRINTF(x) ;

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#define PRINTF1(x,y) ;

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#define PRINTF1(x,y) ;

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#define PRINTF2(x,y,z) ;

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#define PRINTF2(x,y,z) ;

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#endif

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#endif

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#ifdef BOOT_MESSAGES

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#ifdef BOOT_MESSAGES

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#define BOOT_PRINTF(x) printf(x);

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#define BOOT_PRINTF(x) printf(x);

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#define BOOT_PRINTF1(x,y) printf(x,y);

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#define BOOT_PRINTF1(x,y) printf(x,y);

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#define BOOT_PRINTF2(x,y,z) printf(x,y,z);

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#define BOOT_PRINTF2(x,y,z) printf(x,y,z);

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#else

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#else

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#define BOOT_PRINTF(x) ;

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#define BOOT_PRINTF(x) ;

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#define BOOT_PRINTF1(x,y) ;

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#define BOOT_PRINTF1(x,y) ;

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#define BOOT_PRINTF2(x,y,z) ;

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#define BOOT_PRINTF2(x,y,z) ;

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#endif

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#endif

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#ifdef DEBUG_MESSAGES

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#ifdef DEBUG_MESSAGES

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#define DEBUG_PRINTF(x) printf(x);

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#define DEBUG_PRINTF(x) printf(x);

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#define DEBUG_PRINTF1(x,y) printf(x,y);

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#define DEBUG_PRINTF1(x,y) printf(x,y);

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#define DEBUG_PRINTF2(x,y,z) printf(x,y,z);

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#define DEBUG_PRINTF2(x,y,z) printf(x,y,z);

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#else

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#else

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#define DEBUG_PRINTF(x) ;

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#define DEBUG_PRINTF(x) ;

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#define DEBUG_PRINTF1(x,y) ;

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#define DEBUG_PRINTF1(x,y) ;

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#define DEBUG_PRINTF2(x,y,z) ;

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#define DEBUG_PRINTF2(x,y,z) ;

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#endif

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#endif

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#define CONST_65536 65536 // 2^16

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#define CONST_65536 65536 // 2^16

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#define CONST_2048 2048 // 2^11

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#define CONST_2048 2048 // 2^11

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#define CONST_512 512 // 2^9

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#define CONST_512 512 // 2^9

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#define CONST_256 256 // 2^8

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#define CONST_256 256 // 2^8

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#ifndef UINT8_MAX

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#ifndef UINT8_MAX

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#define UINT8_MAX 255

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#define UINT8_MAX 255

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#endif

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#endif

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#define FLOAT_LSBYTE 3

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#define FLOAT_LSBYTE 3

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#define BITS_PER_BYTE 8

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#define BITS_PER_BYTE 8

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#define INIT_FLOAT 0.

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#define INIT_FLOAT 0.

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#define INIT_CHAR 0x00

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#define INIT_CHAR 0x00

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#define INIT_INT 0

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#define INIT_INT 0

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#define INT8_ALL_F 0xff

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#define INT8_ALL_F 0xff

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#define INT16_ALL_F 0xffff

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#define INT16_ALL_F 0xffff

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#define INT32_ALL_F 0xffffffff

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#define INT32_ALL_F 0xffffffff

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#define INT32_ALL_0 0x00000000

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#define INT32_ALL_0 0x00000000

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#define SHIFT_1_BYTE 8

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#define SHIFT_1_BYTE 8

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#define SHIFT_2_BYTES 16

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#define SHIFT_2_BYTES 16

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#define SHIFT_3_BYTES 24

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#define SHIFT_3_BYTES 24

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#define SHIFT_4_BYTES 32

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#define SHIFT_4_BYTES 32

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#define SHIFT_5_BYTES 40

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#define SHIFT_5_BYTES 40

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#define SHIFT_2_BITS 2

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#define SHIFT_2_BITS 2

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#define SHIFT_3_BITS 3

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#define SHIFT_3_BITS 3

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#define SHIFT_4_BITS 4

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#define SHIFT_4_BITS 4

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#define SHIFT_5_BITS 5

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#define SHIFT_5_BITS 5

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#define SHIFT_7_BITS 7

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#define SHIFT_7_BITS 7

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#define BYTE_0 0

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#define BYTE_0 0

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#define BYTE_1 1

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#define BYTE_1 1

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#define BYTE_2 2

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#define BYTE_2 2

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#define BYTE_3 3

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#define BYTE_3 3

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#define BYTE_4 4

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#define BYTE_4 4

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#define BYTE_5 5

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#define BYTE_5 5

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#define BYTE_6 6

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#define BYTE_6 6

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#define BYTE_7 7

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#define BYTE_7 7

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#define BYTE0_MASK 0xff00

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#define BYTE0_MASK 0xff00

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#define BYTE1_MASK 0x00ff

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#define BYTE1_MASK 0x00ff

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enum lfr_transition_type_t{

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enum lfr_transition_type_t{

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TRANSITION_NOT_SPECIFIC,

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TRANSITION_NOT_SPECIFIC,

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TRANSITION_NORM_TO_S1,

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TRANSITION_NORM_TO_S1,

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TRANSITION_NORM_TO_S2,

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TRANSITION_NORM_TO_S2,

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TRANSITION_S1_TO_NORM,

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TRANSITION_S1_TO_NORM,

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TRANSITION_S2_TO_NORM,

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TRANSITION_S2_TO_NORM,

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TRANSITION_S1_TO_S2,

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TRANSITION_S1_TO_S2,

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TRANSITION_S2_TO_S1

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TRANSITION_S2_TO_S1

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};

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};

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typedef struct ring_node

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typedef struct ring_node

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{

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{

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struct ring_node *previous;

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struct ring_node *previous;

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struct ring_node *next;

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struct ring_node *next;

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unsigned int sid;

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unsigned int sid;

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unsigned int coarseTime;

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unsigned int coarseTime;

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unsigned int fineTime;

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unsigned int fineTime;

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int buffer_address;

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int buffer_address;

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unsigned int status;

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unsigned int status;

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} ring_node;

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} ring_node;

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//************************

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//************************

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// flight software version

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// flight software version

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// this parameters is handled by the Qt project options

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// this parameters is handled by the Qt project options

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#define NB_PACKETS_PER_GROUP_OF_CWF 8 // 8 packets containing 336 blk

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#define NB_PACKETS_PER_GROUP_OF_CWF 8 // 8 packets containing 336 blk

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#define NB_PACKETS_PER_GROUP_OF_CWF_LIGHT 4 // 4 packets containing 672 blk

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#define NB_PACKETS_PER_GROUP_OF_CWF_LIGHT 4 // 4 packets containing 672 blk

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#define NB_SAMPLES_PER_SNAPSHOT 2688 // 336 * 8 = 672 * 4 = 2688

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#define NB_SAMPLES_PER_SNAPSHOT 2688 // 336 * 8 = 672 * 4 = 2688

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#define TIME_OFFSET 2

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#define TIME_OFFSET 2

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#define NB_BYTES_SWF_BLK (2 * 6)

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#define NB_BYTES_SWF_BLK (2 * 6)

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#define NB_WORDS_SWF_BLK 3

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#define NB_WORDS_SWF_BLK 3

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#define NB_BYTES_CWF3_LIGHT_BLK 6

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#define NB_BYTES_CWF3_LIGHT_BLK 6

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#define NB_RING_NODES_F0 3 // AT LEAST 3

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#define NB_RING_NODES_F0 3 // AT LEAST 3

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#define NB_RING_NODES_F1 5 // AT LEAST 3

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#define NB_RING_NODES_F1 5 // AT LEAST 3

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#define NB_RING_NODES_F2 5 // AT LEAST 3

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#define NB_RING_NODES_F2 5 // AT LEAST 3

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#define NB_RING_NODES_F3 3 // AT LEAST 3

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#define NB_RING_NODES_F3 3 // AT LEAST 3

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//**********

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//**********

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// LFR MODES

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// LFR MODES

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#define LFR_MODE_STANDBY 0

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#define LFR_MODE_STANDBY 0

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#define LFR_MODE_NORMAL 1

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#define LFR_MODE_NORMAL 1

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#define LFR_MODE_BURST 2

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#define LFR_MODE_BURST 2

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#define LFR_MODE_SBM1 3

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#define LFR_MODE_SBM1 3

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#define LFR_MODE_SBM2 4

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#define LFR_MODE_SBM2 4

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#define TDS_MODE_LFM 5

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#define TDS_MODE_LFM 5

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#define TDS_MODE_STANDBY 0

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#define TDS_MODE_STANDBY 0

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#define TDS_MODE_NORMAL 1

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#define TDS_MODE_NORMAL 1

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#define TDS_MODE_BURST 2

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#define TDS_MODE_BURST 2

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#define TDS_MODE_SBM1 3

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#define TDS_MODE_SBM1 3

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#define TDS_MODE_SBM2 4

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#define TDS_MODE_SBM2 4

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#define THR_MODE_STANDBY 0

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#define THR_MODE_STANDBY 0

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#define THR_MODE_NORMAL 1

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#define THR_MODE_NORMAL 1

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#define THR_MODE_BURST 2

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#define THR_MODE_BURST 2

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#define RTEMS_EVENT_MODE_NORMAL RTEMS_EVENT_1

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#define RTEMS_EVENT_MODE_NORMAL RTEMS_EVENT_1

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#define RTEMS_EVENT_MODE_BURST RTEMS_EVENT_2

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#define RTEMS_EVENT_MODE_BURST RTEMS_EVENT_2

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#define RTEMS_EVENT_MODE_SBM2 RTEMS_EVENT_4

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#define RTEMS_EVENT_MODE_SBM2 RTEMS_EVENT_4

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#define RTEMS_EVENT_MODE_NORM_S1_S2 RTEMS_EVENT_5

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#define RTEMS_EVENT_MODE_NORM_S1_S2 RTEMS_EVENT_5

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#define RTEMS_EVENT_NORM_BP1_F0 RTEMS_EVENT_6

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#define RTEMS_EVENT_NORM_BP1_F0 RTEMS_EVENT_6

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#define RTEMS_EVENT_NORM_BP2_F0 RTEMS_EVENT_7

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#define RTEMS_EVENT_NORM_BP2_F0 RTEMS_EVENT_7

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#define RTEMS_EVENT_NORM_ASM_F0 RTEMS_EVENT_8 // ASM only in NORM mode

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#define RTEMS_EVENT_NORM_ASM_F0 RTEMS_EVENT_8 // ASM only in NORM mode

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#define RTEMS_EVENT_NORM_BP1_F1 RTEMS_EVENT_9

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#define RTEMS_EVENT_NORM_BP1_F1 RTEMS_EVENT_9

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#define RTEMS_EVENT_NORM_BP2_F1 RTEMS_EVENT_10

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#define RTEMS_EVENT_NORM_BP2_F1 RTEMS_EVENT_10

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#define RTEMS_EVENT_NORM_ASM_F1 RTEMS_EVENT_11 // ASM only in NORM mode

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#define RTEMS_EVENT_NORM_ASM_F1 RTEMS_EVENT_11 // ASM only in NORM mode

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#define RTEMS_EVENT_NORM_BP1_F2 RTEMS_EVENT_12

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#define RTEMS_EVENT_NORM_BP1_F2 RTEMS_EVENT_12

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#define RTEMS_EVENT_NORM_BP2_F2 RTEMS_EVENT_13

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#define RTEMS_EVENT_NORM_BP2_F2 RTEMS_EVENT_13

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#define RTEMS_EVENT_NORM_ASM_F2 RTEMS_EVENT_14 // ASM only in NORM mode

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#define RTEMS_EVENT_NORM_ASM_F2 RTEMS_EVENT_14 // ASM only in NORM mode

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#define RTEMS_EVENT_SBM_BP1_F0 RTEMS_EVENT_15

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#define RTEMS_EVENT_SBM_BP1_F0 RTEMS_EVENT_15

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#define RTEMS_EVENT_SBM_BP2_F0 RTEMS_EVENT_16

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#define RTEMS_EVENT_SBM_BP2_F0 RTEMS_EVENT_16

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#define RTEMS_EVENT_SBM_BP1_F1 RTEMS_EVENT_17

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#define RTEMS_EVENT_SBM_BP1_F1 RTEMS_EVENT_17

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#define RTEMS_EVENT_SBM_BP2_F1 RTEMS_EVENT_18

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#define RTEMS_EVENT_SBM_BP2_F1 RTEMS_EVENT_18

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#define RTEMS_EVENT_BURST_BP1_F0 RTEMS_EVENT_19

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#define RTEMS_EVENT_BURST_BP1_F0 RTEMS_EVENT_19

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#define RTEMS_EVENT_BURST_BP2_F0 RTEMS_EVENT_20

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#define RTEMS_EVENT_BURST_BP2_F0 RTEMS_EVENT_20

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#define RTEMS_EVENT_BURST_BP1_F1 RTEMS_EVENT_21

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#define RTEMS_EVENT_BURST_BP1_F1 RTEMS_EVENT_21

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#define RTEMS_EVENT_BURST_BP2_F1 RTEMS_EVENT_22

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#define RTEMS_EVENT_BURST_BP2_F1 RTEMS_EVENT_22

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#define RTEMS_EVENT_SWF_RESYNCH RTEMS_EVENT_23

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#define RTEMS_EVENT_SWF_RESYNCH RTEMS_EVENT_23

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#define RTEMS_EVENT_CAL_SWEEP_WAKE RTEMS_EVENT_24

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#define RTEMS_EVENT_CAL_SWEEP_WAKE RTEMS_EVENT_24

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//********************************************

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//********************************************

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//********************************************

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//********************************************

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// LFR PARAMETERS: DEFAULT, MIN AND MAX VALUES

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// LFR PARAMETERS: DEFAULT, MIN AND MAX VALUES

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#define DEFAULT_LAST_VALID_TRANSITION_DATE 0xffffffff

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#define DEFAULT_LAST_VALID_TRANSITION_DATE 0xffffffff

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// COMMON

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// COMMON

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#define DEFAULT_SY_LFR_COMMON0 0x00

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#define DEFAULT_SY_LFR_COMMON0 0x00

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#define DEFAULT_SY_LFR_COMMON1 0x20 // default value bw sp0 sp1 r0 r1 r2 = 1 0 0 0 0 0

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#define DEFAULT_SY_LFR_COMMON1 0x20 // default value bw sp0 sp1 r0 r1 r2 = 1 0 0 0 0 0

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// NORM

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// NORM

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#define DFLT_SY_LFR_N_SWF_L 2048 // nb sample

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#define DFLT_SY_LFR_N_SWF_L 2048 // nb sample

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#define DFLT_SY_LFR_N_SWF_P 300 // sec

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#define DFLT_SY_LFR_N_SWF_P 300 // sec

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#define MIN_SY_LFR_N_SWF_P 22 // sec

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#define MIN_SY_LFR_N_SWF_P 22 // sec

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#define DFLT_SY_LFR_N_ASM_P 3600 // sec

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#define DFLT_SY_LFR_N_ASM_P 3600 // sec

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#define DFLT_SY_LFR_N_BP_P0 4 // sec

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#define DFLT_SY_LFR_N_BP_P0 4 // sec

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#define DFLT_SY_LFR_N_BP_P1 20 // sec

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#define DFLT_SY_LFR_N_BP_P1 20 // sec

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#define DFLT_SY_LFR_N_CWF_LONG_F3 0 // 0 => production of light continuous waveforms at f3

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#define DFLT_SY_LFR_N_CWF_LONG_F3 0 // 0 => production of light continuous waveforms at f3

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// BURST

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// BURST

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#define DEFAULT_SY_LFR_B_BP_P0 1 // sec

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#define DEFAULT_SY_LFR_B_BP_P0 1 // sec

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#define DEFAULT_SY_LFR_B_BP_P1 5 // sec

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#define DEFAULT_SY_LFR_B_BP_P1 5 // sec

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// SBM1

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// SBM1

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#define S1_BP_P0_SCALE 0.25

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#define S1_BP_P0_SCALE 0.25

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#define DEFAULT_SY_LFR_S1_BP_P0 1 // 0.25 sec

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#define DEFAULT_SY_LFR_S1_BP_P0 1 // 0.25 sec

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#define DEFAULT_SY_LFR_S1_BP_P1 1 // sec

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#define DEFAULT_SY_LFR_S1_BP_P1 1 // sec

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// SBM2

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// SBM2

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#define DEFAULT_SY_LFR_S2_BP_P0 1 // sec

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#define DEFAULT_SY_LFR_S2_BP_P0 1 // sec

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#define DEFAULT_SY_LFR_S2_BP_P1 5 // sec

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#define DEFAULT_SY_LFR_S2_BP_P1 5 // sec

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// STATUS WORD

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// STATUS WORD

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#define DEFAULT_STATUS_WORD_BYTE0 0x0d // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits

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#define DEFAULT_STATUS_WORD_BYTE0 0x0d // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits

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#define DEFAULT_STATUS_WORD_BYTE1 0x00

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#define DEFAULT_STATUS_WORD_BYTE1 0x00

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// TC_LFR_LOAD_FILTER_PAR

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// TC_LFR_LOAD_FILTER_PAR

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#define MIN_PAS_FILTER_MODULUS 4

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#define MIN_PAS_FILTER_MODULUS 4

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#define MAX_PAS_FILTER_MODULUS 8

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#define MAX_PAS_FILTER_MODULUS 8

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#define MIN_PAS_FILTER_TBAD 0.0

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#define MIN_PAS_FILTER_TBAD 0.0

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#define MAX_PAS_FILTER_TBAD 4.0

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#define MAX_PAS_FILTER_TBAD 4.0

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#define MIN_PAS_FILTER_OFFSET 0

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#define MIN_PAS_FILTER_OFFSET 0

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#define MAX_PAS_FILTER_OFFSET 7

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#define MAX_PAS_FILTER_OFFSET 7

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#define MIN_PAS_FILTER_SHIFT 0.0

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#define MIN_PAS_FILTER_SHIFT 0.0

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#define MAX_PAS_FILTER_SHIFT 1.0

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#define MAX_PAS_FILTER_SHIFT 1.0

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#define MIN_SY_LFR_SC_RW_DELTA_F 0

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#define MIN_SY_LFR_SC_RW_DELTA_F 0

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#define MIN_SY_LFR_RW_F 0

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#define MIN_SY_LFR_RW_F 0

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//

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//

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#define SY_LFR_DPU_CONNECT_TIMEOUT 100 // 100 * 10 ms = 1 s

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#define SY_LFR_DPU_CONNECT_TIMEOUT 100 // 100 * 10 ms = 1 s

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#define SY_LFR_DPU_CONNECT_ATTEMPT 3

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#define SY_LFR_DPU_CONNECT_ATTEMPT 3

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//****************************

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//****************************

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//*****************************

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//*****************************

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// APB REGISTERS BASE ADDRESSES

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// APB REGISTERS BASE ADDRESSES

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#define REGS_ADDR_APBUART 0x80000100

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#define REGS_ADDR_APBUART 0x80000100

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#define REGS_ADDR_GPTIMER 0x80000300

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#define REGS_ADDR_GPTIMER 0x80000300

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#define REGS_ADDR_GRSPW 0x80000500

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#define REGS_ADDR_GRSPW 0x80000500

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#define APB_OFFSET_GRSPW_STATUS_REGISTER 0x04

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#define APB_OFFSET_GRSPW_STATUS_REGISTER 0x04

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#define APB_OFFSET_GRSPW_TIME_REGISTER 0x14

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#define APB_OFFSET_GRSPW_TIME_REGISTER 0x14

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#define REGS_ADDR_TIME_MANAGEMENT 0x80000600

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#define REGS_ADDR_TIME_MANAGEMENT 0x80000600

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#define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00

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#define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00

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#define REGS_ADDR_WAVEFORM_PICKER 0x80000f54 // PDB >= 0.1.28

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#define REGS_ADDR_WAVEFORM_PICKER 0x80000f54 // PDB >= 0.1.28

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#define APB_OFFSET_VHDL_REV 0xb0

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#define APB_OFFSET_VHDL_REV 0xb0

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#define REGS_ADDR_VHDL_VERSION 0x80000ff0

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#define REGS_ADDR_VHDL_VERSION 0x80000ff0

250

251

#define APBUART_CTRL_REG_MASK_TE 0x00000002

251

#define APBUART_CTRL_REG_MASK_TE 0x00000002

252

// scaler value = system_clock_frequency / ( baud_rate * 8 ) - 1

252

// scaler value = system_clock_frequency / ( baud_rate * 8 ) - 1

253

#define APBUART_SCALER_RELOAD_VALUE 0x00000050 // 25 MHz => about ~~384~~00

253

#define APBUART_SCALER_RELOAD_VALUE 0x0000001B // 25 MHz => about 115200

254

255

//**********

255

//**********

256

// IRQ LINES

256

// IRQ LINES

257

#define IRQ_GPTIMER_WATCHDOG 9

257

#define IRQ_GPTIMER_WATCHDOG 9

258

#define IRQ_SPARC_GPTIMER_WATCHDOG 0x19 // see sparcv8.pdf p.76 for interrupt levels

258

#define IRQ_SPARC_GPTIMER_WATCHDOG 0x19 // see sparcv8.pdf p.76 for interrupt levels

259

#define IRQ_WAVEFORM_PICKER 14

259

#define IRQ_WAVEFORM_PICKER 14

260

#define IRQ_SPARC_WAVEFORM_PICKER 0x1e // see sparcv8.pdf p.76 for interrupt levels

260

#define IRQ_SPARC_WAVEFORM_PICKER 0x1e // see sparcv8.pdf p.76 for interrupt levels

261

#define IRQ_SPECTRAL_MATRIX 6

261

#define IRQ_SPECTRAL_MATRIX 6

262

#define IRQ_SPARC_SPECTRAL_MATRIX 0x16 // see sparcv8.pdf p.76 for interrupt levels

262

#define IRQ_SPARC_SPECTRAL_MATRIX 0x16 // see sparcv8.pdf p.76 for interrupt levels

263

264

//*****

264

//*****

265

// TIME

265

// TIME

266

#define CLKDIV_WATCHDOG (10000000 - 1) // 10.0s => 10 000 000

266

#define CLKDIV_WATCHDOG (10000000 - 1) // 10.0s => 10 000 000

267

#define TIMER_WATCHDOG 1

267

#define TIMER_WATCHDOG 1

268

#define WATCHDOG_PERIOD 100 // 1s

268

#define WATCHDOG_PERIOD 100 // 1s

269

#define HK_PERIOD 100 // 100 * 10ms => 1s

269

#define HK_PERIOD 100 // 100 * 10ms => 1s

270

#define AVGV_PERIOD 6 // 6 * 10ms => 60ms (1 / 16 = 62.5ms)

270

#define AVGV_PERIOD 6 // 6 * 10ms => 60ms (1 / 16 = 62.5ms)

271

#define SY_LFR_TIME_SYN_TIMEOUT_in_ticks 200 // 200 * 10 ms = 2 s

271

#define SY_LFR_TIME_SYN_TIMEOUT_in_ticks 200 // 200 * 10 ms = 2 s

272

#define HK_SYNC_WAIT 10 // 10 * 10 ms = 100 ms

272

#define HK_SYNC_WAIT 10 // 10 * 10 ms = 100 ms

273

#define SPW_LINK_WAIT 10 // 10 * 10 ms = 100 ms

273

#define SPW_LINK_WAIT 10 // 10 * 10 ms = 100 ms

274

#define TIMECODE_TIMER_TIMEOUT 120 // 120 * 10 ms = 1.2 s

274

#define TIMECODE_TIMER_TIMEOUT 120 // 120 * 10 ms = 1.2 s

275

#define TIMECODE_TIMER_TIMEOUT_INIT 200 // 200 * 10 ms = 2.0 s

275

#define TIMECODE_TIMER_TIMEOUT_INIT 200 // 200 * 10 ms = 2.0 s

276

#define TIMECODE_MASK 0x3f // 0011 1111

276

#define TIMECODE_MASK 0x3f // 0011 1111

277

278

//**********

278

//**********

279

// LPP CODES

279

// LPP CODES

280

#define LFR_SUCCESSFUL 0

280

#define LFR_SUCCESSFUL 0

281

#define LFR_DEFAULT 1

281

#define LFR_DEFAULT 1

282

#define LFR_EXE_ERROR 2

282

#define LFR_EXE_ERROR 2

283

284

//******

284

//******

285

// RTEMS

285

// RTEMS

286

#define STACK_SIZE_MULT 2

286

#define STACK_SIZE_MULT 2

287

288

#define TASKID_AVGV 0

288

#define TASKID_AVGV 0

289

#define TASKID_RECV 1

289

#define TASKID_RECV 1

290

#define TASKID_ACTN 2

290

#define TASKID_ACTN 2

291

#define TASKID_SPIQ 3

291

#define TASKID_SPIQ 3

292

#define TASKID_LOAD 4

292

#define TASKID_LOAD 4

293

#define TASKID_AVF0 5

293

#define TASKID_AVF0 5

294

#define TASKID_SWBD 6

294

#define TASKID_SWBD 6

295

#define TASKID_WFRM 7

295

#define TASKID_WFRM 7

296

#define TASKID_DUMB 8

296

#define TASKID_DUMB 8

297

#define TASKID_HOUS 9

297

#define TASKID_HOUS 9

298

#define TASKID_PRC0 10

298

#define TASKID_PRC0 10

299

#define TASKID_CWF3 11

299

#define TASKID_CWF3 11

300

#define TASKID_CWF2 12

300

#define TASKID_CWF2 12

301

#define TASKID_CWF1 13

301

#define TASKID_CWF1 13

302

#define TASKID_SEND 14

302

#define TASKID_SEND 14

303

#define TASKID_LINK 15

303

#define TASKID_LINK 15

304

#define TASKID_AVF1 16

304

#define TASKID_AVF1 16

305

#define TASKID_PRC1 17

305

#define TASKID_PRC1 17

306

#define TASKID_AVF2 18

306

#define TASKID_AVF2 18

307

#define TASKID_PRC2 19

307

#define TASKID_PRC2 19

308

#define TASKID_SCRB 20

308

#define TASKID_SCRB 20

309

#define TASKID_CALI 21

309

#define TASKID_CALI 21

310

311

#define TASK_PRIORITY_SPIQ 5

311

#define TASK_PRIORITY_SPIQ 5

312

#define TASK_PRIORITY_LINK 20

312

#define TASK_PRIORITY_LINK 20

313

#define TASK_PRIORITY_AVGV 25

313

#define TASK_PRIORITY_AVGV 25

314

#define TASK_PRIORITY_HOUS 30

314

#define TASK_PRIORITY_HOUS 30

315

#define TASK_PRIORITY_CWF1 35 // CWF1 and CWF2 are never running together

315

#define TASK_PRIORITY_CWF1 35 // CWF1 and CWF2 are never running together

316

#define TASK_PRIORITY_CWF2 35 //

316

#define TASK_PRIORITY_CWF2 35 //

317

#define TASK_PRIORITY_SWBD 37 // SWBD has a lower priority than WFRM, this is to extract the snapshot before sending it

317

#define TASK_PRIORITY_SWBD 37 // SWBD has a lower priority than WFRM, this is to extract the snapshot before sending it

318

#define TASK_PRIORITY_WFRM 40

318

#define TASK_PRIORITY_WFRM 40

319

#define TASK_PRIORITY_CWF3 40 // there is a printf in this function, be careful with its priority wrt CWF1

319

#define TASK_PRIORITY_CWF3 40 // there is a printf in this function, be careful with its priority wrt CWF1

320

#define TASK_PRIORITY_SEND 45

320

#define TASK_PRIORITY_SEND 45

321

#define TASK_PRIORITY_RECV 50

321

#define TASK_PRIORITY_RECV 50

322

#define TASK_PRIORITY_CALI 50

322

#define TASK_PRIORITY_CALI 50

323

#define TASK_PRIORITY_ACTN 50

323

#define TASK_PRIORITY_ACTN 50

324

#define TASK_PRIORITY_AVF0 60

324

#define TASK_PRIORITY_AVF0 60

325

#define TASK_PRIORITY_AVF1 70

325

#define TASK_PRIORITY_AVF1 70

326

#define TASK_PRIORITY_PRC0 100

326

#define TASK_PRIORITY_PRC0 100

327

#define TASK_PRIORITY_PRC1 100

327

#define TASK_PRIORITY_PRC1 100

328

#define TASK_PRIORITY_AVF2 110

328

#define TASK_PRIORITY_AVF2 110

329

#define TASK_PRIORITY_PRC2 110

329

#define TASK_PRIORITY_PRC2 110

330

#define TASK_PRIORITY_LOAD 190

330

#define TASK_PRIORITY_LOAD 190

331

#define TASK_PRIORITY_DUMB 200

331

#define TASK_PRIORITY_DUMB 200

332

#define TASK_PRIORITY_SCRB 210

332

#define TASK_PRIORITY_SCRB 210

333

334

#define MSG_QUEUE_COUNT_RECV 10

334

#define MSG_QUEUE_COUNT_RECV 10

335

#define MSG_QUEUE_COUNT_SEND 50

335

#define MSG_QUEUE_COUNT_SEND 50

336

#define MSG_QUEUE_COUNT_PRC0 10

336

#define MSG_QUEUE_COUNT_PRC0 10

337

#define MSG_QUEUE_COUNT_PRC1 10

337

#define MSG_QUEUE_COUNT_PRC1 10

338

#define MSG_QUEUE_COUNT_PRC2 5

338

#define MSG_QUEUE_COUNT_PRC2 5

339

#define MSG_QUEUE_SIZE_SEND 812 // 808 + 4 => TM_LFR_SCIENCE_BURST_BP2_F1

339

#define MSG_QUEUE_SIZE_SEND 812 // 808 + 4 => TM_LFR_SCIENCE_BURST_BP2_F1

340

#define MSG_QUEUE_SIZE_PRC0 36 // two pointers, one rtems_event + 6 integers

340

#define MSG_QUEUE_SIZE_PRC0 36 // two pointers, one rtems_event + 6 integers

341

#define MSG_QUEUE_SIZE_PRC1 36 // two pointers, one rtems_event + 6 integers

341

#define MSG_QUEUE_SIZE_PRC1 36 // two pointers, one rtems_event + 6 integers

342

#define MSG_QUEUE_SIZE_PRC2 36 // two pointers, one rtems_event + 6 integers

342

#define MSG_QUEUE_SIZE_PRC2 36 // two pointers, one rtems_event + 6 integers

343

344

#define QUEUE_RECV 0

344

#define QUEUE_RECV 0

345

#define QUEUE_SEND 1

345

#define QUEUE_SEND 1

346

#define QUEUE_PRC0 2

346

#define QUEUE_PRC0 2

347

#define QUEUE_PRC1 3

347

#define QUEUE_PRC1 3

348

#define QUEUE_PRC2 4

348

#define QUEUE_PRC2 4

349

350

struct param_local_str{

350

struct param_local_str{

351

unsigned int local_sbm1_nb_cwf_sent;

351

unsigned int local_sbm1_nb_cwf_sent;

352

unsigned int local_sbm1_nb_cwf_max;

352

unsigned int local_sbm1_nb_cwf_max;

353

unsigned int local_sbm2_nb_cwf_sent;

353

unsigned int local_sbm2_nb_cwf_sent;

354

unsigned int local_sbm2_nb_cwf_max;

354

unsigned int local_sbm2_nb_cwf_max;

355

};

355

};

356

357

//************

357

//************

358

// FBINS MASKS

358

// FBINS MASKS

359

360

#define BYTES_PER_FBINS_MASK 16

360

#define BYTES_PER_FBINS_MASK 16

361

362

typedef struct {

362

typedef struct {

363

unsigned char merged_fbins_mask_f0[BYTES_PER_FBINS_MASK];

363

unsigned char merged_fbins_mask_f0[BYTES_PER_FBINS_MASK];

364

unsigned char merged_fbins_mask_f1[BYTES_PER_FBINS_MASK];

364

unsigned char merged_fbins_mask_f1[BYTES_PER_FBINS_MASK];

365

unsigned char merged_fbins_mask_f2[BYTES_PER_FBINS_MASK];

365

unsigned char merged_fbins_mask_f2[BYTES_PER_FBINS_MASK];

366

} fbins_masks_t;

366

} fbins_masks_t;

367

368

#define DEFAULT_SY_LFR_PAS_FILTER_ENABLED 0

368

#define DEFAULT_SY_LFR_PAS_FILTER_ENABLED 0

369

#define DEFAULT_SY_LFR_PAS_FILTER_MODULUS 4

369

#define DEFAULT_SY_LFR_PAS_FILTER_MODULUS 4

370

#define DEFAULT_SY_LFR_PAS_FILTER_TBAD 1.0f

370

#define DEFAULT_SY_LFR_PAS_FILTER_TBAD 1.0f

371

#define DEFAULT_SY_LFR_PAS_FILTER_OFFSET 0

371

#define DEFAULT_SY_LFR_PAS_FILTER_OFFSET 0

372

#define DEFAULT_SY_LFR_PAS_FILTER_SHIFT 0.5f

372

#define DEFAULT_SY_LFR_PAS_FILTER_SHIFT 0.5f

373

#define DEFAULT_MODULUS 262144 // 65536 * 4

373

#define DEFAULT_MODULUS 262144 // 65536 * 4

374

#define DEFAULT_TBAD 65536 // 65536

374

#define DEFAULT_TBAD 65536 // 65536

375

#define DEFAULT_OFFSET 0 // 65536 * 0

375

#define DEFAULT_OFFSET 0 // 65536 * 0

376

#define DEFAULT_SHIFT 32768 // 65536 / 2

376

#define DEFAULT_SHIFT 32768 // 65536 / 2

377

#define DEFAULT_SY_LFR_SC_RW_DELTA_F 0.045f

377

#define DEFAULT_SY_LFR_SC_RW_DELTA_F 0.045f

378

#define DEFAULT_SY_LFR_RW_K1 1.f

378

#define DEFAULT_SY_LFR_RW_K1 1.f

379

#define DEFAULT_SY_LFR_RW_K2 8.f

379

#define DEFAULT_SY_LFR_RW_K2 8.f

380

#define DEFAULT_SY_LFR_RW_K3 24.f

380

#define DEFAULT_SY_LFR_RW_K3 24.f

381

#define DEFAULT_SY_LFR_RW_K4 48.f

381

#define DEFAULT_SY_LFR_RW_K4 48.f

382

383

typedef struct{

383

typedef struct{

384

unsigned char spare_sy_lfr_pas_filter_enabled;

384

unsigned char spare_sy_lfr_pas_filter_enabled;

385

float sy_lfr_pas_filter_tbad;

385

float sy_lfr_pas_filter_tbad;

386

float sy_lfr_pas_filter_shift;

386

float sy_lfr_pas_filter_shift;

387

uint64_t modulus_in_finetime;

387

uint64_t modulus_in_finetime;

388

uint64_t tbad_in_finetime;

388

uint64_t tbad_in_finetime;

389

uint64_t offset_in_finetime;

389

uint64_t offset_in_finetime;

390

uint64_t shift_in_finetime;

390

uint64_t shift_in_finetime;

391

float sy_lfr_sc_rw_delta_f;

391

float sy_lfr_sc_rw_delta_f;

392

// rw1_k

392

// rw1_k

393

float sy_lfr_rw1_k1;

393

float sy_lfr_rw1_k1;

394

float sy_lfr_rw1_k2;

394

float sy_lfr_rw1_k2;

395

float sy_lfr_rw1_k3;

395

float sy_lfr_rw1_k3;

396

float sy_lfr_rw1_k4;

396

float sy_lfr_rw1_k4;

397

// rw2_k

397

// rw2_k

398

float sy_lfr_rw2_k1;

398

float sy_lfr_rw2_k1;

399

float sy_lfr_rw2_k2;

399

float sy_lfr_rw2_k2;

400

float sy_lfr_rw2_k3;

400

float sy_lfr_rw2_k3;

401

float sy_lfr_rw2_k4;

401

float sy_lfr_rw2_k4;

402

// rw3_k

402

// rw3_k

403

float sy_lfr_rw3_k1;

403

float sy_lfr_rw3_k1;

404

float sy_lfr_rw3_k2;

404

float sy_lfr_rw3_k2;

405

float sy_lfr_rw3_k3;

405

float sy_lfr_rw3_k3;

406

float sy_lfr_rw3_k4;

406

float sy_lfr_rw3_k4;

407

// rw4_k

407

// rw4_k

408

float sy_lfr_rw4_k1;

408

float sy_lfr_rw4_k1;

409

float sy_lfr_rw4_k2;

409

float sy_lfr_rw4_k2;

410

float sy_lfr_rw4_k3;

410

float sy_lfr_rw4_k3;

411

float sy_lfr_rw4_k4;

411

float sy_lfr_rw4_k4;

412

} filterPar_t;

412

} filterPar_t;

413

414

typedef struct{

414

typedef struct{

415

// rw1_f

415

// rw1_f

416

float cp_rpw_sc_rw1_f1;

416

float cp_rpw_sc_rw1_f1;

417

float cp_rpw_sc_rw1_f2;

417

float cp_rpw_sc_rw1_f2;

418

float cp_rpw_sc_rw1_f3;

418

float cp_rpw_sc_rw1_f3;

419

float cp_rpw_sc_rw1_f4;

419

float cp_rpw_sc_rw1_f4;

420

// rw2_f

420

// rw2_f

421

float cp_rpw_sc_rw2_f1;

421

float cp_rpw_sc_rw2_f1;

422

float cp_rpw_sc_rw2_f2;

422

float cp_rpw_sc_rw2_f2;

423

float cp_rpw_sc_rw2_f3;

423

float cp_rpw_sc_rw2_f3;

424

float cp_rpw_sc_rw2_f4;

424

float cp_rpw_sc_rw2_f4;

425

// rw3_f

425

// rw3_f

426

float cp_rpw_sc_rw3_f1;

426

float cp_rpw_sc_rw3_f1;

427

float cp_rpw_sc_rw3_f2;

427

float cp_rpw_sc_rw3_f2;

428

float cp_rpw_sc_rw3_f3;

428

float cp_rpw_sc_rw3_f3;

429

float cp_rpw_sc_rw3_f4;

429

float cp_rpw_sc_rw3_f4;

430

// rw4_f

430

// rw4_f

431

float cp_rpw_sc_rw4_f1;

431

float cp_rpw_sc_rw4_f1;

432

float cp_rpw_sc_rw4_f2;

432

float cp_rpw_sc_rw4_f2;

433

float cp_rpw_sc_rw4_f3;

433

float cp_rpw_sc_rw4_f3;

434

float cp_rpw_sc_rw4_f4;

434

float cp_rpw_sc_rw4_f4;

435

} rw_f_t;

435

} rw_f_t;

436

437

#define MATRIX_IS_POLLUTED 0

437

#define MATRIX_IS_POLLUTED 0

438

#define MATRIX_IS_NOT_POLLUTED 1

438

#define MATRIX_IS_NOT_POLLUTED 1

439

#define ACQUISITION_DURATION_F0 683 // 256 / 24576 * 65536

439

#define ACQUISITION_DURATION_F0 683 // 256 / 24576 * 65536

440

#define ACQUISITION_DURATION_F1 4096 // 256 / 4096 * 65536

440

#define ACQUISITION_DURATION_F1 4096 // 256 / 4096 * 65536

441

#define ACQUISITION_DURATION_F2 65536 // 256 / 256 * 65536

441

#define ACQUISITION_DURATION_F2 65536 // 256 / 256 * 65536

442

#define HALF_ACQUISITION_DURATION_F0 341 // 256 / 24576 * 65536 / 2

442

#define HALF_ACQUISITION_DURATION_F0 341 // 256 / 24576 * 65536 / 2

443

#define HALF_ACQUISITION_DURATION_F1 2048 // 256 / 4096 * 65536 / 2

443

#define HALF_ACQUISITION_DURATION_F1 2048 // 256 / 4096 * 65536 / 2

444

#define HALF_ACQUISITION_DURATION_F2 32768 // 256 / 256 * 65536 / 2

444

#define HALF_ACQUISITION_DURATION_F2 32768 // 256 / 256 * 65536 / 2

445

446

#endif // FSW_PARAMS_H_INCLUDED

446

#endif // FSW_PARAMS_H_INCLUDED

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             #ifndef FSW_PARAMS_H_INCLUDED
             #define FSW_PARAMS_H_INCLUDED
             #include "fsw_params_processing.h"
             #include "fsw_params_nb_bytes.h"
             #include "tm_byte_positions.h"
             #include "ccsds_types.h"
             #include "stdint.h"
             /*
              * RTEMS CONFIG
              *
             */
             #define GRSPW_DEVICE_NAME "/dev/grspw0"
             #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
             #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
             #define CONFIGURE_MAXIMUM_TASKS 23 // number of tasks concurrently active including INIT
             #define CONFIGURE_RTEMS_INIT_TASKS_TABLE
             #define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE)
             #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32
             #define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100
             #define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT)
             #define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT)
             #define CONFIGURE_MAXIMUM_DRIVERS 16
             #define CONFIGURE_MAXIMUM_PERIODS 6 // [hous] [load] [avgv]
             #define CONFIGURE_MAXIMUM_TIMERS 6 // [spiq] [link] [spacewire_reset_link]
             #define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5
             #ifdef PRINT_STACK_REPORT
                 #define CONFIGURE_STACK_CHECKER_ENABLED
             #endif
             //*******
             // MACROS
             #ifdef PRINT_MESSAGES_ON_CONSOLE
             #define PRINTF(x) printf(x);
             #define PRINTF1(x,y) printf(x,y);
             #define PRINTF2(x,y,z) printf(x,y,z);
             #else
             #define PRINTF(x) ;
             #define PRINTF1(x,y) ;
             #define PRINTF2(x,y,z) ;
             #endif
             #ifdef BOOT_MESSAGES
             #define BOOT_PRINTF(x) printf(x);
             #define BOOT_PRINTF1(x,y) printf(x,y);
             #define BOOT_PRINTF2(x,y,z) printf(x,y,z);
             #else
             #define BOOT_PRINTF(x) ;
             #define BOOT_PRINTF1(x,y) ;
             #define BOOT_PRINTF2(x,y,z) ;
             #endif
             #ifdef DEBUG_MESSAGES
             #define DEBUG_PRINTF(x) printf(x);
             #define DEBUG_PRINTF1(x,y) printf(x,y);
             #define DEBUG_PRINTF2(x,y,z) printf(x,y,z);
             #else
             #define DEBUG_PRINTF(x) ;
             #define DEBUG_PRINTF1(x,y) ;
             #define DEBUG_PRINTF2(x,y,z) ;
             #endif
             #define CONST_65536 65536   // 2^16
             #define CONST_2048  2048    // 2^11
             #define CONST_512   512     // 2^9
             #define CONST_256   256     // 2^8
             #ifndef UINT8_MAX
                 #define UINT8_MAX   255
             #endif
             #define FLOAT_LSBYTE    3
             #define BITS_PER_BYTE   8
             #define INIT_FLOAT      0.
             #define INIT_CHAR       0x00
             #define INIT_INT        0
             #define INT8_ALL_F      0xff
             #define INT16_ALL_F     0xffff
             #define INT32_ALL_F     0xffffffff
             #define INT32_ALL_0     0x00000000
             #define SHIFT_1_BYTE    8
             #define SHIFT_2_BYTES   16
             #define SHIFT_3_BYTES   24
             #define SHIFT_4_BYTES   32
             #define SHIFT_5_BYTES   40
             #define SHIFT_2_BITS    2
             #define SHIFT_3_BITS    3
             #define SHIFT_4_BITS    4
             #define SHIFT_5_BITS    5
             #define SHIFT_7_BITS    7
             #define BYTE_0  0
             #define BYTE_1  1
             #define BYTE_2  2
             #define BYTE_3  3
             #define BYTE_4  4
             #define BYTE_5  5
             #define BYTE_6  6
             #define BYTE_7  7
             #define BYTE0_MASK  0xff00
             #define BYTE1_MASK  0x00ff
             enum lfr_transition_type_t{
                 TRANSITION_NOT_SPECIFIC,
                 TRANSITION_NORM_TO_S1,
                 TRANSITION_NORM_TO_S2,
                 TRANSITION_S1_TO_NORM,
                 TRANSITION_S2_TO_NORM,
                 TRANSITION_S1_TO_S2,
                 TRANSITION_S2_TO_S1
             };
             typedef struct ring_node
             {
                 struct ring_node *previous;
                 struct ring_node *next;
                 unsigned int sid;
                 unsigned int coarseTime;
                 unsigned int fineTime;
                 int buffer_address;
                 unsigned int status;
             } ring_node;
             //************************
             // flight software version
             // this parameters is handled by the Qt project options
             #define NB_PACKETS_PER_GROUP_OF_CWF         8   // 8 packets containing 336 blk
             #define NB_PACKETS_PER_GROUP_OF_CWF_LIGHT   4   // 4 packets containing 672 blk
             #define NB_SAMPLES_PER_SNAPSHOT 2688    // 336 * 8 = 672 * 4 = 2688
             #define TIME_OFFSET 2
             #define NB_BYTES_SWF_BLK (2 * 6)
             #define NB_WORDS_SWF_BLK 3
             #define NB_BYTES_CWF3_LIGHT_BLK 6
             #define NB_RING_NODES_F0 3      // AT LEAST 3
             #define NB_RING_NODES_F1 5      // AT LEAST 3
             #define NB_RING_NODES_F2 5      // AT LEAST 3
             #define NB_RING_NODES_F3 3      // AT LEAST 3
             //**********
             // LFR MODES
             #define LFR_MODE_STANDBY    0
             #define LFR_MODE_NORMAL     1
             #define LFR_MODE_BURST      2
             #define LFR_MODE_SBM1       3
             #define LFR_MODE_SBM2       4
             #define TDS_MODE_LFM        5
             #define TDS_MODE_STANDBY    0
             #define TDS_MODE_NORMAL     1
             #define TDS_MODE_BURST      2
             #define TDS_MODE_SBM1       3
             #define TDS_MODE_SBM2       4
             #define THR_MODE_STANDBY    0
             #define THR_MODE_NORMAL     1
             #define THR_MODE_BURST      2
             #define RTEMS_EVENT_MODE_NORMAL     RTEMS_EVENT_1
             #define RTEMS_EVENT_MODE_BURST      RTEMS_EVENT_2
             #define RTEMS_EVENT_MODE_SBM2       RTEMS_EVENT_4
             #define RTEMS_EVENT_MODE_NORM_S1_S2 RTEMS_EVENT_5
             #define RTEMS_EVENT_NORM_BP1_F0     RTEMS_EVENT_6
             #define RTEMS_EVENT_NORM_BP2_F0     RTEMS_EVENT_7
             #define RTEMS_EVENT_NORM_ASM_F0     RTEMS_EVENT_8   // ASM only in NORM mode
             #define RTEMS_EVENT_NORM_BP1_F1     RTEMS_EVENT_9
             #define RTEMS_EVENT_NORM_BP2_F1     RTEMS_EVENT_10
             #define RTEMS_EVENT_NORM_ASM_F1     RTEMS_EVENT_11  // ASM only in NORM mode
             #define RTEMS_EVENT_NORM_BP1_F2     RTEMS_EVENT_12
             #define RTEMS_EVENT_NORM_BP2_F2     RTEMS_EVENT_13
             #define RTEMS_EVENT_NORM_ASM_F2     RTEMS_EVENT_14  // ASM only in NORM mode
             #define RTEMS_EVENT_SBM_BP1_F0      RTEMS_EVENT_15
             #define RTEMS_EVENT_SBM_BP2_F0      RTEMS_EVENT_16
             #define RTEMS_EVENT_SBM_BP1_F1      RTEMS_EVENT_17
             #define RTEMS_EVENT_SBM_BP2_F1      RTEMS_EVENT_18
             #define RTEMS_EVENT_BURST_BP1_F0    RTEMS_EVENT_19
             #define RTEMS_EVENT_BURST_BP2_F0    RTEMS_EVENT_20
             #define RTEMS_EVENT_BURST_BP1_F1    RTEMS_EVENT_21
             #define RTEMS_EVENT_BURST_BP2_F1    RTEMS_EVENT_22
             #define RTEMS_EVENT_SWF_RESYNCH     RTEMS_EVENT_23
             #define RTEMS_EVENT_CAL_SWEEP_WAKE  RTEMS_EVENT_24
             //********************************************
             //********************************************
             // LFR PARAMETERS: DEFAULT, MIN AND MAX VALUES
             #define DEFAULT_LAST_VALID_TRANSITION_DATE 0xffffffff
             // COMMON
             #define DEFAULT_SY_LFR_COMMON0 0x00
             #define DEFAULT_SY_LFR_COMMON1 0x20 // default value bw sp0 sp1 r0 r1 r2 = 1 0 0 0 0 0
             // NORM
             #define DFLT_SY_LFR_N_SWF_L 2048 // nb sample
             #define DFLT_SY_LFR_N_SWF_P 300  // sec
             #define MIN_SY_LFR_N_SWF_P  22  // sec
             #define DFLT_SY_LFR_N_ASM_P 3600 // sec
             #define DFLT_SY_LFR_N_BP_P0 4    // sec
             #define DFLT_SY_LFR_N_BP_P1 20   // sec
             #define DFLT_SY_LFR_N_CWF_LONG_F3 0      // 0 => production of light continuous waveforms at f3
             // BURST
             #define DEFAULT_SY_LFR_B_BP_P0 1    // sec
             #define DEFAULT_SY_LFR_B_BP_P1 5    // sec
             // SBM1
             #define S1_BP_P0_SCALE          0.25
             #define DEFAULT_SY_LFR_S1_BP_P0 1   // 0.25 sec
             #define DEFAULT_SY_LFR_S1_BP_P1 1   // sec
             // SBM2
             #define DEFAULT_SY_LFR_S2_BP_P0 1   // sec
             #define DEFAULT_SY_LFR_S2_BP_P1 5   // sec
             // STATUS WORD
             #define DEFAULT_STATUS_WORD_BYTE0 0x0d  // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits
             #define DEFAULT_STATUS_WORD_BYTE1 0x00
             // TC_LFR_LOAD_FILTER_PAR
             #define MIN_PAS_FILTER_MODULUS  4
             #define MAX_PAS_FILTER_MODULUS  8
             #define MIN_PAS_FILTER_TBAD     0.0
             #define MAX_PAS_FILTER_TBAD     4.0
             #define MIN_PAS_FILTER_OFFSET   0
             #define MAX_PAS_FILTER_OFFSET   7
             #define MIN_PAS_FILTER_SHIFT    0.0
             #define MAX_PAS_FILTER_SHIFT    1.0
             #define MIN_SY_LFR_SC_RW_DELTA_F    0
             #define MIN_SY_LFR_RW_F             0
             //
             #define SY_LFR_DPU_CONNECT_TIMEOUT 100  // 100 * 10 ms = 1 s
             #define SY_LFR_DPU_CONNECT_ATTEMPT 3
             //****************************
             //*****************************
             // APB REGISTERS BASE ADDRESSES
             #define REGS_ADDR_APBUART           0x80000100
             #define REGS_ADDR_GPTIMER           0x80000300
             #define REGS_ADDR_GRSPW             0x80000500
             #define APB_OFFSET_GRSPW_STATUS_REGISTER    0x04
             #define APB_OFFSET_GRSPW_TIME_REGISTER      0x14
             #define REGS_ADDR_TIME_MANAGEMENT   0x80000600
             #define REGS_ADDR_SPECTRAL_MATRIX   0x80000f00
             #define REGS_ADDR_WAVEFORM_PICKER   0x80000f54  // PDB >= 0.1.28
             #define APB_OFFSET_VHDL_REV         0xb0
             #define REGS_ADDR_VHDL_VERSION      0x80000ff0
             #define APBUART_CTRL_REG_MASK_TE    0x00000002
             // scaler value = system_clock_frequency / ( baud_rate * 8 ) - 1
-            #define APBUART_SCALER_RELOAD_VALUE 0x00000050      // 25 MHz => about 38400
+            #define APBUART_SCALER_RELOAD_VALUE 0x0000001B      // 25 MHz => about 115200
             //**********
             // IRQ LINES
             #define IRQ_GPTIMER_WATCHDOG 9
             #define IRQ_SPARC_GPTIMER_WATCHDOG 0x19     // see sparcv8.pdf p.76 for interrupt levels
             #define IRQ_WAVEFORM_PICKER 14
             #define IRQ_SPARC_WAVEFORM_PICKER 0x1e  // see sparcv8.pdf p.76 for interrupt levels
             #define IRQ_SPECTRAL_MATRIX 6
             #define IRQ_SPARC_SPECTRAL_MATRIX 0x16  // see sparcv8.pdf p.76 for interrupt levels
             //*****
             // TIME
             #define CLKDIV_WATCHDOG     (10000000 - 1)       // 10.0s => 10 000 000
             #define TIMER_WATCHDOG      1
             #define WATCHDOG_PERIOD     100                 // 1s
             #define HK_PERIOD                           100     // 100 * 10ms => 1s
             #define AVGV_PERIOD                         6       //   6 * 10ms => 60ms (1 / 16 = 62.5ms)
             #define SY_LFR_TIME_SYN_TIMEOUT_in_ticks    200     // 200 * 10 ms = 2 s
             #define HK_SYNC_WAIT                        10      //  10 * 10 ms = 100 ms
             #define SPW_LINK_WAIT                       10      //  10 * 10 ms = 100 ms
             #define TIMECODE_TIMER_TIMEOUT              120     // 120 * 10 ms = 1.2 s
             #define TIMECODE_TIMER_TIMEOUT_INIT         200     // 200 * 10 ms = 2.0 s
             #define TIMECODE_MASK                       0x3f    // 0011 1111
             //**********
             // LPP CODES
             #define LFR_SUCCESSFUL  0
             #define LFR_DEFAULT     1
             #define LFR_EXE_ERROR   2
             //******
             // RTEMS
             #define STACK_SIZE_MULT 2
             #define TASKID_AVGV 0
             #define TASKID_RECV 1
             #define TASKID_ACTN 2
             #define TASKID_SPIQ 3
             #define TASKID_LOAD 4
             #define TASKID_AVF0 5
             #define TASKID_SWBD 6
             #define TASKID_WFRM 7
             #define TASKID_DUMB 8
             #define TASKID_HOUS 9
             #define TASKID_PRC0 10
             #define TASKID_CWF3 11
             #define TASKID_CWF2 12
             #define TASKID_CWF1 13
             #define TASKID_SEND 14
             #define TASKID_LINK 15
             #define TASKID_AVF1 16
             #define TASKID_PRC1 17
             #define TASKID_AVF2 18
             #define TASKID_PRC2 19
             #define TASKID_SCRB 20
             #define TASKID_CALI 21
             #define TASK_PRIORITY_SPIQ 5
             #define TASK_PRIORITY_LINK 20
             #define TASK_PRIORITY_AVGV 25
             #define TASK_PRIORITY_HOUS 30
             #define TASK_PRIORITY_CWF1 35   // CWF1 and CWF2 are never running together
             #define TASK_PRIORITY_CWF2 35   //
             #define TASK_PRIORITY_SWBD 37   // SWBD has a lower priority than WFRM, this is to extract the snapshot before sending it
             #define TASK_PRIORITY_WFRM 40
             #define TASK_PRIORITY_CWF3 40   // there is a printf in this function, be careful with its priority wrt CWF1
             #define TASK_PRIORITY_SEND 45
             #define TASK_PRIORITY_RECV 50
             #define TASK_PRIORITY_CALI 50
             #define TASK_PRIORITY_ACTN 50
             #define TASK_PRIORITY_AVF0 60
             #define TASK_PRIORITY_AVF1 70
             #define TASK_PRIORITY_PRC0 100
             #define TASK_PRIORITY_PRC1 100
             #define TASK_PRIORITY_AVF2 110
             #define TASK_PRIORITY_PRC2 110
             #define TASK_PRIORITY_LOAD 190
             #define TASK_PRIORITY_DUMB 200
             #define TASK_PRIORITY_SCRB 210
             #define MSG_QUEUE_COUNT_RECV  10
             #define MSG_QUEUE_COUNT_SEND  50
             #define MSG_QUEUE_COUNT_PRC0  10
             #define MSG_QUEUE_COUNT_PRC1  10
             #define MSG_QUEUE_COUNT_PRC2  5
             #define MSG_QUEUE_SIZE_SEND             812 // 808 + 4 => TM_LFR_SCIENCE_BURST_BP2_F1
             #define MSG_QUEUE_SIZE_PRC0             36  // two pointers, one rtems_event + 6 integers
             #define MSG_QUEUE_SIZE_PRC1             36  // two pointers, one rtems_event + 6 integers
             #define MSG_QUEUE_SIZE_PRC2             36  // two pointers, one rtems_event + 6 integers
             #define QUEUE_RECV 0
             #define QUEUE_SEND 1
             #define QUEUE_PRC0 2
             #define QUEUE_PRC1 3
             #define QUEUE_PRC2 4
             struct param_local_str{
                 unsigned int local_sbm1_nb_cwf_sent;
                 unsigned int local_sbm1_nb_cwf_max;
                 unsigned int local_sbm2_nb_cwf_sent;
                 unsigned int local_sbm2_nb_cwf_max;
             };
             //************
             // FBINS MASKS
             #define BYTES_PER_FBINS_MASK 16
             typedef struct {
                 unsigned char merged_fbins_mask_f0[BYTES_PER_FBINS_MASK];
                 unsigned char merged_fbins_mask_f1[BYTES_PER_FBINS_MASK];
                 unsigned char merged_fbins_mask_f2[BYTES_PER_FBINS_MASK];
             } fbins_masks_t;
             #define DEFAULT_SY_LFR_PAS_FILTER_ENABLED   0
             #define DEFAULT_SY_LFR_PAS_FILTER_MODULUS   4
             #define DEFAULT_SY_LFR_PAS_FILTER_TBAD      1.0f
             #define DEFAULT_SY_LFR_PAS_FILTER_OFFSET    0
             #define DEFAULT_SY_LFR_PAS_FILTER_SHIFT     0.5f
             #define DEFAULT_MODULUS   262144    // 65536 * 4
             #define DEFAULT_TBAD      65536     // 65536
             #define DEFAULT_OFFSET    0         // 65536 * 0
             #define DEFAULT_SHIFT     32768     // 65536 / 2
             #define DEFAULT_SY_LFR_SC_RW_DELTA_F        0.045f
             #define DEFAULT_SY_LFR_RW_K1                1.f
             #define DEFAULT_SY_LFR_RW_K2                8.f
             #define DEFAULT_SY_LFR_RW_K3                24.f
             #define DEFAULT_SY_LFR_RW_K4                48.f
             typedef struct{
                 unsigned char spare_sy_lfr_pas_filter_enabled;
                 float sy_lfr_pas_filter_tbad;
                 float sy_lfr_pas_filter_shift;
                 uint64_t modulus_in_finetime;
                 uint64_t tbad_in_finetime;
                 uint64_t offset_in_finetime;
                 uint64_t shift_in_finetime;
                 float sy_lfr_sc_rw_delta_f;
                 // rw1_k
                 float sy_lfr_rw1_k1;
                 float sy_lfr_rw1_k2;
                 float sy_lfr_rw1_k3;
                 float sy_lfr_rw1_k4;
                 // rw2_k
                 float sy_lfr_rw2_k1;
                 float sy_lfr_rw2_k2;
                 float sy_lfr_rw2_k3;
                 float sy_lfr_rw2_k4;
                 // rw3_k
                 float sy_lfr_rw3_k1;
                 float sy_lfr_rw3_k2;
                 float sy_lfr_rw3_k3;
                 float sy_lfr_rw3_k4;
                 // rw4_k
                 float sy_lfr_rw4_k1;
                 float sy_lfr_rw4_k2;
                 float sy_lfr_rw4_k3;
                 float sy_lfr_rw4_k4;
             } filterPar_t;
             typedef struct{
                 // rw1_f
                 float cp_rpw_sc_rw1_f1;
                 float cp_rpw_sc_rw1_f2;
                 float cp_rpw_sc_rw1_f3;
                 float cp_rpw_sc_rw1_f4;
                 // rw2_f
                 float cp_rpw_sc_rw2_f1;
                 float cp_rpw_sc_rw2_f2;
                 float cp_rpw_sc_rw2_f3;
                 float cp_rpw_sc_rw2_f4;
                 // rw3_f
                 float cp_rpw_sc_rw3_f1;
                 float cp_rpw_sc_rw3_f2;
                 float cp_rpw_sc_rw3_f3;
                 float cp_rpw_sc_rw3_f4;
                 // rw4_f
                 float cp_rpw_sc_rw4_f1;
                 float cp_rpw_sc_rw4_f2;
                 float cp_rpw_sc_rw4_f3;
                 float cp_rpw_sc_rw4_f4;
             } rw_f_t;
             #define MATRIX_IS_POLLUTED      0
             #define MATRIX_IS_NOT_POLLUTED  1
             #define ACQUISITION_DURATION_F0 683     // 256 / 24576 * 65536
             #define ACQUISITION_DURATION_F1 4096    // 256 /  4096 * 65536
             #define ACQUISITION_DURATION_F2 65536   // 256 /   256 * 65536
             #define HALF_ACQUISITION_DURATION_F0 341     // 256 / 24576 * 65536 / 2
             #define HALF_ACQUISITION_DURATION_F1 2048    // 256 /  4096 * 65536 / 2
             #define HALF_ACQUISITION_DURATION_F2 32768   // 256 /   256 * 65536 / 2
             #endif // FSW_PARAMS_H_INCLUDED