HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/JEANDET/lfr_common_headers Commit - r70:1b9238c88489

1

#ifndef FSW_PARAMS_H_INCLUDED

1

#ifndef FSW_PARAMS_H_INCLUDED

2

#define FSW_PARAMS_H_INCLUDED

2

#define FSW_PARAMS_H_INCLUDED

3

4

#include "fsw_params_processing.h"

4

#include "fsw_params_processing.h"

5

#include "fsw_params_nb_bytes.h"

5

#include "fsw_params_nb_bytes.h"

6

#include "tm_byte_positions.h"

6

#include "tm_byte_positions.h"

7

#include "ccsds_types.h"

7

#include "ccsds_types.h"

8

#include "stdint.h"

8

#include "stdint.h"

9

10

#define GRSPW_DEVICE_NAME "/dev/grspw0"

10

#define GRSPW_DEVICE_NAME "/dev/grspw0"

11

#define UART_DEVICE_NAME "/dev/console"

11

#define UART_DEVICE_NAME "/dev/console"

12

13

//*******

13

//*******

14

// MACROS

14

// MACROS

15

#ifdef PRINT_MESSAGES_ON_CONSOLE

15

#ifdef PRINT_MESSAGES_ON_CONSOLE

16

#define PRINTF(x) printf(x);

16

#define PRINTF(x) printf(x);

17

#define PRINTF1(x,y) printf(x,y);

17

#define PRINTF1(x,y) printf(x,y);

18

#define PRINTF2(x,y,z) printf(x,y,z);

18

#define PRINTF2(x,y,z) printf(x,y,z);

19

#else

19

#else

20

#define PRINTF(x) ;

20

#define PRINTF(x) ;

21

#define PRINTF1(x,y) ;

21

#define PRINTF1(x,y) ;

22

#define PRINTF2(x,y,z) ;

22

#define PRINTF2(x,y,z) ;

23

#endif

23

#endif

24

25

#ifdef BOOT_MESSAGES

25

#ifdef BOOT_MESSAGES

26

#define BOOT_PRINTF(x) printf(x);

26

#define BOOT_PRINTF(x) printf(x);

27

#define BOOT_PRINTF1(x,y) printf(x,y);

27

#define BOOT_PRINTF1(x,y) printf(x,y);

28

#define BOOT_PRINTF2(x,y,z) printf(x,y,z);

28

#define BOOT_PRINTF2(x,y,z) printf(x,y,z);

29

#else

29

#else

30

#define BOOT_PRINTF(x) ;

30

#define BOOT_PRINTF(x) ;

31

#define BOOT_PRINTF1(x,y) ;

31

#define BOOT_PRINTF1(x,y) ;

32

#define BOOT_PRINTF2(x,y,z) ;

32

#define BOOT_PRINTF2(x,y,z) ;

33

#endif

33

#endif

34

35

#ifdef DEBUG_MESSAGES

35

#ifdef DEBUG_MESSAGES

36

#define DEBUG_PRINTF(x) printf(x);

36

#define DEBUG_PRINTF(x) printf(x);

37

#define DEBUG_PRINTF1(x,y) printf(x,y);

37

#define DEBUG_PRINTF1(x,y) printf(x,y);

38

#define DEBUG_PRINTF2(x,y,z) printf(x,y,z);

38

#define DEBUG_PRINTF2(x,y,z) printf(x,y,z);

39

#else

39

#else

40

#define DEBUG_PRINTF(x) ;

40

#define DEBUG_PRINTF(x) ;

41

#define DEBUG_PRINTF1(x,y) ;

41

#define DEBUG_PRINTF1(x,y) ;

42

#define DEBUG_PRINTF2(x,y,z) ;

42

#define DEBUG_PRINTF2(x,y,z) ;

43

#endif

43

#endif

44

45

#define CONST_65536 65536 // 2^16

45

#define CONST_65536 65536 // 2^16

46

#define CONST_2048 2048 // 2^11

46

#define CONST_2048 2048 // 2^11

47

#define CONST_512 512 // 2^9

47

#define CONST_512 512 // 2^9

48

#define CONST_256 256 // 2^8

48

#define CONST_256 256 // 2^8

49

#define CONST_128 128 // 2^7

49

#define CONST_128 128 // 2^7

50

#define UINT8_MAX 255

50

#define UINT8_MAX 255

51

52

#define FLOAT_MSBYTE 0

52

#define FLOAT_MSBYTE 0

53

#define FLOAT_LSBYTE 3

53

#define FLOAT_LSBYTE 3

54

#define BITS_PER_BYTE 8

54

#define BITS_PER_BYTE 8

55

#define INIT_FLOAT 0.

55

#define INIT_FLOAT 0.

56

#define INIT_CHAR 0x00

56

#define INIT_CHAR 0x00

57

#define INIT_INT 0

57

#define INIT_INT 0

58

#define INT8_ALL_F 0xff

58

#define INT8_ALL_F 0xff

59

#define INT16_ALL_F 0xffff

59

#define INT16_ALL_F 0xffff

60

#define INT32_ALL_F 0xffffffff

60

#define INT32_ALL_F 0xffffffff

61

#define INT32_ALL_0 0x00000000

61

#define INT32_ALL_0 0x00000000

62

#define SHIFT_1_BYTE 8

62

#define SHIFT_1_BYTE 8

63

#define SHIFT_2_BYTES 16

63

#define SHIFT_2_BYTES 16

64

#define SHIFT_3_BYTES 24

64

#define SHIFT_3_BYTES 24

65

#define SHIFT_4_BYTES 32

65

#define SHIFT_4_BYTES 32

66

#define SHIFT_5_BYTES 40

66

#define SHIFT_5_BYTES 40

67

#define SHIFT_2_BITS 2

67

#define SHIFT_2_BITS 2

68

#define SHIFT_3_BITS 3

68

#define SHIFT_3_BITS 3

69

#define SHIFT_4_BITS 4

69

#define SHIFT_4_BITS 4

70

#define SHIFT_5_BITS 5

70

#define SHIFT_5_BITS 5

71

#define SHIFT_6_BITS 6

71

#define SHIFT_6_BITS 6

72

#define SHIFT_7_BITS 7

72

#define SHIFT_7_BITS 7

73

#define BYTE_0 0

73

#define BYTE_0 0

74

#define BYTE_1 1

74

#define BYTE_1 1

75

#define BYTE_2 2

75

#define BYTE_2 2

76

#define BYTE_3 3

76

#define BYTE_3 3

77

#define BYTE_4 4

77

#define BYTE_4 4

78

#define BYTE_5 5

78

#define BYTE_5 5

79

#define BYTE_6 6

79

#define BYTE_6 6

80

#define BYTE_7 7

80

#define BYTE_7 7

81

#define BYTE0_MASK 0xff00

81

#define BYTE0_MASK 0xff00

82

#define BYTE1_MASK 0x00ff

82

#define BYTE1_MASK 0x00ff

83

84

enum lfr_transition_type_t{

84

enum lfr_transition_type_t{

85

TRANSITION_NOT_SPECIFIC,

85

TRANSITION_NOT_SPECIFIC,

86

TRANSITION_NORM_TO_S1,

86

TRANSITION_NORM_TO_S1,

87

TRANSITION_NORM_TO_S2,

87

TRANSITION_NORM_TO_S2,

88

TRANSITION_S1_TO_NORM,

88

TRANSITION_S1_TO_NORM,

89

TRANSITION_S2_TO_NORM,

89

TRANSITION_S2_TO_NORM,

90

TRANSITION_S1_TO_S2,

90

TRANSITION_S1_TO_S2,

91

TRANSITION_S2_TO_S1

91

TRANSITION_S2_TO_S1

92

};

92

};

93

94

typedef struct ring_node

94

typedef struct ring_node

95

{

95

{

96

struct ring_node *previous;

96

struct ring_node *previous;

97

struct ring_node *next;

97

struct ring_node *next;

98

unsigned int sid;

98

unsigned int sid;

99

unsigned int coarseTime;

99

unsigned int coarseTime;

100

unsigned int fineTime;

100

unsigned int fineTime;

101

int buffer_address;

101

int buffer_address;

102

unsigned int status;

102

unsigned int status;

103

} ring_node;

103

} ring_node;

104

105

//************************

105

//************************

106

// flight software version

106

// flight software version

107

// this parameters is handled by the Qt project options

107

// this parameters is handled by the Qt project options

108

109

#define NB_PACKETS_PER_GROUP_OF_CWF 8 // 8 packets containing 336 blk

109

#define NB_PACKETS_PER_GROUP_OF_CWF 8 // 8 packets containing 336 blk

110

#define NB_PACKETS_PER_GROUP_OF_CWF_LIGHT 4 // 4 packets containing 672 blk

110

#define NB_PACKETS_PER_GROUP_OF_CWF_LIGHT 4 // 4 packets containing 672 blk

111

#define NB_SAMPLES_PER_SNAPSHOT 2688 // 336 * 8 = 672 * 4 = 2688

111

#define NB_SAMPLES_PER_SNAPSHOT 2688 // 336 * 8 = 672 * 4 = 2688

112

#define TIME_OFFSET 2

112

#define TIME_OFFSET 2

113

#define TIME_OFFSET_IN_BYTES 8

113

#define TIME_OFFSET_IN_BYTES 8

114

//#define WAVEFORM_EXTENDED_HEADER_OFFSET 22

114

//#define WAVEFORM_EXTENDED_HEADER_OFFSET 22

115

#define NB_BYTES_SWF_BLK (2 * 6)

115

#define NB_BYTES_SWF_BLK (2 * 6)

116

#define NB_WORDS_SWF_BLK 3

116

#define NB_WORDS_SWF_BLK 3

117

#define NB_BYTES_CWF3_LIGHT_BLK 6

117

#define NB_BYTES_CWF3_LIGHT_BLK 6

118

//#define WFRM_INDEX_OF_LAST_PACKET 6 // waveforms are transmitted in groups of 2048 blocks, 6 packets of 340 and 1 of 8

118

//#define WFRM_INDEX_OF_LAST_PACKET 6 // waveforms are transmitted in groups of 2048 blocks, 6 packets of 340 and 1 of 8

119

#define NB_RING_NODES_F0 3 // AT LEAST 3

119

#define NB_RING_NODES_F0 3 // AT LEAST 3

120

#define NB_RING_NODES_F1 5 // AT LEAST 3

120

#define NB_RING_NODES_F1 5 // AT LEAST 3

121

#define NB_RING_NODES_F2 5 // AT LEAST 3

121

#define NB_RING_NODES_F2 5 // AT LEAST 3

122

#define NB_RING_NODES_F3 3 // AT LEAST 3

122

#define NB_RING_NODES_F3 3 // AT LEAST 3

123

124

//**********

124

//**********

125

// LFR MODES

125

// LFR MODES

126

#define LFR_MODE_STANDBY 0

126

#define LFR_MODE_STANDBY 0

127

#define LFR_MODE_NORMAL 1

127

#define LFR_MODE_NORMAL 1

128

#define LFR_MODE_BURST 2

128

#define LFR_MODE_BURST 2

129

#define LFR_MODE_SBM1 3

129

#define LFR_MODE_SBM1 3

130

#define LFR_MODE_SBM2 4

130

#define LFR_MODE_SBM2 4

131

132

#define TDS_MODE_LFM 5

132

#define TDS_MODE_LFM 5

133

#define TDS_MODE_STANDBY 0

133

#define TDS_MODE_STANDBY 0

134

#define TDS_MODE_NORMAL 1

134

#define TDS_MODE_NORMAL 1

135

#define TDS_MODE_BURST 2

135

#define TDS_MODE_BURST 2

136

#define TDS_MODE_SBM1 3

136

#define TDS_MODE_SBM1 3

137

#define TDS_MODE_SBM2 4

137

#define TDS_MODE_SBM2 4

138

139

#define THR_MODE_STANDBY 0

139

#define THR_MODE_STANDBY 0

140

#define THR_MODE_NORMAL 1

140

#define THR_MODE_NORMAL 1

141

#define THR_MODE_BURST 2

141

#define THR_MODE_BURST 2

142

143

#define RTEMS_EVENT_MODE_STANDBY RTEMS_EVENT_0

143

#define RTEMS_EVENT_MODE_STANDBY RTEMS_EVENT_0

144

#define RTEMS_EVENT_MODE_NORMAL RTEMS_EVENT_1

144

#define RTEMS_EVENT_MODE_NORMAL RTEMS_EVENT_1

145

#define RTEMS_EVENT_MODE_BURST RTEMS_EVENT_2

145

#define RTEMS_EVENT_MODE_BURST RTEMS_EVENT_2

146

#define RTEMS_EVENT_MODE_SBM1 RTEMS_EVENT_3

146

#define RTEMS_EVENT_MODE_SBM1 RTEMS_EVENT_3

147

#define RTEMS_EVENT_MODE_SBM2 RTEMS_EVENT_4

147

#define RTEMS_EVENT_MODE_SBM2 RTEMS_EVENT_4

148

#define RTEMS_EVENT_MODE_NORM_S1_S2 RTEMS_EVENT_5

148

#define RTEMS_EVENT_MODE_NORM_S1_S2 RTEMS_EVENT_5

149

#define RTEMS_EVENT_NORM_BP1_F0 RTEMS_EVENT_6

149

#define RTEMS_EVENT_NORM_BP1_F0 RTEMS_EVENT_6

150

#define RTEMS_EVENT_NORM_BP2_F0 RTEMS_EVENT_7

150

#define RTEMS_EVENT_NORM_BP2_F0 RTEMS_EVENT_7

151

#define RTEMS_EVENT_NORM_ASM_F0 RTEMS_EVENT_8 // ASM only in NORM mode

151

#define RTEMS_EVENT_NORM_ASM_F0 RTEMS_EVENT_8 // ASM only in NORM mode

152

#define RTEMS_EVENT_NORM_BP1_F1 RTEMS_EVENT_9

152

#define RTEMS_EVENT_NORM_BP1_F1 RTEMS_EVENT_9

153

#define RTEMS_EVENT_NORM_BP2_F1 RTEMS_EVENT_10

153

#define RTEMS_EVENT_NORM_BP2_F1 RTEMS_EVENT_10

154

#define RTEMS_EVENT_NORM_ASM_F1 RTEMS_EVENT_11 // ASM only in NORM mode

154

#define RTEMS_EVENT_NORM_ASM_F1 RTEMS_EVENT_11 // ASM only in NORM mode

155

#define RTEMS_EVENT_NORM_BP1_F2 RTEMS_EVENT_12

155

#define RTEMS_EVENT_NORM_BP1_F2 RTEMS_EVENT_12

156

#define RTEMS_EVENT_NORM_BP2_F2 RTEMS_EVENT_13

156

#define RTEMS_EVENT_NORM_BP2_F2 RTEMS_EVENT_13

157

#define RTEMS_EVENT_NORM_ASM_F2 RTEMS_EVENT_14 // ASM only in NORM mode

157

#define RTEMS_EVENT_NORM_ASM_F2 RTEMS_EVENT_14 // ASM only in NORM mode

158

#define RTEMS_EVENT_SBM_BP1_F0 RTEMS_EVENT_15

158

#define RTEMS_EVENT_SBM_BP1_F0 RTEMS_EVENT_15

159

#define RTEMS_EVENT_SBM_BP2_F0 RTEMS_EVENT_16

159

#define RTEMS_EVENT_SBM_BP2_F0 RTEMS_EVENT_16

160

#define RTEMS_EVENT_SBM_BP1_F1 RTEMS_EVENT_17

160

#define RTEMS_EVENT_SBM_BP1_F1 RTEMS_EVENT_17

161

#define RTEMS_EVENT_SBM_BP2_F1 RTEMS_EVENT_18

161

#define RTEMS_EVENT_SBM_BP2_F1 RTEMS_EVENT_18

162

#define RTEMS_EVENT_BURST_BP1_F0 RTEMS_EVENT_19

162

#define RTEMS_EVENT_BURST_BP1_F0 RTEMS_EVENT_19

163

#define RTEMS_EVENT_BURST_BP2_F0 RTEMS_EVENT_20

163

#define RTEMS_EVENT_BURST_BP2_F0 RTEMS_EVENT_20

164

#define RTEMS_EVENT_BURST_BP1_F1 RTEMS_EVENT_21

164

#define RTEMS_EVENT_BURST_BP1_F1 RTEMS_EVENT_21

165

#define RTEMS_EVENT_BURST_BP2_F1 RTEMS_EVENT_22

165

#define RTEMS_EVENT_BURST_BP2_F1 RTEMS_EVENT_22

166

#define RTEMS_EVENT_SWF_RESYNCH RTEMS_EVENT_23

166

#define RTEMS_EVENT_SWF_RESYNCH RTEMS_EVENT_23

167

#define RTEMS_EVENT_CAL_SWEEP_WAKE RTEMS_EVENT_24

167

168

//********************************************

169

//********************************************

169

//********************************************

170

//********************************************

170

// LFR PARAMETERS: DEFAULT, MIN AND MAX VALUES

171

// LFR PARAMETERS: DEFAULT, MIN AND MAX VALUES

171

172

#define DEFAULT_LAST_VALID_TRANSITION_DATE 0xffffffff

173

#define DEFAULT_LAST_VALID_TRANSITION_DATE 0xffffffff

173

174

// COMMON

175

// COMMON

175

#define DEFAULT_SY_LFR_COMMON0 0x00

176

#define DEFAULT_SY_LFR_COMMON0 0x00

176

#define DEFAULT_SY_LFR_COMMON1 0x20 // default value bw sp0 sp1 r0 r1 r2 = 1 0 0 0 0 0

177

#define DEFAULT_SY_LFR_COMMON1 0x20 // default value bw sp0 sp1 r0 r1 r2 = 1 0 0 0 0 0

177

178

// NORM

179

// NORM

179

#define DFLT_SY_LFR_N_SWF_L 2048 // nb sample

180

#define DFLT_SY_LFR_N_SWF_L 2048 // nb sample

180

#define DFLT_SY_LFR_N_SWF_P 300 // sec

181

#define DFLT_SY_LFR_N_SWF_P 300 // sec

181

#define MIN_SY_LFR_N_SWF_P 22 // sec

182

#define MIN_SY_LFR_N_SWF_P 22 // sec

182

#define DFLT_SY_LFR_N_ASM_P 3600 // sec

183

#define DFLT_SY_LFR_N_ASM_P 3600 // sec

183

#define DFLT_SY_LFR_N_BP_P0 4 // sec

184

#define DFLT_SY_LFR_N_BP_P0 4 // sec

184

#define DFLT_SY_LFR_N_BP_P1 20 // sec

185

#define DFLT_SY_LFR_N_BP_P1 20 // sec

185

#define DFLT_SY_LFR_N_CWF_LONG_F3 0 // 0 => production of light continuous waveforms at f3

186

#define DFLT_SY_LFR_N_CWF_LONG_F3 0 // 0 => production of light continuous waveforms at f3

186

#define MIN_DELTA_SNAPSHOT 16 // sec

187

#define MIN_DELTA_SNAPSHOT 16 // sec

187

188

// BURST

189

// BURST

189

#define DEFAULT_SY_LFR_B_BP_P0 1 // sec

190

#define DEFAULT_SY_LFR_B_BP_P0 1 // sec

190

#define DEFAULT_SY_LFR_B_BP_P1 5 // sec

191

#define DEFAULT_SY_LFR_B_BP_P1 5 // sec

191

192

// SBM1

193

// SBM1

193

#define S1_BP_P0_SCALE 0.25

194

#define S1_BP_P0_SCALE 0.25

194

#define DEFAULT_SY_LFR_S1_BP_P0 1 // 0.25 sec

195

#define DEFAULT_SY_LFR_S1_BP_P0 1 // 0.25 sec

195

#define DEFAULT_SY_LFR_S1_BP_P1 1 // sec

196

#define DEFAULT_SY_LFR_S1_BP_P1 1 // sec

196

197

// SBM2

198

// SBM2

198

#define DEFAULT_SY_LFR_S2_BP_P0 1 // sec

199

#define DEFAULT_SY_LFR_S2_BP_P0 1 // sec

199

#define DEFAULT_SY_LFR_S2_BP_P1 5 // sec

200

#define DEFAULT_SY_LFR_S2_BP_P1 5 // sec

200

201

// ADDITIONAL PARAMETERS

202

// ADDITIONAL PARAMETERS

202

#define TIME_BETWEEN_TWO_SWF_PACKETS 30 // nb x 10 ms => 300 ms

203

#define TIME_BETWEEN_TWO_SWF_PACKETS 30 // nb x 10 ms => 300 ms

203

#define TIME_BETWEEN_TWO_CWF3_PACKETS 1000 // nb x 10 ms => 10 s

204

#define TIME_BETWEEN_TWO_CWF3_PACKETS 1000 // nb x 10 ms => 10 s

204

205

// STATUS WORD

206

// STATUS WORD

206

#define DEFAULT_STATUS_WORD_BYTE0 0x0d // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits

207

#define DEFAULT_STATUS_WORD_BYTE0 0x0d // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits

207

208

#define DEFAULT_STATUS_WORD_BYTE1 0x00

209

#define DEFAULT_STATUS_WORD_BYTE1 0x00

209

// TC_LFR_LOAD_FILTER_PAR

210

// TC_LFR_LOAD_FILTER_PAR

210

#define MIN_PAS_FILTER_MODULUS 4

211

#define MIN_PAS_FILTER_MODULUS 4

211

#define MAX_PAS_FILTER_MODULUS 8

212

#define MAX_PAS_FILTER_MODULUS 8

212

#define MIN_PAS_FILTER_TBAD 0.0

213

#define MIN_PAS_FILTER_TBAD 0.0

213

#define MAX_PAS_FILTER_TBAD 4.0

214

#define MAX_PAS_FILTER_TBAD 4.0

214

#define MIN_PAS_FILTER_OFFSET 0

215

#define MIN_PAS_FILTER_OFFSET 0

215

#define MAX_PAS_FILTER_OFFSET 7

216

#define MAX_PAS_FILTER_OFFSET 7

216

#define MIN_PAS_FILTER_SHIFT 0.0

217

#define MIN_PAS_FILTER_SHIFT 0.0

217

#define MAX_PAS_FILTER_SHIFT 1.0

218

#define MAX_PAS_FILTER_SHIFT 1.0

218

#define MIN_SY_LFR_SC_RW_DELTA_F 0

219

#define MIN_SY_LFR_SC_RW_DELTA_F 0

219

#define MIN_SY_LFR_RW_K 0

220

#define MIN_SY_LFR_RW_K 0

220

#define MIN_SY_LFR_RW_F 0

221

#define MIN_SY_LFR_RW_F 0

221

//

222

//

222

#define SY_LFR_DPU_CONNECT_TIMEOUT 100 // 100 * 10 ms = 1 s

223

#define SY_LFR_DPU_CONNECT_TIMEOUT 100 // 100 * 10 ms = 1 s

223

#define SY_LFR_DPU_CONNECT_ATTEMPT 3

224

#define SY_LFR_DPU_CONNECT_ATTEMPT 3

224

//****************************

225

//****************************

225

226

//*****************************

227

//*****************************

227

// APB REGISTERS BASE ADDRESSES

228

// APB REGISTERS BASE ADDRESSES

228

#define REGS_ADDR_APBUART 0x80000100

229

#define REGS_ADDR_APBUART 0x80000100

229

#define REGS_ADDR_GPTIMER 0x80000300

230

#define REGS_ADDR_GPTIMER 0x80000300

230

#define REGS_ADDR_GRSPW 0x80000500

231

#define REGS_ADDR_GRSPW 0x80000500

231

#define APB_OFFSET_GRSPW_STATUS_REGISTER 0x04

232

#define APB_OFFSET_GRSPW_STATUS_REGISTER 0x04

232

#define APB_OFFSET_GRSPW_TIME_REGISTER 0x14

233

#define APB_OFFSET_GRSPW_TIME_REGISTER 0x14

233

#define REGS_ADDR_TIME_MANAGEMENT 0x80000600

234

#define REGS_ADDR_TIME_MANAGEMENT 0x80000600

234

#define REGS_ADDR_GRGPIO 0x80000b00

235

#define REGS_ADDR_GRGPIO 0x80000b00

235

236

#define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00

237

#define REGS_ADDR_SPECTRAL_MATRIX 0x80000f00

237

#define REGS_ADDR_WAVEFORM_PICKER 0x80000f54 // PDB >= 0.1.28

238

#define REGS_ADDR_WAVEFORM_PICKER 0x80000f54 // PDB >= 0.1.28

238

#define APB_OFFSET_VHDL_REV 0xb0

239

#define APB_OFFSET_VHDL_REV 0xb0

239

#define REGS_ADDR_VHDL_VERSION 0x80000ff0

240

#define REGS_ADDR_VHDL_VERSION 0x80000ff0

240

241

#define APBUART_CTRL_REG_MASK_DB 0xfffff7ff

242

#define APBUART_CTRL_REG_MASK_DB 0xfffff7ff

242

#define APBUART_CTRL_REG_MASK_TE 0x00000002

243

#define APBUART_CTRL_REG_MASK_TE 0x00000002

243

// scaler value = system_clock_frequency / ( baud_rate * 8 ) - 1

244

// scaler value = system_clock_frequency / ( baud_rate * 8 ) - 1

244

#define APBUART_SCALER_RELOAD_VALUE 0x00000050 // 25 MHz => about 38400

245

#define APBUART_SCALER_RELOAD_VALUE 0x00000050 // 25 MHz => about 38400

245

246

//**********

247

//**********

247

// IRQ LINES

248

// IRQ LINES

248

#define IRQ_GPTIMER_WATCHDOG 9

249

#define IRQ_GPTIMER_WATCHDOG 9

249

#define IRQ_SPARC_GPTIMER_WATCHDOG 0x19 // see sparcv8.pdf p.76 for interrupt levels

250

#define IRQ_SPARC_GPTIMER_WATCHDOG 0x19 // see sparcv8.pdf p.76 for interrupt levels

250

#define IRQ_WAVEFORM_PICKER 14

251

#define IRQ_WAVEFORM_PICKER 14

251

#define IRQ_SPARC_WAVEFORM_PICKER 0x1e // see sparcv8.pdf p.76 for interrupt levels

252

#define IRQ_SPARC_WAVEFORM_PICKER 0x1e // see sparcv8.pdf p.76 for interrupt levels

252

#define IRQ_SPECTRAL_MATRIX 6

253

#define IRQ_SPECTRAL_MATRIX 6

253

#define IRQ_SPARC_SPECTRAL_MATRIX 0x16 // see sparcv8.pdf p.76 for interrupt levels

254

#define IRQ_SPARC_SPECTRAL_MATRIX 0x16 // see sparcv8.pdf p.76 for interrupt levels

254

255

//*****

256

//*****

256

// TIME

257

// TIME

257

#define CLKDIV_WATCHDOG (10000000 - 1) // 10.0s => 10 000 000

258

#define CLKDIV_WATCHDOG (10000000 - 1) // 10.0s => 10 000 000

258

#define TIMER_WATCHDOG 1

259

#define TIMER_WATCHDOG 1

259

#define WATCHDOG_PERIOD 100 // 1s

260

#define WATCHDOG_PERIOD 100 // 1s

260

#define HK_PERIOD 100 // 100 * 10ms => 1s

261

#define HK_PERIOD 100 // 100 * 10ms => 1s

261

#define AVGV_PERIOD 6 // 6 * 10ms => 60ms (1 / 16 = 62.5ms)

262

#define AVGV_PERIOD 6 // 6 * 10ms => 60ms (1 / 16 = 62.5ms)

262

#define SY_LFR_TIME_SYN_TIMEOUT_in_ticks 200 // 200 * 10 ms = 2 s

263

#define SY_LFR_TIME_SYN_TIMEOUT_in_ticks 200 // 200 * 10 ms = 2 s

263

#define HK_SYNC_WAIT 10 // 10 * 10 ms = 100 ms

264

#define HK_SYNC_WAIT 10 // 10 * 10 ms = 100 ms

264

#define SPW_LINK_WAIT 10 // 10 * 10 ms = 100 ms

265

#define SPW_LINK_WAIT 10 // 10 * 10 ms = 100 ms

265

#define TIMECODE_TIMER_TIMEOUT 120 // 120 * 10 ms = 1.2 s

266

#define TIMECODE_TIMER_TIMEOUT 120 // 120 * 10 ms = 1.2 s

266

#define TIMECODE_TIMER_TIMEOUT_INIT 200 // 200 * 10 ms = 2.0 s

267

#define TIMECODE_TIMER_TIMEOUT_INIT 200 // 200 * 10 ms = 2.0 s

267

#define TIMECODE_MASK 0x3f // 0011 1111

268

#define TIMECODE_MASK 0x3f // 0011 1111

268

269

//**********

270

//**********

270

// LPP CODES

271

// LPP CODES

271

#define LFR_SUCCESSFUL 0

272

#define LFR_SUCCESSFUL 0

272

#define LFR_DEFAULT 1

273

#define LFR_DEFAULT 1

273

#define LFR_EXE_ERROR 2

274

#define LFR_EXE_ERROR 2

274

#define LFR_DEFAULT_ALT -1

275

#define LFR_DEFAULT_ALT -1

275

276

//******

277

//******

277

// RTEMS

278

// RTEMS

278

#define STACK_SIZE_MULT 2

279

#define STACK_SIZE_MULT 2

279

280

#define TASKID_AVGV 0

281

#define TASKID_AVGV 0

281

#define TASKID_RECV 1

282

#define TASKID_RECV 1

282

#define TASKID_ACTN 2

283

#define TASKID_ACTN 2

283

#define TASKID_SPIQ 3

284

#define TASKID_SPIQ 3

284

#define TASKID_LOAD 4

285

#define TASKID_LOAD 4

285

#define TASKID_AVF0 5

286

#define TASKID_AVF0 5

286

#define TASKID_SWBD 6

287

#define TASKID_SWBD 6

287

#define TASKID_WFRM 7

288

#define TASKID_WFRM 7

288

#define TASKID_DUMB 8

289

#define TASKID_DUMB 8

289

#define TASKID_HOUS 9

290

#define TASKID_HOUS 9

290

#define TASKID_PRC0 10

291

#define TASKID_PRC0 10

291

#define TASKID_CWF3 11

292

#define TASKID_CWF3 11

292

#define TASKID_CWF2 12

293

#define TASKID_CWF2 12

293

#define TASKID_CWF1 13

294

#define TASKID_CWF1 13

294

#define TASKID_SEND 14

295

#define TASKID_SEND 14

295

#define TASKID_LINK 15

296

#define TASKID_LINK 15

296

#define TASKID_AVF1 16

297

#define TASKID_AVF1 16

297

#define TASKID_PRC1 17

298

#define TASKID_PRC1 17

298

#define TASKID_AVF2 18

299

#define TASKID_AVF2 18

299

#define TASKID_PRC2 19

300

#define TASKID_PRC2 19

300

#define TASKID_SCRB 20

301

#define TASKID_SCRB 20

302

#define TASKID_CALI 21

301

303

302

#define TASK_PRIORITY_SPIQ 5

304

#define TASK_PRIORITY_SPIQ 5

303

#define TASK_PRIORITY_LINK 20

305

#define TASK_PRIORITY_LINK 20

304

#define TASK_PRIORITY_AVGV 25

306

#define TASK_PRIORITY_AVGV 25

305

#define TASK_PRIORITY_HOUS 30

307

#define TASK_PRIORITY_HOUS 30

306

#define TASK_PRIORITY_CWF1 35 // CWF1 and CWF2 are never running together

308

#define TASK_PRIORITY_CWF1 35 // CWF1 and CWF2 are never running together

307

#define TASK_PRIORITY_CWF2 35 //

309

#define TASK_PRIORITY_CWF2 35 //

308

#define TASK_PRIORITY_SWBD 37 // SWBD has a lower priority than WFRM, this is to extract the snapshot before sending it

310

#define TASK_PRIORITY_SWBD 37 // SWBD has a lower priority than WFRM, this is to extract the snapshot before sending it

309

#define TASK_PRIORITY_WFRM 40

311

#define TASK_PRIORITY_WFRM 40

310

#define TASK_PRIORITY_CWF3 40 // there is a printf in this function, be careful with its priority wrt CWF1

312

#define TASK_PRIORITY_CWF3 40 // there is a printf in this function, be careful with its priority wrt CWF1

311

#define TASK_PRIORITY_SEND 45

313

#define TASK_PRIORITY_SEND 45

312

#define TASK_PRIORITY_RECV 50

314

#define TASK_PRIORITY_RECV 50

315

#define TASK_PRIORITY_CALI 50

313

#define TASK_PRIORITY_ACTN 50

316

#define TASK_PRIORITY_ACTN 50

314

#define TASK_PRIORITY_AVF0 60

317

#define TASK_PRIORITY_AVF0 60

315

#define TASK_PRIORITY_AVF1 70

318

#define TASK_PRIORITY_AVF1 70

316

#define TASK_PRIORITY_PRC0 100

319

#define TASK_PRIORITY_PRC0 100

317

#define TASK_PRIORITY_PRC1 100

320

#define TASK_PRIORITY_PRC1 100

318

#define TASK_PRIORITY_AVF2 110

321

#define TASK_PRIORITY_AVF2 110

319

#define TASK_PRIORITY_PRC2 110

322

#define TASK_PRIORITY_PRC2 110

320

#define TASK_PRIORITY_LOAD 190

323

#define TASK_PRIORITY_LOAD 190

321

#define TASK_PRIORITY_DUMB 200

324

#define TASK_PRIORITY_DUMB 200

322

#define TASK_PRIORITY_SCRB 210

325

#define TASK_PRIORITY_SCRB 210

323

326

324

#define MSG_QUEUE_COUNT_RECV 10

327

#define MSG_QUEUE_COUNT_RECV 10

325

#define MSG_QUEUE_COUNT_SEND 50

328

#define MSG_QUEUE_COUNT_SEND 50

326

#define MSG_QUEUE_COUNT_PRC0 10

329

#define MSG_QUEUE_COUNT_PRC0 10

327

#define MSG_QUEUE_COUNT_PRC1 10

330

#define MSG_QUEUE_COUNT_PRC1 10

328

#define MSG_QUEUE_COUNT_PRC2 5

331

#define MSG_QUEUE_COUNT_PRC2 5

329

#define MSG_QUEUE_SIZE_SEND 812 // 808 + 4 => TM_LFR_SCIENCE_BURST_BP2_F1

332

#define MSG_QUEUE_SIZE_SEND 812 // 808 + 4 => TM_LFR_SCIENCE_BURST_BP2_F1

330

#define ACTION_MSG_SPW_IOCTL_SEND_SIZE 24 // hlen *hdr dlen *data sent options

333

#define ACTION_MSG_SPW_IOCTL_SEND_SIZE 24 // hlen *hdr dlen *data sent options

331

#define MSG_QUEUE_SIZE_PRC0 36 // two pointers, one rtems_event + 6 integers

334

#define MSG_QUEUE_SIZE_PRC0 36 // two pointers, one rtems_event + 6 integers

332

#define MSG_QUEUE_SIZE_PRC1 36 // two pointers, one rtems_event + 6 integers

335

#define MSG_QUEUE_SIZE_PRC1 36 // two pointers, one rtems_event + 6 integers

333

#define MSG_QUEUE_SIZE_PRC2 36 // two pointers, one rtems_event + 6 integers

336

#define MSG_QUEUE_SIZE_PRC2 36 // two pointers, one rtems_event + 6 integers

334

337

335

#define QUEUE_RECV 0

338

#define QUEUE_RECV 0

336

#define QUEUE_SEND 1

339

#define QUEUE_SEND 1

337

#define QUEUE_PRC0 2

340

#define QUEUE_PRC0 2

338

#define QUEUE_PRC1 3

341

#define QUEUE_PRC1 3

339

#define QUEUE_PRC2 4

342

#define QUEUE_PRC2 4

343

#define QUEUE_CALI 5

340

344

341

#define CPU_USAGE_REPORT_PERIOD 6 // * 10 s = period

345

#define CPU_USAGE_REPORT_PERIOD 6 // * 10 s = period

342

346

343

struct param_local_str{

347

struct param_local_str{

344

unsigned int local_sbm1_nb_cwf_sent;

348

unsigned int local_sbm1_nb_cwf_sent;

345

unsigned int local_sbm1_nb_cwf_max;

349

unsigned int local_sbm1_nb_cwf_max;

346

unsigned int local_sbm2_nb_cwf_sent;

350

unsigned int local_sbm2_nb_cwf_sent;

347

unsigned int local_sbm2_nb_cwf_max;

351

unsigned int local_sbm2_nb_cwf_max;

348

};

352

};

349

353

350

//************

354

//************

351

// FBINS MASKS

355

// FBINS MASKS

352

356

353

#define BYTES_PER_FBINS_MASK 16

357

#define BYTES_PER_FBINS_MASK 16

354

358

355

typedef struct {

359

typedef struct {

356

unsigned char merged_fbins_mask_f0[BYTES_PER_FBINS_MASK];

360

unsigned char merged_fbins_mask_f0[BYTES_PER_FBINS_MASK];

357

unsigned char merged_fbins_mask_f1[BYTES_PER_FBINS_MASK];

361

unsigned char merged_fbins_mask_f1[BYTES_PER_FBINS_MASK];

358

unsigned char merged_fbins_mask_f2[BYTES_PER_FBINS_MASK];

362

unsigned char merged_fbins_mask_f2[BYTES_PER_FBINS_MASK];

359

} fbins_masks_t;

363

} fbins_masks_t;

360

364

361

#define DEFAULT_SY_LFR_PAS_FILTER_ENABLED 0

365

#define DEFAULT_SY_LFR_PAS_FILTER_ENABLED 0

362

#define DEFAULT_SY_LFR_PAS_FILTER_MODULUS 4

366

#define DEFAULT_SY_LFR_PAS_FILTER_MODULUS 4

363

#define DEFAULT_SY_LFR_PAS_FILTER_TBAD 1.0f

367

#define DEFAULT_SY_LFR_PAS_FILTER_TBAD 1.0f

364

#define DEFAULT_SY_LFR_PAS_FILTER_OFFSET 0

368

#define DEFAULT_SY_LFR_PAS_FILTER_OFFSET 0

365

#define DEFAULT_SY_LFR_PAS_FILTER_SHIFT 0.5f

369

#define DEFAULT_SY_LFR_PAS_FILTER_SHIFT 0.5f

366

#define DEFAULT_MODULUS 262144 // 65536 * 4

370

#define DEFAULT_MODULUS 262144 // 65536 * 4

367

#define DEFAULT_TBAD 65536 // 65536

371

#define DEFAULT_TBAD 65536 // 65536

368

#define DEFAULT_OFFSET 0 // 65536 * 0

372

#define DEFAULT_OFFSET 0 // 65536 * 0

369

#define DEFAULT_SHIFT 32768 // 65536 / 2

373

#define DEFAULT_SHIFT 32768 // 65536 / 2

370

#define DEFAULT_SY_LFR_SC_RW_DELTA_F 0.045f

374

#define DEFAULT_SY_LFR_SC_RW_DELTA_F 0.045f

371

#define DEFAULT_SY_LFR_RW_K1 1.f

375

#define DEFAULT_SY_LFR_RW_K1 1.f

372

#define DEFAULT_SY_LFR_RW_K2 8.f

376

#define DEFAULT_SY_LFR_RW_K2 8.f

373

#define DEFAULT_SY_LFR_RW_K3 24.f

377

#define DEFAULT_SY_LFR_RW_K3 24.f

374

#define DEFAULT_SY_LFR_RW_K4 48.f

378

#define DEFAULT_SY_LFR_RW_K4 48.f

375

379

376

typedef struct{

380

typedef struct{

377

unsigned char spare_sy_lfr_pas_filter_enabled;

381

unsigned char spare_sy_lfr_pas_filter_enabled;

378

float sy_lfr_pas_filter_tbad;

382

float sy_lfr_pas_filter_tbad;

379

float sy_lfr_pas_filter_shift;

383

float sy_lfr_pas_filter_shift;

380

uint64_t modulus_in_finetime;

384

uint64_t modulus_in_finetime;

381

uint64_t tbad_in_finetime;

385

uint64_t tbad_in_finetime;

382

uint64_t offset_in_finetime;

386

uint64_t offset_in_finetime;

383

uint64_t shift_in_finetime;

387

uint64_t shift_in_finetime;

384

float sy_lfr_sc_rw_delta_f;

388

float sy_lfr_sc_rw_delta_f;

385

// rw1_k

389

// rw1_k

386

float sy_lfr_rw1_k1;

390

float sy_lfr_rw1_k1;

387

float sy_lfr_rw1_k2;

391

float sy_lfr_rw1_k2;

388

float sy_lfr_rw1_k3;

392

float sy_lfr_rw1_k3;

389

float sy_lfr_rw1_k4;

393

float sy_lfr_rw1_k4;

390

// rw2_k

394

// rw2_k

391

float sy_lfr_rw2_k1;

395

float sy_lfr_rw2_k1;

392

float sy_lfr_rw2_k2;

396

float sy_lfr_rw2_k2;

393

float sy_lfr_rw2_k3;

397

float sy_lfr_rw2_k3;

394

float sy_lfr_rw2_k4;

398

float sy_lfr_rw2_k4;

395

// rw3_k

399

// rw3_k

396

float sy_lfr_rw3_k1;

400

float sy_lfr_rw3_k1;

397

float sy_lfr_rw3_k2;

401

float sy_lfr_rw3_k2;

398

float sy_lfr_rw3_k3;

402

float sy_lfr_rw3_k3;

399

float sy_lfr_rw3_k4;

403

float sy_lfr_rw3_k4;

400

// rw4_k

404

// rw4_k

401

float sy_lfr_rw4_k1;

405

float sy_lfr_rw4_k1;

402

float sy_lfr_rw4_k2;

406

float sy_lfr_rw4_k2;

403

float sy_lfr_rw4_k3;

407

float sy_lfr_rw4_k3;

404

float sy_lfr_rw4_k4;

408

float sy_lfr_rw4_k4;

405

} filterPar_t;

409

} filterPar_t;

406

410

407

typedef struct{

411

typedef struct{

408

// rw1_f

412

// rw1_f

409

float cp_rpw_sc_rw1_f1;

413

float cp_rpw_sc_rw1_f1;

410

float cp_rpw_sc_rw1_f2;

414

float cp_rpw_sc_rw1_f2;

411

float cp_rpw_sc_rw1_f3;

415

float cp_rpw_sc_rw1_f3;

412

float cp_rpw_sc_rw1_f4;

416

float cp_rpw_sc_rw1_f4;

413

// rw2_f

417

// rw2_f

414

float cp_rpw_sc_rw2_f1;

418

float cp_rpw_sc_rw2_f1;

415

float cp_rpw_sc_rw2_f2;

419

float cp_rpw_sc_rw2_f2;

416

float cp_rpw_sc_rw2_f3;

420

float cp_rpw_sc_rw2_f3;

417

float cp_rpw_sc_rw2_f4;

421

float cp_rpw_sc_rw2_f4;

418

// rw3_f

422

// rw3_f

419

float cp_rpw_sc_rw3_f1;

423

float cp_rpw_sc_rw3_f1;

420

float cp_rpw_sc_rw3_f2;

424

float cp_rpw_sc_rw3_f2;

421

float cp_rpw_sc_rw3_f3;

425

float cp_rpw_sc_rw3_f3;

422

float cp_rpw_sc_rw3_f4;

426

float cp_rpw_sc_rw3_f4;

423

// rw4_f

427

// rw4_f

424

float cp_rpw_sc_rw4_f1;

428

float cp_rpw_sc_rw4_f1;

425

float cp_rpw_sc_rw4_f2;

429

float cp_rpw_sc_rw4_f2;

426

float cp_rpw_sc_rw4_f3;

430

float cp_rpw_sc_rw4_f3;

427

float cp_rpw_sc_rw4_f4;

431

float cp_rpw_sc_rw4_f4;

428

} rw_f_t;

432

} rw_f_t;

429

433

430

#define MATRIX_IS_POLLUTED 0

434

#define MATRIX_IS_POLLUTED 0

431

#define MATRIX_IS_NOT_POLLUTED 1

435

#define MATRIX_IS_NOT_POLLUTED 1

432

#define ACQUISITION_DURATION_F0 683 // 256 / 24576 * 65536

436

#define ACQUISITION_DURATION_F0 683 // 256 / 24576 * 65536

433

#define ACQUISITION_DURATION_F1 4096 // 256 / 4096 * 65536

437

#define ACQUISITION_DURATION_F1 4096 // 256 / 4096 * 65536

434

#define ACQUISITION_DURATION_F2 65536 // 256 / 256 * 65536

438

#define ACQUISITION_DURATION_F2 65536 // 256 / 256 * 65536

435

#define HALF_ACQUISITION_DURATION_F0 341 // 256 / 24576 * 65536 / 2

439

#define HALF_ACQUISITION_DURATION_F0 341 // 256 / 24576 * 65536 / 2

436

#define HALF_ACQUISITION_DURATION_F1 2048 // 256 / 4096 * 65536 / 2

440

#define HALF_ACQUISITION_DURATION_F1 2048 // 256 / 4096 * 65536 / 2

437

#define HALF_ACQUISITION_DURATION_F2 32768 // 256 / 256 * 65536 / 2

441

#define HALF_ACQUISITION_DURATION_F2 32768 // 256 / 256 * 65536 / 2

438

442

439

#endif // FSW_PARAMS_H_INCLUDED

443

#endif // FSW_PARAMS_H_INCLUDED

	Site-wide shortcuts
/	Use quick search box
g h	Goto home page
g g	Goto my private gists page
g G	Goto my public gists page
g 0-9	Goto bookmarked items from 0-9
n r	New repository page
n g	New gist page

	Repositories
g s	Goto summary page
g c	Goto changelog page
g f	Goto files page
g F	Goto files page with file search activated
g p	Goto pull requests page
g o	Goto repository settings
g O	Goto repository access permissions settings
t s	Toggle sidebar on some pages

             #ifndef FSW_PARAMS_H_INCLUDED
             #define FSW_PARAMS_H_INCLUDED
             #include "fsw_params_processing.h"
             #include "fsw_params_nb_bytes.h"
             #include "tm_byte_positions.h"
             #include "ccsds_types.h"
             #include "stdint.h"
             #define GRSPW_DEVICE_NAME "/dev/grspw0"
             #define UART_DEVICE_NAME "/dev/console"
             //*******
             // MACROS
             #ifdef PRINT_MESSAGES_ON_CONSOLE
             #define PRINTF(x) printf(x);
             #define PRINTF1(x,y) printf(x,y);
             #define PRINTF2(x,y,z) printf(x,y,z);
             #else
             #define PRINTF(x) ;
             #define PRINTF1(x,y) ;
             #define PRINTF2(x,y,z) ;
             #endif
             #ifdef BOOT_MESSAGES
             #define BOOT_PRINTF(x) printf(x);
             #define BOOT_PRINTF1(x,y) printf(x,y);
             #define BOOT_PRINTF2(x,y,z) printf(x,y,z);
             #else
             #define BOOT_PRINTF(x) ;
             #define BOOT_PRINTF1(x,y) ;
             #define BOOT_PRINTF2(x,y,z) ;
             #endif
             #ifdef DEBUG_MESSAGES
             #define DEBUG_PRINTF(x) printf(x);
             #define DEBUG_PRINTF1(x,y) printf(x,y);
             #define DEBUG_PRINTF2(x,y,z) printf(x,y,z);
             #else
             #define DEBUG_PRINTF(x) ;
             #define DEBUG_PRINTF1(x,y) ;
             #define DEBUG_PRINTF2(x,y,z) ;
             #endif
             #define CONST_65536 65536   // 2^16
             #define CONST_2048  2048    // 2^11
             #define CONST_512   512     // 2^9
             #define CONST_256   256     // 2^8
             #define CONST_128   128     // 2^7
             #define UINT8_MAX   255
             #define FLOAT_MSBYTE    0
             #define FLOAT_LSBYTE    3
             #define BITS_PER_BYTE   8
             #define INIT_FLOAT      0.
             #define INIT_CHAR       0x00
             #define INIT_INT        0
             #define INT8_ALL_F      0xff
             #define INT16_ALL_F     0xffff
             #define INT32_ALL_F     0xffffffff
             #define INT32_ALL_0     0x00000000
             #define SHIFT_1_BYTE    8
             #define SHIFT_2_BYTES   16
             #define SHIFT_3_BYTES   24
             #define SHIFT_4_BYTES   32
             #define SHIFT_5_BYTES   40
             #define SHIFT_2_BITS    2
             #define SHIFT_3_BITS    3
             #define SHIFT_4_BITS    4
             #define SHIFT_5_BITS    5
             #define SHIFT_6_BITS    6
             #define SHIFT_7_BITS    7
             #define BYTE_0  0
             #define BYTE_1  1
             #define BYTE_2  2
             #define BYTE_3  3
             #define BYTE_4  4
             #define BYTE_5  5
             #define BYTE_6  6
             #define BYTE_7  7
             #define BYTE0_MASK  0xff00
             #define BYTE1_MASK  0x00ff
             enum lfr_transition_type_t{
                 TRANSITION_NOT_SPECIFIC,
                 TRANSITION_NORM_TO_S1,
                 TRANSITION_NORM_TO_S2,
                 TRANSITION_S1_TO_NORM,
                 TRANSITION_S2_TO_NORM,
                 TRANSITION_S1_TO_S2,
                 TRANSITION_S2_TO_S1
             };
             typedef struct ring_node
             {
                 struct ring_node *previous;
                 struct ring_node *next;
                 unsigned int sid;
                 unsigned int coarseTime;
                 unsigned int fineTime;
                 int buffer_address;
                 unsigned int status;
             } ring_node;
             //************************
             // flight software version
             // this parameters is handled by the Qt project options
             #define NB_PACKETS_PER_GROUP_OF_CWF         8   // 8 packets containing 336 blk
             #define NB_PACKETS_PER_GROUP_OF_CWF_LIGHT   4   // 4 packets containing 672 blk
             #define NB_SAMPLES_PER_SNAPSHOT 2688    // 336 * 8 = 672 * 4 = 2688
             #define TIME_OFFSET 2
             #define TIME_OFFSET_IN_BYTES 8
             //#define WAVEFORM_EXTENDED_HEADER_OFFSET 22
             #define NB_BYTES_SWF_BLK (2 * 6)
             #define NB_WORDS_SWF_BLK 3
             #define NB_BYTES_CWF3_LIGHT_BLK 6
             //#define WFRM_INDEX_OF_LAST_PACKET 6  // waveforms are transmitted in groups of 2048 blocks, 6 packets of 340 and 1 of 8
             #define NB_RING_NODES_F0 3      // AT LEAST 3
             #define NB_RING_NODES_F1 5      // AT LEAST 3
             #define NB_RING_NODES_F2 5      // AT LEAST 3
             #define NB_RING_NODES_F3 3      // AT LEAST 3
             //**********
             // LFR MODES
             #define LFR_MODE_STANDBY    0
             #define LFR_MODE_NORMAL     1
             #define LFR_MODE_BURST      2
             #define LFR_MODE_SBM1       3
             #define LFR_MODE_SBM2       4
             #define TDS_MODE_LFM        5
             #define TDS_MODE_STANDBY    0
             #define TDS_MODE_NORMAL     1
             #define TDS_MODE_BURST      2
             #define TDS_MODE_SBM1       3
             #define TDS_MODE_SBM2       4
             #define THR_MODE_STANDBY    0
             #define THR_MODE_NORMAL     1
             #define THR_MODE_BURST      2
             #define RTEMS_EVENT_MODE_STANDBY    RTEMS_EVENT_0
             #define RTEMS_EVENT_MODE_NORMAL     RTEMS_EVENT_1
             #define RTEMS_EVENT_MODE_BURST      RTEMS_EVENT_2
             #define RTEMS_EVENT_MODE_SBM1       RTEMS_EVENT_3
             #define RTEMS_EVENT_MODE_SBM2       RTEMS_EVENT_4
             #define RTEMS_EVENT_MODE_NORM_S1_S2 RTEMS_EVENT_5
             #define RTEMS_EVENT_NORM_BP1_F0     RTEMS_EVENT_6
             #define RTEMS_EVENT_NORM_BP2_F0     RTEMS_EVENT_7
             #define RTEMS_EVENT_NORM_ASM_F0     RTEMS_EVENT_8   // ASM only in NORM mode
             #define RTEMS_EVENT_NORM_BP1_F1     RTEMS_EVENT_9
             #define RTEMS_EVENT_NORM_BP2_F1     RTEMS_EVENT_10
             #define RTEMS_EVENT_NORM_ASM_F1     RTEMS_EVENT_11  // ASM only in NORM mode
             #define RTEMS_EVENT_NORM_BP1_F2     RTEMS_EVENT_12
             #define RTEMS_EVENT_NORM_BP2_F2     RTEMS_EVENT_13
             #define RTEMS_EVENT_NORM_ASM_F2     RTEMS_EVENT_14  // ASM only in NORM mode
             #define RTEMS_EVENT_SBM_BP1_F0      RTEMS_EVENT_15
             #define RTEMS_EVENT_SBM_BP2_F0      RTEMS_EVENT_16
             #define RTEMS_EVENT_SBM_BP1_F1      RTEMS_EVENT_17
             #define RTEMS_EVENT_SBM_BP2_F1      RTEMS_EVENT_18
             #define RTEMS_EVENT_BURST_BP1_F0    RTEMS_EVENT_19
             #define RTEMS_EVENT_BURST_BP2_F0    RTEMS_EVENT_20
             #define RTEMS_EVENT_BURST_BP1_F1    RTEMS_EVENT_21
             #define RTEMS_EVENT_BURST_BP2_F1    RTEMS_EVENT_22
             #define RTEMS_EVENT_SWF_RESYNCH     RTEMS_EVENT_23
+            #define RTEMS_EVENT_CAL_SWEEP_WAKE  RTEMS_EVENT_24
             //********************************************
             //********************************************
             // LFR PARAMETERS: DEFAULT, MIN AND MAX VALUES
             #define DEFAULT_LAST_VALID_TRANSITION_DATE 0xffffffff
             // COMMON
             #define DEFAULT_SY_LFR_COMMON0 0x00
             #define DEFAULT_SY_LFR_COMMON1 0x20 // default value bw sp0 sp1 r0 r1 r2 = 1 0 0 0 0 0
             // NORM
             #define DFLT_SY_LFR_N_SWF_L 2048 // nb sample
             #define DFLT_SY_LFR_N_SWF_P 300  // sec
             #define MIN_SY_LFR_N_SWF_P  22  // sec
             #define DFLT_SY_LFR_N_ASM_P 3600 // sec
             #define DFLT_SY_LFR_N_BP_P0 4    // sec
             #define DFLT_SY_LFR_N_BP_P1 20   // sec
             #define DFLT_SY_LFR_N_CWF_LONG_F3 0      // 0 => production of light continuous waveforms at f3
             #define MIN_DELTA_SNAPSHOT 16       // sec
             // BURST
             #define DEFAULT_SY_LFR_B_BP_P0 1    // sec
             #define DEFAULT_SY_LFR_B_BP_P1 5    // sec
             // SBM1
             #define S1_BP_P0_SCALE          0.25
             #define DEFAULT_SY_LFR_S1_BP_P0 1   // 0.25 sec
             #define DEFAULT_SY_LFR_S1_BP_P1 1   // sec
             // SBM2
             #define DEFAULT_SY_LFR_S2_BP_P0 1   // sec
             #define DEFAULT_SY_LFR_S2_BP_P1 5   // sec
             // ADDITIONAL PARAMETERS
             #define TIME_BETWEEN_TWO_SWF_PACKETS 30     // nb x 10 ms => 300 ms
             #define TIME_BETWEEN_TWO_CWF3_PACKETS 1000  // nb x 10 ms => 10 s
             // STATUS WORD
             #define DEFAULT_STATUS_WORD_BYTE0 0x0d  // [0000] [1] [101] mode 4 bits / SPW enabled 1 bit / state is run 3 bits
             #define DEFAULT_STATUS_WORD_BYTE1 0x00
             // TC_LFR_LOAD_FILTER_PAR
             #define MIN_PAS_FILTER_MODULUS  4
             #define MAX_PAS_FILTER_MODULUS  8
             #define MIN_PAS_FILTER_TBAD     0.0
             #define MAX_PAS_FILTER_TBAD     4.0
             #define MIN_PAS_FILTER_OFFSET   0
             #define MAX_PAS_FILTER_OFFSET   7
             #define MIN_PAS_FILTER_SHIFT    0.0
             #define MAX_PAS_FILTER_SHIFT    1.0
             #define MIN_SY_LFR_SC_RW_DELTA_F    0
             #define MIN_SY_LFR_RW_K             0
             #define MIN_SY_LFR_RW_F             0
             //
             #define SY_LFR_DPU_CONNECT_TIMEOUT 100  // 100 * 10 ms = 1 s
             #define SY_LFR_DPU_CONNECT_ATTEMPT 3
             //****************************
             //*****************************
             // APB REGISTERS BASE ADDRESSES
             #define REGS_ADDR_APBUART           0x80000100
             #define REGS_ADDR_GPTIMER           0x80000300
             #define REGS_ADDR_GRSPW             0x80000500
             #define APB_OFFSET_GRSPW_STATUS_REGISTER    0x04
             #define APB_OFFSET_GRSPW_TIME_REGISTER      0x14
             #define REGS_ADDR_TIME_MANAGEMENT   0x80000600
             #define REGS_ADDR_GRGPIO            0x80000b00
             #define REGS_ADDR_SPECTRAL_MATRIX   0x80000f00
             #define REGS_ADDR_WAVEFORM_PICKER   0x80000f54  // PDB >= 0.1.28
             #define APB_OFFSET_VHDL_REV         0xb0
             #define REGS_ADDR_VHDL_VERSION      0x80000ff0
             #define APBUART_CTRL_REG_MASK_DB    0xfffff7ff
             #define APBUART_CTRL_REG_MASK_TE    0x00000002
             // scaler value = system_clock_frequency / ( baud_rate * 8 ) - 1
             #define APBUART_SCALER_RELOAD_VALUE 0x00000050      // 25 MHz => about 38400
             //**********
             // IRQ LINES
             #define IRQ_GPTIMER_WATCHDOG 9
             #define IRQ_SPARC_GPTIMER_WATCHDOG 0x19     // see sparcv8.pdf p.76 for interrupt levels
             #define IRQ_WAVEFORM_PICKER 14
             #define IRQ_SPARC_WAVEFORM_PICKER 0x1e  // see sparcv8.pdf p.76 for interrupt levels
             #define IRQ_SPECTRAL_MATRIX 6
             #define IRQ_SPARC_SPECTRAL_MATRIX 0x16  // see sparcv8.pdf p.76 for interrupt levels
             //*****
             // TIME
             #define CLKDIV_WATCHDOG     (10000000 - 1)       // 10.0s => 10 000 000
             #define TIMER_WATCHDOG      1
             #define WATCHDOG_PERIOD     100                 // 1s
             #define HK_PERIOD                           100     // 100 * 10ms => 1s
             #define AVGV_PERIOD                         6       //   6 * 10ms => 60ms (1 / 16 = 62.5ms)
             #define SY_LFR_TIME_SYN_TIMEOUT_in_ticks    200     // 200 * 10 ms = 2 s
             #define HK_SYNC_WAIT                        10      //  10 * 10 ms = 100 ms
             #define SPW_LINK_WAIT                       10      //  10 * 10 ms = 100 ms
             #define TIMECODE_TIMER_TIMEOUT              120     // 120 * 10 ms = 1.2 s
             #define TIMECODE_TIMER_TIMEOUT_INIT         200     // 200 * 10 ms = 2.0 s
             #define TIMECODE_MASK                       0x3f    // 0011 1111
             //**********
             // LPP CODES
             #define LFR_SUCCESSFUL  0
             #define LFR_DEFAULT     1
             #define LFR_EXE_ERROR   2
             #define LFR_DEFAULT_ALT -1
             //******
             // RTEMS
             #define STACK_SIZE_MULT 2
             #define TASKID_AVGV 0
             #define TASKID_RECV 1
             #define TASKID_ACTN 2
             #define TASKID_SPIQ 3
             #define TASKID_LOAD 4
             #define TASKID_AVF0 5
             #define TASKID_SWBD 6
             #define TASKID_WFRM 7
             #define TASKID_DUMB 8
             #define TASKID_HOUS 9
             #define TASKID_PRC0 10
             #define TASKID_CWF3 11
             #define TASKID_CWF2 12
             #define TASKID_CWF1 13
             #define TASKID_SEND 14
             #define TASKID_LINK 15
             #define TASKID_AVF1 16
             #define TASKID_PRC1 17
             #define TASKID_AVF2 18
             #define TASKID_PRC2 19
             #define TASKID_SCRB 20
+            #define TASKID_CALI 21
             #define TASK_PRIORITY_SPIQ 5
             #define TASK_PRIORITY_LINK 20
             #define TASK_PRIORITY_AVGV 25
             #define TASK_PRIORITY_HOUS 30
             #define TASK_PRIORITY_CWF1 35   // CWF1 and CWF2 are never running together
             #define TASK_PRIORITY_CWF2 35   //
             #define TASK_PRIORITY_SWBD 37   // SWBD has a lower priority than WFRM, this is to extract the snapshot before sending it
             #define TASK_PRIORITY_WFRM 40
             #define TASK_PRIORITY_CWF3 40   // there is a printf in this function, be careful with its priority wrt CWF1
             #define TASK_PRIORITY_SEND 45
             #define TASK_PRIORITY_RECV 50
+            #define TASK_PRIORITY_CALI 50
             #define TASK_PRIORITY_ACTN 50
             #define TASK_PRIORITY_AVF0 60
             #define TASK_PRIORITY_AVF1 70
             #define TASK_PRIORITY_PRC0 100
             #define TASK_PRIORITY_PRC1 100
             #define TASK_PRIORITY_AVF2 110
             #define TASK_PRIORITY_PRC2 110
             #define TASK_PRIORITY_LOAD 190
             #define TASK_PRIORITY_DUMB 200
             #define TASK_PRIORITY_SCRB 210
             #define MSG_QUEUE_COUNT_RECV  10
             #define MSG_QUEUE_COUNT_SEND  50
             #define MSG_QUEUE_COUNT_PRC0  10
             #define MSG_QUEUE_COUNT_PRC1  10
             #define MSG_QUEUE_COUNT_PRC2  5
             #define MSG_QUEUE_SIZE_SEND             812 // 808 + 4 => TM_LFR_SCIENCE_BURST_BP2_F1
             #define ACTION_MSG_SPW_IOCTL_SEND_SIZE  24  // hlen *hdr dlen *data sent options
             #define MSG_QUEUE_SIZE_PRC0             36  // two pointers, one rtems_event + 6 integers
             #define MSG_QUEUE_SIZE_PRC1             36  // two pointers, one rtems_event + 6 integers
             #define MSG_QUEUE_SIZE_PRC2             36  // two pointers, one rtems_event + 6 integers
             #define QUEUE_RECV 0
             #define QUEUE_SEND 1
             #define QUEUE_PRC0 2
             #define QUEUE_PRC1 3
             #define QUEUE_PRC2 4
+            #define QUEUE_CALI 5
             #define CPU_USAGE_REPORT_PERIOD 6   // * 10 s = period
             struct param_local_str{
                 unsigned int local_sbm1_nb_cwf_sent;
                 unsigned int local_sbm1_nb_cwf_max;
                 unsigned int local_sbm2_nb_cwf_sent;
                 unsigned int local_sbm2_nb_cwf_max;
             };
             //************
             // FBINS MASKS
             #define BYTES_PER_FBINS_MASK 16
             typedef struct {
                 unsigned char merged_fbins_mask_f0[BYTES_PER_FBINS_MASK];
                 unsigned char merged_fbins_mask_f1[BYTES_PER_FBINS_MASK];
                 unsigned char merged_fbins_mask_f2[BYTES_PER_FBINS_MASK];
             } fbins_masks_t;
             #define DEFAULT_SY_LFR_PAS_FILTER_ENABLED   0
             #define DEFAULT_SY_LFR_PAS_FILTER_MODULUS   4
             #define DEFAULT_SY_LFR_PAS_FILTER_TBAD      1.0f
             #define DEFAULT_SY_LFR_PAS_FILTER_OFFSET    0
             #define DEFAULT_SY_LFR_PAS_FILTER_SHIFT     0.5f
             #define DEFAULT_MODULUS   262144    // 65536 * 4
             #define DEFAULT_TBAD      65536     // 65536
             #define DEFAULT_OFFSET    0         // 65536 * 0
             #define DEFAULT_SHIFT     32768     // 65536 / 2
             #define DEFAULT_SY_LFR_SC_RW_DELTA_F        0.045f
             #define DEFAULT_SY_LFR_RW_K1                1.f
             #define DEFAULT_SY_LFR_RW_K2                8.f
             #define DEFAULT_SY_LFR_RW_K3                24.f
             #define DEFAULT_SY_LFR_RW_K4                48.f
             typedef struct{
                 unsigned char spare_sy_lfr_pas_filter_enabled;
                 float sy_lfr_pas_filter_tbad;
                 float sy_lfr_pas_filter_shift;
                 uint64_t modulus_in_finetime;
                 uint64_t tbad_in_finetime;
                 uint64_t offset_in_finetime;
                 uint64_t shift_in_finetime;
                 float sy_lfr_sc_rw_delta_f;
                 // rw1_k
                 float sy_lfr_rw1_k1;
                 float sy_lfr_rw1_k2;
                 float sy_lfr_rw1_k3;
                 float sy_lfr_rw1_k4;
                 // rw2_k
                 float sy_lfr_rw2_k1;
                 float sy_lfr_rw2_k2;
                 float sy_lfr_rw2_k3;
                 float sy_lfr_rw2_k4;
                 // rw3_k
                 float sy_lfr_rw3_k1;
                 float sy_lfr_rw3_k2;
                 float sy_lfr_rw3_k3;
                 float sy_lfr_rw3_k4;
                 // rw4_k
                 float sy_lfr_rw4_k1;
                 float sy_lfr_rw4_k2;
                 float sy_lfr_rw4_k3;
                 float sy_lfr_rw4_k4;
             } filterPar_t;
             typedef struct{
                 // rw1_f
                 float cp_rpw_sc_rw1_f1;
                 float cp_rpw_sc_rw1_f2;
                 float cp_rpw_sc_rw1_f3;
                 float cp_rpw_sc_rw1_f4;
                 // rw2_f
                 float cp_rpw_sc_rw2_f1;
                 float cp_rpw_sc_rw2_f2;
                 float cp_rpw_sc_rw2_f3;
                 float cp_rpw_sc_rw2_f4;
                 // rw3_f
                 float cp_rpw_sc_rw3_f1;
                 float cp_rpw_sc_rw3_f2;
                 float cp_rpw_sc_rw3_f3;
                 float cp_rpw_sc_rw3_f4;
                 // rw4_f
                 float cp_rpw_sc_rw4_f1;
                 float cp_rpw_sc_rw4_f2;
                 float cp_rpw_sc_rw4_f3;
                 float cp_rpw_sc_rw4_f4;
             } rw_f_t;
             #define MATRIX_IS_POLLUTED      0
             #define MATRIX_IS_NOT_POLLUTED  1
             #define ACQUISITION_DURATION_F0 683     // 256 / 24576 * 65536
             #define ACQUISITION_DURATION_F1 4096    // 256 /  4096 * 65536
             #define ACQUISITION_DURATION_F2 65536   // 256 /   256 * 65536
             #define HALF_ACQUISITION_DURATION_F0 341     // 256 / 24576 * 65536 / 2
             #define HALF_ACQUISITION_DURATION_F1 2048    // 256 /  4096 * 65536 / 2
             #define HALF_ACQUISITION_DURATION_F2 32768   // 256 /   256 * 65536 / 2
             #endif // FSW_PARAMS_H_INCLUDED