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1 header/lfr_common_headers = https://hephaistos.lpp.polytechnique.fr/rhodecode/HG_REPOSITORIES/LPP/INSTRUMENTATION/SOLO_LFR/lfr_common_headers
1 header/lfr_common_headers = https://hephaistos.lpp.polytechnique.fr/rhodecode/HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/JEANDET/lfr_common_headers
2
2
3 LFR_basic-parameters = https://hephaistos.lpp.polytechnique.fr/rhodecode/HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/CHUST/LFR_basic-parameters
3 LFR_basic-parameters = https://hephaistos.lpp.polytechnique.fr/rhodecode/HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/CHUST/LFR_basic-parameters
4
4
@@ -1,2 +1,2
1 3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters
1 3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters
2 e904b329ff977514bf36af92617afefd22fd06ab header/lfr_common_headers
2 db74b38fe91cd826fa49fa4eb6f93d626637ceb9 header/lfr_common_headers
@@ -1,169 +1,170
1 #ifndef FSW_MISC_H_INCLUDED
1 #ifndef FSW_MISC_H_INCLUDED
2 #define FSW_MISC_H_INCLUDED
2 #define FSW_MISC_H_INCLUDED
3
3
4 #include <rtems.h>
4 #include <rtems.h>
5 #include <stdio.h>
5 #include <stdio.h>
6 #include <grspw.h>
6 #include <grspw.h>
7 #include <grlib_regs.h>
7 #include <grlib_regs.h>
8
8
9 #include "fsw_params.h"
9 #include "fsw_params.h"
10 #include "fsw_spacewire.h"
10 #include "fsw_spacewire.h"
11 #include "lfr_cpu_usage_report.h"
11 #include "lfr_cpu_usage_report.h"
12
12
13 #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0
13 #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0
14 #define WATCHDOG_LOOP_PRINTF 10
14 #define WATCHDOG_LOOP_PRINTF 10
15 #define WATCHDOG_LOOP_DEBUG 3
15 #define WATCHDOG_LOOP_DEBUG 3
16
16
17 #define DUMB_MESSAGE_NB 15
17 #define DUMB_MESSAGE_NB 15
18 #define NB_RTEMS_EVENTS 32
18 #define NB_RTEMS_EVENTS 32
19 #define EVENT_12 12
19 #define EVENT_12 12
20 #define EVENT_13 13
20 #define EVENT_13 13
21 #define EVENT_14 14
21 #define EVENT_14 14
22 #define DUMB_MESSAGE_0 "in DUMB *** default"
22 #define DUMB_MESSAGE_0 "in DUMB *** default"
23 #define DUMB_MESSAGE_1 "in DUMB *** timecode_irq_handler"
23 #define DUMB_MESSAGE_1 "in DUMB *** timecode_irq_handler"
24 #define DUMB_MESSAGE_2 "in DUMB *** f3 buffer changed"
24 #define DUMB_MESSAGE_2 "in DUMB *** f3 buffer changed"
25 #define DUMB_MESSAGE_3 "in DUMB *** in SMIQ *** Error sending event to AVF0"
25 #define DUMB_MESSAGE_3 "in DUMB *** in SMIQ *** Error sending event to AVF0"
26 #define DUMB_MESSAGE_4 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ"
26 #define DUMB_MESSAGE_4 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ"
27 #define DUMB_MESSAGE_5 "in DUMB *** waveforms_simulator_isr"
27 #define DUMB_MESSAGE_5 "in DUMB *** waveforms_simulator_isr"
28 #define DUMB_MESSAGE_6 "VHDL SM *** two buffers f0 ready"
28 #define DUMB_MESSAGE_6 "VHDL SM *** two buffers f0 ready"
29 #define DUMB_MESSAGE_7 "ready for dump"
29 #define DUMB_MESSAGE_7 "ready for dump"
30 #define DUMB_MESSAGE_8 "VHDL ERR *** spectral matrix"
30 #define DUMB_MESSAGE_8 "VHDL ERR *** spectral matrix"
31 #define DUMB_MESSAGE_9 "tick"
31 #define DUMB_MESSAGE_9 "tick"
32 #define DUMB_MESSAGE_10 "VHDL ERR *** waveform picker"
32 #define DUMB_MESSAGE_10 "VHDL ERR *** waveform picker"
33 #define DUMB_MESSAGE_11 "VHDL ERR *** unexpected ready matrix values"
33 #define DUMB_MESSAGE_11 "VHDL ERR *** unexpected ready matrix values"
34 #define DUMB_MESSAGE_12 "WATCHDOG timer"
34 #define DUMB_MESSAGE_12 "WATCHDOG timer"
35 #define DUMB_MESSAGE_13 "TIMECODE timer"
35 #define DUMB_MESSAGE_13 "TIMECODE timer"
36 #define DUMB_MESSAGE_14 "TIMECODE ISR"
36 #define DUMB_MESSAGE_14 "TIMECODE ISR"
37
37
38 enum lfr_reset_cause_t{
38 enum lfr_reset_cause_t{
39 UNKNOWN_CAUSE,
39 UNKNOWN_CAUSE,
40 POWER_ON,
40 POWER_ON,
41 TC_RESET,
41 TC_RESET,
42 WATCHDOG,
42 WATCHDOG,
43 ERROR_RESET,
43 ERROR_RESET,
44 UNEXP_RESET
44 UNEXP_RESET
45 };
45 };
46
46
47 typedef struct{
47 typedef struct{
48 unsigned char dpu_spw_parity;
48 unsigned char dpu_spw_parity;
49 unsigned char dpu_spw_disconnect;
49 unsigned char dpu_spw_disconnect;
50 unsigned char dpu_spw_escape;
50 unsigned char dpu_spw_escape;
51 unsigned char dpu_spw_credit;
51 unsigned char dpu_spw_credit;
52 unsigned char dpu_spw_write_sync;
52 unsigned char dpu_spw_write_sync;
53 unsigned char timecode_erroneous;
53 unsigned char timecode_erroneous;
54 unsigned char timecode_missing;
54 unsigned char timecode_missing;
55 unsigned char timecode_invalid;
55 unsigned char timecode_invalid;
56 unsigned char time_timecode_it;
56 unsigned char time_timecode_it;
57 unsigned char time_not_synchro;
57 unsigned char time_not_synchro;
58 unsigned char time_timecode_ctr;
58 unsigned char time_timecode_ctr;
59 unsigned char ahb_correctable;
59 unsigned char ahb_correctable;
60 } hk_lfr_le_t;
60 } hk_lfr_le_t;
61
61
62 typedef struct{
62 typedef struct{
63 unsigned char dpu_spw_early_eop;
63 unsigned char dpu_spw_early_eop;
64 unsigned char dpu_spw_invalid_addr;
64 unsigned char dpu_spw_invalid_addr;
65 unsigned char dpu_spw_eep;
65 unsigned char dpu_spw_eep;
66 unsigned char dpu_spw_rx_too_big;
66 unsigned char dpu_spw_rx_too_big;
67 } hk_lfr_me_t;
67 } hk_lfr_me_t;
68
68
69 #define B00 196
69 #define B00 196
70 #define B01 196
70 #define B01 196
71 #define B02 0
71 #define B02 0
72 #define B10 131
72 #define B10 131
73 #define B11 -244
73 #define B11 -244
74 #define B12 131
74 #define B12 131
75 #define B20 161
75 #define B20 161
76 #define B21 -314
76 #define B21 -314
77 #define B22 161
77 #define B22 161
78
78
79 #define A00 1
79 #define A00 1
80 #define A01 -925
80 #define A01 -925
81 #define A02 0
81 #define A02 0
82 #define A10 1
82 #define A10 1
83 #define A11 -947
83 #define A11 -947
84 #define A12 439
84 #define A12 439
85 #define A20 1
85 #define A20 1
86 #define A21 -993
86 #define A21 -993
87 #define A22 486
87 #define A22 486
88
88
89 #define GAIN_B0 12
89 #define GAIN_B0 12
90 #define GAIN_B1 11
90 #define GAIN_B1 11
91 #define GAIN_B2 10
91 #define GAIN_B2 10
92
92
93 #define GAIN_A0 10
93 #define GAIN_A0 10
94 #define GAIN_A1 9
94 #define GAIN_A1 9
95 #define GAIN_A2 9
95 #define GAIN_A2 9
96
96
97 #define NB_COEFFS 3
97 #define NB_COEFFS 3
98 #define COEFF0 0
98 #define COEFF0 0
99 #define COEFF1 1
99 #define COEFF1 1
100 #define COEFF2 2
100 #define COEFF2 2
101
101
102 typedef struct filter_ctx
102 typedef struct filter_ctx
103 {
103 {
104 int W[NB_COEFFS][NB_COEFFS];
104 int W[NB_COEFFS][NB_COEFFS];
105 }filter_ctx;
105 }filter_ctx;
106
106
107 extern gptimer_regs_t *gptimer_regs;
107 extern gptimer_regs_t *gptimer_regs;
108 extern void ASR16_get_FPRF_IURF_ErrorCounters( unsigned int*, unsigned int* );
108 extern void ASR16_get_FPRF_IURF_ErrorCounters( unsigned int*, unsigned int* );
109 extern void CCR_getInstructionAndDataErrorCounters( unsigned int*, unsigned int* );
109 extern void CCR_getInstructionAndDataErrorCounters( unsigned int*, unsigned int* );
110
110
111 extern rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic
111 extern rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic
112 extern rtems_id HK_id;// id of the HK rate monotonic period
112 extern rtems_id HK_id;// id of the HK rate monotonic period
113 extern rtems_name name_avgv_rate_monotonic; // name of the AVGV rate monotonic
113 extern rtems_name name_avgv_rate_monotonic; // name of the AVGV rate monotonic
114 extern rtems_id AVGV_id;// id of the AVGV rate monotonic period
114 extern rtems_id AVGV_id;// id of the AVGV rate monotonic period
115
115
116 void timer_configure( unsigned char timer, unsigned int clock_divider,
116 void timer_configure( unsigned char timer, unsigned int clock_divider,
117 unsigned char interrupt_level, rtems_isr (*timer_isr)() );
117 unsigned char interrupt_level, rtems_isr (*timer_isr)() );
118 void timer_start( unsigned char timer );
118 void timer_start( unsigned char timer );
119 void timer_stop( unsigned char timer );
119 void timer_stop( unsigned char timer );
120 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider);
120 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider);
121
121
122 // WATCHDOG
122 // WATCHDOG
123 rtems_isr watchdog_isr( rtems_vector_number vector );
123 rtems_isr watchdog_isr( rtems_vector_number vector );
124 void watchdog_configure(void);
124 void watchdog_configure(void);
125 void watchdog_stop(void);
125 void watchdog_stop(void);
126 void watchdog_reload(void);
126 void watchdog_reload(void);
127 void watchdog_start(void);
127 void watchdog_start(void);
128
128
129 // SERIAL LINK
129 // SERIAL LINK
130 int send_console_outputs_on_apbuart_port( void );
130 int send_console_outputs_on_apbuart_port( void );
131 int enable_apbuart_transmitter( void );
131 int enable_apbuart_transmitter( void );
132 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value);
132 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value);
133
133
134 // RTEMS TASKS
134 // RTEMS TASKS
135 rtems_task load_task( rtems_task_argument argument );
135 rtems_task load_task( rtems_task_argument argument );
136 rtems_task hous_task( rtems_task_argument argument );
136 rtems_task hous_task( rtems_task_argument argument );
137 rtems_task avgv_task( rtems_task_argument argument );
137 rtems_task avgv_task( rtems_task_argument argument );
138 rtems_task dumb_task( rtems_task_argument unused );
138 rtems_task dumb_task( rtems_task_argument unused );
139 rtems_task scrubbing_task( rtems_task_argument unused );
139
140
140 void init_housekeeping_parameters( void );
141 void init_housekeeping_parameters( void );
141 void increment_seq_counter(unsigned short *packetSequenceControl);
142 void increment_seq_counter(unsigned short *packetSequenceControl);
142 void getTime( unsigned char *time);
143 void getTime( unsigned char *time);
143 unsigned long long int getTimeAsUnsignedLongLongInt( );
144 unsigned long long int getTimeAsUnsignedLongLongInt( );
144 void send_dumb_hk( void );
145 void send_dumb_hk( void );
145 void get_temperatures( unsigned char *temperatures );
146 void get_temperatures( unsigned char *temperatures );
146 void get_v_e1_e2_f3( unsigned char *spacecraft_potential );
147 void get_v_e1_e2_f3( unsigned char *spacecraft_potential );
147 void get_cpu_load( unsigned char *resource_statistics );
148 void get_cpu_load( unsigned char *resource_statistics );
148 void set_hk_lfr_sc_potential_flag( bool state );
149 void set_hk_lfr_sc_potential_flag( bool state );
149 void set_sy_lfr_pas_filter_enabled( bool state );
150 void set_sy_lfr_pas_filter_enabled( bool state );
150 void set_sy_lfr_watchdog_enabled( bool state );
151 void set_sy_lfr_watchdog_enabled( bool state );
151 void set_hk_lfr_calib_enable( bool state );
152 void set_hk_lfr_calib_enable( bool state );
152 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause );
153 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause );
153 void hk_lfr_le_me_he_update();
154 void hk_lfr_le_me_he_update();
154 void set_hk_lfr_time_not_synchro();
155 void set_hk_lfr_time_not_synchro();
155
156
156 extern int sched_yield( void );
157 extern int sched_yield( void );
157 extern void rtems_cpu_usage_reset();
158 extern void rtems_cpu_usage_reset();
158 extern ring_node *current_ring_node_f3;
159 extern ring_node *current_ring_node_f3;
159 extern ring_node *ring_node_to_send_cwf_f3;
160 extern ring_node *ring_node_to_send_cwf_f3;
160 extern ring_node waveform_ring_f3[];
161 extern ring_node waveform_ring_f3[];
161 extern unsigned short sequenceCounterHK;
162 extern unsigned short sequenceCounterHK;
162
163
163 extern unsigned char hk_lfr_q_sd_fifo_size_max;
164 extern unsigned char hk_lfr_q_sd_fifo_size_max;
164 extern unsigned char hk_lfr_q_rv_fifo_size_max;
165 extern unsigned char hk_lfr_q_rv_fifo_size_max;
165 extern unsigned char hk_lfr_q_p0_fifo_size_max;
166 extern unsigned char hk_lfr_q_p0_fifo_size_max;
166 extern unsigned char hk_lfr_q_p1_fifo_size_max;
167 extern unsigned char hk_lfr_q_p1_fifo_size_max;
167 extern unsigned char hk_lfr_q_p2_fifo_size_max;
168 extern unsigned char hk_lfr_q_p2_fifo_size_max;
168
169
169 #endif // FSW_MISC_H_INCLUDED
170 #endif // FSW_MISC_H_INCLUDED
@@ -1,974 +1,991
1 /** This is the RTEMS initialization module.
1 /** This is the RTEMS initialization module.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 * This module contains two very different information:
6 * This module contains two very different information:
7 * - specific instructions to configure the compilation of the RTEMS executive
7 * - specific instructions to configure the compilation of the RTEMS executive
8 * - functions related to the fligth softwre initialization, especially the INIT RTEMS task
8 * - functions related to the fligth softwre initialization, especially the INIT RTEMS task
9 *
9 *
10 */
10 */
11
11
12 //*************************
12 //*************************
13 // GPL reminder to be added
13 // GPL reminder to be added
14 //*************************
14 //*************************
15
15
16 #include <rtems.h>
16 #include <rtems.h>
17
17
18
18 /* configuration information */
19 /* configuration information */
19
20
20 #define CONFIGURE_INIT
21 #define CONFIGURE_INIT
21
22
22 #include <bsp.h> /* for device driver prototypes */
23 #include <bsp.h> /* for device driver prototypes */
23
24
24 /* configuration information */
25 /* configuration information */
25
26
26 #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
27 #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
27 #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
28 #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
28
29
29 #define CONFIGURE_MAXIMUM_TASKS 21 // number of tasks concurrently active including INIT
30 #define CONFIGURE_MAXIMUM_TASKS 22 // number of tasks concurrently active including INIT
30 #define CONFIGURE_RTEMS_INIT_TASKS_TABLE
31 #define CONFIGURE_RTEMS_INIT_TASKS_TABLE
31 #define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE)
32 #define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE)
32 #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32
33 #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32
33 #define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100
34 #define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100
34 #define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT)
35 #define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT)
35 #define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT)
36 #define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT)
36 #define CONFIGURE_MAXIMUM_DRIVERS 16
37 #define CONFIGURE_MAXIMUM_DRIVERS 16
37 #define CONFIGURE_MAXIMUM_PERIODS 6 // [hous] [load] [avgv]
38 #define CONFIGURE_MAXIMUM_PERIODS 6 // [hous] [load] [avgv]
38 #define CONFIGURE_MAXIMUM_TIMERS 6 // [spiq] [link] [spacewire_reset_link]
39 #define CONFIGURE_MAXIMUM_TIMERS 6 // [spiq] [link] [spacewire_reset_link]
39 #define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5
40 #define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5
40 #ifdef PRINT_STACK_REPORT
41 #ifdef PRINT_STACK_REPORT
41 #define CONFIGURE_STACK_CHECKER_ENABLED
42 #define CONFIGURE_STACK_CHECKER_ENABLED
42 #endif
43 #endif
43
44
44 #include <rtems/confdefs.h>
45 #include <rtems/confdefs.h>
45
46
46 /* If --drvmgr was enabled during the configuration of the RTEMS kernel */
47 /* If --drvmgr was enabled during the configuration of the RTEMS kernel */
47 #ifdef RTEMS_DRVMGR_STARTUP
48 #ifdef RTEMS_DRVMGR_STARTUP
48 #ifdef LEON3
49 #ifdef LEON3
49 /* Add Timer and UART Driver */
50 /* Add Timer and UART Driver */
50
51
51 #ifdef CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
52 #ifdef CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
52 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER
53 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER
53 #endif
54 #endif
54
55
55 #ifdef CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
56 #ifdef CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
56 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART
57 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART
57 #endif
58 #endif
58
59
59 #endif
60 #endif
60 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW /* GRSPW Driver */
61 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW /* GRSPW Driver */
61
62
62 #include <drvmgr/drvmgr_confdefs.h>
63 #include <drvmgr/drvmgr_confdefs.h>
63 #endif
64 #endif
64
65
65 #include "fsw_init.h"
66 #include "fsw_init.h"
66 #include "fsw_config.c"
67 #include "fsw_config.c"
67 #include "GscMemoryLPP.hpp"
68 #include "GscMemoryLPP.hpp"
68
69
69 void initCache()
70 void initCache()
70 {
71 {
71 // ASI 2 contains a few control registers that have not been assigned as ancillary state registers.
72 // ASI 2 contains a few control registers that have not been assigned as ancillary state registers.
72 // These should only be read and written using 32-bit LDA/STA instructions.
73 // These should only be read and written using 32-bit LDA/STA instructions.
73 // All cache registers are accessed through load/store operations to the alternate address space (LDA/STA), using ASI = 2.
74 // All cache registers are accessed through load/store operations to the alternate address space (LDA/STA), using ASI = 2.
74 // The table below shows the register addresses:
75 // The table below shows the register addresses:
75 // 0x00 Cache control register
76 // 0x00 Cache control register
76 // 0x04 Reserved
77 // 0x04 Reserved
77 // 0x08 Instruction cache configuration register
78 // 0x08 Instruction cache configuration register
78 // 0x0C Data cache configuration register
79 // 0x0C Data cache configuration register
79
80
80 // Cache Control Register Leon3 / Leon3FT
81 // Cache Control Register Leon3 / Leon3FT
81 // 31..30 29 28 27..24 23 22 21 20..19 18 17 16
82 // 31..30 29 28 27..24 23 22 21 20..19 18 17 16
82 // RFT PS TB DS FD FI FT ST IB
83 // RFT PS TB DS FD FI FT ST IB
83 // 15 14 13..12 11..10 9..8 7..6 5 4 3..2 1..0
84 // 15 14 13..12 11..10 9..8 7..6 5 4 3..2 1..0
84 // IP DP ITE IDE DTE DDE DF IF DCS ICS
85 // IP DP ITE IDE DTE DDE DF IF DCS ICS
85
86
86 unsigned int cacheControlRegister;
87 unsigned int cacheControlRegister;
87
88
88 CCR_resetCacheControlRegister();
89 CCR_resetCacheControlRegister();
89 ASR16_resetRegisterProtectionControlRegister();
90 ASR16_resetRegisterProtectionControlRegister();
90
91
91 cacheControlRegister = CCR_getValue();
92 cacheControlRegister = CCR_getValue();
92 PRINTF1("(0) CCR - Cache Control Register = %x\n", cacheControlRegister);
93 PRINTF1("(0) CCR - Cache Control Register = %x\n", cacheControlRegister);
93 PRINTF1("(0) ASR16 = %x\n", *asr16Ptr);
94 PRINTF1("(0) ASR16 = %x\n", *asr16Ptr);
94
95
95 CCR_enableInstructionCache(); // ICS bits
96 CCR_enableInstructionCache(); // ICS bits
96 CCR_enableDataCache(); // DCS bits
97 CCR_enableDataCache(); // DCS bits
97 CCR_enableInstructionBurstFetch(); // IB bit
98 CCR_enableInstructionBurstFetch(); // IB bit
98
99
99 faultTolerantScheme();
100 faultTolerantScheme();
100
101
101 cacheControlRegister = CCR_getValue();
102 cacheControlRegister = CCR_getValue();
102 PRINTF1("(1) CCR - Cache Control Register = %x\n", cacheControlRegister);
103 PRINTF1("(1) CCR - Cache Control Register = %x\n", cacheControlRegister);
103 PRINTF1("(1) ASR16 Register protection control register = %x\n", *asr16Ptr);
104 PRINTF1("(1) ASR16 Register protection control register = %x\n", *asr16Ptr);
104
105
105 PRINTF("\n");
106 PRINTF("\n");
106 }
107 }
107
108
108 rtems_task Init( rtems_task_argument ignored )
109 rtems_task Init( rtems_task_argument ignored )
109 {
110 {
110 /** This is the RTEMS INIT taks, it is the first task launched by the system.
111 /** This is the RTEMS INIT taks, it is the first task launched by the system.
111 *
112 *
112 * @param unused is the starting argument of the RTEMS task
113 * @param unused is the starting argument of the RTEMS task
113 *
114 *
114 * The INIT task create and run all other RTEMS tasks.
115 * The INIT task create and run all other RTEMS tasks.
115 *
116 *
116 */
117 */
117
118
118 //***********
119 //***********
119 // INIT CACHE
120 // INIT CACHE
120
121
121 unsigned char *vhdlVersion;
122 unsigned char *vhdlVersion;
122
123
123 reset_lfr();
124 reset_lfr();
124
125
125 reset_local_time();
126 reset_local_time();
126
127
127 rtems_cpu_usage_reset();
128 rtems_cpu_usage_reset();
128
129
129 rtems_status_code status;
130 rtems_status_code status;
130 rtems_status_code status_spw;
131 rtems_status_code status_spw;
131 rtems_isr_entry old_isr_handler;
132 rtems_isr_entry old_isr_handler;
132
133
133 old_isr_handler = NULL;
134 old_isr_handler = NULL;
134
135
135 // UART settings
136 // UART settings
136 enable_apbuart_transmitter();
137 enable_apbuart_transmitter();
137 set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE);
138 set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE);
138
139
139 DEBUG_PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n")
140 DEBUG_PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n")
140
141
141
142
142 PRINTF("\n\n\n\n\n")
143 PRINTF("\n\n\n\n\n")
143
144
144 initCache();
145 initCache();
145
146
146 PRINTF("*************************\n")
147 PRINTF("*************************\n")
147 PRINTF("** LFR Flight Software **\n")
148 PRINTF("** LFR Flight Software **\n")
148
149
149 PRINTF1("** %d-", SW_VERSION_N1)
150 PRINTF1("** %d-", SW_VERSION_N1)
150 PRINTF1("%d-" , SW_VERSION_N2)
151 PRINTF1("%d-" , SW_VERSION_N2)
151 PRINTF1("%d-" , SW_VERSION_N3)
152 PRINTF1("%d-" , SW_VERSION_N3)
152 PRINTF1("%d **\n", SW_VERSION_N4)
153 PRINTF1("%d **\n", SW_VERSION_N4)
153
154
154 vhdlVersion = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
155 vhdlVersion = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
155 PRINTF("** VHDL **\n")
156 PRINTF("** VHDL **\n")
156 PRINTF1("** %d-", vhdlVersion[1])
157 PRINTF1("** %d-", vhdlVersion[1])
157 PRINTF1("%d-" , vhdlVersion[2])
158 PRINTF1("%d-" , vhdlVersion[2])
158 PRINTF1("%d **\n", vhdlVersion[3])
159 PRINTF1("%d **\n", vhdlVersion[3])
159 PRINTF("*************************\n")
160 PRINTF("*************************\n")
160 PRINTF("\n\n")
161 PRINTF("\n\n")
161
162
162 init_parameter_dump();
163 init_parameter_dump();
163 init_kcoefficients_dump();
164 init_kcoefficients_dump();
164 init_local_mode_parameters();
165 init_local_mode_parameters();
165 init_housekeeping_parameters();
166 init_housekeeping_parameters();
166 init_k_coefficients_prc0();
167 init_k_coefficients_prc0();
167 init_k_coefficients_prc1();
168 init_k_coefficients_prc1();
168 init_k_coefficients_prc2();
169 init_k_coefficients_prc2();
169 pa_bia_status_info = INIT_CHAR;
170 pa_bia_status_info = INIT_CHAR;
170
171
171 // initialize all reaction wheels frequencies to NaN
172 // initialize all reaction wheels frequencies to NaN
172 rw_f.cp_rpw_sc_rw1_f1 = NAN;
173 rw_f.cp_rpw_sc_rw1_f1 = NAN;
173 rw_f.cp_rpw_sc_rw1_f2 = NAN;
174 rw_f.cp_rpw_sc_rw1_f2 = NAN;
174 rw_f.cp_rpw_sc_rw1_f3 = NAN;
175 rw_f.cp_rpw_sc_rw1_f3 = NAN;
175 rw_f.cp_rpw_sc_rw1_f4 = NAN;
176 rw_f.cp_rpw_sc_rw1_f4 = NAN;
176 rw_f.cp_rpw_sc_rw2_f1 = NAN;
177 rw_f.cp_rpw_sc_rw2_f1 = NAN;
177 rw_f.cp_rpw_sc_rw2_f2 = NAN;
178 rw_f.cp_rpw_sc_rw2_f2 = NAN;
178 rw_f.cp_rpw_sc_rw2_f3 = NAN;
179 rw_f.cp_rpw_sc_rw2_f3 = NAN;
179 rw_f.cp_rpw_sc_rw2_f4 = NAN;
180 rw_f.cp_rpw_sc_rw2_f4 = NAN;
180 rw_f.cp_rpw_sc_rw3_f1 = NAN;
181 rw_f.cp_rpw_sc_rw3_f1 = NAN;
181 rw_f.cp_rpw_sc_rw3_f2 = NAN;
182 rw_f.cp_rpw_sc_rw3_f2 = NAN;
182 rw_f.cp_rpw_sc_rw3_f3 = NAN;
183 rw_f.cp_rpw_sc_rw3_f3 = NAN;
183 rw_f.cp_rpw_sc_rw3_f4 = NAN;
184 rw_f.cp_rpw_sc_rw3_f4 = NAN;
184 rw_f.cp_rpw_sc_rw4_f1 = NAN;
185 rw_f.cp_rpw_sc_rw4_f1 = NAN;
185 rw_f.cp_rpw_sc_rw4_f2 = NAN;
186 rw_f.cp_rpw_sc_rw4_f2 = NAN;
186 rw_f.cp_rpw_sc_rw4_f3 = NAN;
187 rw_f.cp_rpw_sc_rw4_f3 = NAN;
187 rw_f.cp_rpw_sc_rw4_f4 = NAN;
188 rw_f.cp_rpw_sc_rw4_f4 = NAN;
188
189
189 // initialize filtering parameters
190 // initialize filtering parameters
190 filterPar.spare_sy_lfr_pas_filter_enabled = DEFAULT_SY_LFR_PAS_FILTER_ENABLED;
191 filterPar.spare_sy_lfr_pas_filter_enabled = DEFAULT_SY_LFR_PAS_FILTER_ENABLED;
191 filterPar.sy_lfr_sc_rw_delta_f = DEFAULT_SY_LFR_SC_RW_DELTA_F;
192 filterPar.sy_lfr_sc_rw_delta_f = DEFAULT_SY_LFR_SC_RW_DELTA_F;
192 filterPar.sy_lfr_pas_filter_tbad = DEFAULT_SY_LFR_PAS_FILTER_TBAD;
193 filterPar.sy_lfr_pas_filter_tbad = DEFAULT_SY_LFR_PAS_FILTER_TBAD;
193 filterPar.sy_lfr_pas_filter_shift = DEFAULT_SY_LFR_PAS_FILTER_SHIFT;
194 filterPar.sy_lfr_pas_filter_shift = DEFAULT_SY_LFR_PAS_FILTER_SHIFT;
194 filterPar.modulus_in_finetime = DEFAULT_MODULUS;
195 filterPar.modulus_in_finetime = DEFAULT_MODULUS;
195 filterPar.tbad_in_finetime = DEFAULT_TBAD;
196 filterPar.tbad_in_finetime = DEFAULT_TBAD;
196 filterPar.offset_in_finetime = DEFAULT_OFFSET;
197 filterPar.offset_in_finetime = DEFAULT_OFFSET;
197 filterPar.shift_in_finetime = DEFAULT_SHIFT;
198 filterPar.shift_in_finetime = DEFAULT_SHIFT;
198 update_last_valid_transition_date( DEFAULT_LAST_VALID_TRANSITION_DATE );
199 update_last_valid_transition_date( DEFAULT_LAST_VALID_TRANSITION_DATE );
199
200
200 // waveform picker initialization
201 // waveform picker initialization
201 WFP_init_rings();
202 WFP_init_rings();
202 LEON_Clear_interrupt( IRQ_SPARC_GPTIMER_WATCHDOG ); // initialize the waveform rings
203 LEON_Clear_interrupt( IRQ_SPARC_GPTIMER_WATCHDOG ); // initialize the waveform rings
203 WFP_reset_current_ring_nodes();
204 WFP_reset_current_ring_nodes();
204 reset_waveform_picker_regs();
205 reset_waveform_picker_regs();
205
206
206 // spectral matrices initialization
207 // spectral matrices initialization
207 SM_init_rings(); // initialize spectral matrices rings
208 SM_init_rings(); // initialize spectral matrices rings
208 SM_reset_current_ring_nodes();
209 SM_reset_current_ring_nodes();
209 reset_spectral_matrix_regs();
210 reset_spectral_matrix_regs();
210
211
211 // configure calibration
212 // configure calibration
212 configureCalibration( false ); // true means interleaved mode, false is for normal mode
213 configureCalibration( false ); // true means interleaved mode, false is for normal mode
213
214
214 updateLFRCurrentMode( LFR_MODE_STANDBY );
215 updateLFRCurrentMode( LFR_MODE_STANDBY );
215
216
216 BOOT_PRINTF1("in INIT *** lfrCurrentMode is %d\n", lfrCurrentMode)
217 BOOT_PRINTF1("in INIT *** lfrCurrentMode is %d\n", lfrCurrentMode)
217
218
218 create_names(); // create all names
219 create_names(); // create all names
219
220
220 status = create_timecode_timer(); // create the timer used by timecode_irq_handler
221 status = create_timecode_timer(); // create the timer used by timecode_irq_handler
221 if (status != RTEMS_SUCCESSFUL)
222 if (status != RTEMS_SUCCESSFUL)
222 {
223 {
223 PRINTF1("in INIT *** ERR in create_timer_timecode, code %d", status)
224 PRINTF1("in INIT *** ERR in create_timer_timecode, code %d", status)
224 }
225 }
225
226
226 status = create_message_queues(); // create message queues
227 status = create_message_queues(); // create message queues
227 if (status != RTEMS_SUCCESSFUL)
228 if (status != RTEMS_SUCCESSFUL)
228 {
229 {
229 PRINTF1("in INIT *** ERR in create_message_queues, code %d", status)
230 PRINTF1("in INIT *** ERR in create_message_queues, code %d", status)
230 }
231 }
231
232
232 status = create_all_tasks(); // create all tasks
233 status = create_all_tasks(); // create all tasks
233 if (status != RTEMS_SUCCESSFUL)
234 if (status != RTEMS_SUCCESSFUL)
234 {
235 {
235 PRINTF1("in INIT *** ERR in create_all_tasks, code %d\n", status)
236 PRINTF1("in INIT *** ERR in create_all_tasks, code %d\n", status)
236 }
237 }
237
238
238 // **************************
239 // **************************
239 // <SPACEWIRE INITIALIZATION>
240 // <SPACEWIRE INITIALIZATION>
240 status_spw = spacewire_open_link(); // (1) open the link
241 status_spw = spacewire_open_link(); // (1) open the link
241 if ( status_spw != RTEMS_SUCCESSFUL )
242 if ( status_spw != RTEMS_SUCCESSFUL )
242 {
243 {
243 PRINTF1("in INIT *** ERR spacewire_open_link code %d\n", status_spw )
244 PRINTF1("in INIT *** ERR spacewire_open_link code %d\n", status_spw )
244 }
245 }
245
246
246 if ( status_spw == RTEMS_SUCCESSFUL ) // (2) configure the link
247 if ( status_spw == RTEMS_SUCCESSFUL ) // (2) configure the link
247 {
248 {
248 status_spw = spacewire_configure_link( fdSPW );
249 status_spw = spacewire_configure_link( fdSPW );
249 if ( status_spw != RTEMS_SUCCESSFUL )
250 if ( status_spw != RTEMS_SUCCESSFUL )
250 {
251 {
251 PRINTF1("in INIT *** ERR spacewire_configure_link code %d\n", status_spw )
252 PRINTF1("in INIT *** ERR spacewire_configure_link code %d\n", status_spw )
252 }
253 }
253 }
254 }
254
255
255 if ( status_spw == RTEMS_SUCCESSFUL) // (3) start the link
256 if ( status_spw == RTEMS_SUCCESSFUL) // (3) start the link
256 {
257 {
257 status_spw = spacewire_start_link( fdSPW );
258 status_spw = spacewire_start_link( fdSPW );
258 if ( status_spw != RTEMS_SUCCESSFUL )
259 if ( status_spw != RTEMS_SUCCESSFUL )
259 {
260 {
260 PRINTF1("in INIT *** ERR spacewire_start_link code %d\n", status_spw )
261 PRINTF1("in INIT *** ERR spacewire_start_link code %d\n", status_spw )
261 }
262 }
262 }
263 }
263 // </SPACEWIRE INITIALIZATION>
264 // </SPACEWIRE INITIALIZATION>
264 // ***************************
265 // ***************************
265
266
266 status = start_all_tasks(); // start all tasks
267 status = start_all_tasks(); // start all tasks
267 if (status != RTEMS_SUCCESSFUL)
268 if (status != RTEMS_SUCCESSFUL)
268 {
269 {
269 PRINTF1("in INIT *** ERR in start_all_tasks, code %d", status)
270 PRINTF1("in INIT *** ERR in start_all_tasks, code %d", status)
270 }
271 }
271
272
272 // start RECV and SEND *AFTER* SpaceWire Initialization, due to the timeout of the start call during the initialization
273 // start RECV and SEND *AFTER* SpaceWire Initialization, due to the timeout of the start call during the initialization
273 status = start_recv_send_tasks();
274 status = start_recv_send_tasks();
274 if ( status != RTEMS_SUCCESSFUL )
275 if ( status != RTEMS_SUCCESSFUL )
275 {
276 {
276 PRINTF1("in INIT *** ERR start_recv_send_tasks code %d\n", status )
277 PRINTF1("in INIT *** ERR start_recv_send_tasks code %d\n", status )
277 }
278 }
278
279
279 // suspend science tasks, they will be restarted later depending on the mode
280 // suspend science tasks, they will be restarted later depending on the mode
280 status = suspend_science_tasks(); // suspend science tasks (not done in stop_current_mode if current mode = STANDBY)
281 status = suspend_science_tasks(); // suspend science tasks (not done in stop_current_mode if current mode = STANDBY)
281 if (status != RTEMS_SUCCESSFUL)
282 if (status != RTEMS_SUCCESSFUL)
282 {
283 {
283 PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status)
284 PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status)
284 }
285 }
285
286
286 // configure IRQ handling for the waveform picker unit
287 // configure IRQ handling for the waveform picker unit
287 status = rtems_interrupt_catch( waveforms_isr,
288 status = rtems_interrupt_catch( waveforms_isr,
288 IRQ_SPARC_WAVEFORM_PICKER,
289 IRQ_SPARC_WAVEFORM_PICKER,
289 &old_isr_handler) ;
290 &old_isr_handler) ;
290 // configure IRQ handling for the spectral matrices unit
291 // configure IRQ handling for the spectral matrices unit
291 status = rtems_interrupt_catch( spectral_matrices_isr,
292 status = rtems_interrupt_catch( spectral_matrices_isr,
292 IRQ_SPARC_SPECTRAL_MATRIX,
293 IRQ_SPARC_SPECTRAL_MATRIX,
293 &old_isr_handler) ;
294 &old_isr_handler) ;
294
295
295 // if the spacewire link is not up then send an event to the SPIQ task for link recovery
296 // if the spacewire link is not up then send an event to the SPIQ task for link recovery
296 if ( status_spw != RTEMS_SUCCESSFUL )
297 if ( status_spw != RTEMS_SUCCESSFUL )
297 {
298 {
298 status = rtems_event_send( Task_id[TASKID_SPIQ], SPW_LINKERR_EVENT );
299 status = rtems_event_send( Task_id[TASKID_SPIQ], SPW_LINKERR_EVENT );
299 if ( status != RTEMS_SUCCESSFUL ) {
300 if ( status != RTEMS_SUCCESSFUL ) {
300 PRINTF1("in INIT *** ERR rtems_event_send to SPIQ code %d\n", status )
301 PRINTF1("in INIT *** ERR rtems_event_send to SPIQ code %d\n", status )
301 }
302 }
302 }
303 }
303
304
304 BOOT_PRINTF("delete INIT\n")
305 BOOT_PRINTF("delete INIT\n")
305
306
306 set_hk_lfr_sc_potential_flag( true );
307 set_hk_lfr_sc_potential_flag( true );
307
308
308 // start the timer to detect a missing spacewire timecode
309 // start the timer to detect a missing spacewire timecode
309 // the timeout is larger because the spw IP needs to receive several valid timecodes before generating a tickout
310 // the timeout is larger because the spw IP needs to receive several valid timecodes before generating a tickout
310 // if a tickout is generated, the timer is restarted
311 // if a tickout is generated, the timer is restarted
311 status = rtems_timer_fire_after( timecode_timer_id, TIMECODE_TIMER_TIMEOUT_INIT, timecode_timer_routine, NULL );
312 status = rtems_timer_fire_after( timecode_timer_id, TIMECODE_TIMER_TIMEOUT_INIT, timecode_timer_routine, NULL );
312
313
313 grspw_timecode_callback = &timecode_irq_handler;
314 grspw_timecode_callback = &timecode_irq_handler;
314
315
315 status = rtems_task_delete(RTEMS_SELF);
316 status = rtems_task_delete(RTEMS_SELF);
316
317
317 }
318 }
318
319
319 void init_local_mode_parameters( void )
320 void init_local_mode_parameters( void )
320 {
321 {
321 /** This function initialize the param_local global variable with default values.
322 /** This function initialize the param_local global variable with default values.
322 *
323 *
323 */
324 */
324
325
325 unsigned int i;
326 unsigned int i;
326
327
327 // LOCAL PARAMETERS
328 // LOCAL PARAMETERS
328
329
329 BOOT_PRINTF1("local_sbm1_nb_cwf_max %d \n", param_local.local_sbm1_nb_cwf_max)
330 BOOT_PRINTF1("local_sbm1_nb_cwf_max %d \n", param_local.local_sbm1_nb_cwf_max)
330 BOOT_PRINTF1("local_sbm2_nb_cwf_max %d \n", param_local.local_sbm2_nb_cwf_max)
331 BOOT_PRINTF1("local_sbm2_nb_cwf_max %d \n", param_local.local_sbm2_nb_cwf_max)
331
332
332 // init sequence counters
333 // init sequence counters
333
334
334 for(i = 0; i<SEQ_CNT_NB_DEST_ID; i++)
335 for(i = 0; i<SEQ_CNT_NB_DEST_ID; i++)
335 {
336 {
336 sequenceCounters_TC_EXE[i] = INIT_CHAR;
337 sequenceCounters_TC_EXE[i] = INIT_CHAR;
337 sequenceCounters_TM_DUMP[i] = INIT_CHAR;
338 sequenceCounters_TM_DUMP[i] = INIT_CHAR;
338 }
339 }
339 sequenceCounters_SCIENCE_NORMAL_BURST = INIT_CHAR;
340 sequenceCounters_SCIENCE_NORMAL_BURST = INIT_CHAR;
340 sequenceCounters_SCIENCE_SBM1_SBM2 = INIT_CHAR;
341 sequenceCounters_SCIENCE_SBM1_SBM2 = INIT_CHAR;
341 sequenceCounterHK = TM_PACKET_SEQ_CTRL_STANDALONE << TM_PACKET_SEQ_SHIFT;
342 sequenceCounterHK = TM_PACKET_SEQ_CTRL_STANDALONE << TM_PACKET_SEQ_SHIFT;
342 }
343 }
343
344
344 void reset_local_time( void )
345 void reset_local_time( void )
345 {
346 {
346 time_management_regs->ctrl = time_management_regs->ctrl | VAL_SOFTWARE_RESET; // [0010] software reset, coarse time = 0x80000000
347 time_management_regs->ctrl = time_management_regs->ctrl | VAL_SOFTWARE_RESET; // [0010] software reset, coarse time = 0x80000000
347 }
348 }
348
349
349 void create_names( void ) // create all names for tasks and queues
350 void create_names( void ) // create all names for tasks and queues
350 {
351 {
351 /** This function creates all RTEMS names used in the software for tasks and queues.
352 /** This function creates all RTEMS names used in the software for tasks and queues.
352 *
353 *
353 * @return RTEMS directive status codes:
354 * @return RTEMS directive status codes:
354 * - RTEMS_SUCCESSFUL - successful completion
355 * - RTEMS_SUCCESSFUL - successful completion
355 *
356 *
356 */
357 */
357
358
358 // task names
359 // task names
359 Task_name[TASKID_AVGV] = rtems_build_name( 'A', 'V', 'G', 'V' );
360 Task_name[TASKID_AVGV] = rtems_build_name( 'A', 'V', 'G', 'V' );
360 Task_name[TASKID_RECV] = rtems_build_name( 'R', 'E', 'C', 'V' );
361 Task_name[TASKID_RECV] = rtems_build_name( 'R', 'E', 'C', 'V' );
361 Task_name[TASKID_ACTN] = rtems_build_name( 'A', 'C', 'T', 'N' );
362 Task_name[TASKID_ACTN] = rtems_build_name( 'A', 'C', 'T', 'N' );
362 Task_name[TASKID_SPIQ] = rtems_build_name( 'S', 'P', 'I', 'Q' );
363 Task_name[TASKID_SPIQ] = rtems_build_name( 'S', 'P', 'I', 'Q' );
363 Task_name[TASKID_LOAD] = rtems_build_name( 'L', 'O', 'A', 'D' );
364 Task_name[TASKID_LOAD] = rtems_build_name( 'L', 'O', 'A', 'D' );
364 Task_name[TASKID_AVF0] = rtems_build_name( 'A', 'V', 'F', '0' );
365 Task_name[TASKID_AVF0] = rtems_build_name( 'A', 'V', 'F', '0' );
365 Task_name[TASKID_SWBD] = rtems_build_name( 'S', 'W', 'B', 'D' );
366 Task_name[TASKID_SWBD] = rtems_build_name( 'S', 'W', 'B', 'D' );
366 Task_name[TASKID_WFRM] = rtems_build_name( 'W', 'F', 'R', 'M' );
367 Task_name[TASKID_WFRM] = rtems_build_name( 'W', 'F', 'R', 'M' );
367 Task_name[TASKID_DUMB] = rtems_build_name( 'D', 'U', 'M', 'B' );
368 Task_name[TASKID_DUMB] = rtems_build_name( 'D', 'U', 'M', 'B' );
368 Task_name[TASKID_HOUS] = rtems_build_name( 'H', 'O', 'U', 'S' );
369 Task_name[TASKID_HOUS] = rtems_build_name( 'H', 'O', 'U', 'S' );
369 Task_name[TASKID_PRC0] = rtems_build_name( 'P', 'R', 'C', '0' );
370 Task_name[TASKID_PRC0] = rtems_build_name( 'P', 'R', 'C', '0' );
370 Task_name[TASKID_CWF3] = rtems_build_name( 'C', 'W', 'F', '3' );
371 Task_name[TASKID_CWF3] = rtems_build_name( 'C', 'W', 'F', '3' );
371 Task_name[TASKID_CWF2] = rtems_build_name( 'C', 'W', 'F', '2' );
372 Task_name[TASKID_CWF2] = rtems_build_name( 'C', 'W', 'F', '2' );
372 Task_name[TASKID_CWF1] = rtems_build_name( 'C', 'W', 'F', '1' );
373 Task_name[TASKID_CWF1] = rtems_build_name( 'C', 'W', 'F', '1' );
373 Task_name[TASKID_SEND] = rtems_build_name( 'S', 'E', 'N', 'D' );
374 Task_name[TASKID_SEND] = rtems_build_name( 'S', 'E', 'N', 'D' );
374 Task_name[TASKID_LINK] = rtems_build_name( 'L', 'I', 'N', 'K' );
375 Task_name[TASKID_LINK] = rtems_build_name( 'L', 'I', 'N', 'K' );
375 Task_name[TASKID_AVF1] = rtems_build_name( 'A', 'V', 'F', '1' );
376 Task_name[TASKID_AVF1] = rtems_build_name( 'A', 'V', 'F', '1' );
376 Task_name[TASKID_PRC1] = rtems_build_name( 'P', 'R', 'C', '1' );
377 Task_name[TASKID_PRC1] = rtems_build_name( 'P', 'R', 'C', '1' );
377 Task_name[TASKID_AVF2] = rtems_build_name( 'A', 'V', 'F', '2' );
378 Task_name[TASKID_AVF2] = rtems_build_name( 'A', 'V', 'F', '2' );
378 Task_name[TASKID_PRC2] = rtems_build_name( 'P', 'R', 'C', '2' );
379 Task_name[TASKID_PRC2] = rtems_build_name( 'P', 'R', 'C', '2' );
380 Task_name[TASKID_SCRB] = rtems_build_name( 'S', 'C', 'R', 'B' );
379
381
380 // rate monotonic period names
382 // rate monotonic period names
381 name_hk_rate_monotonic = rtems_build_name( 'H', 'O', 'U', 'S' );
383 name_hk_rate_monotonic = rtems_build_name( 'H', 'O', 'U', 'S' );
382 name_avgv_rate_monotonic = rtems_build_name( 'A', 'V', 'G', 'V' );
384 name_avgv_rate_monotonic = rtems_build_name( 'A', 'V', 'G', 'V' );
383
385
384 misc_name[QUEUE_RECV] = rtems_build_name( 'Q', '_', 'R', 'V' );
386 misc_name[QUEUE_RECV] = rtems_build_name( 'Q', '_', 'R', 'V' );
385 misc_name[QUEUE_SEND] = rtems_build_name( 'Q', '_', 'S', 'D' );
387 misc_name[QUEUE_SEND] = rtems_build_name( 'Q', '_', 'S', 'D' );
386 misc_name[QUEUE_PRC0] = rtems_build_name( 'Q', '_', 'P', '0' );
388 misc_name[QUEUE_PRC0] = rtems_build_name( 'Q', '_', 'P', '0' );
387 misc_name[QUEUE_PRC1] = rtems_build_name( 'Q', '_', 'P', '1' );
389 misc_name[QUEUE_PRC1] = rtems_build_name( 'Q', '_', 'P', '1' );
388 misc_name[QUEUE_PRC2] = rtems_build_name( 'Q', '_', 'P', '2' );
390 misc_name[QUEUE_PRC2] = rtems_build_name( 'Q', '_', 'P', '2' );
389
391
390 timecode_timer_name = rtems_build_name( 'S', 'P', 'T', 'C' );
392 timecode_timer_name = rtems_build_name( 'S', 'P', 'T', 'C' );
391 }
393 }
392
394
393 int create_all_tasks( void ) // create all tasks which run in the software
395 int create_all_tasks( void ) // create all tasks which run in the software
394 {
396 {
395 /** This function creates all RTEMS tasks used in the software.
397 /** This function creates all RTEMS tasks used in the software.
396 *
398 *
397 * @return RTEMS directive status codes:
399 * @return RTEMS directive status codes:
398 * - RTEMS_SUCCESSFUL - task created successfully
400 * - RTEMS_SUCCESSFUL - task created successfully
399 * - RTEMS_INVALID_ADDRESS - id is NULL
401 * - RTEMS_INVALID_ADDRESS - id is NULL
400 * - RTEMS_INVALID_NAME - invalid task name
402 * - RTEMS_INVALID_NAME - invalid task name
401 * - RTEMS_INVALID_PRIORITY - invalid task priority
403 * - RTEMS_INVALID_PRIORITY - invalid task priority
402 * - RTEMS_MP_NOT_CONFIGURED - multiprocessing not configured
404 * - RTEMS_MP_NOT_CONFIGURED - multiprocessing not configured
403 * - RTEMS_TOO_MANY - too many tasks created
405 * - RTEMS_TOO_MANY - too many tasks created
404 * - RTEMS_UNSATISFIED - not enough memory for stack/FP context
406 * - RTEMS_UNSATISFIED - not enough memory for stack/FP context
405 * - RTEMS_TOO_MANY - too many global objects
407 * - RTEMS_TOO_MANY - too many global objects
406 *
408 *
407 */
409 */
408
410
409 rtems_status_code status;
411 rtems_status_code status;
410
412
411 //**********
413 //**********
412 // SPACEWIRE
414 // SPACEWIRE
413 // RECV
415 // RECV
414 status = rtems_task_create(
416 status = rtems_task_create(
415 Task_name[TASKID_RECV], TASK_PRIORITY_RECV, RTEMS_MINIMUM_STACK_SIZE,
417 Task_name[TASKID_RECV], TASK_PRIORITY_RECV, RTEMS_MINIMUM_STACK_SIZE,
416 RTEMS_DEFAULT_MODES,
418 RTEMS_DEFAULT_MODES,
417 RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_RECV]
419 RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_RECV]
418 );
420 );
419 if (status == RTEMS_SUCCESSFUL) // SEND
421 if (status == RTEMS_SUCCESSFUL) // SEND
420 {
422 {
421 status = rtems_task_create(
423 status = rtems_task_create(
422 Task_name[TASKID_SEND], TASK_PRIORITY_SEND, RTEMS_MINIMUM_STACK_SIZE * STACK_SIZE_MULT,
424 Task_name[TASKID_SEND], TASK_PRIORITY_SEND, RTEMS_MINIMUM_STACK_SIZE * STACK_SIZE_MULT,
423 RTEMS_DEFAULT_MODES,
425 RTEMS_DEFAULT_MODES,
424 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_SEND]
426 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_SEND]
425 );
427 );
426 }
428 }
427 if (status == RTEMS_SUCCESSFUL) // LINK
429 if (status == RTEMS_SUCCESSFUL) // LINK
428 {
430 {
429 status = rtems_task_create(
431 status = rtems_task_create(
430 Task_name[TASKID_LINK], TASK_PRIORITY_LINK, RTEMS_MINIMUM_STACK_SIZE,
432 Task_name[TASKID_LINK], TASK_PRIORITY_LINK, RTEMS_MINIMUM_STACK_SIZE,