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Bug 411 corrected, initialization of byte 18 in...
paul -
r200:c3398948f0c8 R3
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@@ -1,12 +1,12
1 # LOAD FSW USING LINK 1
1 # LOAD FSW USING LINK 1
2 SpwPlugin0.StarDundeeSelectLinkNumber( 2 )
2 SpwPlugin0.StarDundeeSelectLinkNumber( 2 )
3
3
4 dsu3plugin0.openFile("/opt/DEV_PLE/timegen-qt/bin/timegen")
4 dsu3plugin0.openFile("/opt/LFR/TIMEGEN/0.0.0.1/timegen")
5 dsu3plugin0.loadFile()
5 dsu3plugin0.loadFile()
6
6
7 dsu3plugin0.run()
7 dsu3plugin0.run()
8
8
9 # START SENDING TIMECODES AT 1 Hz
9 # START SENDING TIMECODES AT 1 Hz
10 SpwPlugin0.StarDundeeStartTimecodes( 1 )
10 SpwPlugin0.StarDundeeStartTimecodes( 1 )
11
11
12 SpwPlugin0.StarDundeeSelectLinkNumber( 1 )
12 SpwPlugin0.StarDundeeSelectLinkNumber( 1 )
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@@ -1,42 +1,42
1 import time
1 import time
2
2
3 proxy.loadSysDriver("SpwPlugin","SpwPlugin0")
3 proxy.loadSysDriver("SpwPlugin","SpwPlugin0")
4 SpwPlugin0.selectBridge("STAR-Dundee Spw USB Brick")
4 SpwPlugin0.selectBridge("STAR-Dundee Spw USB Brick")
5
5
6 proxy.loadSysDriverToParent("dsu3plugin","SpwPlugin0")
6 proxy.loadSysDriverToParent("dsu3plugin","SpwPlugin0")
7 proxy.loadSysDriverToParent("LFRControlPlugin","SpwPlugin0")
7 proxy.loadSysDriverToParent("LFRControlPlugin","SpwPlugin0")
8
8
9 availableBrickCount = SpwPlugin0.StarDundeeGetAvailableBrickCount()
9 availableBrickCount = SpwPlugin0.StarDundeeGetAvailableBrickCount()
10 print str(availableBrickCount) + " SpaceWire brick(s) found"
10 print str(availableBrickCount) + " SpaceWire brick(s) found"
11
11
12 SpwPlugin0.StarDundeeSelectBrick(1)
12 SpwPlugin0.StarDundeeSelectBrick(1)
13 SpwPlugin0.StarDundeeSetBrickAsARouter(1)
13 SpwPlugin0.StarDundeeSetBrickAsARouter(1)
14 SpwPlugin0.connectBridge()
14 SpwPlugin0.connectBridge()
15
15
16 #SpwPlugin0.TCPServerSetIP("127.0.0.1")
16 #SpwPlugin0.TCPServerSetIP("127.0.0.1")
17 SpwPlugin0.TCPServerConnect()
17 SpwPlugin0.TCPServerConnect()
18
18
19 # OPEN SPACEWIRE SERVER
19 # OPEN SPACEWIRE SERVER
20 #LFRControlPlugin0.SetSpwServerIP(129,104,27,164)
20 #LFRControlPlugin0.SetSpwServerIP(129,104,27,164)
21 LFRControlPlugin0.TCPServerConnect()
21 LFRControlPlugin0.TCPServerConnect()
22
22
23 # OPEN TM ECHO BRIDGE SERVER
23 # OPEN TM ECHO BRIDGE SERVER
24 LFRControlPlugin0.TMEchoBridgeOpenPort()
24 LFRControlPlugin0.TMEchoBridgeOpenPort()
25
25
26 # LOAD TIMEGEN USING LINK 2
26 # LOAD TIMEGEN USING LINK 2
27 SpwPlugin0.StarDundeeSelectLinkNumber( 2 )
27 SpwPlugin0.StarDundeeSelectLinkNumber( 2 )
28 dsu3plugin0.openFile("/opt/DEV_PLE/timegen-qt/bin/timegen")
28 dsu3plugin0.openFile("/opt/LFR/TIMEGEN/0.0.0.1/timegen")
29 dsu3plugin0.loadFile()
29 dsu3plugin0.loadFile()
30 dsu3plugin0.run()
30 dsu3plugin0.run()
31
31
32 # LOAD FSW USING LINK 1
32 # LOAD FSW USING LINK 1
33 SpwPlugin0.StarDundeeSelectLinkNumber( 1 )
33 SpwPlugin0.StarDundeeSelectLinkNumber( 1 )
34 dsu3plugin0.openFile("/opt/DEV_PLE/FSW-qt/bin/fsw")
34 dsu3plugin0.openFile("/opt/DEV_PLE/FSW-qt/bin/fsw")
35 dsu3plugin0.loadFile()
35 dsu3plugin0.loadFile()
36 dsu3plugin0.run()
36 dsu3plugin0.run()
37
37
38 # START SENDING TIMECODES AT 1 Hz
38 # START SENDING TIMECODES AT 1 Hz
39 SpwPlugin0.StarDundeeStartTimecodes( 1 )
39 SpwPlugin0.StarDundeeStartTimecodes( 1 )
40
40
41 # it is possible to change the time code frequency
41 # it is possible to change the time code frequency
42 #RMAPPlugin0.changeTimecodeFrequency(2)
42 #RMAPPlugin0.changeTimecodeFrequency(2)
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@@ -1,652 +1,656
1 /** Functions related to data processing.
1 /** Functions related to data processing.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 * These function are related to data processing, i.e. spectral matrices averaging and basic parameters computation.
6 * These function are related to data processing, i.e. spectral matrices averaging and basic parameters computation.
7 *
7 *
8 */
8 */
9
9
10 #include "fsw_processing.h"
10 #include "fsw_processing.h"
11 #include "fsw_processing_globals.c"
11 #include "fsw_processing_globals.c"
12 #include "fsw_init.h"
12 #include "fsw_init.h"
13
13
14 unsigned int nb_sm_f0;
14 unsigned int nb_sm_f0;
15 unsigned int nb_sm_f0_aux_f1;
15 unsigned int nb_sm_f0_aux_f1;
16 unsigned int nb_sm_f1;
16 unsigned int nb_sm_f1;
17 unsigned int nb_sm_f0_aux_f2;
17 unsigned int nb_sm_f0_aux_f2;
18
18
19 //************************
19 //************************
20 // spectral matrices rings
20 // spectral matrices rings
21 ring_node sm_ring_f0[ NB_RING_NODES_SM_F0 ];
21 ring_node sm_ring_f0[ NB_RING_NODES_SM_F0 ];
22 ring_node sm_ring_f1[ NB_RING_NODES_SM_F1 ];
22 ring_node sm_ring_f1[ NB_RING_NODES_SM_F1 ];
23 ring_node sm_ring_f2[ NB_RING_NODES_SM_F2 ];
23 ring_node sm_ring_f2[ NB_RING_NODES_SM_F2 ];
24 ring_node *current_ring_node_sm_f0;
24 ring_node *current_ring_node_sm_f0;
25 ring_node *current_ring_node_sm_f1;
25 ring_node *current_ring_node_sm_f1;
26 ring_node *current_ring_node_sm_f2;
26 ring_node *current_ring_node_sm_f2;
27 ring_node *ring_node_for_averaging_sm_f0;
27 ring_node *ring_node_for_averaging_sm_f0;
28 ring_node *ring_node_for_averaging_sm_f1;
28 ring_node *ring_node_for_averaging_sm_f1;
29 ring_node *ring_node_for_averaging_sm_f2;
29 ring_node *ring_node_for_averaging_sm_f2;
30
30
31 //
31 //
32 ring_node * getRingNodeForAveraging( unsigned char frequencyChannel)
32 ring_node * getRingNodeForAveraging( unsigned char frequencyChannel)
33 {
33 {
34 ring_node *node;
34 ring_node *node;
35
35
36 node = NULL;
36 node = NULL;
37 switch ( frequencyChannel ) {
37 switch ( frequencyChannel ) {
38 case 0:
38 case 0:
39 node = ring_node_for_averaging_sm_f0;
39 node = ring_node_for_averaging_sm_f0;
40 break;
40 break;
41 case 1:
41 case 1:
42 node = ring_node_for_averaging_sm_f1;
42 node = ring_node_for_averaging_sm_f1;
43 break;
43 break;
44 case 2:
44 case 2:
45 node = ring_node_for_averaging_sm_f2;
45 node = ring_node_for_averaging_sm_f2;
46 break;
46 break;
47 default:
47 default:
48 break;
48 break;
49 }
49 }
50
50
51 return node;
51 return node;
52 }
52 }
53
53
54 //***********************************************************
54 //***********************************************************
55 // Interrupt Service Routine for spectral matrices processing
55 // Interrupt Service Routine for spectral matrices processing
56
56
57 void spectral_matrices_isr_f0( unsigned char statusReg )
57 void spectral_matrices_isr_f0( unsigned char statusReg )
58 {
58 {
59 unsigned char status;
59 unsigned char status;
60 rtems_status_code status_code;
60 rtems_status_code status_code;
61 ring_node *full_ring_node;
61 ring_node *full_ring_node;
62
62
63 status = statusReg & 0x03; // [0011] get the status_ready_matrix_f0_x bits
63 status = statusReg & 0x03; // [0011] get the status_ready_matrix_f0_x bits
64
64
65 switch(status)
65 switch(status)
66 {
66 {
67 case 0:
67 case 0:
68 break;
68 break;
69 case 3:
69 case 3:
70 // UNEXPECTED VALUE
70 // UNEXPECTED VALUE
71 spectral_matrix_regs->status = 0x03; // [0011]
71 spectral_matrix_regs->status = 0x03; // [0011]
72 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_11 );
72 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_11 );
73 break;
73 break;
74 case 1:
74 case 1:
75 full_ring_node = current_ring_node_sm_f0->previous;
75 full_ring_node = current_ring_node_sm_f0->previous;
76 full_ring_node->coarseTime = spectral_matrix_regs->f0_0_coarse_time;
76 full_ring_node->coarseTime = spectral_matrix_regs->f0_0_coarse_time;
77 full_ring_node->fineTime = spectral_matrix_regs->f0_0_fine_time;
77 full_ring_node->fineTime = spectral_matrix_regs->f0_0_fine_time;
78 current_ring_node_sm_f0 = current_ring_node_sm_f0->next;
78 current_ring_node_sm_f0 = current_ring_node_sm_f0->next;
79 spectral_matrix_regs->f0_0_address = current_ring_node_sm_f0->buffer_address;
79 spectral_matrix_regs->f0_0_address = current_ring_node_sm_f0->buffer_address;
80 // if there are enough ring nodes ready, wake up an AVFx task
80 // if there are enough ring nodes ready, wake up an AVFx task
81 nb_sm_f0 = nb_sm_f0 + 1;
81 nb_sm_f0 = nb_sm_f0 + 1;
82 if (nb_sm_f0 == NB_SM_BEFORE_AVF0)
82 if (nb_sm_f0 == NB_SM_BEFORE_AVF0)
83 {
83 {
84 ring_node_for_averaging_sm_f0 = full_ring_node;
84 ring_node_for_averaging_sm_f0 = full_ring_node;
85 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
85 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
86 {
86 {
87 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
87 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
88 }
88 }
89 nb_sm_f0 = 0;
89 nb_sm_f0 = 0;
90 }
90 }
91 spectral_matrix_regs->status = 0x01; // [0000 0001]
91 spectral_matrix_regs->status = 0x01; // [0000 0001]
92 break;
92 break;
93 case 2:
93 case 2:
94 full_ring_node = current_ring_node_sm_f0->previous;
94 full_ring_node = current_ring_node_sm_f0->previous;
95 full_ring_node->coarseTime = spectral_matrix_regs->f0_1_coarse_time;
95 full_ring_node->coarseTime = spectral_matrix_regs->f0_1_coarse_time;
96 full_ring_node->fineTime = spectral_matrix_regs->f0_1_fine_time;
96 full_ring_node->fineTime = spectral_matrix_regs->f0_1_fine_time;
97 current_ring_node_sm_f0 = current_ring_node_sm_f0->next;
97 current_ring_node_sm_f0 = current_ring_node_sm_f0->next;
98 spectral_matrix_regs->f0_1_address = current_ring_node_sm_f0->buffer_address;
98 spectral_matrix_regs->f0_1_address = current_ring_node_sm_f0->buffer_address;
99 // if there are enough ring nodes ready, wake up an AVFx task
99 // if there are enough ring nodes ready, wake up an AVFx task
100 nb_sm_f0 = nb_sm_f0 + 1;
100 nb_sm_f0 = nb_sm_f0 + 1;
101 if (nb_sm_f0 == NB_SM_BEFORE_AVF0)
101 if (nb_sm_f0 == NB_SM_BEFORE_AVF0)
102 {
102 {
103 ring_node_for_averaging_sm_f0 = full_ring_node;
103 ring_node_for_averaging_sm_f0 = full_ring_node;
104 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
104 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
105 {
105 {
106 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
106 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
107 }
107 }
108 nb_sm_f0 = 0;
108 nb_sm_f0 = 0;
109 }
109 }
110 spectral_matrix_regs->status = 0x02; // [0000 0010]
110 spectral_matrix_regs->status = 0x02; // [0000 0010]
111 break;
111 break;
112 }
112 }
113 }
113 }
114
114
115 void spectral_matrices_isr_f1( unsigned char statusReg )
115 void spectral_matrices_isr_f1( unsigned char statusReg )
116 {
116 {
117 rtems_status_code status_code;
117 rtems_status_code status_code;
118 unsigned char status;
118 unsigned char status;
119 ring_node *full_ring_node;
119 ring_node *full_ring_node;
120
120
121 status = (statusReg & 0x0c) >> 2; // [1100] get the status_ready_matrix_f0_x bits
121 status = (statusReg & 0x0c) >> 2; // [1100] get the status_ready_matrix_f0_x bits
122
122
123 switch(status)
123 switch(status)
124 {
124 {
125 case 0:
125 case 0:
126 break;
126 break;
127 case 3:
127 case 3:
128 // UNEXPECTED VALUE
128 // UNEXPECTED VALUE
129 spectral_matrix_regs->status = 0xc0; // [1100]
129 spectral_matrix_regs->status = 0xc0; // [1100]
130 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_11 );
130 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_11 );
131 break;
131 break;
132 case 1:
132 case 1:
133 full_ring_node = current_ring_node_sm_f1->previous;
133 full_ring_node = current_ring_node_sm_f1->previous;
134 full_ring_node->coarseTime = spectral_matrix_regs->f1_0_coarse_time;
134 full_ring_node->coarseTime = spectral_matrix_regs->f1_0_coarse_time;
135 full_ring_node->fineTime = spectral_matrix_regs->f1_0_fine_time;
135 full_ring_node->fineTime = spectral_matrix_regs->f1_0_fine_time;
136 current_ring_node_sm_f1 = current_ring_node_sm_f1->next;
136 current_ring_node_sm_f1 = current_ring_node_sm_f1->next;
137 spectral_matrix_regs->f1_0_address = current_ring_node_sm_f1->buffer_address;
137 spectral_matrix_regs->f1_0_address = current_ring_node_sm_f1->buffer_address;
138 // if there are enough ring nodes ready, wake up an AVFx task
138 // if there are enough ring nodes ready, wake up an AVFx task
139 nb_sm_f1 = nb_sm_f1 + 1;
139 nb_sm_f1 = nb_sm_f1 + 1;
140 if (nb_sm_f1 == NB_SM_BEFORE_AVF1)
140 if (nb_sm_f1 == NB_SM_BEFORE_AVF1)
141 {
141 {
142 ring_node_for_averaging_sm_f1 = full_ring_node;
142 ring_node_for_averaging_sm_f1 = full_ring_node;
143 if (rtems_event_send( Task_id[TASKID_AVF1], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
143 if (rtems_event_send( Task_id[TASKID_AVF1], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
144 {
144 {
145 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
145 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
146 }
146 }
147 nb_sm_f1 = 0;
147 nb_sm_f1 = 0;
148 }
148 }
149 spectral_matrix_regs->status = 0x04; // [0000 0100]
149 spectral_matrix_regs->status = 0x04; // [0000 0100]
150 break;
150 break;
151 case 2:
151 case 2:
152 full_ring_node = current_ring_node_sm_f1->previous;
152 full_ring_node = current_ring_node_sm_f1->previous;
153 full_ring_node->coarseTime = spectral_matrix_regs->f1_1_coarse_time;
153 full_ring_node->coarseTime = spectral_matrix_regs->f1_1_coarse_time;
154 full_ring_node->fineTime = spectral_matrix_regs->f1_1_fine_time;
154 full_ring_node->fineTime = spectral_matrix_regs->f1_1_fine_time;
155 current_ring_node_sm_f1 = current_ring_node_sm_f1->next;
155 current_ring_node_sm_f1 = current_ring_node_sm_f1->next;
156 spectral_matrix_regs->f1_1_address = current_ring_node_sm_f1->buffer_address;
156 spectral_matrix_regs->f1_1_address = current_ring_node_sm_f1->buffer_address;
157 // if there are enough ring nodes ready, wake up an AVFx task
157 // if there are enough ring nodes ready, wake up an AVFx task
158 nb_sm_f1 = nb_sm_f1 + 1;
158 nb_sm_f1 = nb_sm_f1 + 1;
159 if (nb_sm_f1 == NB_SM_BEFORE_AVF1)
159 if (nb_sm_f1 == NB_SM_BEFORE_AVF1)
160 {
160 {
161 ring_node_for_averaging_sm_f1 = full_ring_node;
161 ring_node_for_averaging_sm_f1 = full_ring_node;
162 if (rtems_event_send( Task_id[TASKID_AVF1], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
162 if (rtems_event_send( Task_id[TASKID_AVF1], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
163 {
163 {
164 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
164 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
165 }
165 }
166 nb_sm_f1 = 0;
166 nb_sm_f1 = 0;
167 }
167 }
168 spectral_matrix_regs->status = 0x08; // [1000 0000]
168 spectral_matrix_regs->status = 0x08; // [1000 0000]
169 break;
169 break;
170 }
170 }
171 }
171 }
172
172
173 void spectral_matrices_isr_f2( unsigned char statusReg )
173 void spectral_matrices_isr_f2( unsigned char statusReg )
174 {
174 {
175 unsigned char status;
175 unsigned char status;
176 rtems_status_code status_code;
176 rtems_status_code status_code;
177
177
178 status = (statusReg & 0x30) >> 4; // [0011 0000] get the status_ready_matrix_f0_x bits
178 status = (statusReg & 0x30) >> 4; // [0011 0000] get the status_ready_matrix_f0_x bits
179
179
180 switch(status)
180 switch(status)
181 {
181 {
182 case 0:
182 case 0:
183 break;
183 break;
184 case 3:
184 case 3:
185 // UNEXPECTED VALUE
185 // UNEXPECTED VALUE
186 spectral_matrix_regs->status = 0x30; // [0011 0000]
186 spectral_matrix_regs->status = 0x30; // [0011 0000]
187 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_11 );
187 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_11 );
188 break;
188 break;
189 case 1:
189 case 1:
190 ring_node_for_averaging_sm_f2 = current_ring_node_sm_f2->previous;
190 ring_node_for_averaging_sm_f2 = current_ring_node_sm_f2->previous;
191 current_ring_node_sm_f2 = current_ring_node_sm_f2->next;
191 current_ring_node_sm_f2 = current_ring_node_sm_f2->next;
192 ring_node_for_averaging_sm_f2->coarseTime = spectral_matrix_regs->f2_0_coarse_time;
192 ring_node_for_averaging_sm_f2->coarseTime = spectral_matrix_regs->f2_0_coarse_time;
193 ring_node_for_averaging_sm_f2->fineTime = spectral_matrix_regs->f2_0_fine_time;
193 ring_node_for_averaging_sm_f2->fineTime = spectral_matrix_regs->f2_0_fine_time;
194 spectral_matrix_regs->f2_0_address = current_ring_node_sm_f2->buffer_address;
194 spectral_matrix_regs->f2_0_address = current_ring_node_sm_f2->buffer_address;
195 spectral_matrix_regs->status = 0x10; // [0001 0000]
195 spectral_matrix_regs->status = 0x10; // [0001 0000]
196 if (rtems_event_send( Task_id[TASKID_AVF2], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
196 if (rtems_event_send( Task_id[TASKID_AVF2], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
197 {
197 {
198 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
198 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
199 }
199 }
200 break;
200 break;
201 case 2:
201 case 2:
202 ring_node_for_averaging_sm_f2 = current_ring_node_sm_f2->previous;
202 ring_node_for_averaging_sm_f2 = current_ring_node_sm_f2->previous;
203 current_ring_node_sm_f2 = current_ring_node_sm_f2->next;
203 current_ring_node_sm_f2 = current_ring_node_sm_f2->next;
204 ring_node_for_averaging_sm_f2->coarseTime = spectral_matrix_regs->f2_1_coarse_time;
204 ring_node_for_averaging_sm_f2->coarseTime = spectral_matrix_regs->f2_1_coarse_time;
205 ring_node_for_averaging_sm_f2->fineTime = spectral_matrix_regs->f2_1_fine_time;
205 ring_node_for_averaging_sm_f2->fineTime = spectral_matrix_regs->f2_1_fine_time;
206 spectral_matrix_regs->f2_1_address = current_ring_node_sm_f2->buffer_address;
206 spectral_matrix_regs->f2_1_address = current_ring_node_sm_f2->buffer_address;
207 spectral_matrix_regs->status = 0x20; // [0010 0000]
207 spectral_matrix_regs->status = 0x20; // [0010 0000]
208 if (rtems_event_send( Task_id[TASKID_AVF2], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
208 if (rtems_event_send( Task_id[TASKID_AVF2], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
209 {
209 {
210 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
210 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
211 }
211 }
212 break;
212 break;
213 }
213 }
214 }
214 }
215
215
216 void spectral_matrix_isr_error_handler( unsigned char statusReg )
216 void spectral_matrix_isr_error_handler( unsigned char statusReg )
217 {
217 {
218 rtems_status_code status_code;
218 rtems_status_code status_code;
219
219
220 if (statusReg & 0x7c0) // [0111 1100 0000]
220 if (statusReg & 0x7c0) // [0111 1100 0000]
221 {
221 {
222 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_8 );
222 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_8 );
223 }
223 }
224
224
225 spectral_matrix_regs->status = spectral_matrix_regs->status & 0x7c0;
225 spectral_matrix_regs->status = spectral_matrix_regs->status & 0x7c0;
226 }
226 }
227
227
228 rtems_isr spectral_matrices_isr( rtems_vector_number vector )
228 rtems_isr spectral_matrices_isr( rtems_vector_number vector )
229 {
229 {
230 // STATUS REGISTER
230 // STATUS REGISTER
231 // input_fifo_write(2) *** input_fifo_write(1) *** input_fifo_write(0)
231 // input_fifo_write(2) *** input_fifo_write(1) *** input_fifo_write(0)
232 // 10 9 8
232 // 10 9 8
233 // buffer_full ** bad_component_err ** f2_1 ** f2_0 ** f1_1 ** f1_0 ** f0_1 ** f0_0
233 // buffer_full ** bad_component_err ** f2_1 ** f2_0 ** f1_1 ** f1_0 ** f0_1 ** f0_0
234 // 7 6 5 4 3 2 1 0
234 // 7 6 5 4 3 2 1 0
235
235
236 unsigned char statusReg;
236 unsigned char statusReg;
237
237
238 statusReg = spectral_matrix_regs->status;
238 statusReg = spectral_matrix_regs->status;
239
239
240 spectral_matrices_isr_f0( statusReg );
240 spectral_matrices_isr_f0( statusReg );
241
241
242 spectral_matrices_isr_f1( statusReg );
242 spectral_matrices_isr_f1( statusReg );
243
243
244 spectral_matrices_isr_f2( statusReg );
244 spectral_matrices_isr_f2( statusReg );
245
245
246 spectral_matrix_isr_error_handler( statusReg );
246 spectral_matrix_isr_error_handler( statusReg );
247 }
247 }
248
248
249 rtems_isr spectral_matrices_isr_simu( rtems_vector_number vector )
249 rtems_isr spectral_matrices_isr_simu( rtems_vector_number vector )
250 {
250 {
251 rtems_status_code status_code;
251 rtems_status_code status_code;
252
252
253 //***
253 //***
254 // F0
254 // F0
255 nb_sm_f0 = nb_sm_f0 + 1;
255 nb_sm_f0 = nb_sm_f0 + 1;
256 if (nb_sm_f0 == NB_SM_BEFORE_AVF0 )
256 if (nb_sm_f0 == NB_SM_BEFORE_AVF0 )
257 {
257 {
258 ring_node_for_averaging_sm_f0 = current_ring_node_sm_f0;
258 ring_node_for_averaging_sm_f0 = current_ring_node_sm_f0;
259 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
259 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
260 {
260 {
261 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
261 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
262 }
262 }
263 nb_sm_f0 = 0;
263 nb_sm_f0 = 0;
264 }
264 }
265
265
266 //***
266 //***
267 // F1
267 // F1
268 nb_sm_f0_aux_f1 = nb_sm_f0_aux_f1 + 1;
268 nb_sm_f0_aux_f1 = nb_sm_f0_aux_f1 + 1;
269 if (nb_sm_f0_aux_f1 == 6)
269 if (nb_sm_f0_aux_f1 == 6)
270 {
270 {
271 nb_sm_f0_aux_f1 = 0;
271 nb_sm_f0_aux_f1 = 0;
272 nb_sm_f1 = nb_sm_f1 + 1;
272 nb_sm_f1 = nb_sm_f1 + 1;
273 }
273 }
274 if (nb_sm_f1 == NB_SM_BEFORE_AVF1 )
274 if (nb_sm_f1 == NB_SM_BEFORE_AVF1 )
275 {
275 {
276 ring_node_for_averaging_sm_f1 = current_ring_node_sm_f1;
276 ring_node_for_averaging_sm_f1 = current_ring_node_sm_f1;
277 if (rtems_event_send( Task_id[TASKID_AVF1], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
277 if (rtems_event_send( Task_id[TASKID_AVF1], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
278 {
278 {
279 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
279 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
280 }
280 }
281 nb_sm_f1 = 0;
281 nb_sm_f1 = 0;
282 }
282 }
283
283
284 //***
284 //***
285 // F2
285 // F2
286 nb_sm_f0_aux_f2 = nb_sm_f0_aux_f2 + 1;
286 nb_sm_f0_aux_f2 = nb_sm_f0_aux_f2 + 1;
287 if (nb_sm_f0_aux_f2 == 96)
287 if (nb_sm_f0_aux_f2 == 96)
288 {
288 {
289 nb_sm_f0_aux_f2 = 0;
289 nb_sm_f0_aux_f2 = 0;
290 ring_node_for_averaging_sm_f2 = current_ring_node_sm_f2;
290 ring_node_for_averaging_sm_f2 = current_ring_node_sm_f2;
291 if (rtems_event_send( Task_id[TASKID_AVF2], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
291 if (rtems_event_send( Task_id[TASKID_AVF2], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
292 {
292 {
293 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
293 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
294 }
294 }
295 }
295 }
296 }
296 }
297
297
298 //******************
298 //******************
299 // Spectral Matrices
299 // Spectral Matrices
300
300
301 void reset_nb_sm( void )
301 void reset_nb_sm( void )
302 {
302 {
303 nb_sm_f0 = 0;
303 nb_sm_f0 = 0;
304 nb_sm_f0_aux_f1 = 0;
304 nb_sm_f0_aux_f1 = 0;
305 nb_sm_f0_aux_f2 = 0;
305 nb_sm_f0_aux_f2 = 0;
306
306
307 nb_sm_f1 = 0;
307 nb_sm_f1 = 0;
308 }
308 }
309
309
310 void SM_init_rings( void )
310 void SM_init_rings( void )
311 {
311 {
312 init_ring( sm_ring_f0, NB_RING_NODES_SM_F0, sm_f0, TOTAL_SIZE_SM );
312 init_ring( sm_ring_f0, NB_RING_NODES_SM_F0, sm_f0, TOTAL_SIZE_SM );
313 init_ring( sm_ring_f1, NB_RING_NODES_SM_F1, sm_f1, TOTAL_SIZE_SM );
313 init_ring( sm_ring_f1, NB_RING_NODES_SM_F1, sm_f1, TOTAL_SIZE_SM );
314 init_ring( sm_ring_f2, NB_RING_NODES_SM_F2, sm_f2, TOTAL_SIZE_SM );
314 init_ring( sm_ring_f2, NB_RING_NODES_SM_F2, sm_f2, TOTAL_SIZE_SM );
315
315
316 DEBUG_PRINTF1("sm_ring_f0 @%x\n", (unsigned int) sm_ring_f0)
316 DEBUG_PRINTF1("sm_ring_f0 @%x\n", (unsigned int) sm_ring_f0)
317 DEBUG_PRINTF1("sm_ring_f1 @%x\n", (unsigned int) sm_ring_f1)
317 DEBUG_PRINTF1("sm_ring_f1 @%x\n", (unsigned int) sm_ring_f1)
318 DEBUG_PRINTF1("sm_ring_f2 @%x\n", (unsigned int) sm_ring_f2)
318 DEBUG_PRINTF1("sm_ring_f2 @%x\n", (unsigned int) sm_ring_f2)
319 DEBUG_PRINTF1("sm_f0 @%x\n", (unsigned int) sm_f0)
319 DEBUG_PRINTF1("sm_f0 @%x\n", (unsigned int) sm_f0)
320 DEBUG_PRINTF1("sm_f1 @%x\n", (unsigned int) sm_f1)
320 DEBUG_PRINTF1("sm_f1 @%x\n", (unsigned int) sm_f1)
321 DEBUG_PRINTF1("sm_f2 @%x\n", (unsigned int) sm_f2)
321 DEBUG_PRINTF1("sm_f2 @%x\n", (unsigned int) sm_f2)
322 }
322 }
323
323
324 void ASM_generic_init_ring( ring_node_asm *ring, unsigned char nbNodes )
324 void ASM_generic_init_ring( ring_node_asm *ring, unsigned char nbNodes )
325 {
325 {
326 unsigned char i;
326 unsigned char i;
327
327
328 ring[ nbNodes - 1 ].next
328 ring[ nbNodes - 1 ].next
329 = (ring_node_asm*) &ring[ 0 ];
329 = (ring_node_asm*) &ring[ 0 ];
330
330
331 for(i=0; i<nbNodes-1; i++)
331 for(i=0; i<nbNodes-1; i++)
332 {
332 {
333 ring[ i ].next = (ring_node_asm*) &ring[ i + 1 ];
333 ring[ i ].next = (ring_node_asm*) &ring[ i + 1 ];
334 }
334 }
335 }
335 }
336
336
337 void SM_reset_current_ring_nodes( void )
337 void SM_reset_current_ring_nodes( void )
338 {
338 {
339 current_ring_node_sm_f0 = sm_ring_f0[0].next;
339 current_ring_node_sm_f0 = sm_ring_f0[0].next;
340 current_ring_node_sm_f1 = sm_ring_f1[0].next;
340 current_ring_node_sm_f1 = sm_ring_f1[0].next;
341 current_ring_node_sm_f2 = sm_ring_f2[0].next;
341 current_ring_node_sm_f2 = sm_ring_f2[0].next;
342
342
343 ring_node_for_averaging_sm_f0 = NULL;
343 ring_node_for_averaging_sm_f0 = NULL;
344 ring_node_for_averaging_sm_f1 = NULL;
344 ring_node_for_averaging_sm_f1 = NULL;
345 ring_node_for_averaging_sm_f2 = NULL;
345 ring_node_for_averaging_sm_f2 = NULL;
346 }
346 }
347
347
348 //*****************
348 //*****************
349 // Basic Parameters
349 // Basic Parameters
350
350
351 void BP_init_header( bp_packet *packet,
351 void BP_init_header( bp_packet *packet,
352 unsigned int apid, unsigned char sid,
352 unsigned int apid, unsigned char sid,
353 unsigned int packetLength, unsigned char blkNr )
353 unsigned int packetLength, unsigned char blkNr )
354 {
354 {
355 packet->targetLogicalAddress = CCSDS_DESTINATION_ID;
355 packet->targetLogicalAddress = CCSDS_DESTINATION_ID;
356 packet->protocolIdentifier = CCSDS_PROTOCOLE_ID;
356 packet->protocolIdentifier = CCSDS_PROTOCOLE_ID;
357 packet->reserved = 0x00;
357 packet->reserved = 0x00;
358 packet->userApplication = CCSDS_USER_APP;
358 packet->userApplication = CCSDS_USER_APP;
359 packet->packetID[0] = (unsigned char) (apid >> 8);
359 packet->packetID[0] = (unsigned char) (apid >> 8);
360 packet->packetID[1] = (unsigned char) (apid);
360 packet->packetID[1] = (unsigned char) (apid);
361 packet->packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
361 packet->packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
362 packet->packetSequenceControl[1] = 0x00;
362 packet->packetSequenceControl[1] = 0x00;
363 packet->packetLength[0] = (unsigned char) (packetLength >> 8);
363 packet->packetLength[0] = (unsigned char) (packetLength >> 8);
364 packet->packetLength[1] = (unsigned char) (packetLength);
364 packet->packetLength[1] = (unsigned char) (packetLength);
365 // DATA FIELD HEADER
365 // DATA FIELD HEADER
366 packet->spare1_pusVersion_spare2 = 0x10;
366 packet->spare1_pusVersion_spare2 = 0x10;
367 packet->serviceType = TM_TYPE_LFR_SCIENCE; // service type
367 packet->serviceType = TM_TYPE_LFR_SCIENCE; // service type
368 packet->serviceSubType = TM_SUBTYPE_LFR_SCIENCE_3; // service subtype
368 packet->serviceSubType = TM_SUBTYPE_LFR_SCIENCE_3; // service subtype
369 packet->destinationID = TM_DESTINATION_ID_GROUND;
369 packet->destinationID = TM_DESTINATION_ID_GROUND;
370 packet->time[0] = 0x00;
370 packet->time[0] = 0x00;
371 packet->time[1] = 0x00;
371 packet->time[1] = 0x00;
372 packet->time[2] = 0x00;
372 packet->time[2] = 0x00;
373 packet->time[3] = 0x00;
373 packet->time[3] = 0x00;
374 packet->time[4] = 0x00;
374 packet->time[4] = 0x00;
375 packet->time[5] = 0x00;
375 packet->time[5] = 0x00;
376 // AUXILIARY DATA HEADER
376 // AUXILIARY DATA HEADER
377 packet->sid = sid;
377 packet->sid = sid;
378 packet->biaStatusInfo = 0x00;
378 packet->biaStatusInfo = 0x00;
379 packet->sy_lfr_common_parameters_spare = 0x00;
380 packet->sy_lfr_common_parameters = 0x00;
379 packet->acquisitionTime[0] = 0x00;
381 packet->acquisitionTime[0] = 0x00;
380 packet->acquisitionTime[1] = 0x00;
382 packet->acquisitionTime[1] = 0x00;
381 packet->acquisitionTime[2] = 0x00;
383 packet->acquisitionTime[2] = 0x00;
382 packet->acquisitionTime[3] = 0x00;
384 packet->acquisitionTime[3] = 0x00;
383 packet->acquisitionTime[4] = 0x00;
385 packet->acquisitionTime[4] = 0x00;
384 packet->acquisitionTime[5] = 0x00;
386 packet->acquisitionTime[5] = 0x00;
385 packet->pa_lfr_bp_blk_nr[0] = 0x00; // BLK_NR MSB
387 packet->pa_lfr_bp_blk_nr[0] = 0x00; // BLK_NR MSB
386 packet->pa_lfr_bp_blk_nr[1] = blkNr; // BLK_NR LSB
388 packet->pa_lfr_bp_blk_nr[1] = blkNr; // BLK_NR LSB
387 }
389 }
388
390
389 void BP_init_header_with_spare( bp_packet_with_spare *packet,
391 void BP_init_header_with_spare( bp_packet_with_spare *packet,
390 unsigned int apid, unsigned char sid,
392 unsigned int apid, unsigned char sid,
391 unsigned int packetLength , unsigned char blkNr)
393 unsigned int packetLength , unsigned char blkNr)
392 {
394 {
393 packet->targetLogicalAddress = CCSDS_DESTINATION_ID;
395 packet->targetLogicalAddress = CCSDS_DESTINATION_ID;
394 packet->protocolIdentifier = CCSDS_PROTOCOLE_ID;
396 packet->protocolIdentifier = CCSDS_PROTOCOLE_ID;
395 packet->reserved = 0x00;
397 packet->reserved = 0x00;
396 packet->userApplication = CCSDS_USER_APP;
398 packet->userApplication = CCSDS_USER_APP;
397 packet->packetID[0] = (unsigned char) (apid >> 8);
399 packet->packetID[0] = (unsigned char) (apid >> 8);
398 packet->packetID[1] = (unsigned char) (apid);
400 packet->packetID[1] = (unsigned char) (apid);
399 packet->packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
401 packet->packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
400 packet->packetSequenceControl[1] = 0x00;
402 packet->packetSequenceControl[1] = 0x00;
401 packet->packetLength[0] = (unsigned char) (packetLength >> 8);
403 packet->packetLength[0] = (unsigned char) (packetLength >> 8);
402 packet->packetLength[1] = (unsigned char) (packetLength);
404 packet->packetLength[1] = (unsigned char) (packetLength);
403 // DATA FIELD HEADER
405 // DATA FIELD HEADER
404 packet->spare1_pusVersion_spare2 = 0x10;
406 packet->spare1_pusVersion_spare2 = 0x10;
405 packet->serviceType = TM_TYPE_LFR_SCIENCE; // service type
407 packet->serviceType = TM_TYPE_LFR_SCIENCE; // service type
406 packet->serviceSubType = TM_SUBTYPE_LFR_SCIENCE_3; // service subtype
408 packet->serviceSubType = TM_SUBTYPE_LFR_SCIENCE_3; // service subtype
407 packet->destinationID = TM_DESTINATION_ID_GROUND;
409 packet->destinationID = TM_DESTINATION_ID_GROUND;
408 // AUXILIARY DATA HEADER
410 // AUXILIARY DATA HEADER
409 packet->sid = sid;
411 packet->sid = sid;
410 packet->biaStatusInfo = 0x00;
412 packet->biaStatusInfo = 0x00;
413 packet->sy_lfr_common_parameters_spare = 0x00;
414 packet->sy_lfr_common_parameters = 0x00;
411 packet->time[0] = 0x00;
415 packet->time[0] = 0x00;
412 packet->time[0] = 0x00;
416 packet->time[0] = 0x00;
413 packet->time[0] = 0x00;
417 packet->time[0] = 0x00;
414 packet->time[0] = 0x00;
418 packet->time[0] = 0x00;
415 packet->time[0] = 0x00;
419 packet->time[0] = 0x00;
416 packet->time[0] = 0x00;
420 packet->time[0] = 0x00;
417 packet->source_data_spare = 0x00;
421 packet->source_data_spare = 0x00;
418 packet->pa_lfr_bp_blk_nr[0] = 0x00; // BLK_NR MSB
422 packet->pa_lfr_bp_blk_nr[0] = 0x00; // BLK_NR MSB
419 packet->pa_lfr_bp_blk_nr[1] = blkNr; // BLK_NR LSB
423 packet->pa_lfr_bp_blk_nr[1] = blkNr; // BLK_NR LSB
420 }
424 }
421
425
422 void BP_send(char *data, rtems_id queue_id, unsigned int nbBytesToSend, unsigned int sid )
426 void BP_send(char *data, rtems_id queue_id, unsigned int nbBytesToSend, unsigned int sid )
423 {
427 {
424 rtems_status_code status;
428 rtems_status_code status;
425
429
426 // SET THE SEQUENCE_CNT PARAMETER
430 // SET THE SEQUENCE_CNT PARAMETER
427 increment_seq_counter_source_id( (unsigned char*) &data[ PACKET_POS_SEQUENCE_CNT ], sid );
431 increment_seq_counter_source_id( (unsigned char*) &data[ PACKET_POS_SEQUENCE_CNT ], sid );
428 // SEND PACKET
432 // SEND PACKET
429 status = rtems_message_queue_send( queue_id, data, nbBytesToSend);
433 status = rtems_message_queue_send( queue_id, data, nbBytesToSend);
430 if (status != RTEMS_SUCCESSFUL)
434 if (status != RTEMS_SUCCESSFUL)
431 {
435 {
432 printf("ERR *** in BP_send *** ERR %d\n", (int) status);
436 printf("ERR *** in BP_send *** ERR %d\n", (int) status);
433 }
437 }
434 }
438 }
435
439
436 //******************
440 //******************
437 // general functions
441 // general functions
438
442
439 void reset_sm_status( void )
443 void reset_sm_status( void )
440 {
444 {
441 // error
445 // error
442 // 10 --------------- 9 ---------------- 8 ---------------- 7 ---------
446 // 10 --------------- 9 ---------------- 8 ---------------- 7 ---------
443 // input_fif0_write_2 input_fifo_write_1 input_fifo_write_0 buffer_full
447 // input_fif0_write_2 input_fifo_write_1 input_fifo_write_0 buffer_full
444 // ---------- 5 -- 4 -- 3 -- 2 -- 1 -- 0 --
448 // ---------- 5 -- 4 -- 3 -- 2 -- 1 -- 0 --
445 // ready bits f2_1 f2_0 f1_1 f1_1 f0_1 f0_0
449 // ready bits f2_1 f2_0 f1_1 f1_1 f0_1 f0_0
446
450
447 spectral_matrix_regs->status = 0x7ff; // [0111 1111 1111]
451 spectral_matrix_regs->status = 0x7ff; // [0111 1111 1111]
448 }
452 }
449
453
450 void reset_spectral_matrix_regs( void )
454 void reset_spectral_matrix_regs( void )
451 {
455 {
452 /** This function resets the spectral matrices module registers.
456 /** This function resets the spectral matrices module registers.
453 *
457 *
454 * The registers affected by this function are located at the following offset addresses:
458 * The registers affected by this function are located at the following offset addresses:
455 *
459 *
456 * - 0x00 config
460 * - 0x00 config
457 * - 0x04 status
461 * - 0x04 status
458 * - 0x08 matrixF0_Address0
462 * - 0x08 matrixF0_Address0
459 * - 0x10 matrixFO_Address1
463 * - 0x10 matrixFO_Address1
460 * - 0x14 matrixF1_Address
464 * - 0x14 matrixF1_Address
461 * - 0x18 matrixF2_Address
465 * - 0x18 matrixF2_Address
462 *
466 *
463 */
467 */
464
468
465 set_sm_irq_onError( 0 );
469 set_sm_irq_onError( 0 );
466
470
467 set_sm_irq_onNewMatrix( 0 );
471 set_sm_irq_onNewMatrix( 0 );
468
472
469 reset_sm_status();
473 reset_sm_status();
470
474
471 // F1
475 // F1
472 spectral_matrix_regs->f0_0_address = current_ring_node_sm_f0->previous->buffer_address;
476 spectral_matrix_regs->f0_0_address = current_ring_node_sm_f0->previous->buffer_address;
473 spectral_matrix_regs->f0_1_address = current_ring_node_sm_f0->buffer_address;
477 spectral_matrix_regs->f0_1_address = current_ring_node_sm_f0->buffer_address;
474 // F2
478 // F2
475 spectral_matrix_regs->f1_0_address = current_ring_node_sm_f1->previous->buffer_address;
479 spectral_matrix_regs->f1_0_address = current_ring_node_sm_f1->previous->buffer_address;
476 spectral_matrix_regs->f1_1_address = current_ring_node_sm_f1->buffer_address;
480 spectral_matrix_regs->f1_1_address = current_ring_node_sm_f1->buffer_address;
477 // F3
481 // F3
478 spectral_matrix_regs->f2_0_address = current_ring_node_sm_f2->previous->buffer_address;
482 spectral_matrix_regs->f2_0_address = current_ring_node_sm_f2->previous->buffer_address;
479 spectral_matrix_regs->f2_1_address = current_ring_node_sm_f2->buffer_address;
483 spectral_matrix_regs->f2_1_address = current_ring_node_sm_f2->buffer_address;
480
484
481 spectral_matrix_regs->matrix_length = 0xc8; // 25 * 128 / 16 = 200 = 0xc8
485 spectral_matrix_regs->matrix_length = 0xc8; // 25 * 128 / 16 = 200 = 0xc8
482 }
486 }
483
487
484 void set_time( unsigned char *time, unsigned char * timeInBuffer )
488 void set_time( unsigned char *time, unsigned char * timeInBuffer )
485 {
489 {
486 time[0] = timeInBuffer[0];
490 time[0] = timeInBuffer[0];
487 time[1] = timeInBuffer[1];
491 time[1] = timeInBuffer[1];
488 time[2] = timeInBuffer[2];
492 time[2] = timeInBuffer[2];
489 time[3] = timeInBuffer[3];
493 time[3] = timeInBuffer[3];
490 time[4] = timeInBuffer[6];
494 time[4] = timeInBuffer[6];
491 time[5] = timeInBuffer[7];
495 time[5] = timeInBuffer[7];
492 }
496 }
493
497
494 unsigned long long int get_acquisition_time( unsigned char *timePtr )
498 unsigned long long int get_acquisition_time( unsigned char *timePtr )
495 {
499 {
496 unsigned long long int acquisitionTimeAslong;
500 unsigned long long int acquisitionTimeAslong;
497 acquisitionTimeAslong = 0x00;
501 acquisitionTimeAslong = 0x00;
498 acquisitionTimeAslong = ( (unsigned long long int) (timePtr[0] & 0x7f) << 40 ) // [0111 1111] mask the synchronization bit
502 acquisitionTimeAslong = ( (unsigned long long int) (timePtr[0] & 0x7f) << 40 ) // [0111 1111] mask the synchronization bit
499 + ( (unsigned long long int) timePtr[1] << 32 )
503 + ( (unsigned long long int) timePtr[1] << 32 )
500 + ( (unsigned long long int) timePtr[2] << 24 )
504 + ( (unsigned long long int) timePtr[2] << 24 )
501 + ( (unsigned long long int) timePtr[3] << 16 )
505 + ( (unsigned long long int) timePtr[3] << 16 )
502 + ( (unsigned long long int) timePtr[6] << 8 )
506 + ( (unsigned long long int) timePtr[6] << 8 )
503 + ( (unsigned long long int) timePtr[7] );
507 + ( (unsigned long long int) timePtr[7] );
504 return acquisitionTimeAslong;
508 return acquisitionTimeAslong;
505 }
509 }
506
510
507 unsigned char getSID( rtems_event_set event )
511 unsigned char getSID( rtems_event_set event )
508 {
512 {
509 unsigned char sid;
513 unsigned char sid;
510
514
511 rtems_event_set eventSetBURST;
515 rtems_event_set eventSetBURST;
512 rtems_event_set eventSetSBM;
516 rtems_event_set eventSetSBM;
513
517
514 //******
518 //******
515 // BURST
519 // BURST
516 eventSetBURST = RTEMS_EVENT_BURST_BP1_F0
520 eventSetBURST = RTEMS_EVENT_BURST_BP1_F0
517 | RTEMS_EVENT_BURST_BP1_F1
521 | RTEMS_EVENT_BURST_BP1_F1
518 | RTEMS_EVENT_BURST_BP2_F0
522 | RTEMS_EVENT_BURST_BP2_F0
519 | RTEMS_EVENT_BURST_BP2_F1;
523 | RTEMS_EVENT_BURST_BP2_F1;
520
524
521 //****
525 //****
522 // SBM
526 // SBM
523 eventSetSBM = RTEMS_EVENT_SBM_BP1_F0
527 eventSetSBM = RTEMS_EVENT_SBM_BP1_F0
524 | RTEMS_EVENT_SBM_BP1_F1
528 | RTEMS_EVENT_SBM_BP1_F1
525 | RTEMS_EVENT_SBM_BP2_F0
529 | RTEMS_EVENT_SBM_BP2_F0
526 | RTEMS_EVENT_SBM_BP2_F1;
530 | RTEMS_EVENT_SBM_BP2_F1;
527
531
528 if (event & eventSetBURST)
532 if (event & eventSetBURST)
529 {
533 {
530 sid = SID_BURST_BP1_F0;
534 sid = SID_BURST_BP1_F0;
531 }
535 }
532 else if (event & eventSetSBM)
536 else if (event & eventSetSBM)
533 {
537 {
534 sid = SID_SBM1_BP1_F0;
538 sid = SID_SBM1_BP1_F0;
535 }
539 }
536 else
540 else
537 {
541 {
538 sid = 0;
542 sid = 0;
539 }
543 }
540
544
541 return sid;
545 return sid;
542 }
546 }
543
547
544 void extractReImVectors( float *inputASM, float *outputASM, unsigned int asmComponent )
548 void extractReImVectors( float *inputASM, float *outputASM, unsigned int asmComponent )
545 {
549 {
546 unsigned int i;
550 unsigned int i;
547 float re;
551 float re;
548 float im;
552 float im;
549
553
550 for (i=0; i<NB_BINS_PER_SM; i++){
554 for (i=0; i<NB_BINS_PER_SM; i++){
551 re = inputASM[ (asmComponent*NB_BINS_PER_SM) + i * 2 ];
555 re = inputASM[ (asmComponent*NB_BINS_PER_SM) + i * 2 ];
552 im = inputASM[ (asmComponent*NB_BINS_PER_SM) + i * 2 + 1];
556 im = inputASM[ (asmComponent*NB_BINS_PER_SM) + i * 2 + 1];
553 outputASM[ (asmComponent *NB_BINS_PER_SM) + i] = re;
557 outputASM[ (asmComponent *NB_BINS_PER_SM) + i] = re;
554 outputASM[ (asmComponent+1)*NB_BINS_PER_SM + i] = im;
558 outputASM[ (asmComponent+1)*NB_BINS_PER_SM + i] = im;
555 }
559 }
556 }
560 }
557
561
558 void copyReVectors( float *inputASM, float *outputASM, unsigned int asmComponent )
562 void copyReVectors( float *inputASM, float *outputASM, unsigned int asmComponent )
559 {
563 {
560 unsigned int i;
564 unsigned int i;
561 float re;
565 float re;
562
566
563 for (i=0; i<NB_BINS_PER_SM; i++){
567 for (i=0; i<NB_BINS_PER_SM; i++){
564 re = inputASM[ (asmComponent*NB_BINS_PER_SM) + i];
568 re = inputASM[ (asmComponent*NB_BINS_PER_SM) + i];
565 outputASM[ (asmComponent*NB_BINS_PER_SM) + i] = re;
569 outputASM[ (asmComponent*NB_BINS_PER_SM) + i] = re;
566 }
570 }
567 }
571 }
568
572
569 void ASM_patch( float *inputASM, float *outputASM )
573 void ASM_patch( float *inputASM, float *outputASM )
570 {
574 {
571 extractReImVectors( inputASM, outputASM, 1); // b1b2
575 extractReImVectors( inputASM, outputASM, 1); // b1b2
572 extractReImVectors( inputASM, outputASM, 3 ); // b1b3
576 extractReImVectors( inputASM, outputASM, 3 ); // b1b3
573 extractReImVectors( inputASM, outputASM, 5 ); // b1e1
577 extractReImVectors( inputASM, outputASM, 5 ); // b1e1
574 extractReImVectors( inputASM, outputASM, 7 ); // b1e2
578 extractReImVectors( inputASM, outputASM, 7 ); // b1e2
575 extractReImVectors( inputASM, outputASM, 10 ); // b2b3
579 extractReImVectors( inputASM, outputASM, 10 ); // b2b3
576 extractReImVectors( inputASM, outputASM, 12 ); // b2e1
580 extractReImVectors( inputASM, outputASM, 12 ); // b2e1
577 extractReImVectors( inputASM, outputASM, 14 ); // b2e2
581 extractReImVectors( inputASM, outputASM, 14 ); // b2e2
578 extractReImVectors( inputASM, outputASM, 17 ); // b3e1
582 extractReImVectors( inputASM, outputASM, 17 ); // b3e1
579 extractReImVectors( inputASM, outputASM, 19 ); // b3e2
583 extractReImVectors( inputASM, outputASM, 19 ); // b3e2
580 extractReImVectors( inputASM, outputASM, 22 ); // e1e2
584 extractReImVectors( inputASM, outputASM, 22 ); // e1e2
581
585
582 copyReVectors(inputASM, outputASM, 0 ); // b1b1
586 copyReVectors(inputASM, outputASM, 0 ); // b1b1
583 copyReVectors(inputASM, outputASM, 9 ); // b2b2
587 copyReVectors(inputASM, outputASM, 9 ); // b2b2
584 copyReVectors(inputASM, outputASM, 16); // b3b3
588 copyReVectors(inputASM, outputASM, 16); // b3b3
585 copyReVectors(inputASM, outputASM, 21); // e1e1
589 copyReVectors(inputASM, outputASM, 21); // e1e1
586 copyReVectors(inputASM, outputASM, 24); // e2e2
590 copyReVectors(inputASM, outputASM, 24); // e2e2
587 }
591 }
588
592
589 void ASM_compress_reorganize_and_divide_mask(float *averaged_spec_mat, float *compressed_spec_mat , float divider,
593 void ASM_compress_reorganize_and_divide_mask(float *averaged_spec_mat, float *compressed_spec_mat , float divider,
590 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage, unsigned char ASMIndexStart )
594 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage, unsigned char ASMIndexStart )
591 {
595 {
592 //*************
596 //*************
593 // input format
597 // input format
594 // component0[0 .. 127] component1[0 .. 127] .. component24[0 .. 127]
598 // component0[0 .. 127] component1[0 .. 127] .. component24[0 .. 127]
595 //**************
599 //**************
596 // output format
600 // output format
597 // matr0[0 .. 24] matr1[0 .. 24] .. matr127[0 .. 24]
601 // matr0[0 .. 24] matr1[0 .. 24] .. matr127[0 .. 24]
598 //************
602 //************
599 // compression
603 // compression
600 // matr0[0 .. 24] matr1[0 .. 24] .. matr11[0 .. 24] => f0 NORM
604 // matr0[0 .. 24] matr1[0 .. 24] .. matr11[0 .. 24] => f0 NORM
601 // matr0[0 .. 24] matr1[0 .. 24] .. matr22[0 .. 24] => f0 BURST, SBM
605 // matr0[0 .. 24] matr1[0 .. 24] .. matr22[0 .. 24] => f0 BURST, SBM
602
606
603 int frequencyBin;
607 int frequencyBin;
604 int asmComponent;
608 int asmComponent;
605 int offsetASM;
609 int offsetASM;
606 int offsetCompressed;
610 int offsetCompressed;
607 int offsetFBin;
611 int offsetFBin;
608 int fBinMask;
612 int fBinMask;
609 int k;
613 int k;
610
614
611 // BUILD DATA
615 // BUILD DATA
612 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
616 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
613 {
617 {
614 for( frequencyBin = 0; frequencyBin < nbBinsCompressedMatrix; frequencyBin++ )
618 for( frequencyBin = 0; frequencyBin < nbBinsCompressedMatrix; frequencyBin++ )
615 {
619 {
616 offsetCompressed = // NO TIME OFFSET
620 offsetCompressed = // NO TIME OFFSET
617 frequencyBin * NB_VALUES_PER_SM
621 frequencyBin * NB_VALUES_PER_SM
618 + asmComponent;
622 + asmComponent;
619 offsetASM = // NO TIME OFFSET
623 offsetASM = // NO TIME OFFSET
620 asmComponent * NB_BINS_PER_SM
624 asmComponent * NB_BINS_PER_SM
621 + ASMIndexStart
625 + ASMIndexStart
622 + frequencyBin * nbBinsToAverage;
626 + frequencyBin * nbBinsToAverage;
623 offsetFBin = ASMIndexStart
627 offsetFBin = ASMIndexStart
624 + frequencyBin * nbBinsToAverage;
628 + frequencyBin * nbBinsToAverage;
625 compressed_spec_mat[ offsetCompressed ] = 0;
629 compressed_spec_mat[ offsetCompressed ] = 0;
626 for ( k = 0; k < nbBinsToAverage; k++ )
630 for ( k = 0; k < nbBinsToAverage; k++ )
627 {
631 {
628 fBinMask = getFBinMask( offsetFBin + k );
632 fBinMask = getFBinMask( offsetFBin + k );
629 compressed_spec_mat[offsetCompressed ] =
633 compressed_spec_mat[offsetCompressed ] =
630 ( compressed_spec_mat[ offsetCompressed ]
634 ( compressed_spec_mat[ offsetCompressed ]
631 + averaged_spec_mat[ offsetASM + k ] * fBinMask );
635 + averaged_spec_mat[ offsetASM + k ] * fBinMask );
632 }
636 }
633 compressed_spec_mat[ offsetCompressed ] =
637 compressed_spec_mat[ offsetCompressed ] =
634 compressed_spec_mat[ offsetCompressed ] / (divider * nbBinsToAverage);
638 compressed_spec_mat[ offsetCompressed ] / (divider * nbBinsToAverage);
635 }
639 }
636 }
640 }
637
641
638 }
642 }
639
643
640 int getFBinMask( int index )
644 int getFBinMask( int index )
641 {
645 {
642 unsigned int indexInChar;
646 unsigned int indexInChar;
643 unsigned int indexInTheChar;
647 unsigned int indexInTheChar;
644 int fbin;
648 int fbin;
645
649
646 indexInChar = index >> 3;
650 indexInChar = index >> 3;
647 indexInTheChar = index - indexInChar * 8;
651 indexInTheChar = index - indexInChar * 8;
648
652
649 fbin = (int) ((parameter_dump_packet.sy_lfr_fbins_f0_word1[ NB_BYTES_PER_FREQ_MASK - 1 - indexInChar] >> indexInTheChar) & 0x1);
653 fbin = (int) ((parameter_dump_packet.sy_lfr_fbins_f0_word1[ NB_BYTES_PER_FREQ_MASK - 1 - indexInChar] >> indexInTheChar) & 0x1);
650
654
651 return fbin;
655 return fbin;
652 }
656 }
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