@@ -1,116 +1,124 | |||||
1 | TEMPLATE = app |
|
1 | TEMPLATE = app | |
2 | # CONFIG += console v8 sim |
|
2 | # CONFIG += console v8 sim | |
3 | # CONFIG options = verbose *** boot_messages *** debug_messages *** cpu_usage_report *** stack_report *** vhdl_dev *** debug_tch |
|
3 | # CONFIG options = | |
4 | # lpp_dpu_destid |
|
4 | # verbose | |
|
5 | # boot_messages | |||
|
6 | # debug_messages | |||
|
7 | # cpu_usage_report | |||
|
8 | # stack_report | |||
|
9 | # vhdl_dev | |||
|
10 | # debug_tch | |||
|
11 | # lpp_dpu_destid REMOVE BEFORE DELIVERY TO LESIA | |||
|
12 | # debug_watchdog | |||
5 | CONFIG += console verbose lpp_dpu_destid |
|
13 | CONFIG += console verbose lpp_dpu_destid | |
6 | CONFIG -= qt |
|
14 | CONFIG -= qt | |
7 |
|
15 | |||
8 | include(./sparc.pri) |
|
16 | include(./sparc.pri) | |
9 |
|
17 | |||
10 | # flight software version |
|
18 | # flight software version | |
11 | SWVERSION=-1-0 |
|
19 | SWVERSION=-1-0 | |
12 | DEFINES += SW_VERSION_N1=3 # major |
|
20 | DEFINES += SW_VERSION_N1=3 # major | |
13 | DEFINES += SW_VERSION_N2=0 # minor |
|
21 | DEFINES += SW_VERSION_N2=0 # minor | |
14 | DEFINES += SW_VERSION_N3=0 # patch |
|
22 | DEFINES += SW_VERSION_N3=0 # patch | |
15 |
DEFINES += SW_VERSION_N4=1 |
|
23 | DEFINES += SW_VERSION_N4=14 # internal | |
16 |
|
24 | |||
17 | # <GCOV> |
|
25 | # <GCOV> | |
18 | #QMAKE_CFLAGS_RELEASE += -fprofile-arcs -ftest-coverage |
|
26 | #QMAKE_CFLAGS_RELEASE += -fprofile-arcs -ftest-coverage | |
19 | #LIBS += -lgcov /opt/GCOV/01A/lib/overload.o -lc |
|
27 | #LIBS += -lgcov /opt/GCOV/01A/lib/overload.o -lc | |
20 | # </GCOV> |
|
28 | # </GCOV> | |
21 |
|
29 | |||
22 | # <CHANGE BEFORE FLIGHT> |
|
30 | # <CHANGE BEFORE FLIGHT> | |
23 | contains( CONFIG, lpp_dpu_destid ) { |
|
31 | contains( CONFIG, lpp_dpu_destid ) { | |
24 | DEFINES += LPP_DPU_DESTID |
|
32 | DEFINES += LPP_DPU_DESTID | |
25 | } |
|
33 | } | |
26 | # </CHANGE BEFORE FLIGHT> |
|
34 | # </CHANGE BEFORE FLIGHT> | |
27 |
|
35 | |||
28 | contains( CONFIG, debug_tch ) { |
|
36 | contains( CONFIG, debug_tch ) { | |
29 | DEFINES += DEBUG_TCH |
|
37 | DEFINES += DEBUG_TCH | |
30 | } |
|
38 | } | |
31 | DEFINES += MSB_FIRST_TCH |
|
39 | DEFINES += MSB_FIRST_TCH | |
32 |
|
40 | |||
33 | contains( CONFIG, vhdl_dev ) { |
|
41 | contains( CONFIG, vhdl_dev ) { | |
34 | DEFINES += VHDL_DEV |
|
42 | DEFINES += VHDL_DEV | |
35 | } |
|
43 | } | |
36 |
|
44 | |||
37 | contains( CONFIG, verbose ) { |
|
45 | contains( CONFIG, verbose ) { | |
38 | DEFINES += PRINT_MESSAGES_ON_CONSOLE |
|
46 | DEFINES += PRINT_MESSAGES_ON_CONSOLE | |
39 | } |
|
47 | } | |
40 |
|
48 | |||
41 | contains( CONFIG, debug_messages ) { |
|
49 | contains( CONFIG, debug_messages ) { | |
42 | DEFINES += DEBUG_MESSAGES |
|
50 | DEFINES += DEBUG_MESSAGES | |
43 | } |
|
51 | } | |
44 |
|
52 | |||
45 | contains( CONFIG, cpu_usage_report ) { |
|
53 | contains( CONFIG, cpu_usage_report ) { | |
46 | DEFINES += PRINT_TASK_STATISTICS |
|
54 | DEFINES += PRINT_TASK_STATISTICS | |
47 | } |
|
55 | } | |
48 |
|
56 | |||
49 | contains( CONFIG, stack_report ) { |
|
57 | contains( CONFIG, stack_report ) { | |
50 | DEFINES += PRINT_STACK_REPORT |
|
58 | DEFINES += PRINT_STACK_REPORT | |
51 | } |
|
59 | } | |
52 |
|
60 | |||
53 | contains( CONFIG, boot_messages ) { |
|
61 | contains( CONFIG, boot_messages ) { | |
54 | DEFINES += BOOT_MESSAGES |
|
62 | DEFINES += BOOT_MESSAGES | |
55 | } |
|
63 | } | |
56 |
|
64 | |||
57 | contains( CONFIG, debug_watchdog ) { |
|
65 | contains( CONFIG, debug_watchdog ) { | |
58 | DEFINES += DEBUG_WATCHDOG |
|
66 | DEFINES += DEBUG_WATCHDOG | |
59 | } |
|
67 | } | |
60 |
|
68 | |||
61 | #doxygen.target = doxygen |
|
69 | #doxygen.target = doxygen | |
62 | #doxygen.commands = doxygen ../doc/Doxyfile |
|
70 | #doxygen.commands = doxygen ../doc/Doxyfile | |
63 | #QMAKE_EXTRA_TARGETS += doxygen |
|
71 | #QMAKE_EXTRA_TARGETS += doxygen | |
64 |
|
72 | |||
65 | TARGET = fsw |
|
73 | TARGET = fsw | |
66 |
|
74 | |||
67 | INCLUDEPATH += \ |
|
75 | INCLUDEPATH += \ | |
68 | $${PWD}/../src \ |
|
76 | $${PWD}/../src \ | |
69 | $${PWD}/../header \ |
|
77 | $${PWD}/../header \ | |
70 | $${PWD}/../header/lfr_common_headers \ |
|
78 | $${PWD}/../header/lfr_common_headers \ | |
71 | $${PWD}/../header/processing \ |
|
79 | $${PWD}/../header/processing \ | |
72 | $${PWD}/../LFR_basic-parameters |
|
80 | $${PWD}/../LFR_basic-parameters | |
73 |
|
81 | |||
74 | SOURCES += \ |
|
82 | SOURCES += \ | |
75 | ../src/wf_handler.c \ |
|
83 | ../src/wf_handler.c \ | |
76 | ../src/tc_handler.c \ |
|
84 | ../src/tc_handler.c \ | |
77 | ../src/fsw_misc.c \ |
|
85 | ../src/fsw_misc.c \ | |
78 | ../src/fsw_init.c \ |
|
86 | ../src/fsw_init.c \ | |
79 | ../src/fsw_globals.c \ |
|
87 | ../src/fsw_globals.c \ | |
80 | ../src/fsw_spacewire.c \ |
|
88 | ../src/fsw_spacewire.c \ | |
81 | ../src/tc_load_dump_parameters.c \ |
|
89 | ../src/tc_load_dump_parameters.c \ | |
82 | ../src/tm_lfr_tc_exe.c \ |
|
90 | ../src/tm_lfr_tc_exe.c \ | |
83 | ../src/tc_acceptance.c \ |
|
91 | ../src/tc_acceptance.c \ | |
84 | ../src/processing/fsw_processing.c \ |
|
92 | ../src/processing/fsw_processing.c \ | |
85 | ../src/processing/avf0_prc0.c \ |
|
93 | ../src/processing/avf0_prc0.c \ | |
86 | ../src/processing/avf1_prc1.c \ |
|
94 | ../src/processing/avf1_prc1.c \ | |
87 | ../src/processing/avf2_prc2.c \ |
|
95 | ../src/processing/avf2_prc2.c \ | |
88 | ../src/lfr_cpu_usage_report.c \ |
|
96 | ../src/lfr_cpu_usage_report.c \ | |
89 | ../LFR_basic-parameters/basic_parameters.c |
|
97 | ../LFR_basic-parameters/basic_parameters.c | |
90 |
|
98 | |||
91 | HEADERS += \ |
|
99 | HEADERS += \ | |
92 | ../header/wf_handler.h \ |
|
100 | ../header/wf_handler.h \ | |
93 | ../header/tc_handler.h \ |
|
101 | ../header/tc_handler.h \ | |
94 | ../header/grlib_regs.h \ |
|
102 | ../header/grlib_regs.h \ | |
95 | ../header/fsw_misc.h \ |
|
103 | ../header/fsw_misc.h \ | |
96 | ../header/fsw_init.h \ |
|
104 | ../header/fsw_init.h \ | |
97 | ../header/fsw_spacewire.h \ |
|
105 | ../header/fsw_spacewire.h \ | |
98 | ../header/tc_load_dump_parameters.h \ |
|
106 | ../header/tc_load_dump_parameters.h \ | |
99 | ../header/tm_lfr_tc_exe.h \ |
|
107 | ../header/tm_lfr_tc_exe.h \ | |
100 | ../header/tc_acceptance.h \ |
|
108 | ../header/tc_acceptance.h \ | |
101 | ../header/processing/fsw_processing.h \ |
|
109 | ../header/processing/fsw_processing.h \ | |
102 | ../header/processing/avf0_prc0.h \ |
|
110 | ../header/processing/avf0_prc0.h \ | |
103 | ../header/processing/avf1_prc1.h \ |
|
111 | ../header/processing/avf1_prc1.h \ | |
104 | ../header/processing/avf2_prc2.h \ |
|
112 | ../header/processing/avf2_prc2.h \ | |
105 | ../header/fsw_params_wf_handler.h \ |
|
113 | ../header/fsw_params_wf_handler.h \ | |
106 | ../header/lfr_cpu_usage_report.h \ |
|
114 | ../header/lfr_cpu_usage_report.h \ | |
107 | ../header/lfr_common_headers/ccsds_types.h \ |
|
115 | ../header/lfr_common_headers/ccsds_types.h \ | |
108 | ../header/lfr_common_headers/fsw_params.h \ |
|
116 | ../header/lfr_common_headers/fsw_params.h \ | |
109 | ../header/lfr_common_headers/fsw_params_nb_bytes.h \ |
|
117 | ../header/lfr_common_headers/fsw_params_nb_bytes.h \ | |
110 | ../header/lfr_common_headers/fsw_params_processing.h \ |
|
118 | ../header/lfr_common_headers/fsw_params_processing.h \ | |
111 | ../header/lfr_common_headers/TC_types.h \ |
|
119 | ../header/lfr_common_headers/TC_types.h \ | |
112 | ../header/lfr_common_headers/tm_byte_positions.h \ |
|
120 | ../header/lfr_common_headers/tm_byte_positions.h \ | |
113 | ../LFR_basic-parameters/basic_parameters.h \ |
|
121 | ../LFR_basic-parameters/basic_parameters.h \ | |
114 | ../LFR_basic-parameters/basic_parameters_params.h \ |
|
122 | ../LFR_basic-parameters/basic_parameters_params.h \ | |
115 | ../header/GscMemoryLPP.hpp |
|
123 | ../header/GscMemoryLPP.hpp | |
116 |
|
124 |
@@ -1,69 +1,192 | |||||
1 | #ifndef GSCMEMORY_HPP_ |
|
1 | #ifndef GSCMEMORY_HPP_ | |
2 | #define GSCMEMORY_HPP_ |
|
2 | #define GSCMEMORY_HPP_ | |
3 |
|
3 | |||
4 | #ifndef LEON3 |
|
4 | #ifndef LEON3 | |
5 | #define LEON3 |
|
5 | #define LEON3 | |
6 | #endif |
|
6 | #endif | |
7 |
|
7 | |||
8 | static unsigned int getCacheControlRegister(){ |
|
8 | #define REGS_ADDR_PLUGANDPLAY 0xFFFFF000 | |
9 | #ifdef LEON3 |
|
9 | #define ASR16_REG_ADDRESS 0x90400040 // Ancillary State Register 16 = Register protection control register (FT only) | |
10 | unsigned int cacheControlRegister = 0; |
|
10 | ||
11 | __asm__ __volatile__("lda [%%g0] 2, %0" : "=r"(cacheControlRegister) : ); |
|
11 | #define DEVICEID_LEON3 0x003 | |
12 | return cacheControlRegister; |
|
12 | #define DEVICEID_LEON3FT 0x053 | |
13 | #endif |
|
13 | #define VENDORID_GAISLER 0x01 | |
14 | } |
|
|||
15 |
|
14 | |||
16 | static void setCacheControlRegister(unsigned int cacheControlRegister) |
|
15 | // CCR | |
|
16 | #define POS_ITE 12 | |||
|
17 | #define COUNTER_FIELD_ITE 0x00003000 // 0000 0000 0000 0000 0011 0000 0000 0000 | |||
|
18 | #define COUNTER_MASK_ITE 0xffffcfff // 1111 1111 1111 1111 1100 1111 1111 1111 | |||
|
19 | #define POS_IDE 10 | |||
|
20 | #define COUNTER_FIELD_IDE 0x00000c00 // 0000 0000 0000 0000 0000 1100 0000 0000 | |||
|
21 | #define COUNTER_MASK_IDE 0xfffff3ff // 1111 1111 1111 1111 1111 0011 1111 1111 | |||
|
22 | // | |||
|
23 | #define POS_DTE 8 | |||
|
24 | #define COUNTER_FIELD_DTE 0x00000300 // 0000 0000 0000 0000 0000 0011 0000 0000 | |||
|
25 | #define COUNTER_MASK_DTE 0xfffffcff // 1111 1111 1111 1111 1111 1100 1111 1111 | |||
|
26 | #define POS_DDE 6 | |||
|
27 | #define COUNTER_FIELD_DDE 0x000000c0 // 0000 0000 0000 0000 0000 0000 1100 0000 | |||
|
28 | #define COUNTER_MASK_DDE 0xffffff3f // 1111 1111 1111 1111 1111 1111 0011 1111 | |||
|
29 | ||||
|
30 | // ASR16 | |||
|
31 | #define POS_FPRF 27 | |||
|
32 | #define COUNTER_FIELD_FPRF 0x38000000 // 0011 1000 0000 0000 0000 0000 0000 0000 | |||
|
33 | #define COUNTER_MASK_FPRF 0xc7ffffff // 1100 0111 1111 1111 1111 1111 1111 1111 | |||
|
34 | #define POS_IURF 11 | |||
|
35 | #define COUNTER_FIELD_IURF 0x00003800 // 0000 0000 0000 0000 0011 1000 0000 0000 | |||
|
36 | #define COUNTER_MASK_IURF 0xffffc7ff // 1111 1111 1111 1111 1100 0111 1111 1111 | |||
|
37 | ||||
|
38 | volatile unsigned int *asr16Ptr = (volatile unsigned int *) ASR16_REG_ADDRESS; | |||
|
39 | ||||
|
40 | static inline void flushCache() | |||
17 | { |
|
41 | { | |
18 | #ifdef LEON3 |
|
42 | /** | |
19 | __asm__ __volatile__("sta %0, [%%g0] 2" : : "r"(cacheControlRegister)); |
|
43 | * Flush the data cache and the instruction cache. | |
20 | #endif |
|
44 | * | |
21 | } |
|
45 | * @param void | |
22 |
|
46 | * | ||
|
47 | * @return void | |||
|
48 | */ | |||
23 |
|
49 | |||
24 | /** |
|
|||
25 | * Flush the data cache and the instruction cache. |
|
|||
26 | * |
|
|||
27 | * @return |
|
|||
28 | */ |
|
|||
29 | static inline void flushCache() { |
|
|||
30 | asm("flush"); |
|
50 | asm("flush"); | |
31 | } |
|
51 | } | |
32 |
|
52 | |||
33 | static void resetCacheControlRegister() { |
|
53 | //*************************** | |
34 | #ifdef LEON3 |
|
54 | // CCR Cache control register | |
|
55 | ||||
|
56 | static unsigned int CCR_getValue() | |||
|
57 | { | |||
|
58 | unsigned int cacheControlRegister = 0; | |||
|
59 | __asm__ __volatile__("lda [%%g0] 2, %0" : "=r"(cacheControlRegister) : ); | |||
|
60 | return cacheControlRegister; | |||
|
61 | } | |||
|
62 | ||||
|
63 | static void CCR_setValue(unsigned int cacheControlRegister) | |||
|
64 | { | |||
|
65 | __asm__ __volatile__("sta %0, [%%g0] 2" : : "r"(cacheControlRegister)); | |||
|
66 | } | |||
|
67 | ||||
|
68 | static void CCR_resetCacheControlRegister() | |||
|
69 | { | |||
35 | unsigned int cacheControlRegister; |
|
70 | unsigned int cacheControlRegister; | |
36 | cacheControlRegister = 0x00; |
|
71 | cacheControlRegister = 0x00; | |
37 |
|
|
72 | CCR_setValue(cacheControlRegister); | |
38 | #endif |
|
73 | } | |
|
74 | ||||
|
75 | static void CCR_enableInstructionCache() | |||
|
76 | { | |||
|
77 | // [1:0] Instruction Cache state (ICS) | |||
|
78 | // Indicates the current data cache state according to the following: X0 = disabled, 01 = frozen, 11 = enabled. | |||
|
79 | unsigned int cacheControlRegister; | |||
|
80 | cacheControlRegister = CCR_getValue(); | |||
|
81 | cacheControlRegister = (cacheControlRegister | 0x3); | |||
|
82 | CCR_setValue(cacheControlRegister); | |||
39 | } |
|
83 | } | |
40 |
|
84 | |||
41 |
static void enable |
|
85 | static void CCR_enableDataCache() | |
42 | #ifdef LEON3 |
|
86 | { | |
|
87 | // [3:2] Data Cache state (DCS) | |||
|
88 | // Indicates the current data cache state according to the following: X0 = disabled, 01 = frozen, 11 = enabled. | |||
|
89 | unsigned int cacheControlRegister; | |||
|
90 | cacheControlRegister = CCR_getValue(); | |||
|
91 | cacheControlRegister = (cacheControlRegister | 0xc); | |||
|
92 | CCR_setValue(cacheControlRegister); | |||
|
93 | } | |||
|
94 | ||||
|
95 | static void CCR_faultTolerantScheme() | |||
|
96 | { | |||
|
97 | // [20:19] FT scheme (FT) - β00β = no FT, β01β = 4-bit checking implemented | |||
43 | unsigned int cacheControlRegister; |
|
98 | unsigned int cacheControlRegister; | |
44 | cacheControlRegister = getCacheControlRegister(); |
|
99 | unsigned int *plugAndPlayRegister; | |
45 | cacheControlRegister = (cacheControlRegister | 0x3); |
|
100 | unsigned int vendorId; | |
46 | setCacheControlRegister(cacheControlRegister); |
|
101 | unsigned int deviceId; | |
47 | #endif |
|
102 | ||
|
103 | plugAndPlayRegister = (unsigned int*) REGS_ADDR_PLUGANDPLAY; | |||
|
104 | vendorId = ( (*plugAndPlayRegister) & 0xff000000 ) >> 24; | |||
|
105 | deviceId = ( (*plugAndPlayRegister) & 0x00fff000 ) >> 12; | |||
|
106 | ||||
|
107 | if( (vendorId == VENDORID_GAISLER) & (deviceId ==DEVICEID_LEON3FT) ) | |||
|
108 | { | |||
|
109 | PRINTF("in faultTolerantScheme *** Leon3FT detected, configure the CCR FT bits"); | |||
|
110 | cacheControlRegister = CCR_getValue(); | |||
|
111 | cacheControlRegister = (cacheControlRegister | 0xc); | |||
|
112 | CCR_setValue(cacheControlRegister); | |||
|
113 | } | |||
|
114 | else | |||
|
115 | { | |||
|
116 | PRINTF("in faultTolerantScheme *** not a Leon3FT, no need to configure the CCR FT bits\n"); | |||
|
117 | PRINTF2(" *** vendorID = 0x%x, deviceId = 0x%x\n", vendorId, deviceId); | |||
|
118 | } | |||
48 | } |
|
119 | } | |
49 |
|
120 | |||
50 |
static void enable |
|
121 | static void CCR_enableInstructionBurstFetch() | |
51 | #ifdef LEON3 |
|
122 | { | |
|
123 | // [16] Instruction burst fetch (IB). This bit enables burst fill during instruction fetch. | |||
52 | unsigned int cacheControlRegister; |
|
124 | unsigned int cacheControlRegister; | |
53 |
cacheControlRegister = |
|
125 | cacheControlRegister = CCR_getValue(); | |
54 | cacheControlRegister = (cacheControlRegister | 0xc); |
|
126 | // set the bit IB to 1 | |
55 |
|
|
127 | cacheControlRegister = (cacheControlRegister | 0x10000); | |
56 | #endif |
|
128 | CCR_setValue(cacheControlRegister); | |
57 | } |
|
129 | } | |
58 |
|
130 | |||
59 | static void enableInstructionBurstFetch() { |
|
131 | static void CCR_getInstructionAndDataErrorCounters( unsigned int* instructionErrorCounter, unsigned int* dataErrorCounter ) | |
60 | #ifdef LEON3 |
|
132 | { | |
|
133 | // [13:12] Instruction Tag Errors (ITE) - Number of detected parity errors in the instruction tag cache. | |||
|
134 | // Only available if fault-tolerance is enabled (FT field in this register is non-zero). | |||
|
135 | // [11:10] Instruction Data Errors (IDE) - Number of detected parity errors in the instruction data cache. | |||
|
136 | // Only available if fault-tolerance is enabled (FT field in this register is non-zero). | |||
|
137 | ||||
61 | unsigned int cacheControlRegister; |
|
138 | unsigned int cacheControlRegister; | |
62 | cacheControlRegister = getCacheControlRegister(); |
|
139 | unsigned int iTE; | |
63 | // set the bit IB to 1 |
|
140 | unsigned int iDE; | |
64 | cacheControlRegister = (cacheControlRegister | 0x10000); |
|
141 | unsigned int dTE; | |
65 | setCacheControlRegister(cacheControlRegister); |
|
142 | unsigned int dDE; | |
66 | #endif |
|
143 | ||
|
144 | cacheControlRegister = CCR_getValue(); | |||
|
145 | iTE = (cacheControlRegister & COUNTER_FIELD_ITE) >> POS_ITE; | |||
|
146 | iDE = (cacheControlRegister & COUNTER_FIELD_IDE) >> POS_IDE; | |||
|
147 | dTE = (cacheControlRegister & COUNTER_FIELD_DTE) >> POS_DTE; | |||
|
148 | dDE = (cacheControlRegister & COUNTER_FIELD_DDE) >> POS_DDE; | |||
|
149 | ||||
|
150 | *instructionErrorCounter = iTE + iDE; | |||
|
151 | *dataErrorCounter = dTE + dDE; | |||
|
152 | ||||
|
153 | // reset counters | |||
|
154 | cacheControlRegister = cacheControlRegister | |||
|
155 | & COUNTER_FIELD_ITE | |||
|
156 | & COUNTER_FIELD_IDE | |||
|
157 | & COUNTER_FIELD_DTE | |||
|
158 | & COUNTER_FIELD_DDE; | |||
|
159 | ||||
|
160 | CCR_setValue(cacheControlRegister); | |||
|
161 | } | |||
|
162 | ||||
|
163 | //******************************************* | |||
|
164 | // ASR16 Register protection control register | |||
|
165 | ||||
|
166 | static unsigned int ASR16_get_FPRF_IURF_ErrorCounters( unsigned int* fprfErrorCounter, unsigned int* iurfErrorCounter) | |||
|
167 | { | |||
|
168 | /** This function is used to retrieve the integer unit register file error counter and the floating point unit | |||
|
169 | * register file error counter | |||
|
170 | * | |||
|
171 | * @return void | |||
|
172 | * | |||
|
173 | * [29:27] FP RF error counter - Number of detected parity errors in the FP register file. | |||
|
174 | * [13:11] IU RF error counter - Number of detected parity errors in the IU register file. | |||
|
175 | * | |||
|
176 | */ | |||
|
177 | ||||
|
178 | unsigned int asr16; | |||
|
179 | ||||
|
180 | asr16 = *asr16Ptr; | |||
|
181 | *fprfErrorCounter = ( asr16 & COUNTER_FIELD_FPRF ) >> POS_FPRF; | |||
|
182 | *iurfErrorCounter = ( asr16 & COUNTER_FIELD_IURF ) >> POS_IURF; | |||
|
183 | ||||
|
184 | // reset the counter to 0 | |||
|
185 | asr16 = asr16Ptr | |||
|
186 | & COUNTER_MASK_FPRF | |||
|
187 | & COUNTER_FIELD_IURF; | |||
|
188 | ||||
|
189 | *asr16Ptr = asr16; | |||
67 | } |
|
190 | } | |
68 |
|
191 | |||
69 | #endif /* GSCMEMORY_HPP_ */ |
|
192 | #endif /* GSCMEMORY_HPP_ */ |
@@ -1,891 +1,910 | |||||
1 | /** This is the RTEMS initialization module. |
|
1 | /** This is the RTEMS initialization module. | |
2 | * |
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2 | * | |
3 | * @file |
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3 | * @file | |
4 | * @author P. LEROY |
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4 | * @author P. LEROY | |
5 | * |
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5 | * | |
6 | * This module contains two very different information: |
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6 | * This module contains two very different information: | |
7 | * - specific instructions to configure the compilation of the RTEMS executive |
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7 | * - specific instructions to configure the compilation of the RTEMS executive | |
8 | * - functions related to the fligth softwre initialization, especially the INIT RTEMS task |
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8 | * - functions related to the fligth softwre initialization, especially the INIT RTEMS task | |
9 | * |
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9 | * | |
10 | */ |
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10 | */ | |
11 |
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11 | |||
12 | //************************* |
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12 | //************************* | |
13 | // GPL reminder to be added |
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13 | // GPL reminder to be added | |
14 | //************************* |
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14 | //************************* | |
15 |
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15 | |||
16 | #include <rtems.h> |
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16 | #include <rtems.h> | |
17 |
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17 | |||
18 | /* configuration information */ |
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18 | /* configuration information */ | |
19 |
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19 | |||
20 | #define CONFIGURE_INIT |
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20 | #define CONFIGURE_INIT | |
21 |
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21 | |||
22 | #include <bsp.h> /* for device driver prototypes */ |
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22 | #include <bsp.h> /* for device driver prototypes */ | |
23 |
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23 | |||
24 | /* configuration information */ |
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24 | /* configuration information */ | |
25 |
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25 | |||
26 | #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER |
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26 | #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER | |
27 | #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER |
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27 | #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER | |
28 |
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28 | |||
29 | #define CONFIGURE_MAXIMUM_TASKS 20 |
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29 | #define CONFIGURE_MAXIMUM_TASKS 20 | |
30 | #define CONFIGURE_RTEMS_INIT_TASKS_TABLE |
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30 | #define CONFIGURE_RTEMS_INIT_TASKS_TABLE | |
31 | #define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE) |
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31 | #define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE) | |
32 | #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32 |
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32 | #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32 | |
33 | #define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100 |
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33 | #define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100 | |
34 | #define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT) |
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34 | #define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT) | |
35 | #define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT) |
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35 | #define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT) | |
36 | #define CONFIGURE_MAXIMUM_DRIVERS 16 |
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36 | #define CONFIGURE_MAXIMUM_DRIVERS 16 | |
37 | #define CONFIGURE_MAXIMUM_PERIODS 5 |
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37 | #define CONFIGURE_MAXIMUM_PERIODS 5 | |
38 | #define CONFIGURE_MAXIMUM_TIMERS 5 // [spiq] [wtdg] [spacewire_reset_link] |
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38 | #define CONFIGURE_MAXIMUM_TIMERS 5 // [spiq] [wtdg] [spacewire_reset_link] | |
39 | #define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5 |
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39 | #define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5 | |
40 | #ifdef PRINT_STACK_REPORT |
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40 | #ifdef PRINT_STACK_REPORT | |
41 | #define CONFIGURE_STACK_CHECKER_ENABLED |
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41 | #define CONFIGURE_STACK_CHECKER_ENABLED | |
42 | #endif |
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42 | #endif | |
43 |
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43 | |||
44 | #include <rtems/confdefs.h> |
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44 | #include <rtems/confdefs.h> | |
45 |
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45 | |||
46 | /* If --drvmgr was enabled during the configuration of the RTEMS kernel */ |
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46 | /* If --drvmgr was enabled during the configuration of the RTEMS kernel */ | |
47 | #ifdef RTEMS_DRVMGR_STARTUP |
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47 | #ifdef RTEMS_DRVMGR_STARTUP | |
48 | #ifdef LEON3 |
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48 | #ifdef LEON3 | |
49 | /* Add Timer and UART Driver */ |
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49 | /* Add Timer and UART Driver */ | |
50 | #ifdef CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER |
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50 | #ifdef CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER | |
51 | #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER |
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51 | #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER | |
52 | #endif |
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52 | #endif | |
53 | #ifdef CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER |
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53 | #ifdef CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER | |
54 | #define CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART |
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54 | #define CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART | |
55 | #endif |
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55 | #endif | |
56 | #endif |
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56 | #endif | |
57 | #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW /* GRSPW Driver */ |
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57 | #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW /* GRSPW Driver */ | |
58 | #include <drvmgr/drvmgr_confdefs.h> |
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58 | #include <drvmgr/drvmgr_confdefs.h> | |
59 | #endif |
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59 | #endif | |
60 |
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60 | |||
61 | #include "fsw_init.h" |
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61 | #include "fsw_init.h" | |
62 | #include "fsw_config.c" |
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62 | #include "fsw_config.c" | |
63 | #include "GscMemoryLPP.hpp" |
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63 | #include "GscMemoryLPP.hpp" | |
64 |
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64 | |||
65 | void initCache() |
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65 | void initCache() | |
66 | { |
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66 | { | |
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67 | // ASI 2 contains a few control registers that have not been assigned as ancillary state registers. | |||
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68 | // These should only be read and written using 32-bit LDA/STA instructions. | |||
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69 | // All cache registers are accessed through load/store operations to the alternate address space (LDA/STA), using ASI = 2. | |||
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70 | // The table below shows the register addresses: | |||
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71 | // 0x00 Cache control register | |||
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72 | // 0x04 Reserved | |||
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73 | // 0x08 Instruction cache configuration register | |||
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74 | // 0x0C Data cache configuration register | |||
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75 | ||||
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76 | // Cache Control Register Leon3 / Leon3FT | |||
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77 | // 31..30 29 28 27..24 23 22 21 20..19 18 17 16 | |||
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78 | // RFT PS TB DS FD FI FT ST IB | |||
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79 | // 15 14 13..12 11..10 9..8 7..6 5 4 3..2 1..0 | |||
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80 | // IP DP ITE IDE DTE DDE DF IF DCS ICS | |||
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81 | ||||
67 | unsigned int cacheControlRegister; |
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82 | unsigned int cacheControlRegister; | |
68 |
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83 | |||
69 |
cacheControlRegister = |
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84 | cacheControlRegister = CCR_getValue(); | |
70 | PRINTF1("(0) cacheControlRegister = %x\n", cacheControlRegister) |
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85 | PRINTF1("(0) cacheControlRegister = %x\n", cacheControlRegister); | |
71 |
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86 | |||
72 | resetCacheControlRegister(); |
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87 | CCR_resetCacheControlRegister(); | |
73 |
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88 | |||
74 | enableInstructionCache(); |
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89 | CCR_enableInstructionCache(); // ICS bits | |
75 | enableDataCache(); |
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90 | CCR_enableDataCache(); // DCS bits | |
76 | enableInstructionBurstFetch(); |
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91 | CCR_enableInstructionBurstFetch(); // IB bit | |
77 |
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92 | |||
78 |
cacheControlRegister = |
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93 | cacheControlRegister = CCR_getValue(); | |
79 | PRINTF1("(1) cacheControlRegister = %x\n", cacheControlRegister) |
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94 | PRINTF1("(1) cacheControlRegister = %x\n", cacheControlRegister); | |
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95 | ||||
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96 | CCR_faultTolerantScheme(); | |||
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97 | ||||
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98 | // FT activation | |||
80 | } |
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99 | } | |
81 |
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100 | |||
82 | rtems_task Init( rtems_task_argument ignored ) |
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101 | rtems_task Init( rtems_task_argument ignored ) | |
83 | { |
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102 | { | |
84 | /** This is the RTEMS INIT taks, it is the first task launched by the system. |
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103 | /** This is the RTEMS INIT taks, it is the first task launched by the system. | |
85 | * |
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104 | * | |
86 | * @param unused is the starting argument of the RTEMS task |
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105 | * @param unused is the starting argument of the RTEMS task | |
87 | * |
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106 | * | |
88 | * The INIT task create and run all other RTEMS tasks. |
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107 | * The INIT task create and run all other RTEMS tasks. | |
89 | * |
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108 | * | |
90 | */ |
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109 | */ | |
91 |
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110 | |||
92 | //*********** |
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111 | //*********** | |
93 | // INIT CACHE |
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112 | // INIT CACHE | |
94 |
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113 | |||
95 | unsigned char *vhdlVersion; |
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114 | unsigned char *vhdlVersion; | |
96 |
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115 | |||
97 | reset_lfr(); |
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116 | reset_lfr(); | |
98 |
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117 | |||
99 | reset_local_time(); |
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118 | reset_local_time(); | |
100 |
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119 | |||
101 | rtems_cpu_usage_reset(); |
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120 | rtems_cpu_usage_reset(); | |
102 |
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121 | |||
103 | rtems_status_code status; |
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122 | rtems_status_code status; | |
104 | rtems_status_code status_spw; |
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123 | rtems_status_code status_spw; | |
105 | rtems_isr_entry old_isr_handler; |
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124 | rtems_isr_entry old_isr_handler; | |
106 |
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125 | |||
107 | // UART settings |
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126 | // UART settings | |
108 | send_console_outputs_on_apbuart_port(); |
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127 | send_console_outputs_on_apbuart_port(); | |
109 | set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE); |
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128 | set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE); | |
110 | enable_apbuart_transmitter(); |
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129 | enable_apbuart_transmitter(); | |
111 |
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130 | |||
112 | DEBUG_PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n") |
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131 | DEBUG_PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n") | |
113 |
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132 | |||
114 |
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133 | |||
115 | PRINTF("\n\n\n\n\n") |
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134 | PRINTF("\n\n\n\n\n") | |
116 |
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135 | |||
117 | initCache(); |
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136 | initCache(); | |
118 |
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137 | |||
119 | PRINTF("*************************\n") |
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138 | PRINTF("*************************\n") | |
120 | PRINTF("** LFR Flight Software **\n") |
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139 | PRINTF("** LFR Flight Software **\n") | |
121 | PRINTF1("** %d.", SW_VERSION_N1) |
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140 | PRINTF1("** %d.", SW_VERSION_N1) | |
122 | PRINTF1("%d." , SW_VERSION_N2) |
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141 | PRINTF1("%d." , SW_VERSION_N2) | |
123 | PRINTF1("%d." , SW_VERSION_N3) |
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142 | PRINTF1("%d." , SW_VERSION_N3) | |
124 | PRINTF1("%d **\n", SW_VERSION_N4) |
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143 | PRINTF1("%d **\n", SW_VERSION_N4) | |
125 |
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144 | |||
126 | vhdlVersion = (unsigned char *) (REGS_ADDR_VHDL_VERSION); |
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145 | vhdlVersion = (unsigned char *) (REGS_ADDR_VHDL_VERSION); | |
127 | PRINTF("** VHDL **\n") |
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146 | PRINTF("** VHDL **\n") | |
128 | PRINTF1("** %d.", vhdlVersion[1]) |
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147 | PRINTF1("** %d.", vhdlVersion[1]) | |
129 | PRINTF1("%d." , vhdlVersion[2]) |
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148 | PRINTF1("%d." , vhdlVersion[2]) | |
130 | PRINTF1("%d **\n", vhdlVersion[3]) |
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149 | PRINTF1("%d **\n", vhdlVersion[3]) | |
131 | PRINTF("*************************\n") |
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150 | PRINTF("*************************\n") | |
132 | PRINTF("\n\n") |
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151 | PRINTF("\n\n") | |
133 |
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152 | |||
134 | init_parameter_dump(); |
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153 | init_parameter_dump(); | |
135 | init_kcoefficients_dump(); |
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154 | init_kcoefficients_dump(); | |
136 | init_local_mode_parameters(); |
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155 | init_local_mode_parameters(); | |
137 | init_housekeeping_parameters(); |
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156 | init_housekeeping_parameters(); | |
138 | init_k_coefficients_prc0(); |
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157 | init_k_coefficients_prc0(); | |
139 | init_k_coefficients_prc1(); |
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158 | init_k_coefficients_prc1(); | |
140 | init_k_coefficients_prc2(); |
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159 | init_k_coefficients_prc2(); | |
141 | pa_bia_status_info = 0x00; |
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160 | pa_bia_status_info = 0x00; | |
142 | update_last_valid_transition_date( DEFAULT_LAST_VALID_TRANSITION_DATE ); |
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161 | update_last_valid_transition_date( DEFAULT_LAST_VALID_TRANSITION_DATE ); | |
143 |
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162 | |||
144 | // waveform picker initialization |
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163 | // waveform picker initialization | |
145 | WFP_init_rings(); LEON_Clear_interrupt( IRQ_SPARC_GPTIMER_WATCHDOG ); // initialize the waveform rings |
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164 | WFP_init_rings(); LEON_Clear_interrupt( IRQ_SPARC_GPTIMER_WATCHDOG ); // initialize the waveform rings | |
146 | WFP_reset_current_ring_nodes(); |
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165 | WFP_reset_current_ring_nodes(); | |
147 | reset_waveform_picker_regs(); |
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166 | reset_waveform_picker_regs(); | |
148 |
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167 | |||
149 | // spectral matrices initialization |
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168 | // spectral matrices initialization | |
150 | SM_init_rings(); // initialize spectral matrices rings |
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169 | SM_init_rings(); // initialize spectral matrices rings | |
151 | SM_reset_current_ring_nodes(); |
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170 | SM_reset_current_ring_nodes(); | |
152 | reset_spectral_matrix_regs(); |
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171 | reset_spectral_matrix_regs(); | |
153 |
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172 | |||
154 | // configure calibration |
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173 | // configure calibration | |
155 | configureCalibration( false ); // true means interleaved mode, false is for normal mode |
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174 | configureCalibration( false ); // true means interleaved mode, false is for normal mode | |
156 |
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175 | |||
157 | updateLFRCurrentMode(); |
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176 | updateLFRCurrentMode(); | |
158 |
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177 | |||
159 | BOOT_PRINTF1("in INIT *** lfrCurrentMode is %d\n", lfrCurrentMode) |
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178 | BOOT_PRINTF1("in INIT *** lfrCurrentMode is %d\n", lfrCurrentMode) | |
160 |
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179 | |||
161 | create_names(); // create all names |
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180 | create_names(); // create all names | |
162 |
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181 | |||
163 | status = create_timecode_timer(); // create the timer used by timecode_irq_handler |
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182 | status = create_timecode_timer(); // create the timer used by timecode_irq_handler | |
164 | if (status != RTEMS_SUCCESSFUL) |
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183 | if (status != RTEMS_SUCCESSFUL) | |
165 | { |
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184 | { | |
166 | PRINTF1("in INIT *** ERR in create_timer_timecode, code %d", status) |
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185 | PRINTF1("in INIT *** ERR in create_timer_timecode, code %d", status) | |
167 | } |
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186 | } | |
168 |
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187 | |||
169 | status = create_message_queues(); // create message queues |
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188 | status = create_message_queues(); // create message queues | |
170 | if (status != RTEMS_SUCCESSFUL) |
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189 | if (status != RTEMS_SUCCESSFUL) | |
171 | { |
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190 | { | |
172 | PRINTF1("in INIT *** ERR in create_message_queues, code %d", status) |
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191 | PRINTF1("in INIT *** ERR in create_message_queues, code %d", status) | |
173 | } |
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192 | } | |
174 |
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193 | |||
175 | status = create_all_tasks(); // create all tasks |
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194 | status = create_all_tasks(); // create all tasks | |
176 | if (status != RTEMS_SUCCESSFUL) |
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195 | if (status != RTEMS_SUCCESSFUL) | |
177 | { |
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196 | { | |
178 | PRINTF1("in INIT *** ERR in create_all_tasks, code %d\n", status) |
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197 | PRINTF1("in INIT *** ERR in create_all_tasks, code %d\n", status) | |
179 | } |
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198 | } | |
180 |
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199 | |||
181 | // ************************** |
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200 | // ************************** | |
182 | // <SPACEWIRE INITIALIZATION> |
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201 | // <SPACEWIRE INITIALIZATION> | |
183 | grspw_timecode_callback = &timecode_irq_handler; |
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202 | grspw_timecode_callback = &timecode_irq_handler; | |
184 |
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203 | |||
185 | status_spw = spacewire_open_link(); // (1) open the link |
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204 | status_spw = spacewire_open_link(); // (1) open the link | |
186 | if ( status_spw != RTEMS_SUCCESSFUL ) |
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205 | if ( status_spw != RTEMS_SUCCESSFUL ) | |
187 | { |
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206 | { | |
188 | PRINTF1("in INIT *** ERR spacewire_open_link code %d\n", status_spw ) |
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207 | PRINTF1("in INIT *** ERR spacewire_open_link code %d\n", status_spw ) | |
189 | } |
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208 | } | |
190 |
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209 | |||
191 | if ( status_spw == RTEMS_SUCCESSFUL ) // (2) configure the link |
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210 | if ( status_spw == RTEMS_SUCCESSFUL ) // (2) configure the link | |
192 | { |
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211 | { | |
193 | status_spw = spacewire_configure_link( fdSPW ); |
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212 | status_spw = spacewire_configure_link( fdSPW ); | |
194 | if ( status_spw != RTEMS_SUCCESSFUL ) |
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213 | if ( status_spw != RTEMS_SUCCESSFUL ) | |
195 | { |
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214 | { | |
196 | PRINTF1("in INIT *** ERR spacewire_configure_link code %d\n", status_spw ) |
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215 | PRINTF1("in INIT *** ERR spacewire_configure_link code %d\n", status_spw ) | |
197 | } |
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216 | } | |
198 | } |
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217 | } | |
199 |
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218 | |||
200 | if ( status_spw == RTEMS_SUCCESSFUL) // (3) start the link |
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219 | if ( status_spw == RTEMS_SUCCESSFUL) // (3) start the link | |
201 | { |
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220 | { | |
202 | status_spw = spacewire_start_link( fdSPW ); |
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221 | status_spw = spacewire_start_link( fdSPW ); | |
203 | if ( status_spw != RTEMS_SUCCESSFUL ) |
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222 | if ( status_spw != RTEMS_SUCCESSFUL ) | |
204 | { |
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223 | { | |
205 | PRINTF1("in INIT *** ERR spacewire_start_link code %d\n", status_spw ) |
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224 | PRINTF1("in INIT *** ERR spacewire_start_link code %d\n", status_spw ) | |
206 | } |
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225 | } | |
207 | } |
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226 | } | |
208 | // </SPACEWIRE INITIALIZATION> |
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227 | // </SPACEWIRE INITIALIZATION> | |
209 | // *************************** |
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228 | // *************************** | |
210 |
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229 | |||
211 | status = start_all_tasks(); // start all tasks |
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230 | status = start_all_tasks(); // start all tasks | |
212 | if (status != RTEMS_SUCCESSFUL) |
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231 | if (status != RTEMS_SUCCESSFUL) | |
213 | { |
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232 | { | |
214 | PRINTF1("in INIT *** ERR in start_all_tasks, code %d", status) |
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233 | PRINTF1("in INIT *** ERR in start_all_tasks, code %d", status) | |
215 | } |
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234 | } | |
216 |
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235 | |||
217 | // start RECV and SEND *AFTER* SpaceWire Initialization, due to the timeout of the start call during the initialization |
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236 | // start RECV and SEND *AFTER* SpaceWire Initialization, due to the timeout of the start call during the initialization | |
218 | status = start_recv_send_tasks(); |
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237 | status = start_recv_send_tasks(); | |
219 | if ( status != RTEMS_SUCCESSFUL ) |
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238 | if ( status != RTEMS_SUCCESSFUL ) | |
220 | { |
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239 | { | |
221 | PRINTF1("in INIT *** ERR start_recv_send_tasks code %d\n", status ) |
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240 | PRINTF1("in INIT *** ERR start_recv_send_tasks code %d\n", status ) | |
222 | } |
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241 | } | |
223 |
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242 | |||
224 | // suspend science tasks, they will be restarted later depending on the mode |
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243 | // suspend science tasks, they will be restarted later depending on the mode | |
225 | status = suspend_science_tasks(); // suspend science tasks (not done in stop_current_mode if current mode = STANDBY) |
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244 | status = suspend_science_tasks(); // suspend science tasks (not done in stop_current_mode if current mode = STANDBY) | |
226 | if (status != RTEMS_SUCCESSFUL) |
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245 | if (status != RTEMS_SUCCESSFUL) | |
227 | { |
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246 | { | |
228 | PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status) |
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247 | PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status) | |
229 | } |
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248 | } | |
230 |
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249 | |||
231 | // configure IRQ handling for the waveform picker unit |
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250 | // configure IRQ handling for the waveform picker unit | |
232 | status = rtems_interrupt_catch( waveforms_isr, |
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251 | status = rtems_interrupt_catch( waveforms_isr, | |
233 | IRQ_SPARC_WAVEFORM_PICKER, |
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252 | IRQ_SPARC_WAVEFORM_PICKER, | |
234 | &old_isr_handler) ; |
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253 | &old_isr_handler) ; | |
235 | // configure IRQ handling for the spectral matrices unit |
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254 | // configure IRQ handling for the spectral matrices unit | |
236 | status = rtems_interrupt_catch( spectral_matrices_isr, |
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255 | status = rtems_interrupt_catch( spectral_matrices_isr, | |
237 | IRQ_SPARC_SPECTRAL_MATRIX, |
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256 | IRQ_SPARC_SPECTRAL_MATRIX, | |
238 | &old_isr_handler) ; |
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257 | &old_isr_handler) ; | |
239 |
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258 | |||
240 | // if the spacewire link is not up then send an event to the SPIQ task for link recovery |
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259 | // if the spacewire link is not up then send an event to the SPIQ task for link recovery | |
241 | if ( status_spw != RTEMS_SUCCESSFUL ) |
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260 | if ( status_spw != RTEMS_SUCCESSFUL ) | |
242 | { |
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261 | { | |
243 | status = rtems_event_send( Task_id[TASKID_SPIQ], SPW_LINKERR_EVENT ); |
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262 | status = rtems_event_send( Task_id[TASKID_SPIQ], SPW_LINKERR_EVENT ); | |
244 | if ( status != RTEMS_SUCCESSFUL ) { |
|
263 | if ( status != RTEMS_SUCCESSFUL ) { | |
245 | PRINTF1("in INIT *** ERR rtems_event_send to SPIQ code %d\n", status ) |
|
264 | PRINTF1("in INIT *** ERR rtems_event_send to SPIQ code %d\n", status ) | |
246 | } |
|
265 | } | |
247 | } |
|
266 | } | |
248 |
|
267 | |||
249 | BOOT_PRINTF("delete INIT\n") |
|
268 | BOOT_PRINTF("delete INIT\n") | |
250 |
|
269 | |||
251 | set_hk_lfr_sc_potential_flag( true ); |
|
270 | set_hk_lfr_sc_potential_flag( true ); | |
252 |
|
271 | |||
253 | status = rtems_task_delete(RTEMS_SELF); |
|
272 | status = rtems_task_delete(RTEMS_SELF); | |
254 |
|
273 | |||
255 | } |
|
274 | } | |
256 |
|
275 | |||
257 | void init_local_mode_parameters( void ) |
|
276 | void init_local_mode_parameters( void ) | |
258 | { |
|
277 | { | |
259 | /** This function initialize the param_local global variable with default values. |
|
278 | /** This function initialize the param_local global variable with default values. | |
260 | * |
|
279 | * | |
261 | */ |
|
280 | */ | |
262 |
|
281 | |||
263 | unsigned int i; |
|
282 | unsigned int i; | |
264 |
|
283 | |||
265 | // LOCAL PARAMETERS |
|
284 | // LOCAL PARAMETERS | |
266 |
|
285 | |||
267 | BOOT_PRINTF1("local_sbm1_nb_cwf_max %d \n", param_local.local_sbm1_nb_cwf_max) |
|
286 | BOOT_PRINTF1("local_sbm1_nb_cwf_max %d \n", param_local.local_sbm1_nb_cwf_max) | |
268 | BOOT_PRINTF1("local_sbm2_nb_cwf_max %d \n", param_local.local_sbm2_nb_cwf_max) |
|
287 | BOOT_PRINTF1("local_sbm2_nb_cwf_max %d \n", param_local.local_sbm2_nb_cwf_max) | |
269 | BOOT_PRINTF1("nb_interrupt_f0_MAX = %d\n", param_local.local_nb_interrupt_f0_MAX) |
|
288 | BOOT_PRINTF1("nb_interrupt_f0_MAX = %d\n", param_local.local_nb_interrupt_f0_MAX) | |
270 |
|
289 | |||
271 | // init sequence counters |
|
290 | // init sequence counters | |
272 |
|
291 | |||
273 | for(i = 0; i<SEQ_CNT_NB_DEST_ID; i++) |
|
292 | for(i = 0; i<SEQ_CNT_NB_DEST_ID; i++) | |
274 | { |
|
293 | { | |
275 | sequenceCounters_TC_EXE[i] = 0x00; |
|
294 | sequenceCounters_TC_EXE[i] = 0x00; | |
276 | sequenceCounters_TM_DUMP[i] = 0x00; |
|
295 | sequenceCounters_TM_DUMP[i] = 0x00; | |
277 | } |
|
296 | } | |
278 | sequenceCounters_SCIENCE_NORMAL_BURST = 0x00; |
|
297 | sequenceCounters_SCIENCE_NORMAL_BURST = 0x00; | |
279 | sequenceCounters_SCIENCE_SBM1_SBM2 = 0x00; |
|
298 | sequenceCounters_SCIENCE_SBM1_SBM2 = 0x00; | |
280 | sequenceCounterHK = TM_PACKET_SEQ_CTRL_STANDALONE << 8; |
|
299 | sequenceCounterHK = TM_PACKET_SEQ_CTRL_STANDALONE << 8; | |
281 | } |
|
300 | } | |
282 |
|
301 | |||
283 | void reset_local_time( void ) |
|
302 | void reset_local_time( void ) | |
284 | { |
|
303 | { | |
285 | time_management_regs->ctrl = time_management_regs->ctrl | 0x02; // [0010] software reset, coarse time = 0x80000000 |
|
304 | time_management_regs->ctrl = time_management_regs->ctrl | 0x02; // [0010] software reset, coarse time = 0x80000000 | |
286 | } |
|
305 | } | |
287 |
|
306 | |||
288 | void create_names( void ) // create all names for tasks and queues |
|
307 | void create_names( void ) // create all names for tasks and queues | |
289 | { |
|
308 | { | |
290 | /** This function creates all RTEMS names used in the software for tasks and queues. |
|
309 | /** This function creates all RTEMS names used in the software for tasks and queues. | |
291 | * |
|
310 | * | |
292 | * @return RTEMS directive status codes: |
|
311 | * @return RTEMS directive status codes: | |
293 | * - RTEMS_SUCCESSFUL - successful completion |
|
312 | * - RTEMS_SUCCESSFUL - successful completion | |
294 | * |
|
313 | * | |
295 | */ |
|
314 | */ | |
296 |
|
315 | |||
297 | // task names |
|
316 | // task names | |
298 | Task_name[TASKID_RECV] = rtems_build_name( 'R', 'E', 'C', 'V' ); |
|
317 | Task_name[TASKID_RECV] = rtems_build_name( 'R', 'E', 'C', 'V' ); | |
299 | Task_name[TASKID_ACTN] = rtems_build_name( 'A', 'C', 'T', 'N' ); |
|
318 | Task_name[TASKID_ACTN] = rtems_build_name( 'A', 'C', 'T', 'N' ); | |
300 | Task_name[TASKID_SPIQ] = rtems_build_name( 'S', 'P', 'I', 'Q' ); |
|
319 | Task_name[TASKID_SPIQ] = rtems_build_name( 'S', 'P', 'I', 'Q' ); | |
301 | Task_name[TASKID_LOAD] = rtems_build_name( 'L', 'O', 'A', 'D' ); |
|
320 | Task_name[TASKID_LOAD] = rtems_build_name( 'L', 'O', 'A', 'D' ); | |
302 | Task_name[TASKID_AVF0] = rtems_build_name( 'A', 'V', 'F', '0' ); |
|
321 | Task_name[TASKID_AVF0] = rtems_build_name( 'A', 'V', 'F', '0' ); | |
303 | Task_name[TASKID_SWBD] = rtems_build_name( 'S', 'W', 'B', 'D' ); |
|
322 | Task_name[TASKID_SWBD] = rtems_build_name( 'S', 'W', 'B', 'D' ); | |
304 | Task_name[TASKID_WFRM] = rtems_build_name( 'W', 'F', 'R', 'M' ); |
|
323 | Task_name[TASKID_WFRM] = rtems_build_name( 'W', 'F', 'R', 'M' ); | |
305 | Task_name[TASKID_DUMB] = rtems_build_name( 'D', 'U', 'M', 'B' ); |
|
324 | Task_name[TASKID_DUMB] = rtems_build_name( 'D', 'U', 'M', 'B' ); | |
306 | Task_name[TASKID_HOUS] = rtems_build_name( 'H', 'O', 'U', 'S' ); |
|
325 | Task_name[TASKID_HOUS] = rtems_build_name( 'H', 'O', 'U', 'S' ); | |
307 | Task_name[TASKID_PRC0] = rtems_build_name( 'P', 'R', 'C', '0' ); |
|
326 | Task_name[TASKID_PRC0] = rtems_build_name( 'P', 'R', 'C', '0' ); | |
308 | Task_name[TASKID_CWF3] = rtems_build_name( 'C', 'W', 'F', '3' ); |
|
327 | Task_name[TASKID_CWF3] = rtems_build_name( 'C', 'W', 'F', '3' ); | |
309 | Task_name[TASKID_CWF2] = rtems_build_name( 'C', 'W', 'F', '2' ); |
|
328 | Task_name[TASKID_CWF2] = rtems_build_name( 'C', 'W', 'F', '2' ); | |
310 | Task_name[TASKID_CWF1] = rtems_build_name( 'C', 'W', 'F', '1' ); |
|
329 | Task_name[TASKID_CWF1] = rtems_build_name( 'C', 'W', 'F', '1' ); | |
311 | Task_name[TASKID_SEND] = rtems_build_name( 'S', 'E', 'N', 'D' ); |
|
330 | Task_name[TASKID_SEND] = rtems_build_name( 'S', 'E', 'N', 'D' ); | |
312 | Task_name[TASKID_WTDG] = rtems_build_name( 'W', 'T', 'D', 'G' ); |
|
331 | Task_name[TASKID_WTDG] = rtems_build_name( 'W', 'T', 'D', 'G' ); | |
313 | Task_name[TASKID_AVF1] = rtems_build_name( 'A', 'V', 'F', '1' ); |
|
332 | Task_name[TASKID_AVF1] = rtems_build_name( 'A', 'V', 'F', '1' ); | |
314 | Task_name[TASKID_PRC1] = rtems_build_name( 'P', 'R', 'C', '1' ); |
|
333 | Task_name[TASKID_PRC1] = rtems_build_name( 'P', 'R', 'C', '1' ); | |
315 | Task_name[TASKID_AVF2] = rtems_build_name( 'A', 'V', 'F', '2' ); |
|
334 | Task_name[TASKID_AVF2] = rtems_build_name( 'A', 'V', 'F', '2' ); | |
316 | Task_name[TASKID_PRC2] = rtems_build_name( 'P', 'R', 'C', '2' ); |
|
335 | Task_name[TASKID_PRC2] = rtems_build_name( 'P', 'R', 'C', '2' ); | |
317 |
|
336 | |||
318 | // rate monotonic period names |
|
337 | // rate monotonic period names | |
319 | name_hk_rate_monotonic = rtems_build_name( 'H', 'O', 'U', 'S' ); |
|
338 | name_hk_rate_monotonic = rtems_build_name( 'H', 'O', 'U', 'S' ); | |
320 |
|
339 | |||
321 | misc_name[QUEUE_RECV] = rtems_build_name( 'Q', '_', 'R', 'V' ); |
|
340 | misc_name[QUEUE_RECV] = rtems_build_name( 'Q', '_', 'R', 'V' ); | |
322 | misc_name[QUEUE_SEND] = rtems_build_name( 'Q', '_', 'S', 'D' ); |
|
341 | misc_name[QUEUE_SEND] = rtems_build_name( 'Q', '_', 'S', 'D' ); | |
323 | misc_name[QUEUE_PRC0] = rtems_build_name( 'Q', '_', 'P', '0' ); |
|
342 | misc_name[QUEUE_PRC0] = rtems_build_name( 'Q', '_', 'P', '0' ); | |
324 | misc_name[QUEUE_PRC1] = rtems_build_name( 'Q', '_', 'P', '1' ); |
|
343 | misc_name[QUEUE_PRC1] = rtems_build_name( 'Q', '_', 'P', '1' ); | |
325 | misc_name[QUEUE_PRC2] = rtems_build_name( 'Q', '_', 'P', '2' ); |
|
344 | misc_name[QUEUE_PRC2] = rtems_build_name( 'Q', '_', 'P', '2' ); | |
326 |
|
345 | |||
327 | timecode_timer_name = rtems_build_name( 'S', 'P', 'T', 'C' ); |
|
346 | timecode_timer_name = rtems_build_name( 'S', 'P', 'T', 'C' ); | |
328 | } |
|
347 | } | |
329 |
|
348 | |||
330 | int create_all_tasks( void ) // create all tasks which run in the software |
|
349 | int create_all_tasks( void ) // create all tasks which run in the software | |
331 | { |
|
350 | { | |
332 | /** This function creates all RTEMS tasks used in the software. |
|
351 | /** This function creates all RTEMS tasks used in the software. | |
333 | * |
|
352 | * | |
334 | * @return RTEMS directive status codes: |
|
353 | * @return RTEMS directive status codes: | |
335 | * - RTEMS_SUCCESSFUL - task created successfully |
|
354 | * - RTEMS_SUCCESSFUL - task created successfully | |
336 | * - RTEMS_INVALID_ADDRESS - id is NULL |
|
355 | * - RTEMS_INVALID_ADDRESS - id is NULL | |
337 | * - RTEMS_INVALID_NAME - invalid task name |
|
356 | * - RTEMS_INVALID_NAME - invalid task name | |
338 | * - RTEMS_INVALID_PRIORITY - invalid task priority |
|
357 | * - RTEMS_INVALID_PRIORITY - invalid task priority | |
339 | * - RTEMS_MP_NOT_CONFIGURED - multiprocessing not configured |
|
358 | * - RTEMS_MP_NOT_CONFIGURED - multiprocessing not configured | |
340 | * - RTEMS_TOO_MANY - too many tasks created |
|
359 | * - RTEMS_TOO_MANY - too many tasks created | |
341 | * - RTEMS_UNSATISFIED - not enough memory for stack/FP context |
|
360 | * - RTEMS_UNSATISFIED - not enough memory for stack/FP context | |
342 | * - RTEMS_TOO_MANY - too many global objects |
|
361 | * - RTEMS_TOO_MANY - too many global objects | |
343 | * |
|
362 | * | |
344 | */ |
|
363 | */ | |
345 |
|
364 | |||
346 | rtems_status_code status; |
|
365 | rtems_status_code status; | |
347 |
|
366 | |||
348 | //********** |
|
367 | //********** | |
349 | // SPACEWIRE |
|
368 | // SPACEWIRE | |
350 | // RECV |
|
369 | // RECV | |
351 | status = rtems_task_create( |
|
370 | status = rtems_task_create( | |
352 | Task_name[TASKID_RECV], TASK_PRIORITY_RECV, RTEMS_MINIMUM_STACK_SIZE, |
|
371 | Task_name[TASKID_RECV], TASK_PRIORITY_RECV, RTEMS_MINIMUM_STACK_SIZE, | |
353 | RTEMS_DEFAULT_MODES, |
|
372 | RTEMS_DEFAULT_MODES, | |
354 | RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_RECV] |
|
373 | RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_RECV] | |
355 | ); |
|
374 | ); | |
356 | if (status == RTEMS_SUCCESSFUL) // SEND |
|
375 | if (status == RTEMS_SUCCESSFUL) // SEND | |
357 | { |
|
376 | { | |
358 | status = rtems_task_create( |
|
377 | status = rtems_task_create( | |
359 | Task_name[TASKID_SEND], TASK_PRIORITY_SEND, RTEMS_MINIMUM_STACK_SIZE * 2, |
|
378 | Task_name[TASKID_SEND], TASK_PRIORITY_SEND, RTEMS_MINIMUM_STACK_SIZE * 2, | |
360 | RTEMS_DEFAULT_MODES, |
|
379 | RTEMS_DEFAULT_MODES, | |
361 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_SEND] |
|
380 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_SEND] | |
362 | ); |
|
381 | ); | |
363 | } |
|
382 | } | |
364 | if (status == RTEMS_SUCCESSFUL) // WTDG |
|
383 | if (status == RTEMS_SUCCESSFUL) // WTDG | |
365 | { |
|
384 | { | |
366 | status = rtems_task_create( |
|
385 | status = rtems_task_create( | |
367 | Task_name[TASKID_WTDG], TASK_PRIORITY_WTDG, RTEMS_MINIMUM_STACK_SIZE, |
|
386 | Task_name[TASKID_WTDG], TASK_PRIORITY_WTDG, RTEMS_MINIMUM_STACK_SIZE, | |
368 | RTEMS_DEFAULT_MODES, |
|
387 | RTEMS_DEFAULT_MODES, | |
369 | RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_WTDG] |
|
388 | RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_WTDG] | |
370 | ); |
|
389 | ); | |
371 | } |
|
390 | } | |
372 | if (status == RTEMS_SUCCESSFUL) // ACTN |
|
391 | if (status == RTEMS_SUCCESSFUL) // ACTN | |
373 | { |
|
392 | { | |
374 | status = rtems_task_create( |
|
393 | status = rtems_task_create( | |
375 | Task_name[TASKID_ACTN], TASK_PRIORITY_ACTN, RTEMS_MINIMUM_STACK_SIZE, |
|
394 | Task_name[TASKID_ACTN], TASK_PRIORITY_ACTN, RTEMS_MINIMUM_STACK_SIZE, | |
376 | RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT, |
|
395 | RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT, | |
377 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_ACTN] |
|
396 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_ACTN] | |
378 | ); |
|
397 | ); | |
379 | } |
|
398 | } | |
380 | if (status == RTEMS_SUCCESSFUL) // SPIQ |
|
399 | if (status == RTEMS_SUCCESSFUL) // SPIQ | |
381 | { |
|
400 | { | |
382 | status = rtems_task_create( |
|
401 | status = rtems_task_create( | |
383 | Task_name[TASKID_SPIQ], TASK_PRIORITY_SPIQ, RTEMS_MINIMUM_STACK_SIZE, |
|
402 | Task_name[TASKID_SPIQ], TASK_PRIORITY_SPIQ, RTEMS_MINIMUM_STACK_SIZE, | |
384 | RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT, |
|
403 | RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT, | |
385 | RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_SPIQ] |
|
404 | RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_SPIQ] | |
386 | ); |
|
405 | ); | |
387 | } |
|
406 | } | |
388 |
|
407 | |||
389 | //****************** |
|
408 | //****************** | |
390 | // SPECTRAL MATRICES |
|
409 | // SPECTRAL MATRICES | |
391 | if (status == RTEMS_SUCCESSFUL) // AVF0 |
|
410 | if (status == RTEMS_SUCCESSFUL) // AVF0 | |
392 | { |
|
411 | { | |
393 | status = rtems_task_create( |
|
412 | status = rtems_task_create( | |
394 | Task_name[TASKID_AVF0], TASK_PRIORITY_AVF0, RTEMS_MINIMUM_STACK_SIZE, |
|
413 | Task_name[TASKID_AVF0], TASK_PRIORITY_AVF0, RTEMS_MINIMUM_STACK_SIZE, | |
395 | RTEMS_DEFAULT_MODES, |
|
414 | RTEMS_DEFAULT_MODES, | |
396 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_AVF0] |
|
415 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_AVF0] | |
397 | ); |
|
416 | ); | |
398 | } |
|
417 | } | |
399 | if (status == RTEMS_SUCCESSFUL) // PRC0 |
|
418 | if (status == RTEMS_SUCCESSFUL) // PRC0 | |
400 | { |
|
419 | { | |
401 | status = rtems_task_create( |
|
420 | status = rtems_task_create( | |
402 | Task_name[TASKID_PRC0], TASK_PRIORITY_PRC0, RTEMS_MINIMUM_STACK_SIZE * 2, |
|
421 | Task_name[TASKID_PRC0], TASK_PRIORITY_PRC0, RTEMS_MINIMUM_STACK_SIZE * 2, | |
403 | RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT, |
|
422 | RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT, | |
404 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_PRC0] |
|
423 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_PRC0] | |
405 | ); |
|
424 | ); | |
406 | } |
|
425 | } | |
407 | if (status == RTEMS_SUCCESSFUL) // AVF1 |
|
426 | if (status == RTEMS_SUCCESSFUL) // AVF1 | |
408 | { |
|
427 | { | |
409 | status = rtems_task_create( |
|
428 | status = rtems_task_create( | |
410 | Task_name[TASKID_AVF1], TASK_PRIORITY_AVF1, RTEMS_MINIMUM_STACK_SIZE, |
|
429 | Task_name[TASKID_AVF1], TASK_PRIORITY_AVF1, RTEMS_MINIMUM_STACK_SIZE, | |
411 | RTEMS_DEFAULT_MODES, |
|
430 | RTEMS_DEFAULT_MODES, | |
412 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_AVF1] |
|
431 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_AVF1] | |
413 | ); |
|
432 | ); | |
414 | } |
|
433 | } | |
415 | if (status == RTEMS_SUCCESSFUL) // PRC1 |
|
434 | if (status == RTEMS_SUCCESSFUL) // PRC1 | |
416 | { |
|
435 | { | |
417 | status = rtems_task_create( |
|
436 | status = rtems_task_create( | |
418 | Task_name[TASKID_PRC1], TASK_PRIORITY_PRC1, RTEMS_MINIMUM_STACK_SIZE * 2, |
|
437 | Task_name[TASKID_PRC1], TASK_PRIORITY_PRC1, RTEMS_MINIMUM_STACK_SIZE * 2, | |
419 | RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT, |
|
438 | RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT, | |
420 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_PRC1] |
|
439 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_PRC1] | |
421 | ); |
|
440 | ); | |
422 | } |
|
441 | } | |
423 | if (status == RTEMS_SUCCESSFUL) // AVF2 |
|
442 | if (status == RTEMS_SUCCESSFUL) // AVF2 | |
424 | { |
|
443 | { | |
425 | status = rtems_task_create( |
|
444 | status = rtems_task_create( | |
426 | Task_name[TASKID_AVF2], TASK_PRIORITY_AVF2, RTEMS_MINIMUM_STACK_SIZE, |
|
445 | Task_name[TASKID_AVF2], TASK_PRIORITY_AVF2, RTEMS_MINIMUM_STACK_SIZE, | |
427 | RTEMS_DEFAULT_MODES, |
|
446 | RTEMS_DEFAULT_MODES, | |
428 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_AVF2] |
|
447 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_AVF2] | |
429 | ); |
|
448 | ); | |
430 | } |
|
449 | } | |
431 | if (status == RTEMS_SUCCESSFUL) // PRC2 |
|
450 | if (status == RTEMS_SUCCESSFUL) // PRC2 | |
432 | { |
|
451 | { | |
433 | status = rtems_task_create( |
|
452 | status = rtems_task_create( | |
434 | Task_name[TASKID_PRC2], TASK_PRIORITY_PRC2, RTEMS_MINIMUM_STACK_SIZE * 2, |
|
453 | Task_name[TASKID_PRC2], TASK_PRIORITY_PRC2, RTEMS_MINIMUM_STACK_SIZE * 2, | |
435 | RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT, |
|
454 | RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT, | |
436 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_PRC2] |
|
455 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_PRC2] | |
437 | ); |
|
456 | ); | |
438 | } |
|
457 | } | |
439 |
|
458 | |||
440 | //**************** |
|
459 | //**************** | |
441 | // WAVEFORM PICKER |
|
460 | // WAVEFORM PICKER | |
442 | if (status == RTEMS_SUCCESSFUL) // WFRM |
|
461 | if (status == RTEMS_SUCCESSFUL) // WFRM | |
443 | { |
|
462 | { | |
444 | status = rtems_task_create( |
|
463 | status = rtems_task_create( | |
445 | Task_name[TASKID_WFRM], TASK_PRIORITY_WFRM, RTEMS_MINIMUM_STACK_SIZE, |
|
464 | Task_name[TASKID_WFRM], TASK_PRIORITY_WFRM, RTEMS_MINIMUM_STACK_SIZE, | |
446 | RTEMS_DEFAULT_MODES, |
|
465 | RTEMS_DEFAULT_MODES, | |
447 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_WFRM] |
|
466 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_WFRM] | |
448 | ); |
|
467 | ); | |
449 | } |
|
468 | } | |
450 | if (status == RTEMS_SUCCESSFUL) // CWF3 |
|
469 | if (status == RTEMS_SUCCESSFUL) // CWF3 | |
451 | { |
|
470 | { | |
452 | status = rtems_task_create( |
|
471 | status = rtems_task_create( | |
453 | Task_name[TASKID_CWF3], TASK_PRIORITY_CWF3, RTEMS_MINIMUM_STACK_SIZE, |
|
472 | Task_name[TASKID_CWF3], TASK_PRIORITY_CWF3, RTEMS_MINIMUM_STACK_SIZE, | |
454 | RTEMS_DEFAULT_MODES, |
|
473 | RTEMS_DEFAULT_MODES, | |
455 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_CWF3] |
|
474 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_CWF3] | |
456 | ); |
|
475 | ); | |
457 | } |
|
476 | } | |
458 | if (status == RTEMS_SUCCESSFUL) // CWF2 |
|
477 | if (status == RTEMS_SUCCESSFUL) // CWF2 | |
459 | { |
|
478 | { | |
460 | status = rtems_task_create( |
|
479 | status = rtems_task_create( | |
461 | Task_name[TASKID_CWF2], TASK_PRIORITY_CWF2, RTEMS_MINIMUM_STACK_SIZE, |
|
480 | Task_name[TASKID_CWF2], TASK_PRIORITY_CWF2, RTEMS_MINIMUM_STACK_SIZE, | |
462 | RTEMS_DEFAULT_MODES, |
|
481 | RTEMS_DEFAULT_MODES, | |
463 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_CWF2] |
|
482 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_CWF2] | |
464 | ); |
|
483 | ); | |
465 | } |
|
484 | } | |
466 | if (status == RTEMS_SUCCESSFUL) // CWF1 |
|
485 | if (status == RTEMS_SUCCESSFUL) // CWF1 | |
467 | { |
|
486 | { | |
468 | status = rtems_task_create( |
|
487 | status = rtems_task_create( | |
469 | Task_name[TASKID_CWF1], TASK_PRIORITY_CWF1, RTEMS_MINIMUM_STACK_SIZE, |
|
488 | Task_name[TASKID_CWF1], TASK_PRIORITY_CWF1, RTEMS_MINIMUM_STACK_SIZE, | |
470 | RTEMS_DEFAULT_MODES, |
|
489 | RTEMS_DEFAULT_MODES, | |
471 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_CWF1] |
|
490 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_CWF1] | |
472 | ); |
|
491 | ); | |
473 | } |
|
492 | } | |
474 | if (status == RTEMS_SUCCESSFUL) // SWBD |
|
493 | if (status == RTEMS_SUCCESSFUL) // SWBD | |
475 | { |
|
494 | { | |
476 | status = rtems_task_create( |
|
495 | status = rtems_task_create( | |
477 | Task_name[TASKID_SWBD], TASK_PRIORITY_SWBD, RTEMS_MINIMUM_STACK_SIZE, |
|
496 | Task_name[TASKID_SWBD], TASK_PRIORITY_SWBD, RTEMS_MINIMUM_STACK_SIZE, | |
478 | RTEMS_DEFAULT_MODES, |
|
497 | RTEMS_DEFAULT_MODES, | |
479 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_SWBD] |
|
498 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_SWBD] | |
480 | ); |
|
499 | ); | |
481 | } |
|
500 | } | |
482 |
|
501 | |||
483 | //***** |
|
502 | //***** | |
484 | // MISC |
|
503 | // MISC | |
485 | if (status == RTEMS_SUCCESSFUL) // LOAD |
|
504 | if (status == RTEMS_SUCCESSFUL) // LOAD | |
486 | { |
|
505 | { | |
487 | status = rtems_task_create( |
|
506 | status = rtems_task_create( | |
488 | Task_name[TASKID_LOAD], TASK_PRIORITY_LOAD, RTEMS_MINIMUM_STACK_SIZE, |
|
507 | Task_name[TASKID_LOAD], TASK_PRIORITY_LOAD, RTEMS_MINIMUM_STACK_SIZE, | |
489 | RTEMS_DEFAULT_MODES, |
|
508 | RTEMS_DEFAULT_MODES, | |
490 | RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_LOAD] |
|
509 | RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_LOAD] | |
491 | ); |
|
510 | ); | |
492 | } |
|
511 | } | |
493 | if (status == RTEMS_SUCCESSFUL) // DUMB |
|
512 | if (status == RTEMS_SUCCESSFUL) // DUMB | |
494 | { |
|
513 | { | |
495 | status = rtems_task_create( |
|
514 | status = rtems_task_create( | |
496 | Task_name[TASKID_DUMB], TASK_PRIORITY_DUMB, RTEMS_MINIMUM_STACK_SIZE, |
|
515 | Task_name[TASKID_DUMB], TASK_PRIORITY_DUMB, RTEMS_MINIMUM_STACK_SIZE, | |
497 | RTEMS_DEFAULT_MODES, |
|
516 | RTEMS_DEFAULT_MODES, | |
498 | RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_DUMB] |
|
517 | RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_DUMB] | |
499 | ); |
|
518 | ); | |
500 | } |
|
519 | } | |
501 | if (status == RTEMS_SUCCESSFUL) // HOUS |
|
520 | if (status == RTEMS_SUCCESSFUL) // HOUS | |
502 | { |
|
521 | { | |
503 | status = rtems_task_create( |
|
522 | status = rtems_task_create( | |
504 | Task_name[TASKID_HOUS], TASK_PRIORITY_HOUS, RTEMS_MINIMUM_STACK_SIZE, |
|
523 | Task_name[TASKID_HOUS], TASK_PRIORITY_HOUS, RTEMS_MINIMUM_STACK_SIZE, | |
505 | RTEMS_DEFAULT_MODES, |
|
524 | RTEMS_DEFAULT_MODES, | |
506 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_HOUS] |
|
525 | RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_HOUS] | |
507 | ); |
|
526 | ); | |
508 | } |
|
527 | } | |
509 |
|
528 | |||
510 | return status; |
|
529 | return status; | |
511 | } |
|
530 | } | |
512 |
|
531 | |||
513 | int start_recv_send_tasks( void ) |
|
532 | int start_recv_send_tasks( void ) | |
514 | { |
|
533 | { | |
515 | rtems_status_code status; |
|
534 | rtems_status_code status; | |
516 |
|
535 | |||
517 | status = rtems_task_start( Task_id[TASKID_RECV], recv_task, 1 ); |
|
536 | status = rtems_task_start( Task_id[TASKID_RECV], recv_task, 1 ); | |
518 | if (status!=RTEMS_SUCCESSFUL) { |
|
537 | if (status!=RTEMS_SUCCESSFUL) { | |
519 | BOOT_PRINTF("in INIT *** Error starting TASK_RECV\n") |
|
538 | BOOT_PRINTF("in INIT *** Error starting TASK_RECV\n") | |
520 | } |
|
539 | } | |
521 |
|
540 | |||
522 | if (status == RTEMS_SUCCESSFUL) // SEND |
|
541 | if (status == RTEMS_SUCCESSFUL) // SEND | |
523 | { |
|
542 | { | |
524 | status = rtems_task_start( Task_id[TASKID_SEND], send_task, 1 ); |
|
543 | status = rtems_task_start( Task_id[TASKID_SEND], send_task, 1 ); | |
525 | if (status!=RTEMS_SUCCESSFUL) { |
|
544 | if (status!=RTEMS_SUCCESSFUL) { | |
526 | BOOT_PRINTF("in INIT *** Error starting TASK_SEND\n") |
|
545 | BOOT_PRINTF("in INIT *** Error starting TASK_SEND\n") | |
527 | } |
|
546 | } | |
528 | } |
|
547 | } | |
529 |
|
548 | |||
530 | return status; |
|
549 | return status; | |
531 | } |
|
550 | } | |
532 |
|
551 | |||
533 | int start_all_tasks( void ) // start all tasks except SEND RECV and HOUS |
|
552 | int start_all_tasks( void ) // start all tasks except SEND RECV and HOUS | |
534 | { |
|
553 | { | |
535 | /** This function starts all RTEMS tasks used in the software. |
|
554 | /** This function starts all RTEMS tasks used in the software. | |
536 | * |
|
555 | * | |
537 | * @return RTEMS directive status codes: |
|
556 | * @return RTEMS directive status codes: | |
538 | * - RTEMS_SUCCESSFUL - ask started successfully |
|
557 | * - RTEMS_SUCCESSFUL - ask started successfully | |
539 | * - RTEMS_INVALID_ADDRESS - invalid task entry point |
|
558 | * - RTEMS_INVALID_ADDRESS - invalid task entry point | |
540 | * - RTEMS_INVALID_ID - invalid task id |
|
559 | * - RTEMS_INVALID_ID - invalid task id | |
541 | * - RTEMS_INCORRECT_STATE - task not in the dormant state |
|
560 | * - RTEMS_INCORRECT_STATE - task not in the dormant state | |
542 | * - RTEMS_ILLEGAL_ON_REMOTE_OBJECT - cannot start remote task |
|
561 | * - RTEMS_ILLEGAL_ON_REMOTE_OBJECT - cannot start remote task | |
543 | * |
|
562 | * | |
544 | */ |
|
563 | */ | |
545 | // starts all the tasks fot eh flight software |
|
564 | // starts all the tasks fot eh flight software | |
546 |
|
565 | |||
547 | rtems_status_code status; |
|
566 | rtems_status_code status; | |
548 |
|
567 | |||
549 | //********** |
|
568 | //********** | |
550 | // SPACEWIRE |
|
569 | // SPACEWIRE | |
551 | status = rtems_task_start( Task_id[TASKID_SPIQ], spiq_task, 1 ); |
|
570 | status = rtems_task_start( Task_id[TASKID_SPIQ], spiq_task, 1 ); | |
552 | if (status!=RTEMS_SUCCESSFUL) { |
|
571 | if (status!=RTEMS_SUCCESSFUL) { | |
553 | BOOT_PRINTF("in INIT *** Error starting TASK_SPIQ\n") |
|
572 | BOOT_PRINTF("in INIT *** Error starting TASK_SPIQ\n") | |
554 | } |
|
573 | } | |
555 |
|
574 | |||
556 | if (status == RTEMS_SUCCESSFUL) // WTDG |
|
575 | if (status == RTEMS_SUCCESSFUL) // WTDG | |
557 | { |
|
576 | { | |
558 | status = rtems_task_start( Task_id[TASKID_WTDG], wtdg_task, 1 ); |
|
577 | status = rtems_task_start( Task_id[TASKID_WTDG], wtdg_task, 1 ); | |
559 | if (status!=RTEMS_SUCCESSFUL) { |
|
578 | if (status!=RTEMS_SUCCESSFUL) { | |
560 | BOOT_PRINTF("in INIT *** Error starting TASK_WTDG\n") |
|
579 | BOOT_PRINTF("in INIT *** Error starting TASK_WTDG\n") | |
561 | } |
|
580 | } | |
562 | } |
|
581 | } | |
563 |
|
582 | |||
564 | if (status == RTEMS_SUCCESSFUL) // ACTN |
|
583 | if (status == RTEMS_SUCCESSFUL) // ACTN | |
565 | { |
|
584 | { | |
566 | status = rtems_task_start( Task_id[TASKID_ACTN], actn_task, 1 ); |
|
585 | status = rtems_task_start( Task_id[TASKID_ACTN], actn_task, 1 ); | |
567 | if (status!=RTEMS_SUCCESSFUL) { |
|
586 | if (status!=RTEMS_SUCCESSFUL) { | |
568 | BOOT_PRINTF("in INIT *** Error starting TASK_ACTN\n") |
|
587 | BOOT_PRINTF("in INIT *** Error starting TASK_ACTN\n") | |
569 | } |
|
588 | } | |
570 | } |
|
589 | } | |
571 |
|
590 | |||
572 | //****************** |
|
591 | //****************** | |
573 | // SPECTRAL MATRICES |
|
592 | // SPECTRAL MATRICES | |
574 | if (status == RTEMS_SUCCESSFUL) // AVF0 |
|
593 | if (status == RTEMS_SUCCESSFUL) // AVF0 | |
575 | { |
|
594 | { | |
576 | status = rtems_task_start( Task_id[TASKID_AVF0], avf0_task, LFR_MODE_STANDBY ); |
|
595 | status = rtems_task_start( Task_id[TASKID_AVF0], avf0_task, LFR_MODE_STANDBY ); | |
577 | if (status!=RTEMS_SUCCESSFUL) { |
|
596 | if (status!=RTEMS_SUCCESSFUL) { | |
578 | BOOT_PRINTF("in INIT *** Error starting TASK_AVF0\n") |
|
597 | BOOT_PRINTF("in INIT *** Error starting TASK_AVF0\n") | |
579 | } |
|
598 | } | |
580 | } |
|
599 | } | |
581 | if (status == RTEMS_SUCCESSFUL) // PRC0 |
|
600 | if (status == RTEMS_SUCCESSFUL) // PRC0 | |
582 | { |
|
601 | { | |
583 | status = rtems_task_start( Task_id[TASKID_PRC0], prc0_task, LFR_MODE_STANDBY ); |
|
602 | status = rtems_task_start( Task_id[TASKID_PRC0], prc0_task, LFR_MODE_STANDBY ); | |
584 | if (status!=RTEMS_SUCCESSFUL) { |
|
603 | if (status!=RTEMS_SUCCESSFUL) { | |
585 | BOOT_PRINTF("in INIT *** Error starting TASK_PRC0\n") |
|
604 | BOOT_PRINTF("in INIT *** Error starting TASK_PRC0\n") | |
586 | } |
|
605 | } | |
587 | } |
|
606 | } | |
588 | if (status == RTEMS_SUCCESSFUL) // AVF1 |
|
607 | if (status == RTEMS_SUCCESSFUL) // AVF1 | |
589 | { |
|
608 | { | |
590 | status = rtems_task_start( Task_id[TASKID_AVF1], avf1_task, LFR_MODE_STANDBY ); |
|
609 | status = rtems_task_start( Task_id[TASKID_AVF1], avf1_task, LFR_MODE_STANDBY ); | |
591 | if (status!=RTEMS_SUCCESSFUL) { |
|
610 | if (status!=RTEMS_SUCCESSFUL) { | |
592 | BOOT_PRINTF("in INIT *** Error starting TASK_AVF1\n") |
|
611 | BOOT_PRINTF("in INIT *** Error starting TASK_AVF1\n") | |
593 | } |
|
612 | } | |
594 | } |
|
613 | } | |
595 | if (status == RTEMS_SUCCESSFUL) // PRC1 |
|
614 | if (status == RTEMS_SUCCESSFUL) // PRC1 | |
596 | { |
|
615 | { | |
597 | status = rtems_task_start( Task_id[TASKID_PRC1], prc1_task, LFR_MODE_STANDBY ); |
|
616 | status = rtems_task_start( Task_id[TASKID_PRC1], prc1_task, LFR_MODE_STANDBY ); | |
598 | if (status!=RTEMS_SUCCESSFUL) { |
|
617 | if (status!=RTEMS_SUCCESSFUL) { | |
599 | BOOT_PRINTF("in INIT *** Error starting TASK_PRC1\n") |
|
618 | BOOT_PRINTF("in INIT *** Error starting TASK_PRC1\n") | |
600 | } |
|
619 | } | |
601 | } |
|
620 | } | |
602 | if (status == RTEMS_SUCCESSFUL) // AVF2 |
|
621 | if (status == RTEMS_SUCCESSFUL) // AVF2 | |
603 | { |
|
622 | { | |
604 | status = rtems_task_start( Task_id[TASKID_AVF2], avf2_task, 1 ); |
|
623 | status = rtems_task_start( Task_id[TASKID_AVF2], avf2_task, 1 ); | |
605 | if (status!=RTEMS_SUCCESSFUL) { |
|
624 | if (status!=RTEMS_SUCCESSFUL) { | |
606 | BOOT_PRINTF("in INIT *** Error starting TASK_AVF2\n") |
|
625 | BOOT_PRINTF("in INIT *** Error starting TASK_AVF2\n") | |
607 | } |
|
626 | } | |
608 | } |
|
627 | } | |
609 | if (status == RTEMS_SUCCESSFUL) // PRC2 |
|
628 | if (status == RTEMS_SUCCESSFUL) // PRC2 | |
610 | { |
|
629 | { | |
611 | status = rtems_task_start( Task_id[TASKID_PRC2], prc2_task, 1 ); |
|
630 | status = rtems_task_start( Task_id[TASKID_PRC2], prc2_task, 1 ); | |
612 | if (status!=RTEMS_SUCCESSFUL) { |
|
631 | if (status!=RTEMS_SUCCESSFUL) { | |
613 | BOOT_PRINTF("in INIT *** Error starting TASK_PRC2\n") |
|
632 | BOOT_PRINTF("in INIT *** Error starting TASK_PRC2\n") | |
614 | } |
|
633 | } | |
615 | } |
|
634 | } | |
616 |
|
635 | |||
617 | //**************** |
|
636 | //**************** | |
618 | // WAVEFORM PICKER |
|
637 | // WAVEFORM PICKER | |
619 | if (status == RTEMS_SUCCESSFUL) // WFRM |
|
638 | if (status == RTEMS_SUCCESSFUL) // WFRM | |
620 | { |
|
639 | { | |
621 | status = rtems_task_start( Task_id[TASKID_WFRM], wfrm_task, 1 ); |
|
640 | status = rtems_task_start( Task_id[TASKID_WFRM], wfrm_task, 1 ); | |
622 | if (status!=RTEMS_SUCCESSFUL) { |
|
641 | if (status!=RTEMS_SUCCESSFUL) { | |
623 | BOOT_PRINTF("in INIT *** Error starting TASK_WFRM\n") |
|
642 | BOOT_PRINTF("in INIT *** Error starting TASK_WFRM\n") | |
624 | } |
|
643 | } | |
625 | } |
|
644 | } | |
626 | if (status == RTEMS_SUCCESSFUL) // CWF3 |
|
645 | if (status == RTEMS_SUCCESSFUL) // CWF3 | |
627 | { |
|
646 | { | |
628 | status = rtems_task_start( Task_id[TASKID_CWF3], cwf3_task, 1 ); |
|
647 | status = rtems_task_start( Task_id[TASKID_CWF3], cwf3_task, 1 ); | |
629 | if (status!=RTEMS_SUCCESSFUL) { |
|
648 | if (status!=RTEMS_SUCCESSFUL) { | |
630 | BOOT_PRINTF("in INIT *** Error starting TASK_CWF3\n") |
|
649 | BOOT_PRINTF("in INIT *** Error starting TASK_CWF3\n") | |
631 | } |
|
650 | } | |
632 | } |
|
651 | } | |
633 | if (status == RTEMS_SUCCESSFUL) // CWF2 |
|
652 | if (status == RTEMS_SUCCESSFUL) // CWF2 | |
634 | { |
|
653 | { | |
635 | status = rtems_task_start( Task_id[TASKID_CWF2], cwf2_task, 1 ); |
|
654 | status = rtems_task_start( Task_id[TASKID_CWF2], cwf2_task, 1 ); | |
636 | if (status!=RTEMS_SUCCESSFUL) { |
|
655 | if (status!=RTEMS_SUCCESSFUL) { | |
637 | BOOT_PRINTF("in INIT *** Error starting TASK_CWF2\n") |
|
656 | BOOT_PRINTF("in INIT *** Error starting TASK_CWF2\n") | |
638 | } |
|
657 | } | |
639 | } |
|
658 | } | |
640 | if (status == RTEMS_SUCCESSFUL) // CWF1 |
|
659 | if (status == RTEMS_SUCCESSFUL) // CWF1 | |
641 | { |
|
660 | { | |
642 | status = rtems_task_start( Task_id[TASKID_CWF1], cwf1_task, 1 ); |
|
661 | status = rtems_task_start( Task_id[TASKID_CWF1], cwf1_task, 1 ); | |
643 | if (status!=RTEMS_SUCCESSFUL) { |
|
662 | if (status!=RTEMS_SUCCESSFUL) { | |
644 | BOOT_PRINTF("in INIT *** Error starting TASK_CWF1\n") |
|
663 | BOOT_PRINTF("in INIT *** Error starting TASK_CWF1\n") | |
645 | } |
|
664 | } | |
646 | } |
|
665 | } | |
647 | if (status == RTEMS_SUCCESSFUL) // SWBD |
|
666 | if (status == RTEMS_SUCCESSFUL) // SWBD | |
648 | { |
|
667 | { | |
649 | status = rtems_task_start( Task_id[TASKID_SWBD], swbd_task, 1 ); |
|
668 | status = rtems_task_start( Task_id[TASKID_SWBD], swbd_task, 1 ); | |
650 | if (status!=RTEMS_SUCCESSFUL) { |
|
669 | if (status!=RTEMS_SUCCESSFUL) { | |
651 | BOOT_PRINTF("in INIT *** Error starting TASK_SWBD\n") |
|
670 | BOOT_PRINTF("in INIT *** Error starting TASK_SWBD\n") | |
652 | } |
|
671 | } | |
653 | } |
|
672 | } | |
654 |
|
673 | |||
655 | //***** |
|
674 | //***** | |
656 | // MISC |
|
675 | // MISC | |
657 | if (status == RTEMS_SUCCESSFUL) // HOUS |
|
676 | if (status == RTEMS_SUCCESSFUL) // HOUS | |
658 | { |
|
677 | { | |
659 | status = rtems_task_start( Task_id[TASKID_HOUS], hous_task, 1 ); |
|
678 | status = rtems_task_start( Task_id[TASKID_HOUS], hous_task, 1 ); | |
660 | if (status!=RTEMS_SUCCESSFUL) { |
|
679 | if (status!=RTEMS_SUCCESSFUL) { | |
661 | BOOT_PRINTF("in INIT *** Error starting TASK_HOUS\n") |
|
680 | BOOT_PRINTF("in INIT *** Error starting TASK_HOUS\n") | |
662 | } |
|
681 | } | |
663 | } |
|
682 | } | |
664 | if (status == RTEMS_SUCCESSFUL) // DUMB |
|
683 | if (status == RTEMS_SUCCESSFUL) // DUMB | |
665 | { |
|
684 | { | |
666 | status = rtems_task_start( Task_id[TASKID_DUMB], dumb_task, 1 ); |
|
685 | status = rtems_task_start( Task_id[TASKID_DUMB], dumb_task, 1 ); | |
667 | if (status!=RTEMS_SUCCESSFUL) { |
|
686 | if (status!=RTEMS_SUCCESSFUL) { | |
668 | BOOT_PRINTF("in INIT *** Error starting TASK_DUMB\n") |
|
687 | BOOT_PRINTF("in INIT *** Error starting TASK_DUMB\n") | |
669 | } |
|
688 | } | |
670 | } |
|
689 | } | |
671 | if (status == RTEMS_SUCCESSFUL) // LOAD |
|
690 | if (status == RTEMS_SUCCESSFUL) // LOAD | |
672 | { |
|
691 | { | |
673 | status = rtems_task_start( Task_id[TASKID_LOAD], load_task, 1 ); |
|
692 | status = rtems_task_start( Task_id[TASKID_LOAD], load_task, 1 ); | |
674 | if (status!=RTEMS_SUCCESSFUL) { |
|
693 | if (status!=RTEMS_SUCCESSFUL) { | |
675 | BOOT_PRINTF("in INIT *** Error starting TASK_LOAD\n") |
|
694 | BOOT_PRINTF("in INIT *** Error starting TASK_LOAD\n") | |
676 | } |
|
695 | } | |
677 | } |
|
696 | } | |
678 |
|
697 | |||
679 | return status; |
|
698 | return status; | |
680 | } |
|
699 | } | |
681 |
|
700 | |||
682 | rtems_status_code create_message_queues( void ) // create the two message queues used in the software |
|
701 | rtems_status_code create_message_queues( void ) // create the two message queues used in the software | |
683 | { |
|
702 | { | |
684 | rtems_status_code status_recv; |
|
703 | rtems_status_code status_recv; | |
685 | rtems_status_code status_send; |
|
704 | rtems_status_code status_send; | |
686 | rtems_status_code status_q_p0; |
|
705 | rtems_status_code status_q_p0; | |
687 | rtems_status_code status_q_p1; |
|
706 | rtems_status_code status_q_p1; | |
688 | rtems_status_code status_q_p2; |
|
707 | rtems_status_code status_q_p2; | |
689 | rtems_status_code ret; |
|
708 | rtems_status_code ret; | |
690 | rtems_id queue_id; |
|
709 | rtems_id queue_id; | |
691 |
|
710 | |||
692 | //**************************************** |
|
711 | //**************************************** | |
693 | // create the queue for handling valid TCs |
|
712 | // create the queue for handling valid TCs | |
694 | status_recv = rtems_message_queue_create( misc_name[QUEUE_RECV], |
|
713 | status_recv = rtems_message_queue_create( misc_name[QUEUE_RECV], | |
695 | MSG_QUEUE_COUNT_RECV, CCSDS_TC_PKT_MAX_SIZE, |
|
714 | MSG_QUEUE_COUNT_RECV, CCSDS_TC_PKT_MAX_SIZE, | |
696 | RTEMS_FIFO | RTEMS_LOCAL, &queue_id ); |
|
715 | RTEMS_FIFO | RTEMS_LOCAL, &queue_id ); | |
697 | if ( status_recv != RTEMS_SUCCESSFUL ) { |
|
716 | if ( status_recv != RTEMS_SUCCESSFUL ) { | |
698 | PRINTF1("in create_message_queues *** ERR creating QUEU queue, %d\n", status_recv) |
|
717 | PRINTF1("in create_message_queues *** ERR creating QUEU queue, %d\n", status_recv) | |
699 | } |
|
718 | } | |
700 |
|
719 | |||
701 | //************************************************ |
|
720 | //************************************************ | |
702 | // create the queue for handling TM packet sending |
|
721 | // create the queue for handling TM packet sending | |
703 | status_send = rtems_message_queue_create( misc_name[QUEUE_SEND], |
|
722 | status_send = rtems_message_queue_create( misc_name[QUEUE_SEND], | |
704 | MSG_QUEUE_COUNT_SEND, MSG_QUEUE_SIZE_SEND, |
|
723 | MSG_QUEUE_COUNT_SEND, MSG_QUEUE_SIZE_SEND, | |
705 | RTEMS_FIFO | RTEMS_LOCAL, &queue_id ); |
|
724 | RTEMS_FIFO | RTEMS_LOCAL, &queue_id ); | |
706 | if ( status_send != RTEMS_SUCCESSFUL ) { |
|
725 | if ( status_send != RTEMS_SUCCESSFUL ) { | |
707 | PRINTF1("in create_message_queues *** ERR creating PKTS queue, %d\n", status_send) |
|
726 | PRINTF1("in create_message_queues *** ERR creating PKTS queue, %d\n", status_send) | |
708 | } |
|
727 | } | |
709 |
|
728 | |||
710 | //***************************************************************************** |
|
729 | //***************************************************************************** | |
711 | // create the queue for handling averaged spectral matrices for processing @ f0 |
|
730 | // create the queue for handling averaged spectral matrices for processing @ f0 | |
712 | status_q_p0 = rtems_message_queue_create( misc_name[QUEUE_PRC0], |
|
731 | status_q_p0 = rtems_message_queue_create( misc_name[QUEUE_PRC0], | |
713 | MSG_QUEUE_COUNT_PRC0, MSG_QUEUE_SIZE_PRC0, |
|
732 | MSG_QUEUE_COUNT_PRC0, MSG_QUEUE_SIZE_PRC0, | |
714 | RTEMS_FIFO | RTEMS_LOCAL, &queue_id ); |
|
733 | RTEMS_FIFO | RTEMS_LOCAL, &queue_id ); | |
715 | if ( status_q_p0 != RTEMS_SUCCESSFUL ) { |
|
734 | if ( status_q_p0 != RTEMS_SUCCESSFUL ) { | |
716 | PRINTF1("in create_message_queues *** ERR creating Q_P0 queue, %d\n", status_q_p0) |
|
735 | PRINTF1("in create_message_queues *** ERR creating Q_P0 queue, %d\n", status_q_p0) | |
717 | } |
|
736 | } | |
718 |
|
737 | |||
719 | //***************************************************************************** |
|
738 | //***************************************************************************** | |
720 | // create the queue for handling averaged spectral matrices for processing @ f1 |
|
739 | // create the queue for handling averaged spectral matrices for processing @ f1 | |
721 | status_q_p1 = rtems_message_queue_create( misc_name[QUEUE_PRC1], |
|
740 | status_q_p1 = rtems_message_queue_create( misc_name[QUEUE_PRC1], | |
722 | MSG_QUEUE_COUNT_PRC1, MSG_QUEUE_SIZE_PRC1, |
|
741 | MSG_QUEUE_COUNT_PRC1, MSG_QUEUE_SIZE_PRC1, | |
723 | RTEMS_FIFO | RTEMS_LOCAL, &queue_id ); |
|
742 | RTEMS_FIFO | RTEMS_LOCAL, &queue_id ); | |
724 | if ( status_q_p1 != RTEMS_SUCCESSFUL ) { |
|
743 | if ( status_q_p1 != RTEMS_SUCCESSFUL ) { | |
725 | PRINTF1("in create_message_queues *** ERR creating Q_P1 queue, %d\n", status_q_p1) |
|
744 | PRINTF1("in create_message_queues *** ERR creating Q_P1 queue, %d\n", status_q_p1) | |
726 | } |
|
745 | } | |
727 |
|
746 | |||
728 | //***************************************************************************** |
|
747 | //***************************************************************************** | |
729 | // create the queue for handling averaged spectral matrices for processing @ f2 |
|
748 | // create the queue for handling averaged spectral matrices for processing @ f2 | |
730 | status_q_p2 = rtems_message_queue_create( misc_name[QUEUE_PRC2], |
|
749 | status_q_p2 = rtems_message_queue_create( misc_name[QUEUE_PRC2], | |
731 | MSG_QUEUE_COUNT_PRC2, MSG_QUEUE_SIZE_PRC2, |
|
750 | MSG_QUEUE_COUNT_PRC2, MSG_QUEUE_SIZE_PRC2, | |
732 | RTEMS_FIFO | RTEMS_LOCAL, &queue_id ); |
|
751 | RTEMS_FIFO | RTEMS_LOCAL, &queue_id ); | |
733 | if ( status_q_p2 != RTEMS_SUCCESSFUL ) { |
|
752 | if ( status_q_p2 != RTEMS_SUCCESSFUL ) { | |
734 | PRINTF1("in create_message_queues *** ERR creating Q_P2 queue, %d\n", status_q_p2) |
|
753 | PRINTF1("in create_message_queues *** ERR creating Q_P2 queue, %d\n", status_q_p2) | |
735 | } |
|
754 | } | |
736 |
|
755 | |||
737 | if ( status_recv != RTEMS_SUCCESSFUL ) |
|
756 | if ( status_recv != RTEMS_SUCCESSFUL ) | |
738 | { |
|
757 | { | |
739 | ret = status_recv; |
|
758 | ret = status_recv; | |
740 | } |
|
759 | } | |
741 | else if( status_send != RTEMS_SUCCESSFUL ) |
|
760 | else if( status_send != RTEMS_SUCCESSFUL ) | |
742 | { |
|
761 | { | |
743 | ret = status_send; |
|
762 | ret = status_send; | |
744 | } |
|
763 | } | |
745 | else if( status_q_p0 != RTEMS_SUCCESSFUL ) |
|
764 | else if( status_q_p0 != RTEMS_SUCCESSFUL ) | |
746 | { |
|
765 | { | |
747 | ret = status_q_p0; |
|
766 | ret = status_q_p0; | |
748 | } |
|
767 | } | |
749 | else if( status_q_p1 != RTEMS_SUCCESSFUL ) |
|
768 | else if( status_q_p1 != RTEMS_SUCCESSFUL ) | |
750 | { |
|
769 | { | |
751 | ret = status_q_p1; |
|
770 | ret = status_q_p1; | |
752 | } |
|
771 | } | |
753 | else |
|
772 | else | |
754 | { |
|
773 | { | |
755 | ret = status_q_p2; |
|
774 | ret = status_q_p2; | |
756 | } |
|
775 | } | |
757 |
|
776 | |||
758 | return ret; |
|
777 | return ret; | |
759 | } |
|
778 | } | |
760 |
|
779 | |||
761 | rtems_status_code create_timecode_timer( void ) |
|
780 | rtems_status_code create_timecode_timer( void ) | |
762 | { |
|
781 | { | |
763 | rtems_status_code status; |
|
782 | rtems_status_code status; | |
764 |
|
783 | |||
765 | status = rtems_timer_create( timecode_timer_name, &timecode_timer_id ); |
|
784 | status = rtems_timer_create( timecode_timer_name, &timecode_timer_id ); | |
766 |
|
785 | |||
767 | if ( status != RTEMS_SUCCESSFUL ) |
|
786 | if ( status != RTEMS_SUCCESSFUL ) | |
768 | { |
|
787 | { | |
769 | PRINTF1("in create_timer_timecode *** ERR creating SPTC timer, %d\n", status) |
|
788 | PRINTF1("in create_timer_timecode *** ERR creating SPTC timer, %d\n", status) | |
770 | } |
|
789 | } | |
771 | else |
|
790 | else | |
772 | { |
|
791 | { | |
773 | PRINTF("in create_timer_timecode *** OK creating SPTC timer\n") |
|
792 | PRINTF("in create_timer_timecode *** OK creating SPTC timer\n") | |
774 | } |
|
793 | } | |
775 |
|
794 | |||
776 | return status; |
|
795 | return status; | |
777 | } |
|
796 | } | |
778 |
|
797 | |||
779 | rtems_status_code get_message_queue_id_send( rtems_id *queue_id ) |
|
798 | rtems_status_code get_message_queue_id_send( rtems_id *queue_id ) | |
780 | { |
|
799 | { | |
781 | rtems_status_code status; |
|
800 | rtems_status_code status; | |
782 | rtems_name queue_name; |
|
801 | rtems_name queue_name; | |
783 |
|
802 | |||
784 | queue_name = rtems_build_name( 'Q', '_', 'S', 'D' ); |
|
803 | queue_name = rtems_build_name( 'Q', '_', 'S', 'D' ); | |
785 |
|
804 | |||
786 | status = rtems_message_queue_ident( queue_name, 0, queue_id ); |
|
805 | status = rtems_message_queue_ident( queue_name, 0, queue_id ); | |
787 |
|
806 | |||
788 | return status; |
|
807 | return status; | |
789 | } |
|
808 | } | |
790 |
|
809 | |||
791 | rtems_status_code get_message_queue_id_recv( rtems_id *queue_id ) |
|
810 | rtems_status_code get_message_queue_id_recv( rtems_id *queue_id ) | |
792 | { |
|
811 | { | |
793 | rtems_status_code status; |
|
812 | rtems_status_code status; | |
794 | rtems_name queue_name; |
|
813 | rtems_name queue_name; | |
795 |
|
814 | |||
796 | queue_name = rtems_build_name( 'Q', '_', 'R', 'V' ); |
|
815 | queue_name = rtems_build_name( 'Q', '_', 'R', 'V' ); | |
797 |
|
816 | |||
798 | status = rtems_message_queue_ident( queue_name, 0, queue_id ); |
|
817 | status = rtems_message_queue_ident( queue_name, 0, queue_id ); | |
799 |
|
818 | |||
800 | return status; |
|
819 | return status; | |
801 | } |
|
820 | } | |
802 |
|
821 | |||
803 | rtems_status_code get_message_queue_id_prc0( rtems_id *queue_id ) |
|
822 | rtems_status_code get_message_queue_id_prc0( rtems_id *queue_id ) | |
804 | { |
|
823 | { | |
805 | rtems_status_code status; |
|
824 | rtems_status_code status; | |
806 | rtems_name queue_name; |
|
825 | rtems_name queue_name; | |
807 |
|
826 | |||
808 | queue_name = rtems_build_name( 'Q', '_', 'P', '0' ); |
|
827 | queue_name = rtems_build_name( 'Q', '_', 'P', '0' ); | |
809 |
|
828 | |||
810 | status = rtems_message_queue_ident( queue_name, 0, queue_id ); |
|
829 | status = rtems_message_queue_ident( queue_name, 0, queue_id ); | |
811 |
|
830 | |||
812 | return status; |
|
831 | return status; | |
813 | } |
|
832 | } | |
814 |
|
833 | |||
815 | rtems_status_code get_message_queue_id_prc1( rtems_id *queue_id ) |
|
834 | rtems_status_code get_message_queue_id_prc1( rtems_id *queue_id ) | |
816 | { |
|
835 | { | |
817 | rtems_status_code status; |
|
836 | rtems_status_code status; | |
818 | rtems_name queue_name; |
|
837 | rtems_name queue_name; | |
819 |
|
838 | |||
820 | queue_name = rtems_build_name( 'Q', '_', 'P', '1' ); |
|
839 | queue_name = rtems_build_name( 'Q', '_', 'P', '1' ); | |
821 |
|
840 | |||
822 | status = rtems_message_queue_ident( queue_name, 0, queue_id ); |
|
841 | status = rtems_message_queue_ident( queue_name, 0, queue_id ); | |
823 |
|
842 | |||
824 | return status; |
|
843 | return status; | |
825 | } |
|
844 | } | |
826 |
|
845 | |||
827 | rtems_status_code get_message_queue_id_prc2( rtems_id *queue_id ) |
|
846 | rtems_status_code get_message_queue_id_prc2( rtems_id *queue_id ) | |
828 | { |
|
847 | { | |
829 | rtems_status_code status; |
|
848 | rtems_status_code status; | |
830 | rtems_name queue_name; |
|
849 | rtems_name queue_name; | |
831 |
|
850 | |||
832 | queue_name = rtems_build_name( 'Q', '_', 'P', '2' ); |
|
851 | queue_name = rtems_build_name( 'Q', '_', 'P', '2' ); | |
833 |
|
852 | |||
834 | status = rtems_message_queue_ident( queue_name, 0, queue_id ); |
|
853 | status = rtems_message_queue_ident( queue_name, 0, queue_id ); | |
835 |
|
854 | |||
836 | return status; |
|
855 | return status; | |
837 | } |
|
856 | } | |
838 |
|
857 | |||
839 | void update_queue_max_count( rtems_id queue_id, unsigned char*fifo_size_max ) |
|
858 | void update_queue_max_count( rtems_id queue_id, unsigned char*fifo_size_max ) | |
840 | { |
|
859 | { | |
841 | u_int32_t count; |
|
860 | u_int32_t count; | |
842 | rtems_status_code status; |
|
861 | rtems_status_code status; | |
843 |
|
862 | |||
844 | status = rtems_message_queue_get_number_pending( queue_id, &count ); |
|
863 | status = rtems_message_queue_get_number_pending( queue_id, &count ); | |
845 |
|
864 | |||
846 | count = count + 1; |
|
865 | count = count + 1; | |
847 |
|
866 | |||
848 | if (status != RTEMS_SUCCESSFUL) |
|
867 | if (status != RTEMS_SUCCESSFUL) | |
849 | { |
|
868 | { | |
850 | PRINTF1("in update_queue_max_count *** ERR = %d\n", status) |
|
869 | PRINTF1("in update_queue_max_count *** ERR = %d\n", status) | |
851 | } |
|
870 | } | |
852 | else |
|
871 | else | |
853 | { |
|
872 | { | |
854 | if (count > *fifo_size_max) |
|
873 | if (count > *fifo_size_max) | |
855 | { |
|
874 | { | |
856 | *fifo_size_max = count; |
|
875 | *fifo_size_max = count; | |
857 | } |
|
876 | } | |
858 | } |
|
877 | } | |
859 | } |
|
878 | } | |
860 |
|
879 | |||
861 | void init_ring(ring_node ring[], unsigned char nbNodes, volatile int buffer[], unsigned int bufferSize ) |
|
880 | void init_ring(ring_node ring[], unsigned char nbNodes, volatile int buffer[], unsigned int bufferSize ) | |
862 | { |
|
881 | { | |
863 | unsigned char i; |
|
882 | unsigned char i; | |
864 |
|
883 | |||
865 | //*************** |
|
884 | //*************** | |
866 | // BUFFER ADDRESS |
|
885 | // BUFFER ADDRESS | |
867 | for(i=0; i<nbNodes; i++) |
|
886 | for(i=0; i<nbNodes; i++) | |
868 | { |
|
887 | { | |
869 | ring[i].coarseTime = 0xffffffff; |
|
888 | ring[i].coarseTime = 0xffffffff; | |
870 | ring[i].fineTime = 0xffffffff; |
|
889 | ring[i].fineTime = 0xffffffff; | |
871 | ring[i].sid = 0x00; |
|
890 | ring[i].sid = 0x00; | |
872 | ring[i].status = 0x00; |
|
891 | ring[i].status = 0x00; | |
873 | ring[i].buffer_address = (int) &buffer[ i * bufferSize ]; |
|
892 | ring[i].buffer_address = (int) &buffer[ i * bufferSize ]; | |
874 | } |
|
893 | } | |
875 |
|
894 | |||
876 | //***** |
|
895 | //***** | |
877 | // NEXT |
|
896 | // NEXT | |
878 | ring[ nbNodes - 1 ].next = (ring_node*) &ring[ 0 ]; |
|
897 | ring[ nbNodes - 1 ].next = (ring_node*) &ring[ 0 ]; | |
879 | for(i=0; i<nbNodes-1; i++) |
|
898 | for(i=0; i<nbNodes-1; i++) | |
880 | { |
|
899 | { | |
881 | ring[i].next = (ring_node*) &ring[ i + 1 ]; |
|
900 | ring[i].next = (ring_node*) &ring[ i + 1 ]; | |
882 | } |
|
901 | } | |
883 |
|
902 | |||
884 | //********* |
|
903 | //********* | |
885 | // PREVIOUS |
|
904 | // PREVIOUS | |
886 | ring[ 0 ].previous = (ring_node*) &ring[ nbNodes - 1 ]; |
|
905 | ring[ 0 ].previous = (ring_node*) &ring[ nbNodes - 1 ]; | |
887 | for(i=1; i<nbNodes; i++) |
|
906 | for(i=1; i<nbNodes; i++) | |
888 | { |
|
907 | { | |
889 | ring[i].previous = (ring_node*) &ring[ i - 1 ]; |
|
908 | ring[i].previous = (ring_node*) &ring[ i - 1 ]; | |
890 | } |
|
909 | } | |
891 | } |
|
910 | } |
@@ -1,742 +1,745 | |||||
1 | /** General usage functions and RTEMS tasks. |
|
1 | /** General usage functions and RTEMS tasks. | |
2 | * |
|
2 | * | |
3 | * @file |
|
3 | * @file | |
4 | * @author P. LEROY |
|
4 | * @author P. LEROY | |
5 | * |
|
5 | * | |
6 | */ |
|
6 | */ | |
7 |
|
7 | |||
8 | #include "fsw_misc.h" |
|
8 | #include "fsw_misc.h" | |
9 |
|
9 | |||
10 | void timer_configure(unsigned char timer, unsigned int clock_divider, |
|
10 | void timer_configure(unsigned char timer, unsigned int clock_divider, | |
11 | unsigned char interrupt_level, rtems_isr (*timer_isr)() ) |
|
11 | unsigned char interrupt_level, rtems_isr (*timer_isr)() ) | |
12 | { |
|
12 | { | |
13 | /** This function configures a GPTIMER timer instantiated in the VHDL design. |
|
13 | /** This function configures a GPTIMER timer instantiated in the VHDL design. | |
14 | * |
|
14 | * | |
15 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
|
15 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. | |
16 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
|
16 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). | |
17 | * @param clock_divider is the divider of the 1 MHz clock that will be configured. |
|
17 | * @param clock_divider is the divider of the 1 MHz clock that will be configured. | |
18 | * @param interrupt_level is the interrupt level that the timer drives. |
|
18 | * @param interrupt_level is the interrupt level that the timer drives. | |
19 | * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer. |
|
19 | * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer. | |
20 | * |
|
20 | * | |
21 | * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76 |
|
21 | * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76 | |
22 | * |
|
22 | * | |
23 | */ |
|
23 | */ | |
24 |
|
24 | |||
25 | rtems_status_code status; |
|
25 | rtems_status_code status; | |
26 | rtems_isr_entry old_isr_handler; |
|
26 | rtems_isr_entry old_isr_handler; | |
27 |
|
27 | |||
28 | gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register |
|
28 | gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register | |
29 |
|
29 | |||
30 | status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels |
|
30 | status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels | |
31 | if (status!=RTEMS_SUCCESSFUL) |
|
31 | if (status!=RTEMS_SUCCESSFUL) | |
32 | { |
|
32 | { | |
33 | PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n") |
|
33 | PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n") | |
34 | } |
|
34 | } | |
35 |
|
35 | |||
36 | timer_set_clock_divider( timer, clock_divider); |
|
36 | timer_set_clock_divider( timer, clock_divider); | |
37 | } |
|
37 | } | |
38 |
|
38 | |||
39 | void timer_start(unsigned char timer) |
|
39 | void timer_start(unsigned char timer) | |
40 | { |
|
40 | { | |
41 | /** This function starts a GPTIMER timer. |
|
41 | /** This function starts a GPTIMER timer. | |
42 | * |
|
42 | * | |
43 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
|
43 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. | |
44 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
|
44 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). | |
45 | * |
|
45 | * | |
46 | */ |
|
46 | */ | |
47 |
|
47 | |||
48 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any |
|
48 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any | |
49 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register |
|
49 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register | |
50 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer |
|
50 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer | |
51 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart |
|
51 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart | |
52 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable |
|
52 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable | |
53 | } |
|
53 | } | |
54 |
|
54 | |||
55 | void timer_stop(unsigned char timer) |
|
55 | void timer_stop(unsigned char timer) | |
56 | { |
|
56 | { | |
57 | /** This function stops a GPTIMER timer. |
|
57 | /** This function stops a GPTIMER timer. | |
58 | * |
|
58 | * | |
59 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
|
59 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. | |
60 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
|
60 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). | |
61 | * |
|
61 | * | |
62 | */ |
|
62 | */ | |
63 |
|
63 | |||
64 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer |
|
64 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer | |
65 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable |
|
65 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable | |
66 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any |
|
66 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any | |
67 | } |
|
67 | } | |
68 |
|
68 | |||
69 | void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider) |
|
69 | void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider) | |
70 | { |
|
70 | { | |
71 | /** This function sets the clock divider of a GPTIMER timer. |
|
71 | /** This function sets the clock divider of a GPTIMER timer. | |
72 | * |
|
72 | * | |
73 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
|
73 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. | |
74 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
|
74 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). | |
75 | * @param clock_divider is the divider of the 1 MHz clock that will be configured. |
|
75 | * @param clock_divider is the divider of the 1 MHz clock that will be configured. | |
76 | * |
|
76 | * | |
77 | */ |
|
77 | */ | |
78 |
|
78 | |||
79 | gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz |
|
79 | gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz | |
80 | } |
|
80 | } | |
81 |
|
81 | |||
82 | // WATCHDOG |
|
82 | // WATCHDOG | |
83 |
|
83 | |||
84 | rtems_isr watchdog_isr( rtems_vector_number vector ) |
|
84 | rtems_isr watchdog_isr( rtems_vector_number vector ) | |
85 | { |
|
85 | { | |
86 | rtems_status_code status_code; |
|
86 | rtems_status_code status_code; | |
87 |
|
87 | |||
88 | status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 ); |
|
88 | status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 ); | |
89 | } |
|
89 | } | |
90 |
|
90 | |||
91 | void watchdog_configure(void) |
|
91 | void watchdog_configure(void) | |
92 | { |
|
92 | { | |
93 | /** This function configure the watchdog. |
|
93 | /** This function configure the watchdog. | |
94 | * |
|
94 | * | |
95 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
|
95 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. | |
96 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
|
96 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). | |
97 | * |
|
97 | * | |
98 | * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB. |
|
98 | * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB. | |
99 | * |
|
99 | * | |
100 | */ |
|
100 | */ | |
101 |
|
101 | |||
102 | LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration |
|
102 | LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration | |
103 |
|
103 | |||
104 | timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr ); |
|
104 | timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr ); | |
105 |
|
105 | |||
106 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt |
|
106 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt | |
107 | } |
|
107 | } | |
108 |
|
108 | |||
109 | void watchdog_stop(void) |
|
109 | void watchdog_stop(void) | |
110 | { |
|
110 | { | |
111 | LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line |
|
111 | LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line | |
112 | timer_stop( TIMER_WATCHDOG ); |
|
112 | timer_stop( TIMER_WATCHDOG ); | |
113 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt |
|
113 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt | |
114 | } |
|
114 | } | |
115 |
|
115 | |||
116 | void watchdog_reload(void) |
|
116 | void watchdog_reload(void) | |
117 | { |
|
117 | { | |
118 | /** This function reloads the watchdog timer counter with the timer reload value. |
|
118 | /** This function reloads the watchdog timer counter with the timer reload value. | |
119 | * |
|
119 | * | |
|
120 | * @param void | |||
|
121 | * | |||
|
122 | * @return void | |||
120 | * |
|
123 | * | |
121 | */ |
|
124 | */ | |
122 |
|
125 | |||
123 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register |
|
126 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register | |
124 | } |
|
127 | } | |
125 |
|
128 | |||
126 | void watchdog_start(void) |
|
129 | void watchdog_start(void) | |
127 | { |
|
130 | { | |
128 | /** This function starts the watchdog timer. |
|
131 | /** This function starts the watchdog timer. | |
129 | * |
|
132 | * | |
130 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. |
|
133 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. | |
131 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). |
|
134 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). | |
132 | * |
|
135 | * | |
133 | */ |
|
136 | */ | |
134 |
|
137 | |||
135 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); |
|
138 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); | |
136 |
|
139 | |||
137 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any |
|
140 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any | |
138 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register |
|
141 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register | |
139 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer |
|
142 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer | |
140 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable |
|
143 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable | |
141 |
|
144 | |||
142 | LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG ); |
|
145 | LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG ); | |
143 |
|
146 | |||
144 | } |
|
147 | } | |
145 |
|
148 | |||
146 | int send_console_outputs_on_apbuart_port( void ) // Send the console outputs on the apbuart port |
|
149 | int send_console_outputs_on_apbuart_port( void ) // Send the console outputs on the apbuart port | |
147 | { |
|
150 | { | |
148 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART; |
|
151 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART; | |
149 |
|
152 | |||
150 | apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE; |
|
153 | apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE; | |
151 |
|
154 | |||
152 | return 0; |
|
155 | return 0; | |
153 | } |
|
156 | } | |
154 |
|
157 | |||
155 | int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register |
|
158 | int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register | |
156 | { |
|
159 | { | |
157 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART; |
|
160 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART; | |
158 |
|
161 | |||
159 | apbuart_regs->ctrl = apbuart_regs->ctrl | APBUART_CTRL_REG_MASK_TE; |
|
162 | apbuart_regs->ctrl = apbuart_regs->ctrl | APBUART_CTRL_REG_MASK_TE; | |
160 |
|
163 | |||
161 | return 0; |
|
164 | return 0; | |
162 | } |
|
165 | } | |
163 |
|
166 | |||
164 | void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value) |
|
167 | void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value) | |
165 | { |
|
168 | { | |
166 | /** This function sets the scaler reload register of the apbuart module |
|
169 | /** This function sets the scaler reload register of the apbuart module | |
167 | * |
|
170 | * | |
168 | * @param regs is the address of the apbuart registers in memory |
|
171 | * @param regs is the address of the apbuart registers in memory | |
169 | * @param value is the value that will be stored in the scaler register |
|
172 | * @param value is the value that will be stored in the scaler register | |
170 | * |
|
173 | * | |
171 | * The value shall be set by the software to get data on the serial interface. |
|
174 | * The value shall be set by the software to get data on the serial interface. | |
172 | * |
|
175 | * | |
173 | */ |
|
176 | */ | |
174 |
|
177 | |||
175 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs; |
|
178 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs; | |
176 |
|
179 | |||
177 | apbuart_regs->scaler = value; |
|
180 | apbuart_regs->scaler = value; | |
178 | BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value) |
|
181 | BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value) | |
179 | } |
|
182 | } | |
180 |
|
183 | |||
181 | //************ |
|
184 | //************ | |
182 | // RTEMS TASKS |
|
185 | // RTEMS TASKS | |
183 |
|
186 | |||
184 | rtems_task load_task(rtems_task_argument argument) |
|
187 | rtems_task load_task(rtems_task_argument argument) | |
185 | { |
|
188 | { | |
186 | BOOT_PRINTF("in LOAD *** \n") |
|
189 | BOOT_PRINTF("in LOAD *** \n") | |
187 |
|
190 | |||
188 | rtems_status_code status; |
|
191 | rtems_status_code status; | |
189 | unsigned int i; |
|
192 | unsigned int i; | |
190 | unsigned int j; |
|
193 | unsigned int j; | |
191 | rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic |
|
194 | rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic | |
192 | rtems_id watchdog_period_id; // id of the watchdog rate monotonic period |
|
195 | rtems_id watchdog_period_id; // id of the watchdog rate monotonic period | |
193 |
|
196 | |||
194 | name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' ); |
|
197 | name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' ); | |
195 |
|
198 | |||
196 | status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id ); |
|
199 | status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id ); | |
197 | if( status != RTEMS_SUCCESSFUL ) { |
|
200 | if( status != RTEMS_SUCCESSFUL ) { | |
198 | PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status ) |
|
201 | PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status ) | |
199 | } |
|
202 | } | |
200 |
|
203 | |||
201 | i = 0; |
|
204 | i = 0; | |
202 | j = 0; |
|
205 | j = 0; | |
203 |
|
206 | |||
204 | watchdog_configure(); |
|
207 | watchdog_configure(); | |
205 |
|
208 | |||
206 | watchdog_start(); |
|
209 | watchdog_start(); | |
207 |
|
210 | |||
208 | while(1){ |
|
211 | while(1){ | |
209 | status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD ); |
|
212 | status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD ); | |
210 | watchdog_reload(); |
|
213 | watchdog_reload(); | |
211 | i = i + 1; |
|
214 | i = i + 1; | |
212 | if ( i == 10 ) |
|
215 | if ( i == 10 ) | |
213 | { |
|
216 | { | |
214 | i = 0; |
|
217 | i = 0; | |
215 | j = j + 1; |
|
218 | j = j + 1; | |
216 | PRINTF1("%d\n", j) |
|
219 | PRINTF1("%d\n", j) | |
217 | } |
|
220 | } | |
218 | #ifdef DEBUG_WATCHDOG |
|
221 | #ifdef DEBUG_WATCHDOG | |
219 | if (j == 3 ) |
|
222 | if (j == 3 ) | |
220 | { |
|
223 | { | |
221 | status = rtems_task_delete(RTEMS_SELF); |
|
224 | status = rtems_task_delete(RTEMS_SELF); | |
222 | } |
|
225 | } | |
223 | #endif |
|
226 | #endif | |
224 | } |
|
227 | } | |
225 | } |
|
228 | } | |
226 |
|
229 | |||
227 | rtems_task hous_task(rtems_task_argument argument) |
|
230 | rtems_task hous_task(rtems_task_argument argument) | |
228 | { |
|
231 | { | |
229 | rtems_status_code status; |
|
232 | rtems_status_code status; | |
230 | rtems_status_code spare_status; |
|
233 | rtems_status_code spare_status; | |
231 | rtems_id queue_id; |
|
234 | rtems_id queue_id; | |
232 | rtems_rate_monotonic_period_status period_status; |
|
235 | rtems_rate_monotonic_period_status period_status; | |
233 |
|
236 | |||
234 | status = get_message_queue_id_send( &queue_id ); |
|
237 | status = get_message_queue_id_send( &queue_id ); | |
235 | if (status != RTEMS_SUCCESSFUL) |
|
238 | if (status != RTEMS_SUCCESSFUL) | |
236 | { |
|
239 | { | |
237 | PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status) |
|
240 | PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status) | |
238 | } |
|
241 | } | |
239 |
|
242 | |||
240 | BOOT_PRINTF("in HOUS ***\n") |
|
243 | BOOT_PRINTF("in HOUS ***\n") | |
241 |
|
244 | |||
242 | if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) { |
|
245 | if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) { | |
243 | status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id ); |
|
246 | status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id ); | |
244 | if( status != RTEMS_SUCCESSFUL ) { |
|
247 | if( status != RTEMS_SUCCESSFUL ) { | |
245 | PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status ) |
|
248 | PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status ) | |
246 | } |
|
249 | } | |
247 | } |
|
250 | } | |
248 |
|
251 | |||
249 | status = rtems_rate_monotonic_cancel(HK_id); |
|
252 | status = rtems_rate_monotonic_cancel(HK_id); | |
250 | if( status != RTEMS_SUCCESSFUL ) { |
|
253 | if( status != RTEMS_SUCCESSFUL ) { | |
251 | PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status ) |
|
254 | PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status ) | |
252 | } |
|
255 | } | |
253 | else { |
|
256 | else { | |
254 | DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n") |
|
257 | DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n") | |
255 | } |
|
258 | } | |
256 |
|
259 | |||
257 | // startup phase |
|
260 | // startup phase | |
258 | status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks ); |
|
261 | status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks ); | |
259 | status = rtems_rate_monotonic_get_status( HK_id, &period_status ); |
|
262 | status = rtems_rate_monotonic_get_status( HK_id, &period_status ); | |
260 | DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state) |
|
263 | DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state) | |
261 | while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway |
|
264 | while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway | |
262 | { |
|
265 | { | |
263 | if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization |
|
266 | if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization | |
264 | { |
|
267 | { | |
265 | break; // break if LFR is synchronized |
|
268 | break; // break if LFR is synchronized | |
266 | } |
|
269 | } | |
267 | else |
|
270 | else | |
268 | { |
|
271 | { | |
269 | status = rtems_rate_monotonic_get_status( HK_id, &period_status ); |
|
272 | status = rtems_rate_monotonic_get_status( HK_id, &period_status ); | |
270 | // sched_yield(); |
|
273 | // sched_yield(); | |
271 | status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms |
|
274 | status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms | |
272 | } |
|
275 | } | |
273 | } |
|
276 | } | |
274 | status = rtems_rate_monotonic_cancel(HK_id); |
|
277 | status = rtems_rate_monotonic_cancel(HK_id); | |
275 | DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state) |
|
278 | DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state) | |
276 |
|
279 | |||
277 | set_hk_lfr_reset_cause( POWER_ON ); |
|
280 | set_hk_lfr_reset_cause( POWER_ON ); | |
278 |
|
281 | |||
279 | while(1){ // launch the rate monotonic task |
|
282 | while(1){ // launch the rate monotonic task | |
280 | status = rtems_rate_monotonic_period( HK_id, HK_PERIOD ); |
|
283 | status = rtems_rate_monotonic_period( HK_id, HK_PERIOD ); | |
281 | if ( status != RTEMS_SUCCESSFUL ) { |
|
284 | if ( status != RTEMS_SUCCESSFUL ) { | |
282 | PRINTF1( "in HOUS *** ERR period: %d\n", status); |
|
285 | PRINTF1( "in HOUS *** ERR period: %d\n", status); | |
283 | spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 ); |
|
286 | spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 ); | |
284 | } |
|
287 | } | |
285 | else { |
|
288 | else { | |
286 | housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8); |
|
289 | housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8); | |
287 | housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK ); |
|
290 | housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK ); | |
288 | increment_seq_counter( &sequenceCounterHK ); |
|
291 | increment_seq_counter( &sequenceCounterHK ); | |
289 |
|
292 | |||
290 | housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24); |
|
293 | housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24); | |
291 | housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16); |
|
294 | housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16); | |
292 | housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8); |
|
295 | housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8); | |
293 | housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time); |
|
296 | housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time); | |
294 | housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8); |
|
297 | housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8); | |
295 | housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time); |
|
298 | housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time); | |
296 |
|
299 | |||
297 | spacewire_update_statistics(); |
|
300 | spacewire_update_statistics(); | |
298 |
|
301 | |||
299 | hk_lfr_le_me_he_update(); |
|
302 | hk_lfr_le_me_he_update(); | |
300 |
|
303 | |||
301 | set_hk_lfr_time_not_synchro(); |
|
304 | set_hk_lfr_time_not_synchro(); | |
302 |
|
305 | |||
303 | housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max; |
|
306 | housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max; | |
304 | housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max; |
|
307 | housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max; | |
305 | housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max; |
|
308 | housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max; | |
306 | housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max; |
|
309 | housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max; | |
307 | housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max; |
|
310 | housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max; | |
308 |
|
311 | |||
309 | housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare; |
|
312 | housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare; | |
310 | housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters; |
|
313 | housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters; | |
311 | get_temperatures( housekeeping_packet.hk_lfr_temp_scm ); |
|
314 | get_temperatures( housekeeping_packet.hk_lfr_temp_scm ); | |
312 | get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 ); |
|
315 | get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 ); | |
313 | get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load ); |
|
316 | get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load ); | |
314 |
|
317 | |||
315 | // SEND PACKET |
|
318 | // SEND PACKET | |
316 | status = rtems_message_queue_send( queue_id, &housekeeping_packet, |
|
319 | status = rtems_message_queue_send( queue_id, &housekeeping_packet, | |
317 | PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES); |
|
320 | PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES); | |
318 | if (status != RTEMS_SUCCESSFUL) { |
|
321 | if (status != RTEMS_SUCCESSFUL) { | |
319 | PRINTF1("in HOUS *** ERR send: %d\n", status) |
|
322 | PRINTF1("in HOUS *** ERR send: %d\n", status) | |
320 | } |
|
323 | } | |
321 | } |
|
324 | } | |
322 | } |
|
325 | } | |
323 |
|
326 | |||
324 | PRINTF("in HOUS *** deleting task\n") |
|
327 | PRINTF("in HOUS *** deleting task\n") | |
325 |
|
328 | |||
326 | status = rtems_task_delete( RTEMS_SELF ); // should not return |
|
329 | status = rtems_task_delete( RTEMS_SELF ); // should not return | |
327 |
|
330 | |||
328 | return; |
|
331 | return; | |
329 | } |
|
332 | } | |
330 |
|
333 | |||
331 | rtems_task dumb_task( rtems_task_argument unused ) |
|
334 | rtems_task dumb_task( rtems_task_argument unused ) | |
332 | { |
|
335 | { | |
333 | /** This RTEMS taks is used to print messages without affecting the general behaviour of the software. |
|
336 | /** This RTEMS taks is used to print messages without affecting the general behaviour of the software. | |
334 | * |
|
337 | * | |
335 | * @param unused is the starting argument of the RTEMS task |
|
338 | * @param unused is the starting argument of the RTEMS task | |
336 | * |
|
339 | * | |
337 | * The DUMB taks waits for RTEMS events and print messages depending on the incoming events. |
|
340 | * The DUMB taks waits for RTEMS events and print messages depending on the incoming events. | |
338 | * |
|
341 | * | |
339 | */ |
|
342 | */ | |
340 |
|
343 | |||
341 | unsigned int i; |
|
344 | unsigned int i; | |
342 | unsigned int intEventOut; |
|
345 | unsigned int intEventOut; | |
343 | unsigned int coarse_time = 0; |
|
346 | unsigned int coarse_time = 0; | |
344 | unsigned int fine_time = 0; |
|
347 | unsigned int fine_time = 0; | |
345 | rtems_event_set event_out; |
|
348 | rtems_event_set event_out; | |
346 |
|
349 | |||
347 | char *DumbMessages[14] = {"in DUMB *** default", // RTEMS_EVENT_0 |
|
350 | char *DumbMessages[14] = {"in DUMB *** default", // RTEMS_EVENT_0 | |
348 | "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1 |
|
351 | "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1 | |
349 | "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2 |
|
352 | "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2 | |
350 | "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3 |
|
353 | "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3 | |
351 | "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4 |
|
354 | "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4 | |
352 | "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5 |
|
355 | "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5 | |
353 | "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6 |
|
356 | "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6 | |
354 | "ready for dump", // RTEMS_EVENT_7 |
|
357 | "ready for dump", // RTEMS_EVENT_7 | |
355 | "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8 |
|
358 | "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8 | |
356 | "tick", // RTEMS_EVENT_9 |
|
359 | "tick", // RTEMS_EVENT_9 | |
357 | "VHDL ERR *** waveform picker", // RTEMS_EVENT_10 |
|
360 | "VHDL ERR *** waveform picker", // RTEMS_EVENT_10 | |
358 | "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11 |
|
361 | "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11 | |
359 | "WATCHDOG timer", // RTEMS_EVENT_12 |
|
362 | "WATCHDOG timer", // RTEMS_EVENT_12 | |
360 | "TIMECODE timer" // RTEMS_EVENT_13 |
|
363 | "TIMECODE timer" // RTEMS_EVENT_13 | |
361 | }; |
|
364 | }; | |
362 |
|
365 | |||
363 | BOOT_PRINTF("in DUMB *** \n") |
|
366 | BOOT_PRINTF("in DUMB *** \n") | |
364 |
|
367 | |||
365 | while(1){ |
|
368 | while(1){ | |
366 | rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3 |
|
369 | rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3 | |
367 | | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7 |
|
370 | | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7 | |
368 | | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13, |
|
371 | | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13, | |
369 | RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT |
|
372 | RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT | |
370 | intEventOut = (unsigned int) event_out; |
|
373 | intEventOut = (unsigned int) event_out; | |
371 | for ( i=0; i<32; i++) |
|
374 | for ( i=0; i<32; i++) | |
372 | { |
|
375 | { | |
373 | if ( ((intEventOut >> i) & 0x0001) != 0) |
|
376 | if ( ((intEventOut >> i) & 0x0001) != 0) | |
374 | { |
|
377 | { | |
375 | coarse_time = time_management_regs->coarse_time; |
|
378 | coarse_time = time_management_regs->coarse_time; | |
376 | fine_time = time_management_regs->fine_time; |
|
379 | fine_time = time_management_regs->fine_time; | |
377 | if (i==12) |
|
380 | if (i==12) | |
378 | { |
|
381 | { | |
379 | PRINTF1("%s\n", DumbMessages[12]) |
|
382 | PRINTF1("%s\n", DumbMessages[12]) | |
380 | } |
|
383 | } | |
381 | if (i==13) |
|
384 | if (i==13) | |
382 | { |
|
385 | { | |
383 | PRINTF1("%s\n", DumbMessages[13]) |
|
386 | PRINTF1("%s\n", DumbMessages[13]) | |
384 | } |
|
387 | } | |
385 | } |
|
388 | } | |
386 | } |
|
389 | } | |
387 | } |
|
390 | } | |
388 | } |
|
391 | } | |
389 |
|
392 | |||
390 | //***************************** |
|
393 | //***************************** | |
391 | // init housekeeping parameters |
|
394 | // init housekeeping parameters | |
392 |
|
395 | |||
393 | void init_housekeeping_parameters( void ) |
|
396 | void init_housekeeping_parameters( void ) | |
394 | { |
|
397 | { | |
395 | /** This function initialize the housekeeping_packet global variable with default values. |
|
398 | /** This function initialize the housekeeping_packet global variable with default values. | |
396 | * |
|
399 | * | |
397 | */ |
|
400 | */ | |
398 |
|
401 | |||
399 | unsigned int i = 0; |
|
402 | unsigned int i = 0; | |
400 | unsigned char *parameters; |
|
403 | unsigned char *parameters; | |
401 | unsigned char sizeOfHK; |
|
404 | unsigned char sizeOfHK; | |
402 |
|
405 | |||
403 | sizeOfHK = sizeof( Packet_TM_LFR_HK_t ); |
|
406 | sizeOfHK = sizeof( Packet_TM_LFR_HK_t ); | |
404 |
|
407 | |||
405 | parameters = (unsigned char*) &housekeeping_packet; |
|
408 | parameters = (unsigned char*) &housekeeping_packet; | |
406 |
|
409 | |||
407 | for(i = 0; i< sizeOfHK; i++) |
|
410 | for(i = 0; i< sizeOfHK; i++) | |
408 | { |
|
411 | { | |
409 | parameters[i] = 0x00; |
|
412 | parameters[i] = 0x00; | |
410 | } |
|
413 | } | |
411 |
|
414 | |||
412 | housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID; |
|
415 | housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID; | |
413 | housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID; |
|
416 | housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID; | |
414 | housekeeping_packet.reserved = DEFAULT_RESERVED; |
|
417 | housekeeping_packet.reserved = DEFAULT_RESERVED; | |
415 | housekeeping_packet.userApplication = CCSDS_USER_APP; |
|
418 | housekeeping_packet.userApplication = CCSDS_USER_APP; | |
416 | housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8); |
|
419 | housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8); | |
417 | housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK); |
|
420 | housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK); | |
418 | housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE; |
|
421 | housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE; | |
419 | housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT; |
|
422 | housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT; | |
420 | housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8); |
|
423 | housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8); | |
421 | housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK ); |
|
424 | housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK ); | |
422 | housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2; |
|
425 | housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2; | |
423 | housekeeping_packet.serviceType = TM_TYPE_HK; |
|
426 | housekeeping_packet.serviceType = TM_TYPE_HK; | |
424 | housekeeping_packet.serviceSubType = TM_SUBTYPE_HK; |
|
427 | housekeeping_packet.serviceSubType = TM_SUBTYPE_HK; | |
425 | housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND; |
|
428 | housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND; | |
426 | housekeeping_packet.sid = SID_HK; |
|
429 | housekeeping_packet.sid = SID_HK; | |
427 |
|
430 | |||
428 | // init status word |
|
431 | // init status word | |
429 | housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0; |
|
432 | housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0; | |
430 | housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1; |
|
433 | housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1; | |
431 | // init software version |
|
434 | // init software version | |
432 | housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1; |
|
435 | housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1; | |
433 | housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2; |
|
436 | housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2; | |
434 | housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3; |
|
437 | housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3; | |
435 | housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4; |
|
438 | housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4; | |
436 | // init fpga version |
|
439 | // init fpga version | |
437 | parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION); |
|
440 | parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION); | |
438 | housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1 |
|
441 | housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1 | |
439 | housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2 |
|
442 | housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2 | |
440 | housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3 |
|
443 | housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3 | |
441 |
|
444 | |||
442 | housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND; |
|
445 | housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND; | |
443 | housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV; |
|
446 | housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV; | |
444 | housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0; |
|
447 | housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0; | |
445 | housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1; |
|
448 | housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1; | |
446 | housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2; |
|
449 | housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2; | |
447 | } |
|
450 | } | |
448 |
|
451 | |||
449 | void increment_seq_counter( unsigned short *packetSequenceControl ) |
|
452 | void increment_seq_counter( unsigned short *packetSequenceControl ) | |
450 | { |
|
453 | { | |
451 | /** This function increment the sequence counter passes in argument. |
|
454 | /** This function increment the sequence counter passes in argument. | |
452 | * |
|
455 | * | |
453 | * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0. |
|
456 | * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0. | |
454 | * |
|
457 | * | |
455 | */ |
|
458 | */ | |
456 |
|
459 | |||
457 | unsigned short segmentation_grouping_flag; |
|
460 | unsigned short segmentation_grouping_flag; | |
458 | unsigned short sequence_cnt; |
|
461 | unsigned short sequence_cnt; | |
459 |
|
462 | |||
460 | segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << 8; // keep bits 7 downto 6 |
|
463 | segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << 8; // keep bits 7 downto 6 | |
461 | sequence_cnt = (*packetSequenceControl) & 0x3fff; // [0011 1111 1111 1111] |
|
464 | sequence_cnt = (*packetSequenceControl) & 0x3fff; // [0011 1111 1111 1111] | |
462 |
|
465 | |||
463 | if ( sequence_cnt < SEQ_CNT_MAX) |
|
466 | if ( sequence_cnt < SEQ_CNT_MAX) | |
464 | { |
|
467 | { | |
465 | sequence_cnt = sequence_cnt + 1; |
|
468 | sequence_cnt = sequence_cnt + 1; | |
466 | } |
|
469 | } | |
467 | else |
|
470 | else | |
468 | { |
|
471 | { | |
469 | sequence_cnt = 0; |
|
472 | sequence_cnt = 0; | |
470 | } |
|
473 | } | |
471 |
|
474 | |||
472 | *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ; |
|
475 | *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ; | |
473 | } |
|
476 | } | |
474 |
|
477 | |||
475 | void getTime( unsigned char *time) |
|
478 | void getTime( unsigned char *time) | |
476 | { |
|
479 | { | |
477 | /** This function write the current local time in the time buffer passed in argument. |
|
480 | /** This function write the current local time in the time buffer passed in argument. | |
478 | * |
|
481 | * | |
479 | */ |
|
482 | */ | |
480 |
|
483 | |||
481 | time[0] = (unsigned char) (time_management_regs->coarse_time>>24); |
|
484 | time[0] = (unsigned char) (time_management_regs->coarse_time>>24); | |
482 | time[1] = (unsigned char) (time_management_regs->coarse_time>>16); |
|
485 | time[1] = (unsigned char) (time_management_regs->coarse_time>>16); | |
483 | time[2] = (unsigned char) (time_management_regs->coarse_time>>8); |
|
486 | time[2] = (unsigned char) (time_management_regs->coarse_time>>8); | |
484 | time[3] = (unsigned char) (time_management_regs->coarse_time); |
|
487 | time[3] = (unsigned char) (time_management_regs->coarse_time); | |
485 | time[4] = (unsigned char) (time_management_regs->fine_time>>8); |
|
488 | time[4] = (unsigned char) (time_management_regs->fine_time>>8); | |
486 | time[5] = (unsigned char) (time_management_regs->fine_time); |
|
489 | time[5] = (unsigned char) (time_management_regs->fine_time); | |
487 | } |
|
490 | } | |
488 |
|
491 | |||
489 | unsigned long long int getTimeAsUnsignedLongLongInt( ) |
|
492 | unsigned long long int getTimeAsUnsignedLongLongInt( ) | |
490 | { |
|
493 | { | |
491 | /** This function write the current local time in the time buffer passed in argument. |
|
494 | /** This function write the current local time in the time buffer passed in argument. | |
492 | * |
|
495 | * | |
493 | */ |
|
496 | */ | |
494 | unsigned long long int time; |
|
497 | unsigned long long int time; | |
495 |
|
498 | |||
496 | time = ( (unsigned long long int) (time_management_regs->coarse_time & 0x7fffffff) << 16 ) |
|
499 | time = ( (unsigned long long int) (time_management_regs->coarse_time & 0x7fffffff) << 16 ) | |
497 | + time_management_regs->fine_time; |
|
500 | + time_management_regs->fine_time; | |
498 |
|
501 | |||
499 | return time; |
|
502 | return time; | |
500 | } |
|
503 | } | |
501 |
|
504 | |||
502 | void send_dumb_hk( void ) |
|
505 | void send_dumb_hk( void ) | |
503 | { |
|
506 | { | |
504 | Packet_TM_LFR_HK_t dummy_hk_packet; |
|
507 | Packet_TM_LFR_HK_t dummy_hk_packet; | |
505 | unsigned char *parameters; |
|
508 | unsigned char *parameters; | |
506 | unsigned int i; |
|
509 | unsigned int i; | |
507 | rtems_id queue_id; |
|
510 | rtems_id queue_id; | |
508 |
|
511 | |||
509 | dummy_hk_packet.targetLogicalAddress = CCSDS_DESTINATION_ID; |
|
512 | dummy_hk_packet.targetLogicalAddress = CCSDS_DESTINATION_ID; | |
510 | dummy_hk_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID; |
|
513 | dummy_hk_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID; | |
511 | dummy_hk_packet.reserved = DEFAULT_RESERVED; |
|
514 | dummy_hk_packet.reserved = DEFAULT_RESERVED; | |
512 | dummy_hk_packet.userApplication = CCSDS_USER_APP; |
|
515 | dummy_hk_packet.userApplication = CCSDS_USER_APP; | |
513 | dummy_hk_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8); |
|
516 | dummy_hk_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8); | |
514 | dummy_hk_packet.packetID[1] = (unsigned char) (APID_TM_HK); |
|
517 | dummy_hk_packet.packetID[1] = (unsigned char) (APID_TM_HK); | |
515 | dummy_hk_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE; |
|
518 | dummy_hk_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE; | |
516 | dummy_hk_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT; |
|
519 | dummy_hk_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT; | |
517 | dummy_hk_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8); |
|
520 | dummy_hk_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8); | |
518 | dummy_hk_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK ); |
|
521 | dummy_hk_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK ); | |
519 | dummy_hk_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2; |
|
522 | dummy_hk_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2; | |
520 | dummy_hk_packet.serviceType = TM_TYPE_HK; |
|
523 | dummy_hk_packet.serviceType = TM_TYPE_HK; | |
521 | dummy_hk_packet.serviceSubType = TM_SUBTYPE_HK; |
|
524 | dummy_hk_packet.serviceSubType = TM_SUBTYPE_HK; | |
522 | dummy_hk_packet.destinationID = TM_DESTINATION_ID_GROUND; |
|
525 | dummy_hk_packet.destinationID = TM_DESTINATION_ID_GROUND; | |
523 | dummy_hk_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24); |
|
526 | dummy_hk_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24); | |
524 | dummy_hk_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16); |
|
527 | dummy_hk_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16); | |
525 | dummy_hk_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8); |
|
528 | dummy_hk_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8); | |
526 | dummy_hk_packet.time[3] = (unsigned char) (time_management_regs->coarse_time); |
|
529 | dummy_hk_packet.time[3] = (unsigned char) (time_management_regs->coarse_time); | |
527 | dummy_hk_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8); |
|
530 | dummy_hk_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8); | |
528 | dummy_hk_packet.time[5] = (unsigned char) (time_management_regs->fine_time); |
|
531 | dummy_hk_packet.time[5] = (unsigned char) (time_management_regs->fine_time); | |
529 | dummy_hk_packet.sid = SID_HK; |
|
532 | dummy_hk_packet.sid = SID_HK; | |
530 |
|
533 | |||
531 | // init status word |
|
534 | // init status word | |
532 | dummy_hk_packet.lfr_status_word[0] = 0xff; |
|
535 | dummy_hk_packet.lfr_status_word[0] = 0xff; | |
533 | dummy_hk_packet.lfr_status_word[1] = 0xff; |
|
536 | dummy_hk_packet.lfr_status_word[1] = 0xff; | |
534 | // init software version |
|
537 | // init software version | |
535 | dummy_hk_packet.lfr_sw_version[0] = SW_VERSION_N1; |
|
538 | dummy_hk_packet.lfr_sw_version[0] = SW_VERSION_N1; | |
536 | dummy_hk_packet.lfr_sw_version[1] = SW_VERSION_N2; |
|
539 | dummy_hk_packet.lfr_sw_version[1] = SW_VERSION_N2; | |
537 | dummy_hk_packet.lfr_sw_version[2] = SW_VERSION_N3; |
|
540 | dummy_hk_packet.lfr_sw_version[2] = SW_VERSION_N3; | |
538 | dummy_hk_packet.lfr_sw_version[3] = SW_VERSION_N4; |
|
541 | dummy_hk_packet.lfr_sw_version[3] = SW_VERSION_N4; | |
539 | // init fpga version |
|
542 | // init fpga version | |
540 | parameters = (unsigned char *) (REGS_ADDR_WAVEFORM_PICKER + 0xb0); |
|
543 | parameters = (unsigned char *) (REGS_ADDR_WAVEFORM_PICKER + 0xb0); | |
541 | dummy_hk_packet.lfr_fpga_version[0] = parameters[1]; // n1 |
|
544 | dummy_hk_packet.lfr_fpga_version[0] = parameters[1]; // n1 | |
542 | dummy_hk_packet.lfr_fpga_version[1] = parameters[2]; // n2 |
|
545 | dummy_hk_packet.lfr_fpga_version[1] = parameters[2]; // n2 | |
543 | dummy_hk_packet.lfr_fpga_version[2] = parameters[3]; // n3 |
|
546 | dummy_hk_packet.lfr_fpga_version[2] = parameters[3]; // n3 | |
544 |
|
547 | |||
545 | parameters = (unsigned char *) &dummy_hk_packet.hk_lfr_cpu_load; |
|
548 | parameters = (unsigned char *) &dummy_hk_packet.hk_lfr_cpu_load; | |
546 |
|
549 | |||
547 | for (i=0; i<100; i++) |
|
550 | for (i=0; i<100; i++) | |
548 | { |
|
551 | { | |
549 | parameters[i] = 0xff; |
|
552 | parameters[i] = 0xff; | |
550 | } |
|
553 | } | |
551 |
|
554 | |||
552 | get_message_queue_id_send( &queue_id ); |
|
555 | get_message_queue_id_send( &queue_id ); | |
553 |
|
556 | |||
554 | rtems_message_queue_send( queue_id, &dummy_hk_packet, |
|
557 | rtems_message_queue_send( queue_id, &dummy_hk_packet, | |
555 | PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES); |
|
558 | PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES); | |
556 | } |
|
559 | } | |
557 |
|
560 | |||
558 | void get_temperatures( unsigned char *temperatures ) |
|
561 | void get_temperatures( unsigned char *temperatures ) | |
559 | { |
|
562 | { | |
560 | unsigned char* temp_scm_ptr; |
|
563 | unsigned char* temp_scm_ptr; | |
561 | unsigned char* temp_pcb_ptr; |
|
564 | unsigned char* temp_pcb_ptr; | |
562 | unsigned char* temp_fpga_ptr; |
|
565 | unsigned char* temp_fpga_ptr; | |
563 |
|
566 | |||
564 | // SEL1 SEL0 |
|
567 | // SEL1 SEL0 | |
565 | // 0 0 => PCB |
|
568 | // 0 0 => PCB | |
566 | // 0 1 => FPGA |
|
569 | // 0 1 => FPGA | |
567 | // 1 0 => SCM |
|
570 | // 1 0 => SCM | |
568 |
|
571 | |||
569 | temp_scm_ptr = (unsigned char *) &time_management_regs->temp_scm; |
|
572 | temp_scm_ptr = (unsigned char *) &time_management_regs->temp_scm; | |
570 | temp_pcb_ptr = (unsigned char *) &time_management_regs->temp_pcb; |
|
573 | temp_pcb_ptr = (unsigned char *) &time_management_regs->temp_pcb; | |
571 | temp_fpga_ptr = (unsigned char *) &time_management_regs->temp_fpga; |
|
574 | temp_fpga_ptr = (unsigned char *) &time_management_regs->temp_fpga; | |
572 |
|
575 | |||
573 | temperatures[0] = temp_scm_ptr[2]; |
|
576 | temperatures[0] = temp_scm_ptr[2]; | |
574 | temperatures[1] = temp_scm_ptr[3]; |
|
577 | temperatures[1] = temp_scm_ptr[3]; | |
575 | temperatures[2] = temp_pcb_ptr[2]; |
|
578 | temperatures[2] = temp_pcb_ptr[2]; | |
576 | temperatures[3] = temp_pcb_ptr[3]; |
|
579 | temperatures[3] = temp_pcb_ptr[3]; | |
577 | temperatures[4] = temp_fpga_ptr[2]; |
|
580 | temperatures[4] = temp_fpga_ptr[2]; | |
578 | temperatures[5] = temp_fpga_ptr[3]; |
|
581 | temperatures[5] = temp_fpga_ptr[3]; | |
579 | } |
|
582 | } | |
580 |
|
583 | |||
581 | void get_v_e1_e2_f3( unsigned char *spacecraft_potential ) |
|
584 | void get_v_e1_e2_f3( unsigned char *spacecraft_potential ) | |
582 | { |
|
585 | { | |
583 | unsigned char* v_ptr; |
|
586 | unsigned char* v_ptr; | |
584 | unsigned char* e1_ptr; |
|
587 | unsigned char* e1_ptr; | |
585 | unsigned char* e2_ptr; |
|
588 | unsigned char* e2_ptr; | |
586 |
|
589 | |||
587 | v_ptr = (unsigned char *) &waveform_picker_regs->v; |
|
590 | v_ptr = (unsigned char *) &waveform_picker_regs->v; | |
588 | e1_ptr = (unsigned char *) &waveform_picker_regs->e1; |
|
591 | e1_ptr = (unsigned char *) &waveform_picker_regs->e1; | |
589 | e2_ptr = (unsigned char *) &waveform_picker_regs->e2; |
|
592 | e2_ptr = (unsigned char *) &waveform_picker_regs->e2; | |
590 |
|
593 | |||
591 | spacecraft_potential[0] = v_ptr[2]; |
|
594 | spacecraft_potential[0] = v_ptr[2]; | |
592 | spacecraft_potential[1] = v_ptr[3]; |
|
595 | spacecraft_potential[1] = v_ptr[3]; | |
593 | spacecraft_potential[2] = e1_ptr[2]; |
|
596 | spacecraft_potential[2] = e1_ptr[2]; | |
594 | spacecraft_potential[3] = e1_ptr[3]; |
|
597 | spacecraft_potential[3] = e1_ptr[3]; | |
595 | spacecraft_potential[4] = e2_ptr[2]; |
|
598 | spacecraft_potential[4] = e2_ptr[2]; | |
596 | spacecraft_potential[5] = e2_ptr[3]; |
|
599 | spacecraft_potential[5] = e2_ptr[3]; | |
597 | } |
|
600 | } | |
598 |
|
601 | |||
599 | void get_cpu_load( unsigned char *resource_statistics ) |
|
602 | void get_cpu_load( unsigned char *resource_statistics ) | |
600 | { |
|
603 | { | |
601 | unsigned char cpu_load; |
|
604 | unsigned char cpu_load; | |
602 |
|
605 | |||
603 | cpu_load = lfr_rtems_cpu_usage_report(); |
|
606 | cpu_load = lfr_rtems_cpu_usage_report(); | |
604 |
|
607 | |||
605 | // HK_LFR_CPU_LOAD |
|
608 | // HK_LFR_CPU_LOAD | |
606 | resource_statistics[0] = cpu_load; |
|
609 | resource_statistics[0] = cpu_load; | |
607 |
|
610 | |||
608 | // HK_LFR_CPU_LOAD_MAX |
|
611 | // HK_LFR_CPU_LOAD_MAX | |
609 | if (cpu_load > resource_statistics[1]) |
|
612 | if (cpu_load > resource_statistics[1]) | |
610 | { |
|
613 | { | |
611 | resource_statistics[1] = cpu_load; |
|
614 | resource_statistics[1] = cpu_load; | |
612 | } |
|
615 | } | |
613 |
|
616 | |||
614 | // CPU_LOAD_AVE |
|
617 | // CPU_LOAD_AVE | |
615 | resource_statistics[2] = 0; |
|
618 | resource_statistics[2] = 0; | |
616 |
|
619 | |||
617 | #ifndef PRINT_TASK_STATISTICS |
|
620 | #ifndef PRINT_TASK_STATISTICS | |
618 | rtems_cpu_usage_reset(); |
|
621 | rtems_cpu_usage_reset(); | |
619 | #endif |
|
622 | #endif | |
620 |
|
623 | |||
621 | } |
|
624 | } | |
622 |
|
625 | |||
623 | void set_hk_lfr_sc_potential_flag( bool state ) |
|
626 | void set_hk_lfr_sc_potential_flag( bool state ) | |
624 | { |
|
627 | { | |
625 | if (state == true) |
|
628 | if (state == true) | |
626 | { |
|
629 | { | |
627 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x40; // [0100 0000] |
|
630 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x40; // [0100 0000] | |
628 | } |
|
631 | } | |
629 | else |
|
632 | else | |
630 | { |
|
633 | { | |
631 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xbf; // [1011 1111] |
|
634 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xbf; // [1011 1111] | |
632 | } |
|
635 | } | |
633 | } |
|
636 | } | |
634 |
|
637 | |||
635 | void set_hk_lfr_mag_fields_flag( bool state ) |
|
638 | void set_hk_lfr_mag_fields_flag( bool state ) | |
636 | { |
|
639 | { | |
637 | if (state == true) |
|
640 | if (state == true) | |
638 | { |
|
641 | { | |
639 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x20; // [0010 0000] |
|
642 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x20; // [0010 0000] | |
640 | } |
|
643 | } | |
641 | else |
|
644 | else | |
642 | { |
|
645 | { | |
643 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xd7; // [1101 1111] |
|
646 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xd7; // [1101 1111] | |
644 | } |
|
647 | } | |
645 | } |
|
648 | } | |
646 |
|
649 | |||
647 | void set_hk_lfr_calib_enable( bool state ) |
|
650 | void set_hk_lfr_calib_enable( bool state ) | |
648 | { |
|
651 | { | |
649 | if (state == true) |
|
652 | if (state == true) | |
650 | { |
|
653 | { | |
651 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x08; // [0000 1000] |
|
654 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x08; // [0000 1000] | |
652 | } |
|
655 | } | |
653 | else |
|
656 | else | |
654 | { |
|
657 | { | |
655 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xf7; // [1111 0111] |
|
658 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xf7; // [1111 0111] | |
656 | } |
|
659 | } | |
657 | } |
|
660 | } | |
658 |
|
661 | |||
659 | void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause ) |
|
662 | void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause ) | |
660 | { |
|
663 | { | |
661 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] |
|
664 | housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | |
662 | | (lfr_reset_cause & 0x07 ); // [0000 0111] |
|
665 | | (lfr_reset_cause & 0x07 ); // [0000 0111] | |
663 | } |
|
666 | } | |
664 |
|
667 | |||
665 | void hk_lfr_le_me_he_update() |
|
668 | void hk_lfr_le_me_he_update() | |
666 | { |
|
669 | { | |
667 | unsigned int hk_lfr_le_cnt; |
|
670 | unsigned int hk_lfr_le_cnt; | |
668 | unsigned int hk_lfr_me_cnt; |
|
671 | unsigned int hk_lfr_me_cnt; | |
669 | unsigned int hk_lfr_he_cnt; |
|
672 | unsigned int hk_lfr_he_cnt; | |
670 |
|
673 | |||
671 | hk_lfr_le_cnt = 0; |
|
674 | hk_lfr_le_cnt = 0; | |
672 | hk_lfr_me_cnt = 0; |
|
675 | hk_lfr_me_cnt = 0; | |
673 | hk_lfr_he_cnt = 0; |
|
676 | hk_lfr_he_cnt = 0; | |
674 |
|
677 | |||
675 | //update the low severity error counter |
|
678 | //update the low severity error counter | |
676 | hk_lfr_le_cnt = |
|
679 | hk_lfr_le_cnt = | |
677 | housekeeping_packet.hk_lfr_dpu_spw_parity |
|
680 | housekeeping_packet.hk_lfr_dpu_spw_parity | |
678 | + housekeeping_packet.hk_lfr_dpu_spw_disconnect |
|
681 | + housekeeping_packet.hk_lfr_dpu_spw_disconnect | |
679 | + housekeeping_packet.hk_lfr_dpu_spw_escape |
|
682 | + housekeeping_packet.hk_lfr_dpu_spw_escape | |
680 | + housekeeping_packet.hk_lfr_dpu_spw_credit |
|
683 | + housekeeping_packet.hk_lfr_dpu_spw_credit | |
681 | + housekeeping_packet.hk_lfr_dpu_spw_write_sync |
|
684 | + housekeeping_packet.hk_lfr_dpu_spw_write_sync | |
682 | + housekeeping_packet.hk_lfr_dpu_spw_rx_ahb |
|
685 | + housekeeping_packet.hk_lfr_dpu_spw_rx_ahb | |
683 | + housekeeping_packet.hk_lfr_dpu_spw_tx_ahb |
|
686 | + housekeeping_packet.hk_lfr_dpu_spw_tx_ahb | |
684 | + housekeeping_packet.hk_lfr_timecode_erroneous |
|
687 | + housekeeping_packet.hk_lfr_timecode_erroneous | |
685 | + housekeeping_packet.hk_lfr_timecode_missing |
|
688 | + housekeeping_packet.hk_lfr_timecode_missing | |
686 | + housekeeping_packet.hk_lfr_timecode_invalid |
|
689 | + housekeeping_packet.hk_lfr_timecode_invalid | |
687 | + housekeeping_packet.hk_lfr_time_timecode_it |
|
690 | + housekeeping_packet.hk_lfr_time_timecode_it | |
688 | + housekeeping_packet.hk_lfr_time_not_synchro |
|
691 | + housekeeping_packet.hk_lfr_time_not_synchro | |
689 | + housekeeping_packet.hk_lfr_time_timecode_ctr; |
|
692 | + housekeeping_packet.hk_lfr_time_timecode_ctr; | |
690 |
|
693 | |||
691 | //update the medium severity error counter |
|
694 | //update the medium severity error counter | |
692 | hk_lfr_me_cnt = |
|
695 | hk_lfr_me_cnt = | |
693 | housekeeping_packet.hk_lfr_dpu_spw_early_eop |
|
696 | housekeeping_packet.hk_lfr_dpu_spw_early_eop | |
694 | + housekeeping_packet.hk_lfr_dpu_spw_invalid_addr |
|
697 | + housekeeping_packet.hk_lfr_dpu_spw_invalid_addr | |
695 | + housekeeping_packet.hk_lfr_dpu_spw_eep |
|
698 | + housekeeping_packet.hk_lfr_dpu_spw_eep | |
696 | + housekeeping_packet.hk_lfr_dpu_spw_rx_too_big; |
|
699 | + housekeeping_packet.hk_lfr_dpu_spw_rx_too_big; | |
697 |
|
700 | |||
698 | //update the high severity error counter |
|
701 | //update the high severity error counter | |
699 | hk_lfr_he_cnt = 0; |
|
702 | hk_lfr_he_cnt = 0; | |
700 |
|
703 | |||
701 | // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers |
|
704 | // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers | |
702 | // LE |
|
705 | // LE | |
703 | housekeeping_packet.hk_lfr_le_cnt[0] = (unsigned char) ((hk_lfr_le_cnt & 0xff00) >> 8); |
|
706 | housekeeping_packet.hk_lfr_le_cnt[0] = (unsigned char) ((hk_lfr_le_cnt & 0xff00) >> 8); | |
704 | housekeeping_packet.hk_lfr_le_cnt[1] = (unsigned char) (hk_lfr_le_cnt & 0x00ff); |
|
707 | housekeeping_packet.hk_lfr_le_cnt[1] = (unsigned char) (hk_lfr_le_cnt & 0x00ff); | |
705 | // ME |
|
708 | // ME | |
706 | housekeeping_packet.hk_lfr_me_cnt[0] = (unsigned char) ((hk_lfr_me_cnt & 0xff00) >> 8); |
|
709 | housekeeping_packet.hk_lfr_me_cnt[0] = (unsigned char) ((hk_lfr_me_cnt & 0xff00) >> 8); | |
707 | housekeeping_packet.hk_lfr_me_cnt[1] = (unsigned char) (hk_lfr_me_cnt & 0x00ff); |
|
710 | housekeeping_packet.hk_lfr_me_cnt[1] = (unsigned char) (hk_lfr_me_cnt & 0x00ff); | |
708 | // HE |
|
711 | // HE | |
709 | housekeeping_packet.hk_lfr_he_cnt[0] = (unsigned char) ((hk_lfr_he_cnt & 0xff00) >> 8); |
|
712 | housekeeping_packet.hk_lfr_he_cnt[0] = (unsigned char) ((hk_lfr_he_cnt & 0xff00) >> 8); | |
710 | housekeeping_packet.hk_lfr_he_cnt[1] = (unsigned char) (hk_lfr_he_cnt & 0x00ff); |
|
713 | housekeeping_packet.hk_lfr_he_cnt[1] = (unsigned char) (hk_lfr_he_cnt & 0x00ff); | |
711 |
|
714 | |||
712 | } |
|
715 | } | |
713 |
|
716 | |||
714 | void set_hk_lfr_time_not_synchro() |
|
717 | void set_hk_lfr_time_not_synchro() | |
715 | { |
|
718 | { | |
716 | static unsigned char synchroLost = 0; |
|
719 | static unsigned char synchroLost = 0; | |
717 | int synchronizationBit; |
|
720 | int synchronizationBit; | |
718 |
|
721 | |||
719 | // get the synchronization bit |
|
722 | // get the synchronization bit | |
720 | synchronizationBit = (time_management_regs->coarse_time & 0x80000000) >> 31; // 1000 0000 0000 0000 |
|
723 | synchronizationBit = (time_management_regs->coarse_time & 0x80000000) >> 31; // 1000 0000 0000 0000 | |
721 |
|
724 | |||
722 | switch (synchronizationBit) |
|
725 | switch (synchronizationBit) | |
723 | { |
|
726 | { | |
724 | case 0: |
|
727 | case 0: | |
725 | if (synchroLost == 1) |
|
728 | if (synchroLost == 1) | |
726 | { |
|
729 | { | |
727 | synchroLost = 0; |
|
730 | synchroLost = 0; | |
728 | } |
|
731 | } | |
729 | break; |
|
732 | break; | |
730 | case 1: |
|
733 | case 1: | |
731 | if (synchroLost == 0 ) |
|
734 | if (synchroLost == 0 ) | |
732 | { |
|
735 | { | |
733 | synchroLost = 1; |
|
736 | synchroLost = 1; | |
734 | increase_unsigned_char_counter(&housekeeping_packet.hk_lfr_time_not_synchro); |
|
737 | increase_unsigned_char_counter(&housekeeping_packet.hk_lfr_time_not_synchro); | |
735 | } |
|
738 | } | |
736 | break; |
|
739 | break; | |
737 | default: |
|
740 | default: | |
738 | PRINTF1("in hk_lfr_time_not_synchro *** unexpected value for synchronizationBit = %d\n", synchronizationBit); |
|
741 | PRINTF1("in hk_lfr_time_not_synchro *** unexpected value for synchronizationBit = %d\n", synchronizationBit); | |
739 | break; |
|
742 | break; | |
740 | } |
|
743 | } | |
741 |
|
744 | |||
742 | } |
|
745 | } |
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