##// END OF EJS Templates
2.0.2.2...
paul -
r187:87f7d2226935 VHDL_0_1_28
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@@ -1,2 +1,2
1 a586fe639ac179e95bdc150ebdbab0312f31dc30 LFR_basic-parameters
1 a586fe639ac179e95bdc150ebdbab0312f31dc30 LFR_basic-parameters
2 6d02d4b02291d2b25c387fa74037dc7929cd92b5 header/lfr_common_headers
2 be0dc1c1876987307ddfc0fb47044f6d41815866 header/lfr_common_headers
@@ -12,7 +12,7 SWVERSION=-1-0
12 DEFINES += SW_VERSION_N1=2 # major
12 DEFINES += SW_VERSION_N1=2 # major
13 DEFINES += SW_VERSION_N2=0 # minor
13 DEFINES += SW_VERSION_N2=0 # minor
14 DEFINES += SW_VERSION_N3=2 # patch
14 DEFINES += SW_VERSION_N3=2 # patch
15 DEFINES += SW_VERSION_N4=1 # internal
15 DEFINES += SW_VERSION_N4=2 # internal
16
16
17 # <GCOV>
17 # <GCOV>
18 #QMAKE_CFLAGS_RELEASE += -fprofile-arcs -ftest-coverage
18 #QMAKE_CFLAGS_RELEASE += -fprofile-arcs -ftest-coverage
@@ -1,12 +1,11
1 #ifndef GSCMEMORY_HPP_
1 #ifndef GSCMEMORY_HPP_
2 #define GSCMEMORY_HPP_
2 #define GSCMEMORY_HPP_
3
3
4 static unsigned int getCacheControlRegister(){
5
6 #ifndef LEON3
4 #ifndef LEON3
7 #define LEON3
5 #define LEON3
8 #endif
6 #endif
9
7
8 static unsigned int getCacheControlRegister(){
10 #ifdef LEON3
9 #ifdef LEON3
11 unsigned int cacheControlRegister = 0;
10 unsigned int cacheControlRegister = 0;
12 __asm__ __volatile__("lda [%%g0] 2, %0" : "=r"(cacheControlRegister) : );
11 __asm__ __volatile__("lda [%%g0] 2, %0" : "=r"(cacheControlRegister) : );
@@ -14,8 +13,8 static unsigned int getCacheControlRegis
14 #endif
13 #endif
15 }
14 }
16
15
17 static void setCacheControlRegister(unsigned int cacheControlRegister){
16 static void setCacheControlRegister(unsigned int cacheControlRegister)
18
17 {
19 #ifdef LEON3
18 #ifdef LEON3
20 __asm__ __volatile__("sta %0, [%%g0] 2" : : "r"(cacheControlRegister));
19 __asm__ __volatile__("sta %0, [%%g0] 2" : : "r"(cacheControlRegister));
21 #endif
20 #endif
@@ -23,17 +22,16 static void setCacheControlRegister(unsi
23
22
24
23
25 /**
24 /**
26 * Flush the data cache and the instruction cache.
25 * Flush the data cache and the instruction cache.
27 *
26 *
28 * @return
27 * @return
29 */
28 */
30 static inline void flushCache() {
29 static inline void flushCache() {
31 asm("flush");
30 asm("flush");
32 }
31 }
33
32
34
33
35 static void enableInstructionCache() {
34 static void enableInstructionCache() {
36
37 #ifdef LEON3
35 #ifdef LEON3
38 unsigned int cacheControlRegister;
36 unsigned int cacheControlRegister;
39 cacheControlRegister = getCacheControlRegister();
37 cacheControlRegister = getCacheControlRegister();
@@ -43,7 +41,6 static void enableInstructionCache() {
43 }
41 }
44
42
45 static void enableDataCache() {
43 static void enableDataCache() {
46
47 #ifdef LEON3
44 #ifdef LEON3
48 unsigned int cacheControlRegister;
45 unsigned int cacheControlRegister;
49 cacheControlRegister = getCacheControlRegister();
46 cacheControlRegister = getCacheControlRegister();
@@ -53,7 +50,6 static void enableDataCache() {
53 }
50 }
54
51
55 static void enableInstructionBurstFetch() {
52 static void enableInstructionBurstFetch() {
56
57 #ifdef LEON3
53 #ifdef LEON3
58 unsigned int cacheControlRegister;
54 unsigned int cacheControlRegister;
59 cacheControlRegister = getCacheControlRegister();
55 cacheControlRegister = getCacheControlRegister();
@@ -45,9 +45,16 typedef struct {
45 volatile int coarse_time_load;
45 volatile int coarse_time_load;
46 volatile int coarse_time;
46 volatile int coarse_time;
47 volatile int fine_time;
47 volatile int fine_time;
48 volatile int temp_scm;
48 // TEMPERATURES
49 volatile int temp_pcb;
49 volatile int temp_pcb; // SEL1 = 0 SEL0 = 0
50 volatile int temp_fpga;
50 volatile int temp_fpga; // SEL1 = 0 SEL0 = 1
51 volatile int temp_scm; // SEL1 = 1 SEL0 = 0
52 // CALIBRATION
53 volatile unsigned int calDACCtrl;
54 volatile unsigned int calPrescaler;
55 volatile unsigned int calDivisor;
56 volatile unsigned int calDataPtr;
57 volatile unsigned int calData;
51 } time_management_regs_t;
58 } time_management_regs_t;
52
59
53 // PDB >= 0.1.28
60 // PDB >= 0.1.28
@@ -51,6 +51,17 void set_sm_irq_onError( unsigned char v
51 void updateLFRCurrentMode();
51 void updateLFRCurrentMode();
52 void set_lfr_soft_reset( unsigned char value );
52 void set_lfr_soft_reset( unsigned char value );
53 void reset_lfr( void );
53 void reset_lfr( void );
54 // CALIBRATION
55 void setCalibrationPrescaler( unsigned int prescaler );
56 void setCalibrationDivisor( unsigned int divisionFactor );
57 void setCalibrationData( void );
58 void setCalibrationReload( bool state);
59 void setCalibrationEnable( bool state );
60 void setCalibrationInterleaved( bool state );
61 void startCalibration( void );
62 void stopCalibration( void );
63 void configureCalibration( bool interleaved );
64 //
54 void update_last_TC_exe( ccsdsTelecommandPacket_t *TC , unsigned char *time );
65 void update_last_TC_exe( ccsdsTelecommandPacket_t *TC , unsigned char *time );
55 void update_last_TC_rej(ccsdsTelecommandPacket_t *TC , unsigned char *time );
66 void update_last_TC_rej(ccsdsTelecommandPacket_t *TC , unsigned char *time );
56 void close_action( ccsdsTelecommandPacket_t *TC, int result, rtems_id queue_id );
67 void close_action( ccsdsTelecommandPacket_t *TC, int result, rtems_id queue_id );
@@ -11,7 +11,7
11 #include "fsw_misc.h"
11 #include "fsw_misc.h"
12 #include "fsw_params_wf_handler.h"
12 #include "fsw_params_wf_handler.h"
13
13
14 #define pi 3.1415
14 #define pi 3.14159265359
15
15
16 extern int fdSPW;
16 extern int fdSPW;
17
17
@@ -145,6 +145,9 rtems_task Init( rtems_task_argument ign
145 SM_reset_current_ring_nodes();
145 SM_reset_current_ring_nodes();
146 reset_spectral_matrix_regs();
146 reset_spectral_matrix_regs();
147
147
148 // configure calibration
149 configureCalibration( false ); // true means interleaved mode, false is for normal mode
150
148 updateLFRCurrentMode();
151 updateLFRCurrentMode();
149
152
150 BOOT_PRINTF1("in INIT *** lfrCurrentMode is %d\n", lfrCurrentMode)
153 BOOT_PRINTF1("in INIT *** lfrCurrentMode is %d\n", lfrCurrentMode)
@@ -448,6 +448,11 void get_temperatures( unsigned char *te
448 unsigned char* temp_pcb_ptr;
448 unsigned char* temp_pcb_ptr;
449 unsigned char* temp_fpga_ptr;
449 unsigned char* temp_fpga_ptr;
450
450
451 // SEL1 SEL0
452 // 0 0 => PCB
453 // 0 1 => FPGA
454 // 1 0 => SCM
455
451 temp_scm_ptr = (unsigned char *) &time_management_regs->temp_scm;
456 temp_scm_ptr = (unsigned char *) &time_management_regs->temp_scm;
452 temp_pcb_ptr = (unsigned char *) &time_management_regs->temp_pcb;
457 temp_pcb_ptr = (unsigned char *) &time_management_regs->temp_pcb;
453 temp_fpga_ptr = (unsigned char *) &time_management_regs->temp_fpga;
458 temp_fpga_ptr = (unsigned char *) &time_management_regs->temp_fpga;
@@ -11,6 +11,7
11 */
11 */
12
12
13 #include "tc_handler.h"
13 #include "tc_handler.h"
14 #include "math.h"
14
15
15 //***********
16 //***********
16 // RTEMS TASK
17 // RTEMS TASK
@@ -267,13 +268,12 int action_enable_calibration(ccsdsTelec
267 */
268 */
268
269
269 int result;
270 int result;
270 unsigned char lfrMode;
271
271
272 result = LFR_DEFAULT;
272 result = LFR_DEFAULT;
273 lfrMode = (housekeeping_packet.lfr_status_word[0] & 0xf0) >> 4;
274
273
275 send_tm_lfr_tc_exe_not_implemented( TC, queue_id, time );
274 startCalibration();
276 result = LFR_DEFAULT;
275
276 result = LFR_SUCCESSFUL;
277
277
278 return result;
278 return result;
279 }
279 }
@@ -288,13 +288,12 int action_disable_calibration(ccsdsTele
288 */
288 */
289
289
290 int result;
290 int result;
291 unsigned char lfrMode;
292
291
293 result = LFR_DEFAULT;
292 result = LFR_DEFAULT;
294 lfrMode = (housekeeping_packet.lfr_status_word[0] & 0xf0) >> 4;
295
293
296 send_tm_lfr_tc_exe_not_implemented( TC, queue_id, time );
294 stopCalibration();
297 result = LFR_DEFAULT;
295
296 result = LFR_SUCCESSFUL;
298
297
299 return result;
298 return result;
300 }
299 }
@@ -823,6 +822,153 void set_sm_irq_onError( unsigned char v
823 }
822 }
824 }
823 }
825
824
825 //*****************************
826 // CONFIGURE CALIBRATION SIGNAL
827 void setCalibrationPrescaler( unsigned int prescaler )
828 {
829 // prescaling of the master clock (25 MHz)
830 // master clock is divided by 2^prescaler
831 time_management_regs->calPrescaler = prescaler;
832 }
833
834 void setCalibrationDivisor( unsigned int divisionFactor )
835 {
836 // division of the prescaled clock by the division factor
837 time_management_regs->calDivisor = divisionFactor;
838 }
839
840 void setCalibrationData( void ){
841 unsigned int k;
842 unsigned short data;
843 float val;
844 float f0;
845 float f1;
846 float fs;
847 float Ts;
848 float scaleFactor;
849
850 f0 = 625;
851 f1 = 10000;
852 fs = 160256.410;
853 Ts = 1. / fs;
854 scaleFactor = 0.125 / 0.000654; // 191, 500 mVpp, 2 sinus waves => 250 mVpp each, amplitude = 125 mV
855
856 time_management_regs->calDataPtr = 0x00;
857
858 // build the signal for the SCM calibration
859 for (k=0; k<256; k++)
860 {
861 val = sin( 2 * pi * f0 * k * Ts )
862 + sin( 2 * pi * f1 * k * Ts );
863 data = (unsigned short) ((val * scaleFactor) + 2048);
864 time_management_regs->calData = data & 0xfff;
865 }
866 }
867
868 void setCalibrationDataInterleaved( void ){
869 unsigned int k;
870 float val;
871 float f0;
872 float f1;
873 float fs;
874 float Ts;
875 unsigned short data[384];
876 unsigned char *dataPtr;
877
878 f0 = 625;
879 f1 = 10000;
880 fs = 240384.615;
881 Ts = 1. / fs;
882
883 time_management_regs->calDataPtr = 0x00;
884
885 // build the signal for the SCM calibration
886 for (k=0; k<384; k++)
887 {
888 val = sin( 2 * pi * f0 * k * Ts )
889 + sin( 2 * pi * f1 * k * Ts );
890 data[k] = (unsigned short) (val * 512 + 2048);
891 }
892
893 // write the signal in interleaved mode
894 for (k=0; k<128; k++)
895 {
896 dataPtr = (unsigned char*) &data[k*3 + 2];
897 time_management_regs->calData = (data[k*3] & 0xfff)
898 + ( (dataPtr[0] & 0x3f) << 12);
899 time_management_regs->calData = (data[k*3 + 1] & 0xfff)
900 + ( (dataPtr[1] & 0x3f) << 12);
901 }
902 }
903
904 void setCalibrationReload( bool state)
905 {
906 if (state == true)
907 {
908 time_management_regs->calDACCtrl = time_management_regs->calDACCtrl | 0x00000010; // [0001 0000]
909 }
910 else
911 {
912 time_management_regs->calDACCtrl = time_management_regs->calDACCtrl & 0xffffffef; // [1110 1111]
913 }
914 }
915
916 void setCalibrationEnable( bool state )
917 {
918 // this bit drives the multiplexer
919 if (state == true)
920 {
921 time_management_regs->calDACCtrl = time_management_regs->calDACCtrl | 0x00000040; // [0100 0000]
922 }
923 else
924 {
925 time_management_regs->calDACCtrl = time_management_regs->calDACCtrl & 0xffffffbf; // [1011 1111]
926 }
927 }
928
929 void setCalibrationInterleaved( bool state )
930 {
931 // this bit drives the multiplexer
932 if (state == true)
933 {
934 time_management_regs->calDACCtrl = time_management_regs->calDACCtrl | 0x00000020; // [0010 0000]
935 }
936 else
937 {
938 time_management_regs->calDACCtrl = time_management_regs->calDACCtrl & 0xffffffdf; // [1101 1111]
939 }
940 }
941
942 void startCalibration( void )
943 {
944 setCalibrationEnable( true );
945 setCalibrationReload( false );
946 }
947
948 void stopCalibration( void )
949 {
950 setCalibrationEnable( false );
951 setCalibrationReload( true );
952 }
953
954 void configureCalibration( bool interleaved )
955 {
956 stopCalibration();
957 if ( interleaved == true )
958 {
959 setCalibrationInterleaved( true );
960 setCalibrationPrescaler( 0 ); // 25 MHz => 25 000 000
961 setCalibrationDivisor( 26 ); // => 240 384
962 setCalibrationDataInterleaved();
963 }
964 else
965 {
966 setCalibrationPrescaler( 0 ); // 25 MHz => 25 000 000
967 setCalibrationDivisor( 38 ); // => 160 256 (39 - 1)
968 setCalibrationData();
969 }
970 }
971
826 //****************
972 //****************
827 // CLOSING ACTIONS
973 // CLOSING ACTIONS
828 void update_last_TC_exe( ccsdsTelecommandPacket_t *TC, unsigned char * time )
974 void update_last_TC_exe( ccsdsTelecommandPacket_t *TC, unsigned char * time )
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