##// END OF EJS Templates
hk_lfr_time_not_synchro is updated each time the synchro is lost....
paul -
r249:43d4aa6b8829 R3a
parent child
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@@ -1,78 +1,79
1 #ifndef FSW_MISC_H_INCLUDED
1 #ifndef FSW_MISC_H_INCLUDED
2 #define FSW_MISC_H_INCLUDED
2 #define FSW_MISC_H_INCLUDED
3
3
4 #include <rtems.h>
4 #include <rtems.h>
5 #include <stdio.h>
5 #include <stdio.h>
6 #include <grspw.h>
6 #include <grspw.h>
7 #include <grlib_regs.h>
7 #include <grlib_regs.h>
8
8
9 #include "fsw_params.h"
9 #include "fsw_params.h"
10 #include "fsw_spacewire.h"
10 #include "fsw_spacewire.h"
11 #include "lfr_cpu_usage_report.h"
11 #include "lfr_cpu_usage_report.h"
12
12
13 enum lfr_reset_cause_t{
13 enum lfr_reset_cause_t{
14 UNKNOWN_CAUSE,
14 UNKNOWN_CAUSE,
15 POWER_ON,
15 POWER_ON,
16 TC_RESET,
16 TC_RESET,
17 WATCHDOG,
17 WATCHDOG,
18 ERROR_RESET,
18 ERROR_RESET,
19 UNEXP_RESET
19 UNEXP_RESET
20 };
20 };
21
21
22 extern gptimer_regs_t *gptimer_regs;
22 extern gptimer_regs_t *gptimer_regs;
23
23
24 #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0
24 #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0
25
25
26 rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic
26 rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic
27 rtems_id HK_id; // id of the HK rate monotonic period
27 rtems_id HK_id; // id of the HK rate monotonic period
28
28
29 void timer_configure( unsigned char timer, unsigned int clock_divider,
29 void timer_configure( unsigned char timer, unsigned int clock_divider,
30 unsigned char interrupt_level, rtems_isr (*timer_isr)() );
30 unsigned char interrupt_level, rtems_isr (*timer_isr)() );
31 void timer_start( unsigned char timer );
31 void timer_start( unsigned char timer );
32 void timer_stop( unsigned char timer );
32 void timer_stop( unsigned char timer );
33 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider);
33 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider);
34
34
35 // WATCHDOG
35 // WATCHDOG
36 rtems_isr watchdog_isr( rtems_vector_number vector );
36 rtems_isr watchdog_isr( rtems_vector_number vector );
37 void watchdog_configure(void);
37 void watchdog_configure(void);
38 void watchdog_stop(void);
38 void watchdog_stop(void);
39 void watchdog_start(void);
39 void watchdog_start(void);
40
40
41 // SERIAL LINK
41 // SERIAL LINK
42 int send_console_outputs_on_apbuart_port( void );
42 int send_console_outputs_on_apbuart_port( void );
43 int enable_apbuart_transmitter( void );
43 int enable_apbuart_transmitter( void );
44 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value);
44 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value);
45
45
46 // RTEMS TASKS
46 // RTEMS TASKS
47 rtems_task load_task( rtems_task_argument argument );
47 rtems_task load_task( rtems_task_argument argument );
48 rtems_task hous_task( rtems_task_argument argument );
48 rtems_task hous_task( rtems_task_argument argument );
49 rtems_task dumb_task( rtems_task_argument unused );
49 rtems_task dumb_task( rtems_task_argument unused );
50
50
51 void init_housekeeping_parameters( void );
51 void init_housekeeping_parameters( void );
52 void increment_seq_counter(unsigned short *packetSequenceControl);
52 void increment_seq_counter(unsigned short *packetSequenceControl);
53 void getTime( unsigned char *time);
53 void getTime( unsigned char *time);
54 unsigned long long int getTimeAsUnsignedLongLongInt( );
54 unsigned long long int getTimeAsUnsignedLongLongInt( );
55 void send_dumb_hk( void );
55 void send_dumb_hk( void );
56 void get_temperatures( unsigned char *temperatures );
56 void get_temperatures( unsigned char *temperatures );
57 void get_v_e1_e2_f3( unsigned char *spacecraft_potential );
57 void get_v_e1_e2_f3( unsigned char *spacecraft_potential );
58 void get_cpu_load( unsigned char *resource_statistics );
58 void get_cpu_load( unsigned char *resource_statistics );
59 void set_hk_lfr_sc_potential_flag( bool state );
59 void set_hk_lfr_sc_potential_flag( bool state );
60 void set_hk_lfr_mag_fields_flag( bool state );
60 void set_hk_lfr_mag_fields_flag( bool state );
61 void set_hk_lfr_calib_enable( bool state );
61 void set_hk_lfr_calib_enable( bool state );
62 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause );
62 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause );
63 void hk_lfr_le_me_he_update();
63 void hk_lfr_le_me_he_update();
64 void set_hk_lfr_time_not_synchro();
64
65
65 extern int sched_yield( void );
66 extern int sched_yield( void );
66 extern void rtems_cpu_usage_reset();
67 extern void rtems_cpu_usage_reset();
67 extern ring_node *current_ring_node_f3;
68 extern ring_node *current_ring_node_f3;
68 extern ring_node *ring_node_to_send_cwf_f3;
69 extern ring_node *ring_node_to_send_cwf_f3;
69 extern ring_node waveform_ring_f3[];
70 extern ring_node waveform_ring_f3[];
70 extern unsigned short sequenceCounterHK;
71 extern unsigned short sequenceCounterHK;
71
72
72 extern unsigned char hk_lfr_q_sd_fifo_size_max;
73 extern unsigned char hk_lfr_q_sd_fifo_size_max;
73 extern unsigned char hk_lfr_q_rv_fifo_size_max;
74 extern unsigned char hk_lfr_q_rv_fifo_size_max;
74 extern unsigned char hk_lfr_q_p0_fifo_size_max;
75 extern unsigned char hk_lfr_q_p0_fifo_size_max;
75 extern unsigned char hk_lfr_q_p1_fifo_size_max;
76 extern unsigned char hk_lfr_q_p1_fifo_size_max;
76 extern unsigned char hk_lfr_q_p2_fifo_size_max;
77 extern unsigned char hk_lfr_q_p2_fifo_size_max;
77
78
78 #endif // FSW_MISC_H_INCLUDED
79 #endif // FSW_MISC_H_INCLUDED
@@ -1,56 +1,56
1 #ifndef FSW_SPACEWIRE_H_INCLUDED
1 #ifndef FSW_SPACEWIRE_H_INCLUDED
2 #define FSW_SPACEWIRE_H_INCLUDED
2 #define FSW_SPACEWIRE_H_INCLUDED
3
3
4 #include <rtems.h>
4 #include <rtems.h>
5 #include <grspw.h>
5 #include <grspw.h>
6
6
7 #include <fcntl.h> // for O_RDWR
7 #include <fcntl.h> // for O_RDWR
8 #include <unistd.h> // for the read call
8 #include <unistd.h> // for the read call
9 #include <sys/ioctl.h> // for the ioctl call
9 #include <sys/ioctl.h> // for the ioctl call
10 #include <errno.h>
10 #include <errno.h>
11
11
12 #include "fsw_params.h"
12 #include "fsw_params.h"
13 #include "tc_handler.h"
13 #include "tc_handler.h"
14 #include "fsw_init.h"
14 #include "fsw_init.h"
15
15
16 extern spw_stats spacewire_stats;
16 extern spw_stats spacewire_stats;
17 extern spw_stats spacewire_stats_backup;
17 extern spw_stats spacewire_stats_backup;
18 extern rtems_name timecode_timer_name;
18 extern rtems_name timecode_timer_name;
19 extern rtems_id timecode_timer_id;
19 extern rtems_id timecode_timer_id;
20
20
21 // RTEMS TASK
21 // RTEMS TASK
22 rtems_task spiq_task( rtems_task_argument argument );
22 rtems_task spiq_task( rtems_task_argument argument );
23 rtems_task recv_task( rtems_task_argument unused );
23 rtems_task recv_task( rtems_task_argument unused );
24 rtems_task send_task( rtems_task_argument argument );
24 rtems_task send_task( rtems_task_argument argument );
25 rtems_task wtdg_task( rtems_task_argument argument );
25 rtems_task wtdg_task( rtems_task_argument argument );
26
26
27 int spacewire_open_link( void );
27 int spacewire_open_link( void );
28 int spacewire_start_link( int fd );
28 int spacewire_start_link( int fd );
29 int spacewire_stop_and_start_link( int fd );
29 int spacewire_stop_and_start_link( int fd );
30 int spacewire_configure_link(int fd );
30 int spacewire_configure_link(int fd );
31 int spacewire_reset_link( void );
31 int spacewire_reset_link( void );
32 void spacewire_set_NP( unsigned char val, unsigned int regAddr ); // No Port force
32 void spacewire_set_NP( unsigned char val, unsigned int regAddr ); // No Port force
33 void spacewire_set_RE( unsigned char val, unsigned int regAddr ); // RMAP Enable
33 void spacewire_set_RE( unsigned char val, unsigned int regAddr ); // RMAP Enable
34 void spacewire_compute_stats_offsets( void );
34 void spacewire_compute_stats_offsets( void );
35 void spacewire_update_statistics( void );
35 void spacewire_update_statistics( void );
36 void increase_an_unsigned_char_counter( unsigned char *counter );
36 void increase_unsigned_char_counter( unsigned char *counter );
37
37
38 void init_header_cwf( Header_TM_LFR_SCIENCE_CWF_t *header );
38 void init_header_cwf( Header_TM_LFR_SCIENCE_CWF_t *header );
39 void init_header_swf( Header_TM_LFR_SCIENCE_SWF_t *header );
39 void init_header_swf( Header_TM_LFR_SCIENCE_SWF_t *header );
40 void init_header_asm( Header_TM_LFR_SCIENCE_ASM_t *header );
40 void init_header_asm( Header_TM_LFR_SCIENCE_ASM_t *header );
41 int spw_send_waveform_CWF( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_CWF_t *header );
41 int spw_send_waveform_CWF( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_CWF_t *header );
42 int spw_send_waveform_SWF( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_SWF_t *header );
42 int spw_send_waveform_SWF( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_SWF_t *header );
43 int spw_send_waveform_CWF3_light( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_CWF_t *header );
43 int spw_send_waveform_CWF3_light( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_CWF_t *header );
44 void spw_send_asm_f0( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_ASM_t *header );
44 void spw_send_asm_f0( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_ASM_t *header );
45 void spw_send_asm_f1( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_ASM_t *header );
45 void spw_send_asm_f1( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_ASM_t *header );
46 void spw_send_asm_f2( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_ASM_t *header );
46 void spw_send_asm_f2( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_ASM_t *header );
47 void spw_send_k_dump( ring_node *ring_node_to_send );
47 void spw_send_k_dump( ring_node *ring_node_to_send );
48
48
49 rtems_timer_service_routine timecode_timer_routine( rtems_id timer_id, void *user_data );
49 rtems_timer_service_routine timecode_timer_routine( rtems_id timer_id, void *user_data );
50 unsigned int check_timecode_and_previous_timecode_coherency(unsigned char currentTimecodeCtr);
50 unsigned int check_timecode_and_previous_timecode_coherency(unsigned char currentTimecodeCtr);
51 unsigned int check_timecode_and_internal_time_coherency(unsigned char timecode, unsigned char internalTime);
51 unsigned int check_timecode_and_internal_time_coherency(unsigned char timecode, unsigned char internalTime);
52 void timecode_irq_handler( void *pDev, void *regs, int minor, unsigned int tc );
52 void timecode_irq_handler( void *pDev, void *regs, int minor, unsigned int tc );
53
53
54 void (*grspw_timecode_callback) ( void *pDev, void *regs, int minor, unsigned int tc );
54 void (*grspw_timecode_callback) ( void *pDev, void *regs, int minor, unsigned int tc );
55
55
56 #endif // FSW_SPACEWIRE_H_INCLUDED
56 #endif // FSW_SPACEWIRE_H_INCLUDED
@@ -1,705 +1,742
1 /** General usage functions and RTEMS tasks.
1 /** General usage functions and RTEMS tasks.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 */
6 */
7
7
8 #include "fsw_misc.h"
8 #include "fsw_misc.h"
9
9
10 void timer_configure(unsigned char timer, unsigned int clock_divider,
10 void timer_configure(unsigned char timer, unsigned int clock_divider,
11 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
11 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
12 {
12 {
13 /** This function configures a GPTIMER timer instantiated in the VHDL design.
13 /** This function configures a GPTIMER timer instantiated in the VHDL design.
14 *
14 *
15 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
15 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
16 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
16 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
17 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
17 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
18 * @param interrupt_level is the interrupt level that the timer drives.
18 * @param interrupt_level is the interrupt level that the timer drives.
19 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
19 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
20 *
20 *
21 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
21 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
22 *
22 *
23 */
23 */
24
24
25 rtems_status_code status;
25 rtems_status_code status;
26 rtems_isr_entry old_isr_handler;
26 rtems_isr_entry old_isr_handler;
27
27
28 gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register
28 gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register
29
29
30 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
30 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
31 if (status!=RTEMS_SUCCESSFUL)
31 if (status!=RTEMS_SUCCESSFUL)
32 {
32 {
33 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
33 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
34 }
34 }
35
35
36 timer_set_clock_divider( timer, clock_divider);
36 timer_set_clock_divider( timer, clock_divider);
37 }
37 }
38
38
39 void timer_start(unsigned char timer)
39 void timer_start(unsigned char timer)
40 {
40 {
41 /** This function starts a GPTIMER timer.
41 /** This function starts a GPTIMER timer.
42 *
42 *
43 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
43 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
44 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
44 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
45 *
45 *
46 */
46 */
47
47
48 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
48 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
49 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register
49 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register
50 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer
50 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer
51 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart
51 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart
52 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable
52 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable
53 }
53 }
54
54
55 void timer_stop(unsigned char timer)
55 void timer_stop(unsigned char timer)
56 {
56 {
57 /** This function stops a GPTIMER timer.
57 /** This function stops a GPTIMER timer.
58 *
58 *
59 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
59 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
60 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
60 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
61 *
61 *
62 */
62 */
63
63
64 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer
64 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer
65 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable
65 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable
66 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
66 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
67 }
67 }
68
68
69 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
69 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
70 {
70 {
71 /** This function sets the clock divider of a GPTIMER timer.
71 /** This function sets the clock divider of a GPTIMER timer.
72 *
72 *
73 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
73 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
74 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
74 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
75 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
75 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
76 *
76 *
77 */
77 */
78
78
79 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
79 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
80 }
80 }
81
81
82 // WATCHDOG
82 // WATCHDOG
83
83
84 rtems_isr watchdog_isr( rtems_vector_number vector )
84 rtems_isr watchdog_isr( rtems_vector_number vector )
85 {
85 {
86 rtems_status_code status_code;
86 rtems_status_code status_code;
87
87
88 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
88 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
89 }
89 }
90
90
91 void watchdog_configure(void)
91 void watchdog_configure(void)
92 {
92 {
93 /** This function configure the watchdog.
93 /** This function configure the watchdog.
94 *
94 *
95 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
95 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
96 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
96 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
97 *
97 *
98 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
98 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
99 *
99 *
100 */
100 */
101
101
102 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
102 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
103
103
104 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
104 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
105
105
106 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
106 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
107 }
107 }
108
108
109 void watchdog_stop(void)
109 void watchdog_stop(void)
110 {
110 {
111 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
111 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
112 timer_stop( TIMER_WATCHDOG );
112 timer_stop( TIMER_WATCHDOG );
113 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
113 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
114 }
114 }
115
115
116 void watchdog_reload(void)
116 void watchdog_reload(void)
117 {
117 {
118 /** This function reloads the watchdog timer counter with the timer reload value.
118 /** This function reloads the watchdog timer counter with the timer reload value.
119 *
119 *
120 *
120 *
121 */
121 */
122
122
123 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
123 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
124 }
124 }
125
125
126 void watchdog_start(void)
126 void watchdog_start(void)
127 {
127 {
128 /** This function starts the watchdog timer.
128 /** This function starts the watchdog timer.
129 *
129 *
130 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
130 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
131 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
131 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
132 *
132 *
133 */
133 */
134
134
135 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
135 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
136
136
137 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any
137 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any
138 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
138 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
139 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer
139 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer
140 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable
140 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable
141
141
142 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
142 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
143
143
144 }
144 }
145
145
146 int send_console_outputs_on_apbuart_port( void ) // Send the console outputs on the apbuart port
146 int send_console_outputs_on_apbuart_port( void ) // Send the console outputs on the apbuart port
147 {
147 {
148 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
148 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
149
149
150 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
150 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
151
151
152 return 0;
152 return 0;
153 }
153 }
154
154
155 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
155 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
156 {
156 {
157 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
157 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
158
158
159 apbuart_regs->ctrl = apbuart_regs->ctrl | APBUART_CTRL_REG_MASK_TE;
159 apbuart_regs->ctrl = apbuart_regs->ctrl | APBUART_CTRL_REG_MASK_TE;
160
160
161 return 0;
161 return 0;
162 }
162 }
163
163
164 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
164 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
165 {
165 {
166 /** This function sets the scaler reload register of the apbuart module
166 /** This function sets the scaler reload register of the apbuart module
167 *
167 *
168 * @param regs is the address of the apbuart registers in memory
168 * @param regs is the address of the apbuart registers in memory
169 * @param value is the value that will be stored in the scaler register
169 * @param value is the value that will be stored in the scaler register
170 *
170 *
171 * The value shall be set by the software to get data on the serial interface.
171 * The value shall be set by the software to get data on the serial interface.
172 *
172 *
173 */
173 */
174
174
175 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
175 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
176
176
177 apbuart_regs->scaler = value;
177 apbuart_regs->scaler = value;
178 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
178 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
179 }
179 }
180
180
181 //************
181 //************
182 // RTEMS TASKS
182 // RTEMS TASKS
183
183
184 rtems_task load_task(rtems_task_argument argument)
184 rtems_task load_task(rtems_task_argument argument)
185 {
185 {
186 BOOT_PRINTF("in LOAD *** \n")
186 BOOT_PRINTF("in LOAD *** \n")
187
187
188 rtems_status_code status;
188 rtems_status_code status;
189 unsigned int i;
189 unsigned int i;
190 unsigned int j;
190 unsigned int j;
191 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
191 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
192 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
192 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
193
193
194 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
194 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
195
195
196 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
196 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
197 if( status != RTEMS_SUCCESSFUL ) {
197 if( status != RTEMS_SUCCESSFUL ) {
198 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
198 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
199 }
199 }
200
200
201 i = 0;
201 i = 0;
202 j = 0;
202 j = 0;
203
203
204 watchdog_configure();
204 watchdog_configure();
205
205
206 watchdog_start();
206 watchdog_start();
207
207
208 while(1){
208 while(1){
209 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
209 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
210 watchdog_reload();
210 watchdog_reload();
211 i = i + 1;
211 i = i + 1;
212 if ( i == 10 )
212 if ( i == 10 )
213 {
213 {
214 i = 0;
214 i = 0;
215 j = j + 1;
215 j = j + 1;
216 PRINTF1("%d\n", j)
216 PRINTF1("%d\n", j)
217 }
217 }
218 #ifdef DEBUG_WATCHDOG
218 #ifdef DEBUG_WATCHDOG
219 if (j == 3 )
219 if (j == 3 )
220 {
220 {
221 status = rtems_task_delete(RTEMS_SELF);
221 status = rtems_task_delete(RTEMS_SELF);
222 }
222 }
223 #endif
223 #endif
224 }
224 }
225 }
225 }
226
226
227 rtems_task hous_task(rtems_task_argument argument)
227 rtems_task hous_task(rtems_task_argument argument)
228 {
228 {
229 rtems_status_code status;
229 rtems_status_code status;
230 rtems_status_code spare_status;
230 rtems_status_code spare_status;
231 rtems_id queue_id;
231 rtems_id queue_id;
232 rtems_rate_monotonic_period_status period_status;
232 rtems_rate_monotonic_period_status period_status;
233
233
234 status = get_message_queue_id_send( &queue_id );
234 status = get_message_queue_id_send( &queue_id );
235 if (status != RTEMS_SUCCESSFUL)
235 if (status != RTEMS_SUCCESSFUL)
236 {
236 {
237 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
237 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
238 }
238 }
239
239
240 BOOT_PRINTF("in HOUS ***\n")
240 BOOT_PRINTF("in HOUS ***\n")
241
241
242 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
242 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
243 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
243 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
244 if( status != RTEMS_SUCCESSFUL ) {
244 if( status != RTEMS_SUCCESSFUL ) {
245 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status )
245 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status )
246 }
246 }
247 }
247 }
248
248
249 status = rtems_rate_monotonic_cancel(HK_id);
249 status = rtems_rate_monotonic_cancel(HK_id);
250 if( status != RTEMS_SUCCESSFUL ) {
250 if( status != RTEMS_SUCCESSFUL ) {
251 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status )
251 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status )
252 }
252 }
253 else {
253 else {
254 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n")
254 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n")
255 }
255 }
256
256
257 // startup phase
257 // startup phase
258 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
258 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
259 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
259 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
260 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
260 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
261 while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
261 while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
262 {
262 {
263 if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization
263 if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization
264 {
264 {
265 break; // break if LFR is synchronized
265 break; // break if LFR is synchronized
266 }
266 }
267 else
267 else
268 {
268 {
269 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
269 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
270 // sched_yield();
270 // sched_yield();
271 status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms
271 status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms
272 }
272 }
273 }
273 }
274 status = rtems_rate_monotonic_cancel(HK_id);
274 status = rtems_rate_monotonic_cancel(HK_id);
275 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
275 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
276
276
277 set_hk_lfr_reset_cause( POWER_ON );
277 set_hk_lfr_reset_cause( POWER_ON );
278
278
279 while(1){ // launch the rate monotonic task
279 while(1){ // launch the rate monotonic task
280 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
280 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
281 if ( status != RTEMS_SUCCESSFUL ) {
281 if ( status != RTEMS_SUCCESSFUL ) {
282 PRINTF1( "in HOUS *** ERR period: %d\n", status);
282 PRINTF1( "in HOUS *** ERR period: %d\n", status);
283 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
283 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
284 }
284 }
285 else {
285 else {
286 housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8);
286 housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8);
287 housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK );
287 housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK );
288 increment_seq_counter( &sequenceCounterHK );
288 increment_seq_counter( &sequenceCounterHK );
289
289
290 housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
290 housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
291 housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
291 housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
292 housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
292 housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
293 housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
293 housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
294 housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
294 housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
295 housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
295 housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
296
296
297 spacewire_update_statistics();
297 spacewire_update_statistics();
298
298
299 hk_lfr_le_me_he_update();
299 hk_lfr_le_me_he_update();
300
300
301 set_hk_lfr_time_not_synchro();
302
301 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
303 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
302 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
304 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
303 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
305 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
304 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
306 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
305 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
307 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
306
308
307 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
309 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
308 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
310 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
309 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
311 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
310 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
312 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
311 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
313 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
312
314
313 // SEND PACKET
315 // SEND PACKET
314 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
316 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
315 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
317 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
316 if (status != RTEMS_SUCCESSFUL) {
318 if (status != RTEMS_SUCCESSFUL) {
317 PRINTF1("in HOUS *** ERR send: %d\n", status)
319 PRINTF1("in HOUS *** ERR send: %d\n", status)
318 }
320 }
319 }
321 }
320 }
322 }
321
323
322 PRINTF("in HOUS *** deleting task\n")
324 PRINTF("in HOUS *** deleting task\n")
323
325
324 status = rtems_task_delete( RTEMS_SELF ); // should not return
326 status = rtems_task_delete( RTEMS_SELF ); // should not return
325
327
326 return;
328 return;
327 }
329 }
328
330
329 rtems_task dumb_task( rtems_task_argument unused )
331 rtems_task dumb_task( rtems_task_argument unused )
330 {
332 {
331 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
333 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
332 *
334 *
333 * @param unused is the starting argument of the RTEMS task
335 * @param unused is the starting argument of the RTEMS task
334 *
336 *
335 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
337 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
336 *
338 *
337 */
339 */
338
340
339 unsigned int i;
341 unsigned int i;
340 unsigned int intEventOut;
342 unsigned int intEventOut;
341 unsigned int coarse_time = 0;
343 unsigned int coarse_time = 0;
342 unsigned int fine_time = 0;
344 unsigned int fine_time = 0;
343 rtems_event_set event_out;
345 rtems_event_set event_out;
344
346
345 char *DumbMessages[14] = {"in DUMB *** default", // RTEMS_EVENT_0
347 char *DumbMessages[14] = {"in DUMB *** default", // RTEMS_EVENT_0
346 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
348 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
347 "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2
349 "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2
348 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
350 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
349 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
351 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
350 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
352 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
351 "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6
353 "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6
352 "ready for dump", // RTEMS_EVENT_7
354 "ready for dump", // RTEMS_EVENT_7
353 "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8
355 "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8
354 "tick", // RTEMS_EVENT_9
356 "tick", // RTEMS_EVENT_9
355 "VHDL ERR *** waveform picker", // RTEMS_EVENT_10
357 "VHDL ERR *** waveform picker", // RTEMS_EVENT_10
356 "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11
358 "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11
357 "WATCHDOG timer", // RTEMS_EVENT_12
359 "WATCHDOG timer", // RTEMS_EVENT_12
358 "TIMECODE timer" // RTEMS_EVENT_13
360 "TIMECODE timer" // RTEMS_EVENT_13
359 };
361 };
360
362
361 BOOT_PRINTF("in DUMB *** \n")
363 BOOT_PRINTF("in DUMB *** \n")
362
364
363 while(1){
365 while(1){
364 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
366 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
365 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
367 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
366 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13,
368 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13,
367 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
369 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
368 intEventOut = (unsigned int) event_out;
370 intEventOut = (unsigned int) event_out;
369 for ( i=0; i<32; i++)
371 for ( i=0; i<32; i++)
370 {
372 {
371 if ( ((intEventOut >> i) & 0x0001) != 0)
373 if ( ((intEventOut >> i) & 0x0001) != 0)
372 {
374 {
373 coarse_time = time_management_regs->coarse_time;
375 coarse_time = time_management_regs->coarse_time;
374 fine_time = time_management_regs->fine_time;
376 fine_time = time_management_regs->fine_time;
375 if (i==12)
377 if (i==12)
376 {
378 {
377 PRINTF1("%s\n", DumbMessages[12])
379 PRINTF1("%s\n", DumbMessages[12])
378 }
380 }
379 if (i==13)
381 if (i==13)
380 {
382 {
381 PRINTF1("%s\n", DumbMessages[13])
383 PRINTF1("%s\n", DumbMessages[13])
382 }
384 }
383 }
385 }
384 }
386 }
385 }
387 }
386 }
388 }
387
389
388 //*****************************
390 //*****************************
389 // init housekeeping parameters
391 // init housekeeping parameters
390
392
391 void init_housekeeping_parameters( void )
393 void init_housekeeping_parameters( void )
392 {
394 {
393 /** This function initialize the housekeeping_packet global variable with default values.
395 /** This function initialize the housekeeping_packet global variable with default values.
394 *
396 *
395 */
397 */
396
398
397 unsigned int i = 0;
399 unsigned int i = 0;
398 unsigned char *parameters;
400 unsigned char *parameters;
399 unsigned char sizeOfHK;
401 unsigned char sizeOfHK;
400
402
401 sizeOfHK = sizeof( Packet_TM_LFR_HK_t );
403 sizeOfHK = sizeof( Packet_TM_LFR_HK_t );
402
404
403 parameters = (unsigned char*) &housekeeping_packet;
405 parameters = (unsigned char*) &housekeeping_packet;
404
406
405 for(i = 0; i< sizeOfHK; i++)
407 for(i = 0; i< sizeOfHK; i++)
406 {
408 {
407 parameters[i] = 0x00;
409 parameters[i] = 0x00;
408 }
410 }
409
411
410 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
412 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
411 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
413 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
412 housekeeping_packet.reserved = DEFAULT_RESERVED;
414 housekeeping_packet.reserved = DEFAULT_RESERVED;
413 housekeeping_packet.userApplication = CCSDS_USER_APP;
415 housekeeping_packet.userApplication = CCSDS_USER_APP;
414 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
416 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
415 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
417 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
416 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
418 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
417 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
419 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
418 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
420 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
419 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
421 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
420 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
422 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
421 housekeeping_packet.serviceType = TM_TYPE_HK;
423 housekeeping_packet.serviceType = TM_TYPE_HK;
422 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
424 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
423 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
425 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
424 housekeeping_packet.sid = SID_HK;
426 housekeeping_packet.sid = SID_HK;
425
427
426 // init status word
428 // init status word
427 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
429 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
428 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
430 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
429 // init software version
431 // init software version
430 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
432 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
431 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
433 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
432 housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3;
434 housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3;
433 housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4;
435 housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4;
434 // init fpga version
436 // init fpga version
435 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
437 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
436 housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1
438 housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1
437 housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2
439 housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2
438 housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3
440 housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3
439
441
440 housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND;
442 housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND;
441 housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV;
443 housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV;
442 housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0;
444 housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0;
443 housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1;
445 housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1;
444 housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2;
446 housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2;
445 }
447 }
446
448
447 void increment_seq_counter( unsigned short *packetSequenceControl )
449 void increment_seq_counter( unsigned short *packetSequenceControl )
448 {
450 {
449 /** This function increment the sequence counter passes in argument.
451 /** This function increment the sequence counter passes in argument.
450 *
452 *