@@ -2,7 +2,7 TEMPLATE = app | |||
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2 | 2 | # CONFIG += console v8 sim |
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3 | 3 | # CONFIG options = verbose *** boot_messages *** debug_messages *** cpu_usage_report *** stack_report *** vhdl_dev *** debug_tch |
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4 | 4 | # lpp_dpu_destid |
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5 |
CONFIG += console verbose lpp_dpu_destid |
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5 | CONFIG += console verbose lpp_dpu_destid | |
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6 | 6 | CONFIG -= qt |
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7 | 7 | |
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8 | 8 | include(./sparc.pri) |
@@ -62,41 +62,6 | |||
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62 | 62 | #include "fsw_config.c" |
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63 | 63 | #include "GscMemoryLPP.hpp" |
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64 | 64 | |
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65 | void test_bp1() | |
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66 | { | |
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67 | float test_matrix[25] = { | |
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68 | 4.00109575e+06, | |
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69 | -2.19891187e+03, | |
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70 | 1.73193325e+06, | |
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71 | 1.88106079e+03, | |
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72 | -1.00001638e+06, | |
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73 | 6.23724854e+02, | |
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74 | 2.00016860e+07, | |
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75 | -3.46422920e+07, | |
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76 | -1.44333826e+03, | |
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77 | 7.54424812e+05, | |
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78 | -4.36785375e+05, | |
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79 | 2.34538879e+02, | |
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80 | 8.65882200e+06, | |
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81 | -3.31611108e+03, | |
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82 | 2.71719702e+03, | |
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83 | 1.50027590e+07, | |
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84 | 2.53229094e+05, | |
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85 | -4.99895450e+06, | |
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86 | 2.90329712e+03, | |
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87 | -2.17048022e+03, | |
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88 | -8.66275100e+06, | |
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89 | 1.00002952e+08, | |
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90 | -2.94739111e+03, | |
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91 | 1.73206224e+08, | |
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92 | 3.00003392e+08 | |
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93 | }; | |
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94 | ||
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95 | uint8_t lfr_bp1[11]; | |
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96 | ||
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97 | BP1_set(test_matrix, k_coeff_intercalib_f0_norm, 1, lfr_bp1); | |
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98 | } | |
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99 | ||
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100 | 65 | void initCache() |
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101 | 66 | { |
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102 | 67 | unsigned int cacheControlRegister; |
@@ -283,8 +248,6 rtems_task Init( rtems_task_argument ign | |||
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283 | 248 | |
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284 | 249 | BOOT_PRINTF("delete INIT\n") |
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285 | 250 | |
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286 | test_bp1(); | |
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287 | ||
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288 | 251 | status = rtems_task_delete(RTEMS_SELF); |
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289 | 252 | |
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290 | 253 | } |
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