##// END OF EJS Templates
Bug 796 Don_Initialisation_P1
paul -
r321:0d3dfc6f1f08 R3_plus draft
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@@ -70,10 +70,10 extern gptimer_regs_t *gptimer_regs;
70 70 extern void ASR16_get_FPRF_IURF_ErrorCounters( unsigned int*, unsigned int* );
71 71 extern void CCR_getInstructionAndDataErrorCounters( unsigned int*, unsigned int* );
72 72
73 rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic
74 rtems_id HK_id; // id of the HK rate monotonic period
75 rtems_name name_avgv_rate_monotonic; // name of the AVGV rate monotonic
76 rtems_id AVGV_id; // id of the AVGV rate monotonic period
73 rtems_name name_hk_rate_monotonic = 0; // name of the HK rate monotonic
74 rtems_id HK_id = RTEMS_ID_NONE;// id of the HK rate monotonic period
75 rtems_name name_avgv_rate_monotonic = 0; // name of the AVGV rate monotonic
76 rtems_id AVGV_id = RTEMS_ID_NONE;// id of the AVGV rate monotonic period
77 77
78 78 void timer_configure( unsigned char timer, unsigned int clock_divider,
79 79 unsigned char interrupt_level, rtems_isr (*timer_isr)() );
@@ -26,15 +26,15
26 26 #define NB_OF_MISC_NAMES 5
27 27
28 28 // RTEMS GLOBAL VARIABLES
29 rtems_name misc_name[NB_OF_MISC_NAMES];
30 rtems_name Task_name[NB_OF_TASKS]; /* array of task names */
31 rtems_id Task_id[NB_OF_TASKS]; /* array of task ids */
32 rtems_name timecode_timer_name;
33 rtems_id timecode_timer_id;
29 rtems_name misc_name[NB_OF_MISC_NAMES] = {0};
30 rtems_name Task_name[NB_OF_TASKS] = {0}; /* array of task names */
31 rtems_id Task_id[NB_OF_TASKS] = {0}; /* array of task ids */
32 rtems_name timecode_timer_name = {0};
33 rtems_id timecode_timer_id = {0};
34 34 int fdSPW = 0;
35 35 int fdUART = 0;
36 unsigned char lfrCurrentMode;
37 unsigned char pa_bia_status_info;
36 unsigned char lfrCurrentMode = 0;
37 unsigned char pa_bia_status_info = 0;
38 38 unsigned char thisIsAnASMRestart = 0;
39 39 unsigned char oneTcLfrUpdateTimeReceived = 0;
40 40
@@ -43,18 +43,18 unsigned char oneTcLfrUpdateTimeReceived
43 43 // WAVEFORMS GLOBAL VARIABLES // 2688 * 3 * 4 + 2 * 4 = 32256 + 8 bytes = 32264
44 44 // 127 * 256 = 32512 => delta = 248 bytes = 62 words
45 45 // F0 F1 F2 F3
46 volatile int wf_buffer_f0[ NB_RING_NODES_F0 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
47 volatile int wf_buffer_f1[ NB_RING_NODES_F1 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
48 volatile int wf_buffer_f2[ NB_RING_NODES_F2 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
49 volatile int wf_buffer_f3[ NB_RING_NODES_F3 * WFRM_BUFFER ] __attribute__((aligned(0x100)));
46 volatile int wf_buffer_f0[ NB_RING_NODES_F0 * WFRM_BUFFER ] __attribute__((aligned(0x100))) = {0};
47 volatile int wf_buffer_f1[ NB_RING_NODES_F1 * WFRM_BUFFER ] __attribute__((aligned(0x100))) = {0};
48 volatile int wf_buffer_f2[ NB_RING_NODES_F2 * WFRM_BUFFER ] __attribute__((aligned(0x100))) = {0};
49 volatile int wf_buffer_f3[ NB_RING_NODES_F3 * WFRM_BUFFER ] __attribute__((aligned(0x100))) = {0};
50 50
51 51 //***********************************
52 52 // SPECTRAL MATRICES GLOBAL VARIABLES
53 53
54 54 // alignment constraints for the spectral matrices buffers => the first data after the time (8 bytes) shall be aligned on 0x00
55 volatile int sm_f0[ NB_RING_NODES_SM_F0 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100)));
56 volatile int sm_f1[ NB_RING_NODES_SM_F1 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100)));
57 volatile int sm_f2[ NB_RING_NODES_SM_F2 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100)));
55 volatile int sm_f0[ NB_RING_NODES_SM_F0 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100))) = {0};
56 volatile int sm_f1[ NB_RING_NODES_SM_F1 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100))) = {0};
57 volatile int sm_f2[ NB_RING_NODES_SM_F2 * TOTAL_SIZE_SM ] __attribute__((aligned(0x100))) = {0};
58 58
59 59 // APB CONFIGURATION REGISTERS
60 60 time_management_regs_t *time_management_regs = (time_management_regs_t*) REGS_ADDR_TIME_MANAGEMENT;
@@ -63,40 +63,40 waveform_picker_regs_0_1_18_t *wavefor
63 63 spectral_matrix_regs_t *spectral_matrix_regs = (spectral_matrix_regs_t*) REGS_ADDR_SPECTRAL_MATRIX;
64 64
65 65 // MODE PARAMETERS
66 Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet;
67 struct param_local_str param_local;
68 unsigned int lastValidEnterModeTime;
66 Packet_TM_LFR_PARAMETER_DUMP_t parameter_dump_packet = {0};
67 struct param_local_str param_local = {0};
68 unsigned int lastValidEnterModeTime = {0};
69 69
70 70 // HK PACKETS
71 Packet_TM_LFR_HK_t housekeeping_packet;
72 unsigned char cp_rpw_sc_rw_f_flags;
71 Packet_TM_LFR_HK_t housekeeping_packet = {0};
72 unsigned char cp_rpw_sc_rw_f_flags = 0;
73 73 // message queues occupancy
74 unsigned char hk_lfr_q_sd_fifo_size_max;
75 unsigned char hk_lfr_q_rv_fifo_size_max;
76 unsigned char hk_lfr_q_p0_fifo_size_max;
77 unsigned char hk_lfr_q_p1_fifo_size_max;
78 unsigned char hk_lfr_q_p2_fifo_size_max;
74 unsigned char hk_lfr_q_sd_fifo_size_max = 0;
75 unsigned char hk_lfr_q_rv_fifo_size_max = 0;
76 unsigned char hk_lfr_q_p0_fifo_size_max = 0;
77 unsigned char hk_lfr_q_p1_fifo_size_max = 0;
78 unsigned char hk_lfr_q_p2_fifo_size_max = 0;
79 79 // sequence counters are incremented by APID (PID + CAT) and destination ID
80 unsigned short sequenceCounters_SCIENCE_NORMAL_BURST;
81 unsigned short sequenceCounters_SCIENCE_SBM1_SBM2;
82 unsigned short sequenceCounters_TC_EXE[SEQ_CNT_NB_DEST_ID];
83 unsigned short sequenceCounters_TM_DUMP[SEQ_CNT_NB_DEST_ID];
80 unsigned short sequenceCounters_SCIENCE_NORMAL_BURST = 0;
81 unsigned short sequenceCounters_SCIENCE_SBM1_SBM2 = 0;
82 unsigned short sequenceCounters_TC_EXE[SEQ_CNT_NB_DEST_ID] = {0};
83 unsigned short sequenceCounters_TM_DUMP[SEQ_CNT_NB_DEST_ID] = {0};
84 84 unsigned short sequenceCounterHK;
85 spw_stats grspw_stats;
85 spw_stats grspw_stats = {0};
86 86
87 87 // TC_LFR_UPDATE_INFO
88 float cp_rpw_sc_rw1_f1;
89 float cp_rpw_sc_rw1_f2;
90 float cp_rpw_sc_rw2_f1;
91 float cp_rpw_sc_rw2_f2;
92 float cp_rpw_sc_rw3_f1;
93 float cp_rpw_sc_rw3_f2;
94 float cp_rpw_sc_rw4_f1;
95 float cp_rpw_sc_rw4_f2;
88 float cp_rpw_sc_rw1_f1 = INIT_FLOAT;
89 float cp_rpw_sc_rw1_f2 = INIT_FLOAT;
90 float cp_rpw_sc_rw2_f1 = INIT_FLOAT;
91 float cp_rpw_sc_rw2_f2 = INIT_FLOAT;
92 float cp_rpw_sc_rw3_f1 = INIT_FLOAT;
93 float cp_rpw_sc_rw3_f2 = INIT_FLOAT;
94 float cp_rpw_sc_rw4_f1 = INIT_FLOAT;
95 float cp_rpw_sc_rw4_f2 = INIT_FLOAT;
96 96
97 97 // TC_LFR_LOAD_FILTER_PAR
98 filterPar_t filterPar;
98 filterPar_t filterPar = {0};
99 99
100 fbins_masks_t fbins_masks;
100 fbins_masks_t fbins_masks = {0};
101 101 unsigned int acquisitionDurations[NB_ACQUISITION_DURATION]
102 102 = {ACQUISITION_DURATION_F0, ACQUISITION_DURATION_F1, ACQUISITION_DURATION_F2};
@@ -13,14 +13,14
13 13
14 14 #include "fsw_spacewire.h"
15 15
16 rtems_name semq_name;
17 rtems_id semq_id;
16 rtems_name semq_name = 0;
17 rtems_id semq_id = RTEMS_ID_NONE;
18 18
19 19 //*****************
20 20 // waveform headers
21 Header_TM_LFR_SCIENCE_CWF_t headerCWF;
22 Header_TM_LFR_SCIENCE_SWF_t headerSWF;
23 Header_TM_LFR_SCIENCE_ASM_t headerASM;
21 Header_TM_LFR_SCIENCE_CWF_t headerCWF = {0};
22 Header_TM_LFR_SCIENCE_SWF_t headerSW = {0};
23 Header_TM_LFR_SCIENCE_ASM_t headerASM = {0};
24 24
25 25 unsigned char previousTimecodeCtr = 0;
26 26 unsigned int *grspwPtr = (unsigned int *) (REGS_ADDR_GRSPW + APB_OFFSET_GRSPW_TIME_REGISTER);
@@ -8,27 +8,26
8 8 */
9 9
10 10 #include "avf0_prc0.h"
11 #include "fsw_processing.h"
12 11
13 nb_sm_before_bp_asm_f0 nb_sm_before_f0;
12 nb_sm_before_bp_asm_f0 nb_sm_before_f0 = {0};
14 13
15 14 //***
16 15 // F0
17 ring_node_asm asm_ring_norm_f0 [ NB_RING_NODES_ASM_NORM_F0 ];
18 ring_node_asm asm_ring_burst_sbm_f0 [ NB_RING_NODES_ASM_BURST_SBM_F0 ];
16 ring_node_asm asm_ring_norm_f0 [ NB_RING_NODES_ASM_NORM_F0 ] = {0};
17 ring_node_asm asm_ring_burst_sbm_f0 [ NB_RING_NODES_ASM_BURST_SBM_F0 ] = {0};
19 18
20 ring_node ring_to_send_asm_f0 [ NB_RING_NODES_ASM_F0 ];
21 int buffer_asm_f0 [ NB_RING_NODES_ASM_F0 * TOTAL_SIZE_SM ];
19 ring_node ring_to_send_asm_f0 [ NB_RING_NODES_ASM_F0 ] = {0};
20 int buffer_asm_f0 [ NB_RING_NODES_ASM_F0 * TOTAL_SIZE_SM ] = {0};
22 21
23 float asm_f0_patched_norm [ TOTAL_SIZE_SM ];
24 float asm_f0_patched_burst_sbm [ TOTAL_SIZE_SM ];
25 float asm_f0_reorganized [ TOTAL_SIZE_SM ];
22 float asm_f0_patched_norm [ TOTAL_SIZE_SM ] = {0};
23 float asm_f0_patched_burst_sbm [ TOTAL_SIZE_SM ] = {0};
24 float asm_f0_reorganized [ TOTAL_SIZE_SM ] = {0};
26 25
27 float compressed_sm_norm_f0[ TOTAL_SIZE_COMPRESSED_ASM_NORM_F0];
28 float compressed_sm_sbm_f0 [ TOTAL_SIZE_COMPRESSED_ASM_SBM_F0 ];
26 float compressed_sm_norm_f0[ TOTAL_SIZE_COMPRESSED_ASM_NORM_F0] = {0};
27 float compressed_sm_sbm_f0 [ TOTAL_SIZE_COMPRESSED_ASM_SBM_F0 ] = {0};
29 28
30 float k_coeff_intercalib_f0_norm[ NB_BINS_COMPRESSED_SM_F0 * NB_K_COEFF_PER_BIN ]; // 11 * 32 = 352
31 float k_coeff_intercalib_f0_sbm[ NB_BINS_COMPRESSED_SM_SBM_F0 * NB_K_COEFF_PER_BIN ]; // 22 * 32 = 704
29 float k_coeff_intercalib_f0_norm[ NB_BINS_COMPRESSED_SM_F0 * NB_K_COEFF_PER_BIN ] = {0}; // 11 * 32 = 352
30 float k_coeff_intercalib_f0_sbm[ NB_BINS_COMPRESSED_SM_SBM_F0 * NB_K_COEFF_PER_BIN ] = {0}; // 22 * 32 = 704
32 31
33 32 //************
34 33 // RTEMS TASKS
@@ -9,27 +9,25
9 9
10 10 #include "avf1_prc1.h"
11 11
12 nb_sm_before_bp_asm_f1 nb_sm_before_f1;
13
14 extern ring_node sm_ring_f1[ ];
12 nb_sm_before_bp_asm_f1 nb_sm_before_f1 = {0};
15 13
16 14 //***
17 15 // F1
18 ring_node_asm asm_ring_norm_f1 [ NB_RING_NODES_ASM_NORM_F1 ];
19 ring_node_asm asm_ring_burst_sbm_f1 [ NB_RING_NODES_ASM_BURST_SBM_F1 ];
16 ring_node_asm asm_ring_norm_f1 [ NB_RING_NODES_ASM_NORM_F1 ] = {0};
17 ring_node_asm asm_ring_burst_sbm_f1 [ NB_RING_NODES_ASM_BURST_SBM_F1 ] = {0};
20 18
21 ring_node ring_to_send_asm_f1 [ NB_RING_NODES_ASM_F1 ];
22 int buffer_asm_f1 [ NB_RING_NODES_ASM_F1 * TOTAL_SIZE_SM ];
19 ring_node ring_to_send_asm_f1 [ NB_RING_NODES_ASM_F1 ] = {0};
20 int buffer_asm_f1 [ NB_RING_NODES_ASM_F1 * TOTAL_SIZE_SM ] = {0};
23 21
24 float asm_f1_patched_norm [ TOTAL_SIZE_SM ];
25 float asm_f1_patched_burst_sbm [ TOTAL_SIZE_SM ];
26 float asm_f1_reorganized [ TOTAL_SIZE_SM ];
22 float asm_f1_patched_norm [ TOTAL_SIZE_SM ] = {0};
23 float asm_f1_patched_burst_sbm [ TOTAL_SIZE_SM ] = {0};
24 float asm_f1_reorganized [ TOTAL_SIZE_SM ] = {0};
27 25
28 float compressed_sm_norm_f1[ TOTAL_SIZE_COMPRESSED_ASM_NORM_F1];
29 float compressed_sm_sbm_f1 [ TOTAL_SIZE_COMPRESSED_ASM_SBM_F1 ];
26 float compressed_sm_norm_f1[ TOTAL_SIZE_COMPRESSED_ASM_NORM_F1] = {0};
27 float compressed_sm_sbm_f1 [ TOTAL_SIZE_COMPRESSED_ASM_SBM_F1 ] = {0};
30 28
31 float k_coeff_intercalib_f1_norm[ NB_BINS_COMPRESSED_SM_F1 * NB_K_COEFF_PER_BIN ]; // 13 * 32 = 416
32 float k_coeff_intercalib_f1_sbm[ NB_BINS_COMPRESSED_SM_SBM_F1 * NB_K_COEFF_PER_BIN ]; // 26 * 32 = 832
29 float k_coeff_intercalib_f1_norm[ NB_BINS_COMPRESSED_SM_F1 * NB_K_COEFF_PER_BIN ] = {0}; // 13 * 32 = 416
30 float k_coeff_intercalib_f1_sbm[ NB_BINS_COMPRESSED_SM_SBM_F1 * NB_K_COEFF_PER_BIN ] = {0}; // 26 * 32 = 832
33 31
34 32 //************
35 33 // RTEMS TASKS
@@ -9,23 +9,21
9 9
10 10 #include "avf2_prc2.h"
11 11
12 nb_sm_before_bp_asm_f2 nb_sm_before_f2;
13
14 extern ring_node sm_ring_f2[ ];
12 nb_sm_before_bp_asm_f2 nb_sm_before_f2 = {0};
15 13
16 14 //***
17 15 // F2
18 ring_node_asm asm_ring_norm_f2 [ NB_RING_NODES_ASM_NORM_F2 ];
16 ring_node_asm asm_ring_norm_f2 [ NB_RING_NODES_ASM_NORM_F2 ] = {0};
19 17
20 ring_node ring_to_send_asm_f2 [ NB_RING_NODES_ASM_F2 ];
21 int buffer_asm_f2 [ NB_RING_NODES_ASM_F2 * TOTAL_SIZE_SM ];
18 ring_node ring_to_send_asm_f2 [ NB_RING_NODES_ASM_F2 ] = {0};
19 int buffer_asm_f2 [ NB_RING_NODES_ASM_F2 * TOTAL_SIZE_SM ] = {0};
22 20
23 float asm_f2_patched_norm [ TOTAL_SIZE_SM ];
24 float asm_f2_reorganized [ TOTAL_SIZE_SM ];
21 float asm_f2_patched_norm [ TOTAL_SIZE_SM ] = {0};
22 float asm_f2_reorganized [ TOTAL_SIZE_SM ] = {0};
25 23
26 float compressed_sm_norm_f2[ TOTAL_SIZE_COMPRESSED_ASM_NORM_F2];
24 float compressed_sm_norm_f2[ TOTAL_SIZE_COMPRESSED_ASM_NORM_F2] = {0};
27 25
28 float k_coeff_intercalib_f2[ NB_BINS_COMPRESSED_SM_F2 * NB_K_COEFF_PER_BIN ]; // 12 * 32 = 384
26 float k_coeff_intercalib_f2[ NB_BINS_COMPRESSED_SM_F2 * NB_K_COEFF_PER_BIN ] = {0}; // 12 * 32 = 384
29 27
30 28 //************
31 29 // RTEMS TASKS
@@ -11,10 +11,10
11 11 #include "fsw_processing_globals.c"
12 12 #include "fsw_init.h"
13 13
14 unsigned int nb_sm_f0;
15 unsigned int nb_sm_f0_aux_f1;
16 unsigned int nb_sm_f1;
17 unsigned int nb_sm_f0_aux_f2;
14 unsigned int nb_sm_f0 = 0;
15 unsigned int nb_sm_f0_aux_f1= 0;
16 unsigned int nb_sm_f1 = 0;
17 unsigned int nb_sm_f0_aux_f2= 0;
18 18
19 19 typedef enum restartState_t
20 20 {
@@ -25,15 +25,15 typedef enum restartState_t
25 25
26 26 //************************
27 27 // spectral matrices rings
28 ring_node sm_ring_f0[ NB_RING_NODES_SM_F0 ];
29 ring_node sm_ring_f1[ NB_RING_NODES_SM_F1 ];
30 ring_node sm_ring_f2[ NB_RING_NODES_SM_F2 ];
31 ring_node *current_ring_node_sm_f0;
32 ring_node *current_ring_node_sm_f1;
33 ring_node *current_ring_node_sm_f2;
34 ring_node *ring_node_for_averaging_sm_f0;
35 ring_node *ring_node_for_averaging_sm_f1;
36 ring_node *ring_node_for_averaging_sm_f2;
28 ring_node sm_ring_f0[ NB_RING_NODES_SM_F0 ] = {0};
29 ring_node sm_ring_f1[ NB_RING_NODES_SM_F1 ] = {0};
30 ring_node sm_ring_f2[ NB_RING_NODES_SM_F2 ] = {0};
31 ring_node *current_ring_node_sm_f0 = NULL;
32 ring_node *current_ring_node_sm_f1 = NULL;
33 ring_node *current_ring_node_sm_f2 = NULL;
34 ring_node *ring_node_for_averaging_sm_f0= NULL;
35 ring_node *ring_node_for_averaging_sm_f1= NULL;
36 ring_node *ring_node_for_averaging_sm_f2= NULL;
37 37
38 38 //
39 39 ring_node * getRingNodeForAveraging( unsigned char frequencyChannel)
@@ -10,7 +10,7
10 10 #include "tc_acceptance.h"
11 11 #include <stdio.h>
12 12
13 unsigned int lookUpTableForCRC[CONST_256];
13 unsigned int lookUpTableForCRC[CONST_256] = {0};
14 14
15 15 //**********************
16 16 // GENERAL USE FUNCTIONS
@@ -14,10 +14,10
14 14
15 15 #include "tc_load_dump_parameters.h"
16 16
17 Packet_TM_LFR_KCOEFFICIENTS_DUMP_t kcoefficients_dump_1;
18 Packet_TM_LFR_KCOEFFICIENTS_DUMP_t kcoefficients_dump_2;
19 ring_node kcoefficient_node_1;
20 ring_node kcoefficient_node_2;
17 Packet_TM_LFR_KCOEFFICIENTS_DUMP_t kcoefficients_dump_1 = {0};
18 Packet_TM_LFR_KCOEFFICIENTS_DUMP_t kcoefficients_dump_2 = {0};
19 ring_node kcoefficient_node_1 = {0};
20 ring_node kcoefficient_node_2 = {0};
21 21
22 22 int action_load_common_par(ccsdsTelecommandPacket_t *TC)
23 23 {
@@ -12,24 +12,24
12 12 //***************
13 13 // waveform rings
14 14 // F0
15 ring_node waveform_ring_f0[NB_RING_NODES_F0];
16 ring_node *current_ring_node_f0;
17 ring_node *ring_node_to_send_swf_f0;
15 ring_node waveform_ring_f0[NB_RING_NODES_F0]= {0};
16 ring_node *current_ring_node_f0 = NULL;
17 ring_node *ring_node_to_send_swf_f0 = NULL;
18 18 // F1
19 ring_node waveform_ring_f1[NB_RING_NODES_F1];
20 ring_node *current_ring_node_f1;
21 ring_node *ring_node_to_send_swf_f1;
22 ring_node *ring_node_to_send_cwf_f1;
19 ring_node waveform_ring_f1[NB_RING_NODES_F1] = {0};
20 ring_node *current_ring_node_f1 = NULL;
21 ring_node *ring_node_to_send_swf_f1 = NULL;
22 ring_node *ring_node_to_send_cwf_f1 = NULL;
23 23 // F2
24 ring_node waveform_ring_f2[NB_RING_NODES_F2];
25 ring_node *current_ring_node_f2;
26 ring_node *ring_node_to_send_swf_f2;
27 ring_node *ring_node_to_send_cwf_f2;
24 ring_node waveform_ring_f2[NB_RING_NODES_F2] = {0};
25 ring_node *current_ring_node_f2 = NULL;
26 ring_node *ring_node_to_send_swf_f2 = NULL;
27 ring_node *ring_node_to_send_cwf_f2 = NULL;
28 28 // F3
29 ring_node waveform_ring_f3[NB_RING_NODES_F3];
30 ring_node *current_ring_node_f3;
31 ring_node *ring_node_to_send_cwf_f3;
32 char wf_cont_f3_light[ (NB_SAMPLES_PER_SNAPSHOT) * NB_BYTES_CWF3_LIGHT_BLK ];
29 ring_node waveform_ring_f3[NB_RING_NODES_F3] = {0};
30 ring_node *current_ring_node_f3 = NULL;
31 ring_node *ring_node_to_send_cwf_f3 = NULL;
32 char wf_cont_f3_light[ (NB_SAMPLES_PER_SNAPSHOT) * NB_BYTES_CWF3_LIGHT_BLK ] = {0};
33 33
34 34 bool extractSWF1 = false;
35 35 bool extractSWF2 = false;
@@ -38,10 +38,10 bool swf0_ready_flag_f2 = false;
38 38 bool swf1_ready = false;
39 39 bool swf2_ready = false;
40 40
41 int swf1_extracted[ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) ];
42 int swf2_extracted[ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) ];
43 ring_node ring_node_swf1_extracted;
44 ring_node ring_node_swf2_extracted;
41 int swf1_extracted[ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) ] = {0};
42 int swf2_extracted[ (NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK) ] = {0};
43 ring_node ring_node_swf1_extracted = {0};
44 ring_node ring_node_swf2_extracted = {0};
45 45
46 46 typedef enum resynchro_state_t
47 47 {
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