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import numpy as np
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from test_fft.register_addresses_fft_test import *
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from __main__ import RMAPPlugin0
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def print_custom( value ):
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print value
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RMAPPlugin0.ProcessPendingEvents()
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def read_SM_Re( nbFrequencyBins, address_MEM_OUT_SM ):
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currentComp_re = np.zeros( nbFrequencyBins )
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if address_MEM_OUT_SM == address_MEM_OUT_SM_0:
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mask_REN = mask_REN_FIFO_0
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elif address_MEM_OUT_SM == address_MEM_OUT_SM_1:
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mask_REN = mask_REN_FIFO_1
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else:
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print_custom( "ERR *** read_SM_Re *** unexpected address_MEM_OUT_SM" )
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for frequencyBin in range(nbFrequencyBins):
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# read Re
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RMAPPlugin0.Write( address_CTRL_SM, [mask_REN] )
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val = RMAPPlugin0.Read( address_MEM_OUT_SM, 1)
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currentComp_re[frequencyBin] = val[0]
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RMAPPlugin0.ProcessPendingEvents()
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return currentComp_re
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def read_SM_Re_Im( nbFrequencyBins, address_MEM_OUT_SM ):
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currentComp_re = np.zeros( nbFrequencyBins )
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currentComp_im = np.zeros( nbFrequencyBins )
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if address_MEM_OUT_SM == address_MEM_OUT_SM_0:
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mask_REN = mask_REN_FIFO_0
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elif address_MEM_OUT_SM == address_MEM_OUT_SM_1:
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mask_REN = mask_REN_FIFO_1
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else:
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print_custom( "ERR *** read_SM_Re_Im *** unexpected address_MEM_OUT_SM" )
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for frequencyBin in range(nbFrequencyBins):
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# read Re
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RMAPPlugin0.Write( address_CTRL_SM, [mask_REN] )
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val = RMAPPlugin0.Read( address_MEM_OUT_SM, 1)
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currentComp_re[frequencyBin] = val[0]
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# read Im
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RMAPPlugin0.Write( address_CTRL_SM, [mask_REN] )
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val = RMAPPlugin0.Read( address_MEM_OUT_SM, 1)
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currentComp_im[frequencyBin] = val[0]
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RMAPPlugin0.ProcessPendingEvents()
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return (currentComp_re, currentComp_im)
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def is_MEM_OUT_SM_Empty( ):
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ret = 0
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sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1)
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MEM_OUT_SM_Empty = (sm_reg[0] & 0x00000030) >> 4
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if MEM_OUT_SM_Empty == 0x3:
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ret = 1
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return ret
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def is_MEM_OUT_SM_Full( ):
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ret = 0
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sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1)
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MEM_OUT_SM_Full = (sm_reg[0] & 0x0000000c) >> 2
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if MEM_OUT_SM_Full != 0x0:
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ret = 1
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return ret
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def is_MEM_OUT_SM_Full_FIFO_0( ):
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ret = 0
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sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1)
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MEM_OUT_SM_Full = (sm_reg[0] & 0x00000004) >> 2
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if MEM_OUT_SM_Full == 0x01:
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ret = 1
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return ret
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def is_MEM_OUT_SM_Full_FIFO_1( ):
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ret = 0
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sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1)
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MEM_OUT_SM_Full = (sm_reg[0] & 0x00000008) >> 3
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if MEM_OUT_SM_Full == 0x01:
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ret = 1
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return ret
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def wait_for_FIFO_0_Full():
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counter = 0
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while ( is_MEM_OUT_SM_Full_FIFO_0() == 0 ):
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print_custom( "FIFO_0 not full " + str(counter) )
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counter = counter + 1
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if counter == 10:
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break
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def wait_for_FIFO_1_Full():
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counter = 0
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while ( is_MEM_OUT_SM_Full_FIFO_1() == 0 ):
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print_custom( "FIFO_1 not full " + str(counter))
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counter = counter + 1
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if counter == 10:
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break
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def wait_for_FIFO_Full( fifo ):
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if fifo == 0:
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wait_for_FIFO_0_Full()
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elif fifo == 1:
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wait_for_FIFO_1_Full()
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else:
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print_custom( "ERR *** wait_for_FIFO_Full *** unexpted value for parameter [fifo]" )
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def wait_for_FIFO_0_or_1_Full():
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counter = 0
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sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1)
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MEM_OUT_SM_Full = (sm_reg[0] & 0x0000000c) >> 2
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while ( MEM_OUT_SM_Full == 0 ):
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print_custom( "FIFO 0 or 1 not full " + str(counter))
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counter = counter + 1
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if counter == 10:
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break
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sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1)
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MEM_OUT_SM_Full = (sm_reg[0] & 0x0000000c) >> 2
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RMAPPlugin0.ProcessPendingEvents()
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def print_reg_sm( ):
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sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1)
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out_ren = (sm_reg[0] & 0x00000003)
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MEM_OUT_SM_Full = (sm_reg[0] & 0x0000000c) >> 2
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MEM_OUT_SM_Empty = (sm_reg[0] & 0x00000030) >> 4
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MEM_OUT_SM_Full_s= (sm_reg[0] & 0x00000040) >> 6
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print "sm_reg = " + bin( sm_reg[0] & 0x7f ) \
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+ ", out_ren = " + bin( out_ren ) \
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+ ", MEM_OUT_SM_Full = " + bin( MEM_OUT_SM_Full ) \
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+ ", MEM_OUT_SM_Empty = " + bin( MEM_OUT_SM_Empty ) \
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+ ", MEM_OUT_SM_Full_s = " + bin( MEM_OUT_SM_Full_s )
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RMAPPlugin0.ProcessPendingEvents()
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