import numpy as np

from test_fft.register_addresses_fft_test import *

from __main__ import RMAPPlugin0

def print_custom( value ):
	print value
	RMAPPlugin0.ProcessPendingEvents()

def read_SM_Re( nbFrequencyBins, address_MEM_OUT_SM ):
	currentComp_re = np.zeros( nbFrequencyBins )
	if address_MEM_OUT_SM == address_MEM_OUT_SM_0:
		mask_REN = mask_REN_FIFO_0
	elif address_MEM_OUT_SM == address_MEM_OUT_SM_1:
		mask_REN = mask_REN_FIFO_1
	else:
		print_custom( "ERR *** read_SM_Re *** unexpected address_MEM_OUT_SM" )
	for frequencyBin in range(nbFrequencyBins):
		# read Re
		RMAPPlugin0.Write( address_CTRL_SM, [mask_REN] )
		val = RMAPPlugin0.Read( address_MEM_OUT_SM, 1)
		currentComp_re[frequencyBin] = val[0]
		RMAPPlugin0.ProcessPendingEvents()
	return currentComp_re

def read_SM_Re_Im( nbFrequencyBins, address_MEM_OUT_SM ):
	currentComp_re = np.zeros( nbFrequencyBins )
	currentComp_im = np.zeros( nbFrequencyBins )
	if address_MEM_OUT_SM == address_MEM_OUT_SM_0:
		mask_REN = mask_REN_FIFO_0
	elif address_MEM_OUT_SM == address_MEM_OUT_SM_1:
		mask_REN = mask_REN_FIFO_1
	else:
		print_custom( "ERR *** read_SM_Re_Im *** unexpected address_MEM_OUT_SM" )
	for frequencyBin in range(nbFrequencyBins):
		# read Re
		RMAPPlugin0.Write( address_CTRL_SM, [mask_REN] )
		val = RMAPPlugin0.Read( address_MEM_OUT_SM, 1)
		currentComp_re[frequencyBin] = val[0]
		# read Im
		RMAPPlugin0.Write( address_CTRL_SM, [mask_REN] )
		val = RMAPPlugin0.Read( address_MEM_OUT_SM, 1)
		currentComp_im[frequencyBin] = val[0]
		RMAPPlugin0.ProcessPendingEvents()
	return (currentComp_re, currentComp_im)

def is_MEM_OUT_SM_Empty( ):
	ret = 0
	sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1)
	MEM_OUT_SM_Empty	= (sm_reg[0] & 0x00000030) >> 4
	if MEM_OUT_SM_Empty == 0x3:
		ret = 1
	return ret

def is_MEM_OUT_SM_Full( ):
	ret = 0
	sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1)
	MEM_OUT_SM_Full	= (sm_reg[0] & 0x0000000c) >> 2
	if MEM_OUT_SM_Full != 0x0:
		ret = 1
	return ret

def is_MEM_OUT_SM_Full_FIFO_0( ):
	ret = 0
	sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1)
	MEM_OUT_SM_Full	= (sm_reg[0] & 0x00000004) >> 2
	if MEM_OUT_SM_Full == 0x01:
		ret = 1
	return ret

def is_MEM_OUT_SM_Full_FIFO_1( ):
	ret = 0
	sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1)
	MEM_OUT_SM_Full	= (sm_reg[0] & 0x00000008) >> 3
	if MEM_OUT_SM_Full == 0x01:
		ret = 1
	return ret

def wait_for_FIFO_0_Full():
	counter = 0
	while ( is_MEM_OUT_SM_Full_FIFO_0() == 0 ):
		print_custom( "FIFO_0 not full " + str(counter) )
		counter = counter + 1
		if counter == 10:
			break

def wait_for_FIFO_1_Full():
	counter = 0
	while ( is_MEM_OUT_SM_Full_FIFO_1() == 0 ):
		print_custom( "FIFO_1 not full " + str(counter))
		counter = counter + 1
		if counter == 10:
			break

def wait_for_FIFO_Full( fifo ):
	if fifo == 0:
		wait_for_FIFO_0_Full()
	elif fifo == 1:
		wait_for_FIFO_1_Full()
	else:
		print_custom( "ERR *** wait_for_FIFO_Full *** unexpted value for parameter [fifo]" )

def wait_for_FIFO_0_or_1_Full():
	counter = 0
	sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1)
	MEM_OUT_SM_Full	= (sm_reg[0] & 0x0000000c) >> 2
	while ( MEM_OUT_SM_Full == 0 ):
		print_custom( "FIFO 0 or 1  not full " + str(counter))
		counter = counter + 1
		if counter == 10:
			break
		sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1)
		MEM_OUT_SM_Full	= (sm_reg[0] & 0x0000000c) >> 2
		RMAPPlugin0.ProcessPendingEvents()

def print_reg_sm( ):
	sm_reg = RMAPPlugin0.Read( address_CTRL_SM, 1)
	out_ren 		 = (sm_reg[0] & 0x00000003)
	MEM_OUT_SM_Full  = (sm_reg[0] & 0x0000000c) >> 2
	MEM_OUT_SM_Empty = (sm_reg[0] & 0x00000030) >> 4
	MEM_OUT_SM_Full_s= (sm_reg[0] & 0x00000040) >> 6
	print "sm_reg = "  + bin( sm_reg[0] & 0x7f ) \
			+ ", out_ren = " + bin( out_ren ) \
			+ ", MEM_OUT_SM_Full = " + bin( MEM_OUT_SM_Full ) \
			+ ", MEM_OUT_SM_Empty = " + bin( MEM_OUT_SM_Empty ) \
			+ ", MEM_OUT_SM_Full_s = " + bin( MEM_OUT_SM_Full_s )
	RMAPPlugin0.ProcessPendingEvents()