HG_REPOSITORIES/LPP/INSTRUMENTATION/SOLO_LFR/DEV_PLE Files · FSW-qt/bin/LEON3_LOAD.py

HK packet changed due to misalignment of one int data...

HK packet changed due to misalignment of one int data v e1 and e2 are now valid in the HK packet

paul - - Load All Authors

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r94:399cb300a264 VHDLib206


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VHDLib206

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             LEON3_LOAD.py
        
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             / FSW-qt / bin / LEON3_LOAD.py
          
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      #!/usr/bin/lppmon -e 

      proxy.loadSysDriver("AHBUARTplugin","AHBUART");

      proxy.loadSysDriverToParent("dsu3plugin","AHBUART");

      proxy.loadSysDriverToParent("APB UART PLUGIN","AHBUART");

      AHBUART.open("/dev/ttyUSB0",30000000)

      dsu3plugin0.openFile("/opt/DEV_PLE/FSW-qt/bin/fsw-vhdl-dev")

      dsu3plugin0.loadFile()

      dsu3plugin0.run()

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				#!/usr/bin/lppmon -e

				proxy.loadSysDriver("AHBUARTplugin","AHBUART");
				proxy.loadSysDriverToParent("dsu3plugin","AHBUART");
				proxy.loadSysDriverToParent("APB UART PLUGIN","AHBUART");
				AHBUART.open("/dev/ttyUSB0",30000000)
				dsu3plugin0.openFile("/opt/DEV_PLE/FSW-qt/bin/fsw-vhdl-dev")
				dsu3plugin0.loadFile()
				dsu3plugin0.run()