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A few changes to debug the VHDL design update
paul -
r83:e32329954fdb nov2013
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@@ -1,6 +1,6
1 #############################################################################
1 #############################################################################
2 # Makefile for building: bin/fsw
2 # Makefile for building: bin/fsw
3 # Generated by qmake (2.01a) (Qt 4.8.5) on: Fri Nov 15 07:19:44 2013
3 # Generated by qmake (2.01a) (Qt 4.8.5) on: Tue Nov 19 13:58:57 2013
4 # Project: fsw-qt.pro
4 # Project: fsw-qt.pro
5 # Template: app
5 # Template: app
6 # Command: /usr/bin/qmake-qt4 -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro
6 # Command: /usr/bin/qmake-qt4 -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro
@@ -10,7 +10,7
10
10
11 CC = sparc-rtems-gcc
11 CC = sparc-rtems-gcc
12 CXX = sparc-rtems-g++
12 CXX = sparc-rtems-g++
13 DEFINES = -DSW_VERSION_N1=0 -DSW_VERSION_N2=0 -DSW_VERSION_N3=0 -DSW_VERSION_N4=22 -DPRINT_MESSAGES_ON_CONSOLE -DPRINT_TASK_STATISTICS
13 DEFINES = -DSW_VERSION_N1=0 -DSW_VERSION_N2=0 -DSW_VERSION_N3=0 -DSW_VERSION_N4=22 -DPRINT_MESSAGES_ON_CONSOLE
14 CFLAGS = -pipe -O3 -Wall $(DEFINES)
14 CFLAGS = -pipe -O3 -Wall $(DEFINES)
15 CXXFLAGS = -pipe -O3 -Wall $(DEFINES)
15 CXXFLAGS = -pipe -O3 -Wall $(DEFINES)
16 INCPATH = -I/usr/lib64/qt4/mkspecs/linux-g++ -I. -I../src -I../header
16 INCPATH = -I/usr/lib64/qt4/mkspecs/linux-g++ -I. -I../src -I../header
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@@ -1,7 +1,7
1 TEMPLATE = app
1 TEMPLATE = app
2 # CONFIG += console v8 sim
2 # CONFIG += console v8 sim
3 # CONFIG options = verbose *** boot_messages *** debug_messages *** cpu_usage_report *** stack_report *** gsa
3 # CONFIG options = verbose *** boot_messages *** debug_messages *** cpu_usage_report *** stack_report *** gsa
4 CONFIG += console verbose cpu_usage_report
4 CONFIG += console verbose
5 CONFIG -= qt
5 CONFIG -= qt
6
6
7 include(./sparc.pri)
7 include(./sparc.pri)
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@@ -1,6 +1,6
1 <?xml version="1.0" encoding="UTF-8"?>
1 <?xml version="1.0" encoding="UTF-8"?>
2 <!DOCTYPE QtCreatorProject>
2 <!DOCTYPE QtCreatorProject>
3 <!-- Written by QtCreator 2.8.1, 2013-11-15T16:54:28. -->
3 <!-- Written by QtCreator 2.8.1, 2013-11-21T16:57:00. -->
4 <qtcreator>
4 <qtcreator>
5 <data>
5 <data>
6 <variable>ProjectExplorer.Project.ActiveTarget</variable>
6 <variable>ProjectExplorer.Project.ActiveTarget</variable>
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@@ -194,6 +194,7
194
194
195 #define NB_SAMPLES_PER_SNAPSHOT 2048
195 #define NB_SAMPLES_PER_SNAPSHOT 2048
196 #define TIME_OFFSET 2
196 #define TIME_OFFSET 2
197 #define ALIGNEMENT_OFFSET 100
197 #define WAVEFORM_EXTENDED_HEADER_OFFSET 22
198 #define WAVEFORM_EXTENDED_HEADER_OFFSET 22
198 #define NB_BYTES_SWF_BLK (2 * 6)
199 #define NB_BYTES_SWF_BLK (2 * 6)
199 #define NB_WORDS_SWF_BLK 3
200 #define NB_WORDS_SWF_BLK 3
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@@ -72,6 +72,7 void set_wfp_burst_enable_register( unsi
72 void reset_wfp_run_burst_enable();
72 void reset_wfp_run_burst_enable();
73 void reset_wfp_status();
73 void reset_wfp_status();
74 void reset_new_waveform_picker_regs();
74 void reset_new_waveform_picker_regs();
75 unsigned int address_alignment( volatile int *address);
75
76
76 //*****************
77 //*****************
77 // local parameters
78 // local parameters
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@@ -41,19 +41,19 gptimer_regs_t *gptimer_regs
41 spectral_matrix_regs_t *spectral_matrix_regs = (spectral_matrix_regs_t*) REGS_ADDR_SPECTRAL_MATRIX;
41 spectral_matrix_regs_t *spectral_matrix_regs = (spectral_matrix_regs_t*) REGS_ADDR_SPECTRAL_MATRIX;
42
42
43 // WAVEFORMS GLOBAL VARIABLES // 2048 * 3 * 4 + 2 * 4 = 24576 + 8 bytes
43 // WAVEFORMS GLOBAL VARIABLES // 2048 * 3 * 4 + 2 * 4 = 24576 + 8 bytes
44 volatile int wf_snap_f0[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ];
44 volatile int wf_snap_f0[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET + ALIGNEMENT_OFFSET ];
45 //
45 //
46 volatile int wf_snap_f1[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ];
46 volatile int wf_snap_f1[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET + ALIGNEMENT_OFFSET ];
47 volatile int wf_snap_f1_bis[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ];
47 volatile int wf_snap_f1_bis[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET + ALIGNEMENT_OFFSET ];
48 volatile int wf_snap_f1_norm[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ];
48 volatile int wf_snap_f1_norm[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET + ALIGNEMENT_OFFSET ];
49 //
49 //
50 volatile int wf_snap_f2[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ];
50 volatile int wf_snap_f2[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET + ALIGNEMENT_OFFSET ];
51 volatile int wf_snap_f2_bis[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ];
51 volatile int wf_snap_f2_bis[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET + ALIGNEMENT_OFFSET ];
52 volatile int wf_snap_f2_norm[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ];
52 volatile int wf_snap_f2_norm[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET + ALIGNEMENT_OFFSET ];
53 //
53 //
54 volatile int wf_cont_f3[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ];
54 volatile int wf_cont_f3[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET + ALIGNEMENT_OFFSET ];
55 volatile int wf_cont_f3_bis[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ];
55 volatile int wf_cont_f3_bis[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET + ALIGNEMENT_OFFSET ];
56 char wf_cont_f3_light[ NB_SAMPLES_PER_SNAPSHOT * NB_BYTES_CWF3_LIGHT_BLK ];
56 char wf_cont_f3_light[ NB_SAMPLES_PER_SNAPSHOT * NB_BYTES_CWF3_LIGHT_BLK + ALIGNEMENT_OFFSET ];
57
57
58 // SPECTRAL MATRICES GLOBAL VARIABLES
58 // SPECTRAL MATRICES GLOBAL VARIABLES
59 volatile int spec_mat_f0_0[ SM_HEADER + TOTAL_SIZE_SM ];
59 volatile int spec_mat_f0_0[ SM_HEADER + TOTAL_SIZE_SM ];
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@@ -7,13 +7,15
7
7
8 #include "fsw_misc.h"
8 #include "fsw_misc.h"
9
9
10 char *DumbMessages[7] = {"in DUMB *** default", // RTEMS_EVENT_0
10 char *DumbMessages[9] = {"in DUMB *** default", // RTEMS_EVENT_0
11 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
11 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
12 "in DUMB *** waveforms_isr", // RTEMS_EVENT_2
12 "in DUMB *** waveforms_isr", // RTEMS_EVENT_2
13 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
13 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
14 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
14 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
15 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
15 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
16 "ERR HK" // RTEMS_EVENT_6
16 "ERR HK", // RTEMS_EVENT_6
17 "full is 0", // RTEMS_EVENT_7
18 "full is 1" // RTEMS_EVENT_8
17 };
19 };
18
20
19 int configure_timer(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider,
21 int configure_timer(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider,
@@ -251,7 +253,8 rtems_task dumb_task( rtems_task_argumen
251
253
252 while(1){
254 while(1){
253 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
255 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
254 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6,
256 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6
257 | RTEMS_EVENT_7 | RTEMS_EVENT_8 | RTEMS_EVENT_9 ,
255 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
258 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
256 intEventOut = (unsigned int) event_out;
259 intEventOut = (unsigned int) event_out;
257 for ( i=0; i<32; i++)
260 for ( i=0; i<32; i++)
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@@ -481,12 +481,12 int enter_normal_mode()
481 //****************
481 //****************
482 // waveform picker
482 // waveform picker
483 reset_new_waveform_picker_regs();
483 reset_new_waveform_picker_regs();
484 set_wfp_burst_enable_register(LFR_MODE_NORMAL);
484 set_wfp_burst_enable_register( LFR_MODE_NORMAL );
485 LEON_Clear_interrupt( IRQ_WAVEFORM_PICKER );
485 LEON_Clear_interrupt( IRQ_WAVEFORM_PICKER );
486 LEON_Unmask_interrupt( IRQ_WAVEFORM_PICKER );
486 LEON_Unmask_interrupt( IRQ_WAVEFORM_PICKER );
487 startDate = time_management_regs->coarse_time + 2;
487 startDate = time_management_regs->coarse_time + 2;
488 new_waveform_picker_regs->run_burst_enable = new_waveform_picker_regs->run_burst_enable | 0x80; // [1000 0000]
488 new_waveform_picker_regs->start_date = startDate;
489 new_waveform_picker_regs->start_date = startDate;
489 new_waveform_picker_regs->run_burst_enable = new_waveform_picker_regs->run_burst_enable | 0x80; // [1000 0000]
490 //****************
490 //****************
491 // spectral matrix
491 // spectral matrix
492 #endif
492 #endif
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@@ -76,20 +76,28 rtems_isr waveforms_isr( rtems_vector_nu
76 statusReg = new_waveform_picker_regs->status;
76 statusReg = new_waveform_picker_regs->status;
77 fullRecord = fullRecord | ( statusReg & 0x7 );
77 fullRecord = fullRecord | ( statusReg & 0x7 );
78 // if ( (new_waveform_picker_regs->status & 0x7) == 0x7 ){ // f2 f1 and f0 are full
78 // if ( (new_waveform_picker_regs->status & 0x7) == 0x7 ){ // f2 f1 and f0 are full
79 if ( (new_waveform_picker_regs->status & 0x1) == 0x1 ){ // f2 is full
79 // if ( (new_waveform_picker_regs->status & 0x1) == 0x1 ) // f0 is full
80 if ( (new_waveform_picker_regs->status & 0x4) == 0x4 ) // f2 is full
81 {
80 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) {
82 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) {
81 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
83 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
82 }
84 }
83 new_waveform_picker_regs->status = new_waveform_picker_regs->status & 0xfffff888;
85 new_waveform_picker_regs->status = new_waveform_picker_regs->status & 0xfffff888;
86 new_waveform_picker_regs->status = new_waveform_picker_regs->status & 0xfffff888;
87 new_waveform_picker_regs->status = new_waveform_picker_regs->status & 0xfffff888;
88 new_waveform_picker_regs->status = new_waveform_picker_regs->status & 0xfffff888;
89 new_waveform_picker_regs->status = new_waveform_picker_regs->status & 0xfffff888;
90 // if ( (new_waveform_picker_regs->status & 0x1) == 0x1 )
91 if ( (new_waveform_picker_regs->status & 0x4) == 0x4 ) // f2 is full
92 {
93 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_8 );
94 }
95 // if ( (new_waveform_picker_regs->status & 0x1) == 0x0 )
96 if ( (new_waveform_picker_regs->status & 0x4) == 0x0 )
97 {
98 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_7 );
99 }
84 }
100 }
85 // if ( fullRecord == 0x7 ){ // f2 f1 and f0 are full
86 // if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) {
87 // rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
88 // }
89 // fullRecord = 0x00;
90 // }
91 // new_waveform_picker_regs->status = ( new_waveform_picker_regs->status & (~statusReg) )
92 // | ( new_waveform_picker_regs->status & 0xfffffff8 );
93 #endif
101 #endif
94 break;
102 break;
95
103
@@ -266,8 +274,8 rtems_task wfrm_task(rtems_task_argument
266
274
267 if (event_out == RTEMS_EVENT_MODE_NORMAL)
275 if (event_out == RTEMS_EVENT_MODE_NORMAL)
268 {
276 {
269 send_waveform_SWF(wf_snap_f0, SID_NORM_SWF_F0, headerSWF_F0, queue_id);
277 //send_waveform_SWF(wf_snap_f0, SID_NORM_SWF_F0, headerSWF_F0, queue_id);
270 send_waveform_SWF(wf_snap_f1, SID_NORM_SWF_F1, headerSWF_F1, queue_id);
278 //send_waveform_SWF(wf_snap_f1, SID_NORM_SWF_F1, headerSWF_F1, queue_id);
271 send_waveform_SWF(wf_snap_f2, SID_NORM_SWF_F2, headerSWF_F2, queue_id);
279 send_waveform_SWF(wf_snap_f2, SID_NORM_SWF_F2, headerSWF_F2, queue_id);
272 #ifdef GSA
280 #ifdef GSA
273 new_waveform_picker_regs->status = new_waveform_picker_regs->status & 0xf888; // [1111 1000 1000 1000] f2, f1, f0 bits =0
281 new_waveform_picker_regs->status = new_waveform_picker_regs->status & 0xf888; // [1111 1000 1000 1000] f2, f1, f0 bits =0
@@ -1033,7 +1041,8 void set_wfp_burst_enable_register( unsi
1033 new_waveform_picker_regs->run_burst_enable = 0x00; // [0000 0000] no burst enable
1041 new_waveform_picker_regs->run_burst_enable = 0x00; // [0000 0000] no burst enable
1034 // new_waveform_picker_regs->run_burst_enable = 0x0f; // [0000 1111] enable f3 f2 f1 f0
1042 // new_waveform_picker_regs->run_burst_enable = 0x0f; // [0000 1111] enable f3 f2 f1 f0
1035 // new_waveform_picker_regs->run_burst_enable = 0x07; // [0000 0111] enable f2 f1 f0
1043 // new_waveform_picker_regs->run_burst_enable = 0x07; // [0000 0111] enable f2 f1 f0
1036 new_waveform_picker_regs->run_burst_enable = 0x01; // [0000 0111] enable f0
1044 // new_waveform_picker_regs->run_burst_enable = 0x01; // [0000 0001] enable f0
1045 new_waveform_picker_regs->run_burst_enable = 0x04; // [0000 0100] enable f0
1037 break;
1046 break;
1038 case(LFR_MODE_BURST):
1047 case(LFR_MODE_BURST):
1039 new_waveform_picker_regs->run_burst_enable = 0x40; // [0100 0000] f2 burst enabled
1048 new_waveform_picker_regs->run_burst_enable = 0x40; // [0100 0000] f2 burst enabled
@@ -1106,24 +1115,87 void reset_new_waveform_picker_regs()
1106 *
1115 *
1107 */
1116 */
1108
1117
1118 unsigned int wf_snap_f0_aligned;
1119 unsigned int wf_snap_f1_aligned;
1120 unsigned int wf_snap_f2_aligned;
1121 unsigned int wf_cont_f3_aligned;
1122
1109 new_waveform_picker_regs->data_shaping = 0x01; // 0x00 *** R1 R0 SP1 SP0 BW
1123 new_waveform_picker_regs->data_shaping = 0x01; // 0x00 *** R1 R0 SP1 SP0 BW
1110 new_waveform_picker_regs->run_burst_enable = 0x00; // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
1124 new_waveform_picker_regs->run_burst_enable = 0x00; // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
1111 new_waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0); // 0x08
1125 wf_snap_f0_aligned = address_alignment( wf_snap_f0 );
1112 new_waveform_picker_regs->addr_data_f1 = (int) (wf_snap_f1); // 0x0c
1126 wf_snap_f1_aligned = address_alignment( wf_snap_f1 );
1113 new_waveform_picker_regs->addr_data_f2 = (int) (wf_snap_f2); // 0x10
1127 wf_snap_f2_aligned = address_alignment( wf_snap_f2 );
1114 new_waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3); // 0x14
1128 wf_cont_f3_aligned = address_alignment( wf_cont_f3 );
1129 new_waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0_aligned); // 0x08
1130 new_waveform_picker_regs->addr_data_f1 = (int) (wf_snap_f1_aligned); // 0x0c
1131 new_waveform_picker_regs->addr_data_f2 = (int) (wf_snap_f2_aligned); // 0x10
1132 new_waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_aligned); // 0x14
1133 new_waveform_picker_regs->status = 0x00; // 0x18
1134 // new_waveform_picker_regs->delta_snapshot = 0x12800; // 0x1c 296 * 256 = 75776
1135 // new_waveform_picker_regs->delta_snapshot = 0x1000; // 0x1c 16 * 256 = 4096
1136 new_waveform_picker_regs->delta_snapshot = 0x2000; // 0x1c 32 * 256 = 8192
1137 new_waveform_picker_regs->delta_f0 = 0xbf5; // 0x20 *** 1013
1138 new_waveform_picker_regs->delta_f0_2 = 0x7; // 0x24 *** 7 [7 bits]
1139 new_waveform_picker_regs->delta_f1 = 0xbc0; // 0x28 *** 960
1140 // new_waveform_picker_regs->delta_f2 = 0x12200; // 0x2c *** 74240
1141 new_waveform_picker_regs->delta_f2 = 0xc00; // 0x2c *** 12 * 256 = 3072
1142 new_waveform_picker_regs->nb_data_by_buffer = 0x7ff; // 0x30 *** 2048 -1 => nb samples -1
1143 new_waveform_picker_regs->snapshot_param = 0x800; // 0x34 *** 2048 => nb samples
1144 new_waveform_picker_regs->start_date = 0x00; // 0x38
1145 new_waveform_picker_regs->nb_word_in_buffer = 0x1802; // 0x3c *** 2048 * 3 + 2 = 6146
1146 }
1147
1148 void reset_new_waveform_picker_regs_alt()
1149 {
1150 /** This function resets the waveform picker module registers.
1151 *
1152 * The registers affected by this function are located at the following offset addresses:
1153 * - 0x00 data_shaping
1154 * - 0x04 run_burst_enable
1155 * - 0x08 addr_data_f0
1156 * - 0x0C addr_data_f1
1157 * - 0x10 addr_data_f2
1158 * - 0x14 addr_data_f3
1159 * - 0x18 status
1160 * - 0x1C delta_snapshot
1161 * - 0x20 delta_f0
1162 * - 0x24 delta_f0_2
1163 * - 0x28 delta_f1
1164 * - 0x2c delta_f2
1165 * - 0x30 nb_data_by_buffer
1166 * - 0x34 nb_snapshot_param
1167 * - 0x38 start_date
1168 * - 0x3c nb_word_in_buffer
1169 *
1170 */
1171
1172 unsigned int wf_snap_f0_aligned;
1173 unsigned int wf_snap_f1_aligned;
1174 unsigned int wf_snap_f2_aligned;
1175 unsigned int wf_cont_f3_aligned;
1176
1177 new_waveform_picker_regs->data_shaping = 0x01; // 0x00 *** R1 R0 SP1 SP0 BW
1178 new_waveform_picker_regs->run_burst_enable = 0x00; // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
1179 wf_snap_f0_aligned = address_alignment( wf_snap_f0 );
1180 wf_snap_f1_aligned = address_alignment( wf_snap_f1 );
1181 wf_snap_f2_aligned = address_alignment( wf_snap_f2 );
1182 wf_cont_f3_aligned = address_alignment( wf_cont_f3 );
1183 new_waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0_aligned); // 0x08
1184 new_waveform_picker_regs->addr_data_f1 = (int) (wf_snap_f1_aligned); // 0x0c
1185 new_waveform_picker_regs->addr_data_f2 = (int) (wf_snap_f2_aligned); // 0x10
1186 new_waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_aligned); // 0x14
1115 new_waveform_picker_regs->status = 0x00; // 0x18
1187 new_waveform_picker_regs->status = 0x00; // 0x18
1116 // new_waveform_picker_regs->delta_snapshot = 0x12800; // 0x1c 296 * 256 = 75776
1188 // new_waveform_picker_regs->delta_snapshot = 0x12800; // 0x1c 296 * 256 = 75776
1117 new_waveform_picker_regs->delta_snapshot = 0x1000; // 0x1c 16 * 256 = 4096
1189 new_waveform_picker_regs->delta_snapshot = 0x1000; // 0x1c 16 * 256 = 4096
1118 new_waveform_picker_regs->delta_f0 = 0x3f5; // 0x20 *** 1013
1190 new_waveform_picker_regs->delta_f0 = 0xbf5; // 0x20 *** 1013
1119 new_waveform_picker_regs->delta_f0_2 = 0x7; // 0x24 *** 7 [7 bits]
1191 new_waveform_picker_regs->delta_f0_2 = 0x7; // 0x24 *** 7 [7 bits]
1120 new_waveform_picker_regs->delta_f1 = 0x3c0; // 0x28 *** 960
1192 new_waveform_picker_regs->delta_f1 = 0xbc0; // 0x28 *** 960
1121 // new_waveform_picker_regs->delta_f2 = 0x12200; // 0x2c *** 74240
1193 // new_waveform_picker_regs->delta_f2 = 0x12200; // 0x2c *** 74240
1122 new_waveform_picker_regs->delta_f2 = 0xc00; // 0x2c *** 12 * 256 = 3072
1194 new_waveform_picker_regs->delta_f2 = 0xc00; // 0x2c *** 12 * 256 = 3072
1123 new_waveform_picker_regs->nb_data_by_buffer = 0x7ff; // 0x30 *** 2048 -1
1195 new_waveform_picker_regs->nb_data_by_buffer = 0x07; // 0x30 *** 7
1124 new_waveform_picker_regs->snapshot_param = 0x800; // 0x34 *** 2048
1196 new_waveform_picker_regs->snapshot_param = 0x10; // 0x34 *** 16
1125 new_waveform_picker_regs->start_date = 0x00; // 0x38
1197 new_waveform_picker_regs->start_date = 0x00; // 0x38
1126 new_waveform_picker_regs->nb_word_in_buffer = 0x1802; // 0x3c *** 2048 * 3 + 2 = 6146
1198 new_waveform_picker_regs->nb_word_in_buffer = 0x34; // 0x3c *** (3 * 8 + 2) * 2
1127 }
1199 }
1128
1200
1129 //*****************
1201 //*****************
@@ -1249,3 +1321,31 void increment_seq_counter_source_id( un
1249 *sequence_cnt = 0;
1321 *sequence_cnt = 0;
1250 }
1322 }
1251 }
1323 }
1324
1325 unsigned int address_alignment( volatile int *address)
1326 {
1327 unsigned char i;
1328 unsigned char lastByte;
1329 unsigned int addressAligned;
1330
1331 addressAligned = (unsigned int) address;
1332
1333 PRINTF1("address %x\n", addressAligned );
1334
1335 for (i=0; i<256; i++)
1336 {
1337 lastByte = (unsigned char) ( addressAligned & 0x000000ff ) ;
1338 if (lastByte == 0x00)
1339 {
1340 break;
1341 }
1342 else
1343 {
1344 addressAligned = addressAligned + 1;
1345 }
1346 }
1347
1348 PRINTF2("i = %d, address %x\n", i, (int) addressAligned);
1349
1350 return addressAligned;
1351 }
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