##// END OF EJS Templates
sy_lfr_watchdog_enabled handled...
paul -
r262:e2f22269a98c R3a
parent child
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@@ -1,2 +1,2
1 3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters
1 3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters
2 ad7698268954c5d3d203a3b3ad09fcdf2d536472 header/lfr_common_headers
2 fa4fff498e7a3208f9f7ba469d6e25c84fe6ad71 header/lfr_common_headers
@@ -1,82 +1,84
1 #ifndef FSW_MISC_H_INCLUDED
1 #ifndef FSW_MISC_H_INCLUDED
2 #define FSW_MISC_H_INCLUDED
2 #define FSW_MISC_H_INCLUDED
3
3
4 #include <rtems.h>
4 #include <rtems.h>
5 #include <stdio.h>
5 #include <stdio.h>
6 #include <grspw.h>
6 #include <grspw.h>
7 #include <grlib_regs.h>
7 #include <grlib_regs.h>
8
8
9 #include "fsw_params.h"
9 #include "fsw_params.h"
10 #include "fsw_spacewire.h"
10 #include "fsw_spacewire.h"
11 #include "lfr_cpu_usage_report.h"
11 #include "lfr_cpu_usage_report.h"
12
12
13
13
14 enum lfr_reset_cause_t{
14 enum lfr_reset_cause_t{
15 UNKNOWN_CAUSE,
15 UNKNOWN_CAUSE,
16 POWER_ON,
16 POWER_ON,
17 TC_RESET,
17 TC_RESET,
18 WATCHDOG,
18 WATCHDOG,
19 ERROR_RESET,
19 ERROR_RESET,
20 UNEXP_RESET
20 UNEXP_RESET
21 };
21 };
22
22
23 extern gptimer_regs_t *gptimer_regs;
23 extern gptimer_regs_t *gptimer_regs;
24 extern void ASR16_get_FPRF_IURF_ErrorCounters( unsigned int*, unsigned int* );
24 extern void ASR16_get_FPRF_IURF_ErrorCounters( unsigned int*, unsigned int* );
25 extern void CCR_getInstructionAndDataErrorCounters( unsigned int*, unsigned int* );
25 extern void CCR_getInstructionAndDataErrorCounters( unsigned int*, unsigned int* );
26
26
27 #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0
27 #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0
28
28
29 rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic
29 rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic
30 rtems_id HK_id; // id of the HK rate monotonic period
30 rtems_id HK_id; // id of the HK rate monotonic period
31
31
32 void timer_configure( unsigned char timer, unsigned int clock_divider,
32 void timer_configure( unsigned char timer, unsigned int clock_divider,
33 unsigned char interrupt_level, rtems_isr (*timer_isr)() );
33 unsigned char interrupt_level, rtems_isr (*timer_isr)() );
34 void timer_start( unsigned char timer );
34 void timer_start( unsigned char timer );
35 void timer_stop( unsigned char timer );
35 void timer_stop( unsigned char timer );
36 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider);
36 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider);
37
37
38 // WATCHDOG
38 // WATCHDOG
39 rtems_isr watchdog_isr( rtems_vector_number vector );
39 rtems_isr watchdog_isr( rtems_vector_number vector );
40 void watchdog_configure(void);
40 void watchdog_configure(void);
41 void watchdog_stop(void);
41 void watchdog_stop(void);
42 void watchdog_reload(void);
42 void watchdog_start(void);
43 void watchdog_start(void);
43
44
44 // SERIAL LINK
45 // SERIAL LINK
45 int send_console_outputs_on_apbuart_port( void );
46 int send_console_outputs_on_apbuart_port( void );
46 int enable_apbuart_transmitter( void );
47 int enable_apbuart_transmitter( void );
47 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value);
48 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value);
48
49
49 // RTEMS TASKS
50 // RTEMS TASKS
50 rtems_task load_task( rtems_task_argument argument );
51 rtems_task load_task( rtems_task_argument argument );
51 rtems_task hous_task( rtems_task_argument argument );
52 rtems_task hous_task( rtems_task_argument argument );
52 rtems_task dumb_task( rtems_task_argument unused );
53 rtems_task dumb_task( rtems_task_argument unused );
53
54
54 void init_housekeeping_parameters( void );
55 void init_housekeeping_parameters( void );
55 void increment_seq_counter(unsigned short *packetSequenceControl);
56 void increment_seq_counter(unsigned short *packetSequenceControl);
56 void getTime( unsigned char *time);
57 void getTime( unsigned char *time);
57 unsigned long long int getTimeAsUnsignedLongLongInt( );
58 unsigned long long int getTimeAsUnsignedLongLongInt( );
58 void send_dumb_hk( void );
59 void send_dumb_hk( void );
59 void get_temperatures( unsigned char *temperatures );
60 void get_temperatures( unsigned char *temperatures );
60 void get_v_e1_e2_f3( unsigned char *spacecraft_potential );
61 void get_v_e1_e2_f3( unsigned char *spacecraft_potential );
61 void get_cpu_load( unsigned char *resource_statistics );
62 void get_cpu_load( unsigned char *resource_statistics );
62 void set_hk_lfr_sc_potential_flag( bool state );
63 void set_hk_lfr_sc_potential_flag( bool state );
63 void set_hk_lfr_mag_fields_flag( bool state );
64 void set_hk_lfr_mag_fields_flag( bool state );
65 void set_sy_lfr_watchdog_enabled( bool state );
64 void set_hk_lfr_calib_enable( bool state );
66 void set_hk_lfr_calib_enable( bool state );
65 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause );
67 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause );
66 void hk_lfr_le_me_he_update();
68 void hk_lfr_le_me_he_update();
67 void set_hk_lfr_time_not_synchro();
69 void set_hk_lfr_time_not_synchro();
68
70
69 extern int sched_yield( void );
71 extern int sched_yield( void );
70 extern void rtems_cpu_usage_reset();
72 extern void rtems_cpu_usage_reset();
71 extern ring_node *current_ring_node_f3;
73 extern ring_node *current_ring_node_f3;
72 extern ring_node *ring_node_to_send_cwf_f3;
74 extern ring_node *ring_node_to_send_cwf_f3;
73 extern ring_node waveform_ring_f3[];
75 extern ring_node waveform_ring_f3[];
74 extern unsigned short sequenceCounterHK;
76 extern unsigned short sequenceCounterHK;
75
77
76 extern unsigned char hk_lfr_q_sd_fifo_size_max;
78 extern unsigned char hk_lfr_q_sd_fifo_size_max;
77 extern unsigned char hk_lfr_q_rv_fifo_size_max;
79 extern unsigned char hk_lfr_q_rv_fifo_size_max;
78 extern unsigned char hk_lfr_q_p0_fifo_size_max;
80 extern unsigned char hk_lfr_q_p0_fifo_size_max;
79 extern unsigned char hk_lfr_q_p1_fifo_size_max;
81 extern unsigned char hk_lfr_q_p1_fifo_size_max;
80 extern unsigned char hk_lfr_q_p2_fifo_size_max;
82 extern unsigned char hk_lfr_q_p2_fifo_size_max;
81
83
82 #endif // FSW_MISC_H_INCLUDED
84 #endif // FSW_MISC_H_INCLUDED
@@ -1,783 +1,801
1 /** General usage functions and RTEMS tasks.
1 /** General usage functions and RTEMS tasks.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 */
6 */
7
7
8 #include "fsw_misc.h"
8 #include "fsw_misc.h"
9
9
10 void timer_configure(unsigned char timer, unsigned int clock_divider,
10 void timer_configure(unsigned char timer, unsigned int clock_divider,
11 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
11 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
12 {
12 {
13 /** This function configures a GPTIMER timer instantiated in the VHDL design.
13 /** This function configures a GPTIMER timer instantiated in the VHDL design.
14 *
14 *
15 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
15 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
16 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
16 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
17 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
17 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
18 * @param interrupt_level is the interrupt level that the timer drives.
18 * @param interrupt_level is the interrupt level that the timer drives.
19 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
19 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
20 *
20 *
21 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
21 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
22 *
22 *
23 */
23 */
24
24
25 rtems_status_code status;
25 rtems_status_code status;
26 rtems_isr_entry old_isr_handler;
26 rtems_isr_entry old_isr_handler;
27
27
28 gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register
28 gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register
29
29
30 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
30 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
31 if (status!=RTEMS_SUCCESSFUL)
31 if (status!=RTEMS_SUCCESSFUL)
32 {
32 {
33 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
33 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
34 }
34 }
35
35
36 timer_set_clock_divider( timer, clock_divider);
36 timer_set_clock_divider( timer, clock_divider);
37 }
37 }
38
38
39 void timer_start(unsigned char timer)
39 void timer_start(unsigned char timer)
40 {
40 {
41 /** This function starts a GPTIMER timer.
41 /** This function starts a GPTIMER timer.
42 *
42 *
43 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
43 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
44 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
44 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
45 *
45 *
46 */
46 */
47
47
48 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
48 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
49 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register
49 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register
50 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer
50 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer
51 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart
51 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart
52 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable
52 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable
53 }
53 }
54
54
55 void timer_stop(unsigned char timer)
55 void timer_stop(unsigned char timer)
56 {
56 {
57 /** This function stops a GPTIMER timer.
57 /** This function stops a GPTIMER timer.
58 *
58 *
59 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
59 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
60 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
60 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
61 *
61 *
62 */
62 */
63
63
64 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer
64 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer
65 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable
65 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable
66 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
66 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
67 }
67 }
68
68
69 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
69 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
70 {
70 {
71 /** This function sets the clock divider of a GPTIMER timer.
71 /** This function sets the clock divider of a GPTIMER timer.
72 *
72 *
73 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
73 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
74 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
74 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
75 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
75 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
76 *
76 *
77 */
77 */
78
78
79 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
79 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
80 }
80 }
81
81
82 // WATCHDOG
82 // WATCHDOG
83
83
84 rtems_isr watchdog_isr( rtems_vector_number vector )
84 rtems_isr watchdog_isr( rtems_vector_number vector )
85 {
85 {
86 rtems_status_code status_code;
86 rtems_status_code status_code;
87
87
88 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
88 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
89
90 PRINTF("watchdog_isr *** this is the end, exit(0)\n");
91
92 exit(0);
89 }
93 }
90
94
91 void watchdog_configure(void)
95 void watchdog_configure(void)
92 {
96 {
93 /** This function configure the watchdog.
97 /** This function configure the watchdog.
94 *
98 *
95 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
99 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
96 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
100 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
97 *
101 *
98 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
102 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
99 *
103 *
100 */
104 */
101
105
102 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
106 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
103
107
104 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
108 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
105
109
106 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
110 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
107 }
111 }
108
112
109 void watchdog_stop(void)
113 void watchdog_stop(void)
110 {
114 {
111 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
115 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
112 timer_stop( TIMER_WATCHDOG );
116 timer_stop( TIMER_WATCHDOG );
113 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
117 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
114 }
118 }
115
119
116 void watchdog_reload(void)
120 void watchdog_reload(void)
117 {
121 {
118 /** This function reloads the watchdog timer counter with the timer reload value.
122 /** This function reloads the watchdog timer counter with the timer reload value.
119 *
123 *
120 * @param void
124 * @param void
121 *
125 *
122 * @return void
126 * @return void
123 *
127 *
124 */
128 */
125
129
126 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
130 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
127 }
131 }
128
132
129 void watchdog_start(void)
133 void watchdog_start(void)
130 {
134 {
131 /** This function starts the watchdog timer.
135 /** This function starts the watchdog timer.
132 *
136 *
133 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
137 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
134 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
138 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
135 *
139 *
136 */
140 */
137
141
138 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
142 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
139
143
140 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any
144 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any
141 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
145 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
142 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer
146 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer
143 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable
147 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable
144
148
145 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
149 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
146
150
147 }
151 }
148
152
149 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
153 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
150 {
154 {
151 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
155 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
152
156
153 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
157 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
154
158
155 return 0;
159 return 0;
156 }
160 }
157
161
158 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
162 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
159 {
163 {
160 /** This function sets the scaler reload register of the apbuart module
164 /** This function sets the scaler reload register of the apbuart module
161 *
165 *
162 * @param regs is the address of the apbuart registers in memory
166 * @param regs is the address of the apbuart registers in memory
163 * @param value is the value that will be stored in the scaler register
167 * @param value is the value that will be stored in the scaler register
164 *
168 *
165 * The value shall be set by the software to get data on the serial interface.
169 * The value shall be set by the software to get data on the serial interface.
166 *
170 *
167 */
171 */
168
172
169 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
173 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
170
174
171 apbuart_regs->scaler = value;
175 apbuart_regs->scaler = value;
172
176
173 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
177 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
174 }
178 }
175
179
176 //************
180 //************
177 // RTEMS TASKS
181 // RTEMS TASKS
178
182
179 rtems_task load_task(rtems_task_argument argument)
183 rtems_task load_task(rtems_task_argument argument)
180 {
184 {
181 BOOT_PRINTF("in LOAD *** \n")
185 BOOT_PRINTF("in LOAD *** \n")
182
186
183 rtems_status_code status;
187 rtems_status_code status;
184 unsigned int i;
188 unsigned int i;
185 unsigned int j;
189 unsigned int j;
186 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
190 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
187 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
191 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
188
192
189 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
193 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
190
194
191 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
195 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
192 if( status != RTEMS_SUCCESSFUL ) {
196 if( status != RTEMS_SUCCESSFUL ) {
193 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
197 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
194 }
198 }
195
199
196 i = 0;
200 i = 0;
197 j = 0;
201 j = 0;
198
202
199 watchdog_configure();
203 watchdog_configure();
200
204
201 watchdog_start();
205 watchdog_start();
202
206
207 set_sy_lfr_watchdog_enabled( true );
208
203 while(1){
209 while(1){
204 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
210 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
205 watchdog_reload();
211 watchdog_reload();
206 i = i + 1;
212 i = i + 1;
207 if ( i == 10 )
213 if ( i == 10 )
208 {
214 {
209 i = 0;
215 i = 0;
210 j = j + 1;
216 j = j + 1;
211 PRINTF1("%d\n", j)
217 PRINTF1("%d\n", j)
212 }
218 }
213 #ifdef DEBUG_WATCHDOG
219 #ifdef DEBUG_WATCHDOG
214 if (j == 3 )
220 if (j == 3 )
215 {
221 {
216 status = rtems_task_delete(RTEMS_SELF);
222 status = rtems_task_delete(RTEMS_SELF);
217 }
223 }
218 #endif
224 #endif
219 }
225 }
220 }
226 }
221
227
222 rtems_task hous_task(rtems_task_argument argument)
228 rtems_task hous_task(rtems_task_argument argument)
223 {
229 {
224 rtems_status_code status;
230 rtems_status_code status;
225 rtems_status_code spare_status;
231 rtems_status_code spare_status;
226 rtems_id queue_id;
232 rtems_id queue_id;
227 rtems_rate_monotonic_period_status period_status;
233 rtems_rate_monotonic_period_status period_status;
228
234
229 status = get_message_queue_id_send( &queue_id );
235 status = get_message_queue_id_send( &queue_id );
230 if (status != RTEMS_SUCCESSFUL)
236 if (status != RTEMS_SUCCESSFUL)
231 {
237 {
232 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
238 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
233 }
239 }
234
240
235 BOOT_PRINTF("in HOUS ***\n");
241 BOOT_PRINTF("in HOUS ***\n");
236
242
237 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
243 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
238 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
244 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
239 if( status != RTEMS_SUCCESSFUL ) {
245 if( status != RTEMS_SUCCESSFUL ) {
240 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
246 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
241 }
247 }
242 }
248 }
243
249
244 status = rtems_rate_monotonic_cancel(HK_id);
250 status = rtems_rate_monotonic_cancel(HK_id);
245 if( status != RTEMS_SUCCESSFUL ) {
251 if( status != RTEMS_SUCCESSFUL ) {
246 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status );
252 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status );
247 }
253 }
248 else {
254 else {
249 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n");
255 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n");
250 }
256 }
251
257
252 // startup phase
258 // startup phase
253 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
259 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
254 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
260 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
255 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
261 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
256 while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
262 while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
257 {
263 {
258 if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization
264 if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization
259 {
265 {
260 break; // break if LFR is synchronized
266 break; // break if LFR is synchronized
261 }
267 }
262 else
268 else
263 {
269 {
264 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
270 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
265 // sched_yield();
271 // sched_yield();
266 status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms
272 status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms
267 }
273 }
268 }
274 }
269 status = rtems_rate_monotonic_cancel(HK_id);
275 status = rtems_rate_monotonic_cancel(HK_id);
270 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
276 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
271
277
272 set_hk_lfr_reset_cause( POWER_ON );
278 set_hk_lfr_reset_cause( POWER_ON );
273
279
274 while(1){ // launch the rate monotonic task
280 while(1){ // launch the rate monotonic task
275 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
281 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
276 if ( status != RTEMS_SUCCESSFUL ) {
282 if ( status != RTEMS_SUCCESSFUL ) {
277 PRINTF1( "in HOUS *** ERR period: %d\n", status);
283 PRINTF1( "in HOUS *** ERR period: %d\n", status);
278 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
284 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
279 }
285 }
280 else {
286 else {
281 housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8);
287 housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8);
282 housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK );
288 housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK );
283 increment_seq_counter( &sequenceCounterHK );
289 increment_seq_counter( &sequenceCounterHK );
284
290
285 housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
291 housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
286 housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
292 housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
287 housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
293 housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
288 housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
294 housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
289 housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
295 housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
290 housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
296 housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
291
297
292 spacewire_update_statistics();
298 spacewire_update_statistics();
293
299
294 set_hk_lfr_time_not_synchro();
300 set_hk_lfr_time_not_synchro();
295
301
296 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
302 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
297 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
303 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
298 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
304 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
299 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
305 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
300 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
306 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
301
307
302 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
308 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
303 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
309 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
304 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
310 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
305 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
311 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
306 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
312 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
307
313
308 hk_lfr_le_me_he_update();
314 hk_lfr_le_me_he_update();
309
315
310 // SEND PACKET
316 // SEND PACKET
311 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
317 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
312 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
318 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
313 if (status != RTEMS_SUCCESSFUL) {
319 if (status != RTEMS_SUCCESSFUL) {
314 PRINTF1("in HOUS *** ERR send: %d\n", status)
320 PRINTF1("in HOUS *** ERR send: %d\n", status)
315 }
321 }
316 }
322 }
317 }
323 }
318
324
319 PRINTF("in HOUS *** deleting task\n")
325 PRINTF("in HOUS *** deleting task\n")
320
326
321 status = rtems_task_delete( RTEMS_SELF ); // should not return
327 status = rtems_task_delete( RTEMS_SELF ); // should not return
322
328
323 return;
329 return;
324 }
330 }
325
331
326 rtems_task dumb_task( rtems_task_argument unused )
332 rtems_task dumb_task( rtems_task_argument unused )
327 {
333 {
328 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
334 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
329 *
335 *
330 * @param unused is the starting argument of the RTEMS task
336 * @param unused is the starting argument of the RTEMS task
331 *
337 *
332 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
338 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
333 *
339 *
334 */
340 */
335
341
336 unsigned int i;
342 unsigned int i;
337 unsigned int intEventOut;
343 unsigned int intEventOut;
338 unsigned int coarse_time = 0;
344 unsigned int coarse_time = 0;
339 unsigned int fine_time = 0;
345 unsigned int fine_time = 0;
340 rtems_event_set event_out;
346 rtems_event_set event_out;
341
347
342 char *DumbMessages[15] = {"in DUMB *** default", // RTEMS_EVENT_0
348 char *DumbMessages[15] = {"in DUMB *** default", // RTEMS_EVENT_0
343 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
349 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
344 "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2
350 "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2
345 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
351 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
346 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
352 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
347 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
353 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
348 "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6
354 "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6
349 "ready for dump", // RTEMS_EVENT_7
355 "ready for dump", // RTEMS_EVENT_7
350 "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8
356 "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8
351 "tick", // RTEMS_EVENT_9
357 "tick", // RTEMS_EVENT_9
352 "VHDL ERR *** waveform picker", // RTEMS_EVENT_10
358 "VHDL ERR *** waveform picker", // RTEMS_EVENT_10
353 "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11
359 "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11
354 "WATCHDOG timer", // RTEMS_EVENT_12
360 "WATCHDOG timer", // RTEMS_EVENT_12
355 "TIMECODE timer", // RTEMS_EVENT_13
361 "TIMECODE timer", // RTEMS_EVENT_13
356 "TIMECODE ISR" // RTEMS_EVENT_14
362 "TIMECODE ISR" // RTEMS_EVENT_14
357 };
363 };
358
364
359 BOOT_PRINTF("in DUMB *** \n")
365 BOOT_PRINTF("in DUMB *** \n")
360
366
361 while(1){
367 while(1){
362 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
368 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
363 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
369 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
364 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13
370 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13
365 | RTEMS_EVENT_14,
371 | RTEMS_EVENT_14,
366 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
372 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
367 intEventOut = (unsigned int) event_out;
373 intEventOut = (unsigned int) event_out;
368 for ( i=0; i<32; i++)
374 for ( i=0; i<32; i++)
369 {
375 {
370 if ( ((intEventOut >> i) & 0x0001) != 0)
376 if ( ((intEventOut >> i) & 0x0001) != 0)
371 {
377 {
372 coarse_time = time_management_regs->coarse_time;
378 coarse_time = time_management_regs->coarse_time;
373 fine_time = time_management_regs->fine_time;
379 fine_time = time_management_regs->fine_time;
374 if (i==12)
380 if (i==12)
375 {
381 {
376 PRINTF1("%s\n", DumbMessages[12])
382 PRINTF1("%s\n", DumbMessages[12])
377 }
383 }
378 if (i==13)
384 if (i==13)
379 {
385 {
380 PRINTF1("%s\n", DumbMessages[13])
386 PRINTF1("%s\n", DumbMessages[13])
381 }
387 }
382 if (i==14)
388 if (i==14)
383 {
389 {
384 PRINTF1("%s\n", DumbMessages[1])
390 PRINTF1("%s\n", DumbMessages[1])
385 }
391 }
386 }
392 }
387 }
393 }
388 }
394 }
389 }
395 }
390
396
391 //*****************************
397 //*****************************
392 // init housekeeping parameters
398 // init housekeeping parameters
393
399
394 void init_housekeeping_parameters( void )
400 void init_housekeeping_parameters( void )
395 {
401 {
396 /** This function initialize the housekeeping_packet global variable with default values.
402 /** This function initialize the housekeeping_packet global variable with default values.
397 *
403 *
398 */
404 */
399
405
400 unsigned int i = 0;
406 unsigned int i = 0;
401 unsigned char *parameters;
407 unsigned char *parameters;
402 unsigned char sizeOfHK;
408 unsigned char sizeOfHK;
403
409
404 sizeOfHK = sizeof( Packet_TM_LFR_HK_t );
410 sizeOfHK = sizeof( Packet_TM_LFR_HK_t );
405
411
406 parameters = (unsigned char*) &housekeeping_packet;
412 parameters = (unsigned char*) &housekeeping_packet;
407
413
408 for(i = 0; i< sizeOfHK; i++)
414 for(i = 0; i< sizeOfHK; i++)
409 {
415 {
410 parameters[i] = 0x00;
416 parameters[i] = 0x00;
411 }
417 }
412
418
413 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
419 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
414 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
420 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
415 housekeeping_packet.reserved = DEFAULT_RESERVED;
421 housekeeping_packet.reserved = DEFAULT_RESERVED;
416 housekeeping_packet.userApplication = CCSDS_USER_APP;
422 housekeeping_packet.userApplication = CCSDS_USER_APP;
417 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
423 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
418 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
424 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
419 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
425 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
420 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
426 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
421 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
427 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
422 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
428 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
423 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
429 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
424 housekeeping_packet.serviceType = TM_TYPE_HK;
430 housekeeping_packet.serviceType = TM_TYPE_HK;
425 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
431 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
426 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
432 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
427 housekeeping_packet.sid = SID_HK;
433 housekeeping_packet.sid = SID_HK;
428
434
429 // init status word
435 // init status word
430 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
436 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
431 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
437 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
432 // init software version
438 // init software version
433 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
439 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
434 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
440 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
435 housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3;
441 housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3;
436 housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4;
442 housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4;
437 // init fpga version
443 // init fpga version
438 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
444 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
439 housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1
445 housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1
440 housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2
446 housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2
441 housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3
447 housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3
442
448
443 housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND;
449 housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND;
444 housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV;
450 housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV;
445 housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0;
451 housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0;
446 housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1;
452 housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1;
447 housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2;
453 housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2;
448 }
454 }
449
455
450 void increment_seq_counter( unsigned short *packetSequenceControl )
456 void increment_seq_counter( unsigned short *packetSequenceControl )
451 {
457 {
452 /** This function increment the sequence counter passes in argument.
458 /** This function increment the sequence counter passes in argument.
453 *
459 *
454 * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0.
460 * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0.
455 *
461 *
456 */
462 */
457
463
458 unsigned short segmentation_grouping_flag;
464 unsigned short segmentation_grouping_flag;
459 unsigned short sequence_cnt;
465 unsigned short sequence_cnt;
460
466
461 segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << 8; // keep bits 7 downto 6
467 segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << 8; // keep bits 7 downto 6
462 sequence_cnt = (*packetSequenceControl) & 0x3fff; // [0011 1111 1111 1111]
468 sequence_cnt = (*packetSequenceControl) & 0x3fff; // [0011 1111 1111 1111]
463
469
464 if ( sequence_cnt < SEQ_CNT_MAX)
470 if ( sequence_cnt < SEQ_CNT_MAX)
465 {
471 {
466 sequence_cnt = sequence_cnt + 1;
472 sequence_cnt = sequence_cnt + 1;
467 }
473 }
468 else
474 else
469 {
475 {
470 sequence_cnt = 0;
476 sequence_cnt = 0;
471 }
477 }
472
478
473 *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ;
479 *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ;
474 }
480 }
475
481
476 void getTime( unsigned char *time)
482 void getTime( unsigned char *time)
477 {
483 {
478 /** This function write the current local time in the time buffer passed in argument.
484 /** This function write the current local time in the time buffer passed in argument.
479 *
485 *
480 */
486 */
481
487
482 time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
488 time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
483 time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
489 time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
484 time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
490 time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
485 time[3] = (unsigned char) (time_management_regs->coarse_time);
491 time[3] = (unsigned char) (time_management_regs->coarse_time);
486 time[4] = (unsigned char) (time_management_regs->fine_time>>8);
492 time[4] = (unsigned char) (time_management_regs->fine_time>>8);
487 time[5] = (unsigned char) (time_management_regs->fine_time);
493 time[5] = (unsigned char) (time_management_regs->fine_time);
488 }
494 }
489
495
490 unsigned long long int getTimeAsUnsignedLongLongInt( )
496 unsigned long long int getTimeAsUnsignedLongLongInt( )
491 {
497 {
492 /** This function write the current local time in the time buffer passed in argument.
498 /** This function write the current local time in the time buffer passed in argument.
493 *
499 *
494 */
500 */
495 unsigned long long int time;
501 unsigned long long int time;
496
502
497 time = ( (unsigned long long int) (time_management_regs->coarse_time & 0x7fffffff) << 16 )
503 time = ( (unsigned long long int) (time_management_regs->coarse_time & 0x7fffffff) << 16 )
498 + time_management_regs->fine_time;
504 + time_management_regs->fine_time;
499
505
500 return time;
506 return time;
501 }