##// END OF EJS Templates
HG_REPOSITORIES » LPP » INSTRUMENTATION » SOLO_LFR » DEV_PLE
RSS

Clone from http://pc-instru.lpp.polytechnique.fr:5000/DEV_PLE

the first desynchro state is not counted in the hk_lfr_time_not_synchro counter
paul -
r252:8fb8ea5be030 R3a
parent child
Show More
Show file before | Show file after | Hide comments
@@ -1,745 +1,745
1 /** General usage functions and RTEMS tasks.
1 /** General usage functions and RTEMS tasks.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 */
6 */
7
7
8 #include "fsw_misc.h"
8 #include "fsw_misc.h"
9
9
10 void timer_configure(unsigned char timer, unsigned int clock_divider,
10 void timer_configure(unsigned char timer, unsigned int clock_divider,
11 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
11 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
12 {
12 {
13 /** This function configures a GPTIMER timer instantiated in the VHDL design.
13 /** This function configures a GPTIMER timer instantiated in the VHDL design.
14 *
14 *
15 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
15 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
16 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
16 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
17 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
17 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
18 * @param interrupt_level is the interrupt level that the timer drives.
18 * @param interrupt_level is the interrupt level that the timer drives.
19 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
19 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
20 *
20 *
21 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
21 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
22 *
22 *
23 */
23 */
24
24
25 rtems_status_code status;
25 rtems_status_code status;
26 rtems_isr_entry old_isr_handler;
26 rtems_isr_entry old_isr_handler;
27
27
28 gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register
28 gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register
29
29
30 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
30 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
31 if (status!=RTEMS_SUCCESSFUL)
31 if (status!=RTEMS_SUCCESSFUL)
32 {
32 {
33 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
33 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
34 }
34 }
35
35
36 timer_set_clock_divider( timer, clock_divider);
36 timer_set_clock_divider( timer, clock_divider);
37 }
37 }
38
38
39 void timer_start(unsigned char timer)
39 void timer_start(unsigned char timer)
40 {
40 {
41 /** This function starts a GPTIMER timer.
41 /** This function starts a GPTIMER timer.
42 *
42 *
43 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
43 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
44 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
44 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
45 *
45 *
46 */
46 */
47
47
48 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
48 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
49 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register
49 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register
50 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer
50 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer
51 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart
51 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart
52 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable
52 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable
53 }
53 }
54
54
55 void timer_stop(unsigned char timer)
55 void timer_stop(unsigned char timer)
56 {
56 {
57 /** This function stops a GPTIMER timer.
57 /** This function stops a GPTIMER timer.
58 *
58 *
59 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
59 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
60 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
60 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
61 *
61 *
62 */
62 */
63
63
64 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer
64 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer
65 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable
65 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable
66 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
66 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
67 }
67 }
68
68
69 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
69 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
70 {
70 {
71 /** This function sets the clock divider of a GPTIMER timer.
71 /** This function sets the clock divider of a GPTIMER timer.
72 *
72 *
73 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
73 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
74 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
74 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
75 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
75 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
76 *
76 *
77 */
77 */
78
78
79 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
79 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
80 }
80 }
81
81
82 // WATCHDOG
82 // WATCHDOG
83
83
84 rtems_isr watchdog_isr( rtems_vector_number vector )
84 rtems_isr watchdog_isr( rtems_vector_number vector )
85 {
85 {
86 rtems_status_code status_code;
86 rtems_status_code status_code;
87
87
88 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
88 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
89 }
89 }
90
90
91 void watchdog_configure(void)
91 void watchdog_configure(void)
92 {
92 {
93 /** This function configure the watchdog.
93 /** This function configure the watchdog.
94 *
94 *
95 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
95 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
96 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
96 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
97 *
97 *
98 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
98 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
99 *
99 *
100 */
100 */
101
101
102 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
102 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
103
103
104 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
104 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
105
105
106 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
106 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
107 }
107 }
108
108
109 void watchdog_stop(void)
109 void watchdog_stop(void)
110 {
110 {
111 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
111 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
112 timer_stop( TIMER_WATCHDOG );
112 timer_stop( TIMER_WATCHDOG );
113 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
113 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
114 }
114 }
115
115
116 void watchdog_reload(void)
116 void watchdog_reload(void)
117 {
117 {
118 /** This function reloads the watchdog timer counter with the timer reload value.
118 /** This function reloads the watchdog timer counter with the timer reload value.
119 *
119 *
120 * @param void
120 * @param void
121 *
121 *
122 * @return void
122 * @return void
123 *
123 *
124 */
124 */
125
125
126 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
126 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
127 }
127 }
128
128
129 void watchdog_start(void)
129 void watchdog_start(void)
130 {
130 {
131 /** This function starts the watchdog timer.
131 /** This function starts the watchdog timer.
132 *
132 *
133 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
133 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
134 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
134 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
135 *
135 *
136 */
136 */
137
137
138 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
138 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
139
139
140 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any
140 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any
141 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
141 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
142 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer
142 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer
143 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable
143 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable
144
144
145 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
145 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
146
146
147 }
147 }
148
148
149 int send_console_outputs_on_apbuart_port( void ) // Send the console outputs on the apbuart port
149 int send_console_outputs_on_apbuart_port( void ) // Send the console outputs on the apbuart port
150 {
150 {
151 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
151 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
152
152
153 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
153 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
154
154
155 return 0;
155 return 0;
156 }
156 }
157
157
158 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
158 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
159 {
159 {
160 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
160 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
161
161
162 apbuart_regs->ctrl = apbuart_regs->ctrl | APBUART_CTRL_REG_MASK_TE;
162 apbuart_regs->ctrl = apbuart_regs->ctrl | APBUART_CTRL_REG_MASK_TE;
163
163
164 return 0;
164 return 0;
165 }
165 }
166
166
167 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
167 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
168 {
168 {
169 /** This function sets the scaler reload register of the apbuart module
169 /** This function sets the scaler reload register of the apbuart module
170 *
170 *
171 * @param regs is the address of the apbuart registers in memory
171 * @param regs is the address of the apbuart registers in memory
172 * @param value is the value that will be stored in the scaler register
172 * @param value is the value that will be stored in the scaler register
173 *
173 *
174 * The value shall be set by the software to get data on the serial interface.
174 * The value shall be set by the software to get data on the serial interface.
175 *
175 *
176 */
176 */
177
177
178 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
178 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
179
179
180 apbuart_regs->scaler = value;
180 apbuart_regs->scaler = value;
181 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
181 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
182 }
182 }
183
183
184 //************
184 //************
185 // RTEMS TASKS
185 // RTEMS TASKS
186
186
187 rtems_task load_task(rtems_task_argument argument)
187 rtems_task load_task(rtems_task_argument argument)
188 {
188 {
189 BOOT_PRINTF("in LOAD *** \n")
189 BOOT_PRINTF("in LOAD *** \n")
190
190
191 rtems_status_code status;
191 rtems_status_code status;
192 unsigned int i;
192 unsigned int i;
193 unsigned int j;
193 unsigned int j;
194 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
194 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
195 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
195 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
196
196
197 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
197 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
198
198
199 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
199 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
200 if( status != RTEMS_SUCCESSFUL ) {
200 if( status != RTEMS_SUCCESSFUL ) {
201 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
201 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
202 }
202 }
203
203
204 i = 0;
204 i = 0;
205 j = 0;
205 j = 0;
206
206
207 watchdog_configure();
207 watchdog_configure();
208
208
209 watchdog_start();
209 watchdog_start();
210
210
211 while(1){
211 while(1){
212 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
212 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
213 watchdog_reload();
213 watchdog_reload();
214 i = i + 1;
214 i = i + 1;
215 if ( i == 10 )
215 if ( i == 10 )
216 {
216 {
217 i = 0;
217 i = 0;
218 j = j + 1;
218 j = j + 1;
219 PRINTF1("%d\n", j)
219 PRINTF1("%d\n", j)
220 }
220 }
221 #ifdef DEBUG_WATCHDOG
221 #ifdef DEBUG_WATCHDOG
222 if (j == 3 )
222 if (j == 3 )
223 {
223 {
224 status = rtems_task_delete(RTEMS_SELF);
224 status = rtems_task_delete(RTEMS_SELF);
225 }
225 }
226 #endif
226 #endif
227 }
227 }
228 }
228 }
229
229
230 rtems_task hous_task(rtems_task_argument argument)
230 rtems_task hous_task(rtems_task_argument argument)
231 {
231 {
232 rtems_status_code status;
232 rtems_status_code status;
233 rtems_status_code spare_status;
233 rtems_status_code spare_status;
234 rtems_id queue_id;
234 rtems_id queue_id;
235 rtems_rate_monotonic_period_status period_status;
235 rtems_rate_monotonic_period_status period_status;
236
236
237 status = get_message_queue_id_send( &queue_id );
237 status = get_message_queue_id_send( &queue_id );
238 if (status != RTEMS_SUCCESSFUL)
238 if (status != RTEMS_SUCCESSFUL)
239 {
239 {
240 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
240 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
241 }
241 }
242
242
243 BOOT_PRINTF("in HOUS ***\n")
243 BOOT_PRINTF("in HOUS ***\n")
244
244
245 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
245 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
246 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
246 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
247 if( status != RTEMS_SUCCESSFUL ) {
247 if( status != RTEMS_SUCCESSFUL ) {
248 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status )
248 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status )
249 }
249 }
250 }
250 }
251
251
252 status = rtems_rate_monotonic_cancel(HK_id);
252 status = rtems_rate_monotonic_cancel(HK_id);
253 if( status != RTEMS_SUCCESSFUL ) {
253 if( status != RTEMS_SUCCESSFUL ) {
254 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status )
254 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status )
255 }
255 }
256 else {
256 else {
257 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n")
257 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n")
258 }
258 }
259
259
260 // startup phase
260 // startup phase
261 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
261 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
262 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
262 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
263 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
263 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
264 while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
264 while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
265 {
265 {
266 if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization
266 if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization
267 {
267 {
268 break; // break if LFR is synchronized
268 break; // break if LFR is synchronized
269 }
269 }
270 else
270 else
271 {
271 {
272 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
272 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
273 // sched_yield();
273 // sched_yield();
274 status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms
274 status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms
275 }
275 }
276 }
276 }
277 status = rtems_rate_monotonic_cancel(HK_id);
277 status = rtems_rate_monotonic_cancel(HK_id);
278 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
278 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
279
279
280 set_hk_lfr_reset_cause( POWER_ON );
280 set_hk_lfr_reset_cause( POWER_ON );
281
281
282 while(1){ // launch the rate monotonic task
282 while(1){ // launch the rate monotonic task
283 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
283 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
284 if ( status != RTEMS_SUCCESSFUL ) {
284 if ( status != RTEMS_SUCCESSFUL ) {
285 PRINTF1( "in HOUS *** ERR period: %d\n", status);
285 PRINTF1( "in HOUS *** ERR period: %d\n", status);
286 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
286 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
287 }
287 }
288 else {
288 else {
289 housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8);
289 housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8);
290 housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK );
290 housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK );
291 increment_seq_counter( &sequenceCounterHK );
291 increment_seq_counter( &sequenceCounterHK );
292
292
293 housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
293 housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
294 housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
294 housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
295 housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
295 housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
296 housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
296 housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
297 housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
297 housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
298 housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
298 housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
299
299
300 spacewire_update_statistics();
300 spacewire_update_statistics();
301
301
302 hk_lfr_le_me_he_update();
302 hk_lfr_le_me_he_update();
303
303
304 set_hk_lfr_time_not_synchro();
304 set_hk_lfr_time_not_synchro();
305
305
306 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
306 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
307 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
307 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
308 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
308 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
309 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
309 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
310 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
310 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
311
311
312 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
312 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
313 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
313 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
314 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
314 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
315 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
315 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
316 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
316 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
317
317
318 // SEND PACKET
318 // SEND PACKET
319 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
319 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
320 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
320 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
321 if (status != RTEMS_SUCCESSFUL) {
321 if (status != RTEMS_SUCCESSFUL) {
322 PRINTF1("in HOUS *** ERR send: %d\n", status)
322 PRINTF1("in HOUS *** ERR send: %d\n", status)
323 }
323 }
324 }
324 }
325 }
325 }
326
326
327 PRINTF("in HOUS *** deleting task\n")
327 PRINTF("in HOUS *** deleting task\n")
328
328
329 status = rtems_task_delete( RTEMS_SELF ); // should not return
329 status = rtems_task_delete( RTEMS_SELF ); // should not return
330
330
331 return;
331 return;
332 }
332 }
333
333
334 rtems_task dumb_task( rtems_task_argument unused )
334 rtems_task dumb_task( rtems_task_argument unused )
335 {
335 {
336 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
336 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
337 *
337 *
338 * @param unused is the starting argument of the RTEMS task
338 * @param unused is the starting argument of the RTEMS task
339 *
339 *
340 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
340 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
341 *
341 *
342 */
342 */
343
343
344 unsigned int i;
344 unsigned int i;
345 unsigned int intEventOut;
345 unsigned int intEventOut;
346 unsigned int coarse_time = 0;
346 unsigned int coarse_time = 0;
347 unsigned int fine_time = 0;
347 unsigned int fine_time = 0;
348 rtems_event_set event_out;
348 rtems_event_set event_out;
349
349
350 char *DumbMessages[14] = {"in DUMB *** default", // RTEMS_EVENT_0
350 char *DumbMessages[14] = {"in DUMB *** default", // RTEMS_EVENT_0
351 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
351 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
352 "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2
352 "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2
353 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
353 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
354 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
354 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
355 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
355 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
356 "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6
356 "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6
357 "ready for dump", // RTEMS_EVENT_7
357 "ready for dump", // RTEMS_EVENT_7
358 "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8
358 "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8
359 "tick", // RTEMS_EVENT_9
359 "tick", // RTEMS_EVENT_9
360 "VHDL ERR *** waveform picker", // RTEMS_EVENT_10
360 "VHDL ERR *** waveform picker", // RTEMS_EVENT_10
361 "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11
361 "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11
362 "WATCHDOG timer", // RTEMS_EVENT_12
362 "WATCHDOG timer", // RTEMS_EVENT_12
363 "TIMECODE timer" // RTEMS_EVENT_13
363 "TIMECODE timer" // RTEMS_EVENT_13
364 };
364 };
365
365
366 BOOT_PRINTF("in DUMB *** \n")
366 BOOT_PRINTF("in DUMB *** \n")
367
367
368 while(1){
368 while(1){
369 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
369 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
370 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
370 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
371 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13,
371 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13,
372 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
372 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
373 intEventOut = (unsigned int) event_out;
373 intEventOut = (unsigned int) event_out;
374 for ( i=0; i<32; i++)
374 for ( i=0; i<32; i++)
375 {
375 {
376 if ( ((intEventOut >> i) & 0x0001) != 0)
376 if ( ((intEventOut >> i) & 0x0001) != 0)
377 {
377 {
378 coarse_time = time_management_regs->coarse_time;
378 coarse_time = time_management_regs->coarse_time;
379 fine_time = time_management_regs->fine_time;
379 fine_time = time_management_regs->fine_time;
380 if (i==12)
380 if (i==12)
381 {
381 {
382 PRINTF1("%s\n", DumbMessages[12])
382 PRINTF1("%s\n", DumbMessages[12])
383 }
383 }
384 if (i==13)
384 if (i==13)
385 {
385 {
386 PRINTF1("%s\n", DumbMessages[13])
386 PRINTF1("%s\n", DumbMessages[13])
387 }
387 }
388 }
388 }
389 }
389 }
390 }
390 }
391 }
391 }
392
392
393 //*****************************
393 //*****************************
394 // init housekeeping parameters
394 // init housekeeping parameters
395
395
396 void init_housekeeping_parameters( void )
396 void init_housekeeping_parameters( void )
397 {
397 {
398 /** This function initialize the housekeeping_packet global variable with default values.
398 /** This function initialize the housekeeping_packet global variable with default values.
399 *
399 *
400 */
400 */
401
401
402 unsigned int i = 0;
402 unsigned int i = 0;
403 unsigned char *parameters;
403 unsigned char *parameters;
404 unsigned char sizeOfHK;
404 unsigned char sizeOfHK;
405
405
406 sizeOfHK = sizeof( Packet_TM_LFR_HK_t );
406 sizeOfHK = sizeof( Packet_TM_LFR_HK_t );
407
407
408 parameters = (unsigned char*) &housekeeping_packet;
408 parameters = (unsigned char*) &housekeeping_packet;
409
409
410 for(i = 0; i< sizeOfHK; i++)
410 for(i = 0; i< sizeOfHK; i++)
411 {
411 {
412 parameters[i] = 0x00;
412 parameters[i] = 0x00;
413 }
413 }
414
414
415 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
415 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
416 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
416 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
417 housekeeping_packet.reserved = DEFAULT_RESERVED;
417 housekeeping_packet.reserved = DEFAULT_RESERVED;
418 housekeeping_packet.userApplication = CCSDS_USER_APP;
418 housekeeping_packet.userApplication = CCSDS_USER_APP;
419 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
419 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
420 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
420 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
421 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
421 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
422 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
422 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
423 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
423 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
424 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
424 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
425 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
425 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
426 housekeeping_packet.serviceType = TM_TYPE_HK;
426 housekeeping_packet.serviceType = TM_TYPE_HK;
427 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
427 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
428 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
428 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
429 housekeeping_packet.sid = SID_HK;
429 housekeeping_packet.sid = SID_HK;
430
430
431 // init status word
431 // init status word
432 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
432 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
433 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
433 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
434 // init software version
434 // init software version
435 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
435 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
436 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
436 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
437 housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3;
437 housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3;
438 housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4;
438 housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4;
439 // init fpga version
439 // init fpga version
440 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
440 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
441 housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1
441 housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1
442 housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2
442 housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2
443 housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3
443 housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3
444
444
445 housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND;
445 housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND;
446 housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV;
446 housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV;
447 housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0;
447 housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0;
448 housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1;
448 housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1;
449 housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2;
449 housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2;
450 }
450 }
451
451
452 void increment_seq_counter( unsigned short *packetSequenceControl )
452 void increment_seq_counter( unsigned short *packetSequenceControl )
453 {
453 {
454 /** This function increment the sequence counter passes in argument.
454 /** This function increment the sequence counter passes in argument.
455 *
455 *
456 * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0.
456 * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0.
457 *
457 *
458 */
458 */
459
459
460 unsigned short segmentation_grouping_flag;
460 unsigned short segmentation_grouping_flag;
461 unsigned short sequence_cnt;
461 unsigned short sequence_cnt;
462
462
463 segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << 8; // keep bits 7 downto 6
463 segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << 8; // keep bits 7 downto 6
464 sequence_cnt = (*packetSequenceControl) & 0x3fff; // [0011 1111 1111 1111]
464 sequence_cnt = (*packetSequenceControl) & 0x3fff; // [0011 1111 1111 1111]
465
465
466 if ( sequence_cnt < SEQ_CNT_MAX)
466 if ( sequence_cnt < SEQ_CNT_MAX)
467 {
467 {
468 sequence_cnt = sequence_cnt + 1;
468 sequence_cnt = sequence_cnt + 1;
469 }
469 }
470 else
470 else
471 {
471 {
472 sequence_cnt = 0;
472 sequence_cnt = 0;
473 }
473 }
474
474
475 *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ;
475 *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ;
476 }
476 }
477
477
478 void getTime( unsigned char *time)
478 void getTime( unsigned char *time)
479 {
479 {
480 /** This function write the current local time in the time buffer passed in argument.
480 /** This function write the current local time in the time buffer passed in argument.
481 *
481 *
482 */
482 */
483
483
484 time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
484 time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
485 time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
485 time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
486 time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
486 time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
487 time[3] = (unsigned char) (time_management_regs->coarse_time);
487 time[3] = (unsigned char) (time_management_regs->coarse_time);
488 time[4] = (unsigned char) (time_management_regs->fine_time>>8);
488 time[4] = (unsigned char) (time_management_regs->fine_time>>8);
489 time[5] = (unsigned char) (time_management_regs->fine_time);
489 time[5] = (unsigned char) (time_management_regs->fine_time);
490 }
490 }
491
491
492 unsigned long long int getTimeAsUnsignedLongLongInt( )
492 unsigned long long int getTimeAsUnsignedLongLongInt( )
493 {
493 {
494 /** This function write the current local time in the time buffer passed in argument.
494 /** This function write the current local time in the time buffer passed in argument.
495 *
495 *
496 */
496 */
497 unsigned long long int time;
497 unsigned long long int time;
498
498
499 time = ( (unsigned long long int) (time_management_regs->coarse_time & 0x7fffffff) << 16 )
499 time = ( (unsigned long long int) (time_management_regs->coarse_time & 0x7fffffff) << 16 )
500 + time_management_regs->fine_time;
500 + time_management_regs->fine_time;
501
501
502 return time;
502 return time;
503 }
503 }
504
504
505 void send_dumb_hk( void )
505 void send_dumb_hk( void )
506 {
506 {
507 Packet_TM_LFR_HK_t dummy_hk_packet;
507 Packet_TM_LFR_HK_t dummy_hk_packet;
508 unsigned char *parameters;
508 unsigned char *parameters;
509 unsigned int i;
509 unsigned int i;
510 rtems_id queue_id;
510 rtems_id queue_id;
511
511
512 dummy_hk_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
512 dummy_hk_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
513 dummy_hk_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
513 dummy_hk_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
514 dummy_hk_packet.reserved = DEFAULT_RESERVED;
514 dummy_hk_packet.reserved = DEFAULT_RESERVED;
515 dummy_hk_packet.userApplication = CCSDS_USER_APP;
515 dummy_hk_packet.userApplication = CCSDS_USER_APP;
516 dummy_hk_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
516 dummy_hk_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
517 dummy_hk_packet.packetID[1] = (unsigned char) (APID_TM_HK);
517 dummy_hk_packet.packetID[1] = (unsigned char) (APID_TM_HK);
518 dummy_hk_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
518 dummy_hk_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
519 dummy_hk_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
519 dummy_hk_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
520 dummy_hk_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
520 dummy_hk_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
521 dummy_hk_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
521 dummy_hk_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
522 dummy_hk_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
522 dummy_hk_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
523 dummy_hk_packet.serviceType = TM_TYPE_HK;
523 dummy_hk_packet.serviceType = TM_TYPE_HK;
524 dummy_hk_packet.serviceSubType = TM_SUBTYPE_HK;
524 dummy_hk_packet.serviceSubType = TM_SUBTYPE_HK;
525 dummy_hk_packet.destinationID = TM_DESTINATION_ID_GROUND;
525 dummy_hk_packet.destinationID = TM_DESTINATION_ID_GROUND;
526 dummy_hk_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
526 dummy_hk_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
527 dummy_hk_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
527 dummy_hk_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
528 dummy_hk_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
528 dummy_hk_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
529 dummy_hk_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
529 dummy_hk_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
530 dummy_hk_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
530 dummy_hk_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
531 dummy_hk_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
531 dummy_hk_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
532 dummy_hk_packet.sid = SID_HK;
532 dummy_hk_packet.sid = SID_HK;
533
533
534 // init status word
534 // init status word
535 dummy_hk_packet.lfr_status_word[0] = 0xff;
535 dummy_hk_packet.lfr_status_word[0] = 0xff;
536 dummy_hk_packet.lfr_status_word[1] = 0xff;
536 dummy_hk_packet.lfr_status_word[1] = 0xff;
537 // init software version
537 // init software version
538 dummy_hk_packet.lfr_sw_version[0] = SW_VERSION_N1;
538 dummy_hk_packet.lfr_sw_version[0] = SW_VERSION_N1;
539 dummy_hk_packet.lfr_sw_version[1] = SW_VERSION_N2;
539 dummy_hk_packet.lfr_sw_version[1] = SW_VERSION_N2;
540 dummy_hk_packet.lfr_sw_version[2] = SW_VERSION_N3;
540 dummy_hk_packet.lfr_sw_version[2] = SW_VERSION_N3;
541 dummy_hk_packet.lfr_sw_version[3] = SW_VERSION_N4;
541 dummy_hk_packet.lfr_sw_version[3] = SW_VERSION_N4;
542 // init fpga version
542 // init fpga version
543 parameters = (unsigned char *) (REGS_ADDR_WAVEFORM_PICKER + 0xb0);
543 parameters = (unsigned char *) (REGS_ADDR_WAVEFORM_PICKER + 0xb0);
544 dummy_hk_packet.lfr_fpga_version[0] = parameters[1]; // n1
544 dummy_hk_packet.lfr_fpga_version[0] = parameters[1]; // n1
545 dummy_hk_packet.lfr_fpga_version[1] = parameters[2]; // n2
545 dummy_hk_packet.lfr_fpga_version[1] = parameters[2]; // n2
546 dummy_hk_packet.lfr_fpga_version[2] = parameters[3]; // n3
546 dummy_hk_packet.lfr_fpga_version[2] = parameters[3]; // n3
547
547
548 parameters = (unsigned char *) &dummy_hk_packet.hk_lfr_cpu_load;
548 parameters = (unsigned char *) &dummy_hk_packet.hk_lfr_cpu_load;
549
549
550 for (i=0; i<100; i++)
550 for (i=0; i<100; i++)
551 {
551 {
552 parameters[i] = 0xff;
552 parameters[i] = 0xff;
553 }
553 }
554
554
555 get_message_queue_id_send( &queue_id );
555 get_message_queue_id_send( &queue_id );
556
556
557 rtems_message_queue_send( queue_id, &dummy_hk_packet,
557 rtems_message_queue_send( queue_id, &dummy_hk_packet,
558 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
558 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
559 }
559 }
560
560
561 void get_temperatures( unsigned char *temperatures )
561 void get_temperatures( unsigned char *temperatures )
562 {
562 {
563 unsigned char* temp_scm_ptr;
563 unsigned char* temp_scm_ptr;
564 unsigned char* temp_pcb_ptr;
564 unsigned char* temp_pcb_ptr;
565 unsigned char* temp_fpga_ptr;
565 unsigned char* temp_fpga_ptr;
566
566
567 // SEL1 SEL0
567 // SEL1 SEL0
568 // 0 0 => PCB
568 // 0 0 => PCB
569 // 0 1 => FPGA
569 // 0 1 => FPGA
570 // 1 0 => SCM
570 // 1 0 => SCM
571
571
572 temp_scm_ptr = (unsigned char *) &time_management_regs->temp_scm;
572 temp_scm_ptr = (unsigned char *) &time_management_regs->temp_scm;
573 temp_pcb_ptr = (unsigned char *) &time_management_regs->temp_pcb;
573 temp_pcb_ptr = (unsigned char *) &time_management_regs->temp_pcb;
574 temp_fpga_ptr = (unsigned char *) &time_management_regs->temp_fpga;
574 temp_fpga_ptr = (unsigned char *) &time_management_regs->temp_fpga;
575
575
576 temperatures[0] = temp_scm_ptr[2];
576 temperatures[0] = temp_scm_ptr[2];
577 temperatures[1] = temp_scm_ptr[3];
577 temperatures[1] = temp_scm_ptr[3];
578 temperatures[2] = temp_pcb_ptr[2];
578 temperatures[2] = temp_pcb_ptr[2];
579 temperatures[3] = temp_pcb_ptr[3];
579 temperatures[3] = temp_pcb_ptr[3];
580 temperatures[4] = temp_fpga_ptr[2];
580 temperatures[4] = temp_fpga_ptr[2];
581 temperatures[5] = temp_fpga_ptr[3];
581 temperatures[5] = temp_fpga_ptr[3];
582 }
582 }
583
583
584 void get_v_e1_e2_f3( unsigned char *spacecraft_potential )
584 void get_v_e1_e2_f3( unsigned char *spacecraft_potential )
585 {
585 {
586 unsigned char* v_ptr;
586 unsigned char* v_ptr;
587 unsigned char* e1_ptr;
587 unsigned char* e1_ptr;
588 unsigned char* e2_ptr;
588 unsigned char* e2_ptr;
589
589
590 v_ptr = (unsigned char *) &waveform_picker_regs->v;
590 v_ptr = (unsigned char *) &waveform_picker_regs->v;
591 e1_ptr = (unsigned char *) &waveform_picker_regs->e1;
591 e1_ptr = (unsigned char *) &waveform_picker_regs->e1;
592 e2_ptr = (unsigned char *) &waveform_picker_regs->e2;
592 e2_ptr = (unsigned char *) &waveform_picker_regs->e2;
593
593
594 spacecraft_potential[0] = v_ptr[2];
594 spacecraft_potential[0] = v_ptr[2];
595 spacecraft_potential[1] = v_ptr[3];
595 spacecraft_potential[1] = v_ptr[3];
596 spacecraft_potential[2] = e1_ptr[2];
596 spacecraft_potential[2] = e1_ptr[2];
597 spacecraft_potential[3] = e1_ptr[3];
597 spacecraft_potential[3] = e1_ptr[3];
598 spacecraft_potential[4] = e2_ptr[2];
598 spacecraft_potential[4] = e2_ptr[2];
599 spacecraft_potential[5] = e2_ptr[3];
599 spacecraft_potential[5] = e2_ptr[3];
600 }
600 }
601
601
602 void get_cpu_load( unsigned char *resource_statistics )
602 void get_cpu_load( unsigned char *resource_statistics )
603 {
603 {
604 unsigned char cpu_load;
604 unsigned char cpu_load;
605
605
606 cpu_load = lfr_rtems_cpu_usage_report();
606 cpu_load = lfr_rtems_cpu_usage_report();
607
607
608 // HK_LFR_CPU_LOAD
608 // HK_LFR_CPU_LOAD
609 resource_statistics[0] = cpu_load;
609 resource_statistics[0] = cpu_load;
610
610
611 // HK_LFR_CPU_LOAD_MAX
611 // HK_LFR_CPU_LOAD_MAX
612 if (cpu_load > resource_statistics[1])
612 if (cpu_load > resource_statistics[1])
613 {
613 {
614 resource_statistics[1] = cpu_load;
614 resource_statistics[1] = cpu_load;
615 }
615 }
616
616
617 // CPU_LOAD_AVE
617 // CPU_LOAD_AVE
618 resource_statistics[2] = 0;
618 resource_statistics[2] = 0;
619
619
620 #ifndef PRINT_TASK_STATISTICS
620 #ifndef PRINT_TASK_STATISTICS
621 rtems_cpu_usage_reset();
621 rtems_cpu_usage_reset();
622 #endif
622 #endif
623
623
624 }
624 }
625
625
626 void set_hk_lfr_sc_potential_flag( bool state )
626 void set_hk_lfr_sc_potential_flag( bool state )
627 {
627 {
628 if (state == true)
628 if (state == true)
629 {
629 {
630 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x40; // [0100 0000]
630 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x40; // [0100 0000]
631 }
631 }
632 else
632 else
633 {
633 {
634 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xbf; // [1011 1111]
634 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xbf; // [1011 1111]
635 }
635 }
636 }
636 }
637
637
638 void set_hk_lfr_mag_fields_flag( bool state )
638 void set_hk_lfr_mag_fields_flag( bool state )
639 {
639 {
640 if (state == true)
640 if (state == true)
641 {
641 {
642 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x20; // [0010 0000]
642 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x20; // [0010 0000]
643 }
643 }
644 else
644 else
645 {
645 {
646 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xd7; // [1101 1111]
646 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xd7; // [1101 1111]
647 }
647 }
648 }
648 }
649
649
650 void set_hk_lfr_calib_enable( bool state )
650 void set_hk_lfr_calib_enable( bool state )
651 {
651 {
652 if (state == true)
652 if (state == true)
653 {
653 {
654 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x08; // [0000 1000]
654 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] | 0x08; // [0000 1000]
655 }
655 }
656 else
656 else
657 {
657 {
658 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xf7; // [1111 0111]
658 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1] & 0xf7; // [1111 0111]
659 }
659 }
660 }
660 }
661
661
662 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause )
662 void set_hk_lfr_reset_cause( enum lfr_reset_cause_t lfr_reset_cause )
663 {
663 {
664 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1]
664 housekeeping_packet.lfr_status_word[1] = housekeeping_packet.lfr_status_word[1]
665 | (lfr_reset_cause & 0x07 ); // [0000 0111]
665 | (lfr_reset_cause & 0x07 ); // [0000 0111]
666 }
666 }
667
667
668 void hk_lfr_le_me_he_update()
668 void hk_lfr_le_me_he_update()
669 {
669 {
670 unsigned int hk_lfr_le_cnt;
670 unsigned int hk_lfr_le_cnt;
671 unsigned int hk_lfr_me_cnt;
671 unsigned int hk_lfr_me_cnt;
672 unsigned int hk_lfr_he_cnt;
672 unsigned int hk_lfr_he_cnt;
673
673
674 hk_lfr_le_cnt = 0;
674 hk_lfr_le_cnt = 0;
675 hk_lfr_me_cnt = 0;
675 hk_lfr_me_cnt = 0;
676 hk_lfr_he_cnt = 0;
676 hk_lfr_he_cnt = 0;
677
677
678 //update the low severity error counter
678 //update the low severity error counter
679 hk_lfr_le_cnt =
679 hk_lfr_le_cnt =
680 housekeeping_packet.hk_lfr_dpu_spw_parity
680 housekeeping_packet.hk_lfr_dpu_spw_parity
681 + housekeeping_packet.hk_lfr_dpu_spw_disconnect
681 + housekeeping_packet.hk_lfr_dpu_spw_disconnect
682 + housekeeping_packet.hk_lfr_dpu_spw_escape
682 + housekeeping_packet.hk_lfr_dpu_spw_escape
683 + housekeeping_packet.hk_lfr_dpu_spw_credit
683 + housekeeping_packet.hk_lfr_dpu_spw_credit
684 + housekeeping_packet.hk_lfr_dpu_spw_write_sync
684 + housekeeping_packet.hk_lfr_dpu_spw_write_sync
685 + housekeeping_packet.hk_lfr_dpu_spw_rx_ahb
685 + housekeeping_packet.hk_lfr_dpu_spw_rx_ahb
686 + housekeeping_packet.hk_lfr_dpu_spw_tx_ahb
686 + housekeeping_packet.hk_lfr_dpu_spw_tx_ahb
687 + housekeeping_packet.hk_lfr_timecode_erroneous
687 + housekeeping_packet.hk_lfr_timecode_erroneous
688 + housekeeping_packet.hk_lfr_timecode_missing
688 + housekeeping_packet.hk_lfr_timecode_missing
689 + housekeeping_packet.hk_lfr_timecode_invalid
689 + housekeeping_packet.hk_lfr_timecode_invalid
690 + housekeeping_packet.hk_lfr_time_timecode_it
690 + housekeeping_packet.hk_lfr_time_timecode_it
691 + housekeeping_packet.hk_lfr_time_not_synchro
691 + housekeeping_packet.hk_lfr_time_not_synchro
692 + housekeeping_packet.hk_lfr_time_timecode_ctr;
692 + housekeeping_packet.hk_lfr_time_timecode_ctr;
693
693
694 //update the medium severity error counter
694 //update the medium severity error counter
695 hk_lfr_me_cnt =
695 hk_lfr_me_cnt =
696 housekeeping_packet.hk_lfr_dpu_spw_early_eop
696 housekeeping_packet.hk_lfr_dpu_spw_early_eop
697 + housekeeping_packet.hk_lfr_dpu_spw_invalid_addr
697 + housekeeping_packet.hk_lfr_dpu_spw_invalid_addr
698 + housekeeping_packet.hk_lfr_dpu_spw_eep
698 + housekeeping_packet.hk_lfr_dpu_spw_eep
699 + housekeeping_packet.hk_lfr_dpu_spw_rx_too_big;
699 + housekeeping_packet.hk_lfr_dpu_spw_rx_too_big;
700
700
701 //update the high severity error counter
701 //update the high severity error counter
702 hk_lfr_he_cnt = 0;
702 hk_lfr_he_cnt = 0;
703
703
704 // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers
704 // update housekeeping packet counters, convert unsigned int numbers in 2 bytes numbers
705 // LE
705 // LE
706 housekeeping_packet.hk_lfr_le_cnt[0] = (unsigned char) ((hk_lfr_le_cnt & 0xff00) >> 8);
706 housekeeping_packet.hk_lfr_le_cnt[0] = (unsigned char) ((hk_lfr_le_cnt & 0xff00) >> 8);
707 housekeeping_packet.hk_lfr_le_cnt[1] = (unsigned char) (hk_lfr_le_cnt & 0x00ff);
707 housekeeping_packet.hk_lfr_le_cnt[1] = (unsigned char) (hk_lfr_le_cnt & 0x00ff);
708 // ME
708 // ME
709 housekeeping_packet.hk_lfr_me_cnt[0] = (unsigned char) ((hk_lfr_me_cnt & 0xff00) >> 8);
709 housekeeping_packet.hk_lfr_me_cnt[0] = (unsigned char) ((hk_lfr_me_cnt & 0xff00) >> 8);
710 housekeeping_packet.hk_lfr_me_cnt[1] = (unsigned char) (hk_lfr_me_cnt & 0x00ff);
710 housekeeping_packet.hk_lfr_me_cnt[1] = (unsigned char) (hk_lfr_me_cnt & 0x00ff);
711 // HE
711 // HE
712 housekeeping_packet.hk_lfr_he_cnt[0] = (unsigned char) ((hk_lfr_he_cnt & 0xff00) >> 8);
712 housekeeping_packet.hk_lfr_he_cnt[0] = (unsigned char) ((hk_lfr_he_cnt & 0xff00) >> 8);
713 housekeeping_packet.hk_lfr_he_cnt[1] = (unsigned char) (hk_lfr_he_cnt & 0x00ff);
713 housekeeping_packet.hk_lfr_he_cnt[1] = (unsigned char) (hk_lfr_he_cnt & 0x00ff);
714
714
715 }
715 }
716
716
717 void set_hk_lfr_time_not_synchro()
717 void set_hk_lfr_time_not_synchro()
718 {
718 {
719 static unsigned char synchroLost = 0;
719 static unsigned char synchroLost = 1;
720 int synchronizationBit;
720 int synchronizationBit;
721
721
722 // get the synchronization bit
722 // get the synchronization bit
723 synchronizationBit = (time_management_regs->coarse_time & 0x80000000) >> 31; // 1000 0000 0000 0000
723 synchronizationBit = (time_management_regs->coarse_time & 0x80000000) >> 31; // 1000 0000 0000 0000
724
724
725 switch (synchronizationBit)
725 switch (synchronizationBit)
726 {
726 {
727 case 0:
727 case 0:
728 if (synchroLost == 1)
728 if (synchroLost == 1)
729 {
729 {
730 synchroLost = 0;
730 synchroLost = 0;
731 }
731 }
732 break;
732 break;
733 case 1:
733 case 1:
734 if (synchroLost == 0 )
734 if (synchroLost == 0 )
735 {
735 {
736 synchroLost = 1;
736 synchroLost = 1;
737 increase_unsigned_char_counter(&housekeeping_packet.hk_lfr_time_not_synchro);
737 increase_unsigned_char_counter(&housekeeping_packet.hk_lfr_time_not_synchro);
738 }
738 }
739 break;
739 break;
740 default:
740 default:
741 PRINTF1("in hk_lfr_time_not_synchro *** unexpected value for synchronizationBit = %d\n", synchronizationBit);
741 PRINTF1("in hk_lfr_time_not_synchro *** unexpected value for synchronizationBit = %d\n", synchronizationBit);
742 break;
742 break;
743 }
743 }
744
744
745 }
745 }
General Comments 0
You need to be logged in to leave comments. Login now