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debug fonction bp1 de tch
paul -
r217:7bf0cf7f80b9 R3
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@@ -1,2 +1,2
1 aa66459dff7b46d030e3263cfd9291b1d550c428 LFR_basic-parameters
1 3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters
2 bb9afa759d57093f7646d3be18f4a9923a4cbf84 header/lfr_common_headers
2 bb9afa759d57093f7646d3be18f4a9923a4cbf84 header/lfr_common_headers
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@@ -2,7 +2,7 TEMPLATE = app
2 # CONFIG += console v8 sim
2 # CONFIG += console v8 sim
3 # CONFIG options = verbose *** boot_messages *** debug_messages *** cpu_usage_report *** stack_report *** vhdl_dev *** debug_tch
3 # CONFIG options = verbose *** boot_messages *** debug_messages *** cpu_usage_report *** stack_report *** vhdl_dev *** debug_tch
4 # lpp_dpu_destid
4 # lpp_dpu_destid
5 CONFIG += console verbose lpp_dpu_destid
5 CONFIG += console verbose lpp_dpu_destid debug_tch
6 CONFIG -= qt
6 CONFIG -= qt
7
7
8 include(./sparc.pri)
8 include(./sparc.pri)
@@ -12,11 +12,12 SWVERSION=-1-0
12 DEFINES += SW_VERSION_N1=3 # major
12 DEFINES += SW_VERSION_N1=3 # major
13 DEFINES += SW_VERSION_N2=0 # minor
13 DEFINES += SW_VERSION_N2=0 # minor
14 DEFINES += SW_VERSION_N3=0 # patch
14 DEFINES += SW_VERSION_N3=0 # patch
15 DEFINES += SW_VERSION_N4=7 # internal
15 DEFINES += SW_VERSION_N4=8 # internal
16
16
17 # <GCOV>
17 # <GCOV>
18 #QMAKE_CFLAGS_RELEASE += -fprofile-arcs -ftest-coverage
18 QMAKE_CFLAGS_RELEASE += -fprofile-arcs -ftest-coverage
19 #LIBS += -lgcov /opt/GCOV/01A/lib/overload.o -lc
19 #LIBS += -lgcov /opt/GCOV/01A/lib/overload.o -lc
20 LIBS += -lgcov /opt/GCOV/HOWTO_gcov_for_lfr_test/01A/lib/overload.o -lc
20 # </GCOV>
21 # </GCOV>
21
22
22 # <CHANGE BEFORE FLIGHT>
23 # <CHANGE BEFORE FLIGHT>
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@@ -62,6 +62,41
62 #include "fsw_config.c"
62 #include "fsw_config.c"
63 #include "GscMemoryLPP.hpp"
63 #include "GscMemoryLPP.hpp"
64
64
65 void test_bp1()
66 {
67 float test_matrix[25] = {
68 4.00109575e+06,
69 -2.19891187e+03,
70 1.73193325e+06,
71 1.88106079e+03,
72 -1.00001638e+06,
73 6.23724854e+02,
74 2.00016860e+07,
75 -3.46422920e+07,
76 -1.44333826e+03,
77 7.54424812e+05,
78 -4.36785375e+05,
79 2.34538879e+02,
80 8.65882200e+06,
81 -3.31611108e+03,
82 2.71719702e+03,
83 1.50027590e+07,
84 2.53229094e+05,
85 -4.99895450e+06,
86 2.90329712e+03,
87 -2.17048022e+03,
88 -8.66275100e+06,
89 1.00002952e+08,
90 -2.94739111e+03,
91 1.73206224e+08,
92 3.00003392e+08
93 };
94
95 uint8_t lfr_bp1[11];
96
97 BP1_set(test_matrix, k_coeff_intercalib_f0_norm, 1, lfr_bp1);
98 }
99
65 void initCache()
100 void initCache()
66 {
101 {
67 unsigned int cacheControlRegister;
102 unsigned int cacheControlRegister;
@@ -248,6 +283,8 rtems_task Init( rtems_task_argument ign
248
283
249 BOOT_PRINTF("delete INIT\n")
284 BOOT_PRINTF("delete INIT\n")
250
285
286 test_bp1();
287
251 status = rtems_task_delete(RTEMS_SELF);
288 status = rtems_task_delete(RTEMS_SELF);
252
289
253 }
290 }
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