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paul -
r97:6e0139d937f6 VHDLib206
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@@ -1,6 +1,6
1 <?xml version="1.0" encoding="UTF-8"?>
1 <?xml version="1.0" encoding="UTF-8"?>
2 <!DOCTYPE QtCreatorProject>
2 <!DOCTYPE QtCreatorProject>
3 <!-- Written by QtCreator 3.0.0, 2014-02-13T07:01:15. -->
3 <!-- Written by QtCreator 3.0.0, 2014-02-14T07:07:03. -->
4 <qtcreator>
4 <qtcreator>
5 <data>
5 <data>
6 <variable>ProjectExplorer.Project.ActiveTarget</variable>
6 <variable>ProjectExplorer.Project.ActiveTarget</variable>
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@@ -41,7 +41,7 typedef struct ring_node_sm
41 #define NB_RING_NODES_F0 3 // AT LEAST 3
41 #define NB_RING_NODES_F0 3 // AT LEAST 3
42 #define NB_RING_NODES_F1 5 // AT LEAST 3
42 #define NB_RING_NODES_F1 5 // AT LEAST 3
43 #define NB_RING_NODES_F2 5 // AT LEAST 3
43 #define NB_RING_NODES_F2 5 // AT LEAST 3
44 #define NB_RING_NODES_ASM_F0 12 // AT LEAST 3
44 #define NB_RING_NODES_ASM_F0 12 // AT LEAST 3
45 #define NB_RING_NODES_ASM_F1 2 // AT LEAST 3
45 #define NB_RING_NODES_ASM_F1 2 // AT LEAST 3
46 #define NB_RING_NODES_ASM_F2 2 // AT LEAST 3
46 #define NB_RING_NODES_ASM_F2 2 // AT LEAST 3
47
47
@@ -71,7 +71,7 typedef struct ring_node_sm
71 #define DEFAULT_SY_LFR_COMMON1 0x10 // default value 0 0 0 1 0 0 0 0
71 #define DEFAULT_SY_LFR_COMMON1 0x10 // default value 0 0 0 1 0 0 0 0
72 // NORM
72 // NORM
73 #define SY_LFR_N_SWF_L 2048 // nb sample
73 #define SY_LFR_N_SWF_L 2048 // nb sample
74 #define SY_LFR_N_SWF_P 20 // sec
74 #define SY_LFR_N_SWF_P 300 // sec
75 #define SY_LFR_N_ASM_P 3600 // sec
75 #define SY_LFR_N_ASM_P 3600 // sec
76 #define SY_LFR_N_BP_P0 4 // sec
76 #define SY_LFR_N_BP_P0 4 // sec
77 #define SY_LFR_N_BP_P1 20 // sec
77 #define SY_LFR_N_BP_P1 20 // sec
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@@ -72,16 +72,17 rtems_id get_pkts_queue_id( void );
72
72
73 //**************
73 //**************
74 // wfp registers
74 // wfp registers
75 void set_wfp_data_shaping();
75 // RESET
76 char set_wfp_delta_snapshot();
76 void reset_wfp_burst_enable( void );
77 void reset_wfp_status(void);
78 void reset_waveform_picker_regs( void );
79 // SET
80 void set_wfp_data_shaping(void);
77 void set_wfp_burst_enable_register( unsigned char mode );
81 void set_wfp_burst_enable_register( unsigned char mode );
78 void reset_wfp_burst_enable();
82 void set_wfp_delta_snapshot( void );
79 void reset_wfp_status();
83 void set_wfp_delta_f0_f0_2( void );
80 void reset_waveform_picker_regs_vhdl_dev();
84 void set_wfp_delta_f1( void );
81 void reset_waveform_picker_regs_vhdl_dev_debug();
85 void set_wfp_delta_f2( void );
82 void reset_waveform_picker_regs_vhdl_dev_debug_64();
83 void reset_waveform_picker_regs();
84 void reset_new_waveform_picker_regs();
85
86
86 //*****************
87 //*****************
87 // local parameters
88 // local parameters
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@@ -700,7 +700,7 void launch_waveform_picker( unsigned ch
700 int startDate;
700 int startDate;
701
701
702 reset_current_ring_nodes();
702 reset_current_ring_nodes();
703 reset_waveform_picker_regs_vhdl_dev_debug_64();
703 reset_waveform_picker_regs();
704 set_wfp_burst_enable_register( mode );
704 set_wfp_burst_enable_register( mode );
705 LEON_Clear_interrupt( IRQ_WAVEFORM_PICKER );
705 LEON_Clear_interrupt( IRQ_WAVEFORM_PICKER );
706 LEON_Unmask_interrupt( IRQ_WAVEFORM_PICKER );
706 LEON_Unmask_interrupt( IRQ_WAVEFORM_PICKER );
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@@ -25,7 +25,7 int action_load_common_par(ccsdsTelecomm
25
25
26 parameter_dump_packet.unused0 = TC->dataAndCRC[0];
26 parameter_dump_packet.unused0 = TC->dataAndCRC[0];
27 parameter_dump_packet.bw_sp0_sp1_r0_r1 = TC->dataAndCRC[1];
27 parameter_dump_packet.bw_sp0_sp1_r0_r1 = TC->dataAndCRC[1];
28 set_wfp_data_shaping(parameter_dump_packet.bw_sp0_sp1_r0_r1);
28 set_wfp_data_shaping( );
29 return LFR_SUCCESSFUL;
29 return LFR_SUCCESSFUL;
30 }
30 }
31
31
@@ -307,11 +307,9 int set_sy_lfr_n_swf_p(ccsdsTelecommandP
307 msb = TC->dataAndCRC[ BYTE_POS_SY_LFR_N_SWF_P ];
307 msb = TC->dataAndCRC[ BYTE_POS_SY_LFR_N_SWF_P ];
308 lsb = TC->dataAndCRC[ BYTE_POS_SY_LFR_N_SWF_P+1 ];
308 lsb = TC->dataAndCRC[ BYTE_POS_SY_LFR_N_SWF_P+1 ];
309
309
310 tmp = ( unsigned int ) floor(
310 tmp = msb * 256 + lsb;
311 ( ( msb*256 ) + lsb ) / 8
312 ) * 8;
313
311
314 if ( (tmp < 16) || (tmp > 65528) )
312 if ( tmp < 16 )
315 {
313 {
316 status = send_tm_lfr_tc_exe_inconsistent( TC, queue_id, BYTE_POS_SY_LFR_N_SWF_P+10, lsb, time );
314 status = send_tm_lfr_tc_exe_inconsistent( TC, queue_id, BYTE_POS_SY_LFR_N_SWF_P+10, lsb, time );
317 result = WRONG_APP_DATA;
315 result = WRONG_APP_DATA;
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@@ -96,8 +96,8 rtems_isr waveforms_isr( rtems_vector_nu
96 current_ring_node_f2 = current_ring_node_f2->next;
96 current_ring_node_f2 = current_ring_node_f2->next;
97 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
97 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
98 //
98 //
99 if (nb_swf < 2)
99 // if (nb_swf < 2)
100 // if (true)
100 if (true)
101 {
101 {
102 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) {
102 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) {
103 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
103 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
@@ -1096,7 +1096,84 void compute_acquisition_time( unsigned
1096
1096
1097 //**************
1097 //**************
1098 // wfp registers
1098 // wfp registers
1099 void set_wfp_data_shaping()
1099 void reset_wfp_burst_enable(void)
1100 {
1101 /** This function resets the waveform picker burst_enable register.
1102 *
1103 * The burst bits [f2 f1 f0] and the enable bits [f3 f2 f1 f0] are set to 0.
1104 *
1105 */
1106
1107 #ifdef VHDL_DEV
1108 waveform_picker_regs->run_burst_enable = 0x00; // burst f2, f1, f0 enable f3, f2, f1, f0
1109 #else
1110 waveform_picker_regs->burst_enable = 0x00; // burst f2, f1, f0 enable f3, f2, f1, f0
1111 #endif
1112 }
1113
1114 void reset_wfp_status( void )
1115 {
1116 /** This function resets the waveform picker status register.
1117 *
1118 * All status bits are set to 0 [new_err full_err full].
1119 *
1120 */
1121
1122 #ifdef GSA
1123 #else
1124 waveform_picker_regs->status = 0x00; // burst f2, f1, f0 enable f3, f2, f1, f0
1125 #endif
1126 }
1127
1128 void reset_waveform_picker_regs(void)
1129 {
1130 /** This function resets the waveform picker module registers.
1131 *
1132 * The registers affected by this function are located at the following offset addresses:
1133 * - 0x00 data_shaping
1134 * - 0x04 run_burst_enable
1135 * - 0x08 addr_data_f0
1136 * - 0x0C addr_data_f1
1137 * - 0x10 addr_data_f2
1138 * - 0x14 addr_data_f3
1139 * - 0x18 status
1140 * - 0x1C delta_snapshot
1141 * - 0x20 delta_f0
1142 * - 0x24 delta_f0_2
1143 * - 0x28 delta_f1
1144 * - 0x2c delta_f2
1145 * - 0x30 nb_data_by_buffer
1146 * - 0x34 nb_snapshot_param
1147 * - 0x38 start_date
1148 * - 0x3c nb_word_in_buffer
1149 *
1150 */
1151
1152 waveform_picker_regs->data_shaping = 0x01; // 0x00 *** R1 R0 SP1 SP0 BW
1153 waveform_picker_regs->run_burst_enable = 0x00; // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
1154 waveform_picker_regs->addr_data_f0 = current_ring_node_f0->buffer_address; // 0x08
1155 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address; // 0x0c
1156 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address; // 0x10
1157 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_a); // 0x14
1158 waveform_picker_regs->status = 0x00; // 0x18
1159 //
1160 set_wfp_delta_snapshot(); // 0x1c
1161 set_wfp_delta_f0_f0_2(); // 0x20, 0x24
1162 set_wfp_delta_f1(); // 0x28
1163 set_wfp_delta_f2(); // 0x2c
1164 DEBUG_PRINTF1("delta_snapshot %x\n", waveform_picker_regs->delta_snapshot)
1165 DEBUG_PRINTF1("delta_f0 %x\n", waveform_picker_regs->delta_f0)
1166 DEBUG_PRINTF1("delta_f0_2 %x\n", waveform_picker_regs->delta_f0_2)
1167 DEBUG_PRINTF1("delta_f1 %x\n", waveform_picker_regs->delta_f1)
1168 DEBUG_PRINTF1("delta_f2 %x\n", waveform_picker_regs->delta_f2)
1169 // 2352 = 7 * 336
1170 waveform_picker_regs->nb_data_by_buffer = 0x92f; // 0x30 *** 2352 - 1 => nb samples -1
1171 waveform_picker_regs->snapshot_param = 0x930; // 0x34 *** 2352 => nb samples
1172 waveform_picker_regs->start_date = 0x00; // 0x38
1173 waveform_picker_regs->nb_word_in_buffer = 0x1b92; // 0x3c *** 2352 * 3 + 2 = 7058
1174 }
1175
1176 void set_wfp_data_shaping( void )
1100 {
1177 {
1101 /** This function sets the data_shaping register of the waveform picker module.
1178 /** This function sets the data_shaping register of the waveform picker module.
1102 *
1179 *
@@ -1112,56 +1189,14 void set_wfp_data_shaping()
1112
1189
1113 data_shaping = parameter_dump_packet.bw_sp0_sp1_r0_r1;
1190 data_shaping = parameter_dump_packet.bw_sp0_sp1_r0_r1;
1114
1191
1115 #ifdef GSA
1116 #else
1117 waveform_picker_regs->data_shaping =
1192 waveform_picker_regs->data_shaping =
1118 ( (data_shaping & 0x10) >> 4 ) // BW
1193 ( (data_shaping & 0x10) >> 4 ) // BW
1119 + ( (data_shaping & 0x08) >> 2 ) // SP0
1194 + ( (data_shaping & 0x08) >> 2 ) // SP0
1120 + ( (data_shaping & 0x04) ) // SP1
1195 + ( (data_shaping & 0x04) ) // SP1
1121 + ( (data_shaping & 0x02) << 2 ) // R0
1196 + ( (data_shaping & 0x02) << 2 ) // R0
1122 + ( (data_shaping & 0x01) << 4 ); // R1
1197 + ( (data_shaping & 0x01) << 4 ); // R1
1123 #endif
1124 }
1198 }
1125
1199
1126 char set_wfp_delta_snapshot()
1127 {
1128 /** This function sets the delta_snapshot register of the waveform picker module.
1129 *
1130 * The value is read from two (unsigned char) of the parameter_dump_packet structure:
1131 * - sy_lfr_n_swf_p[0]
1132 * - sy_lfr_n_swf_p[1]
1133 *
1134 */
1135
1136 char ret;
1137 unsigned int delta_snapshot;
1138 unsigned int aux;
1139
1140 aux = 0;
1141 ret = LFR_DEFAULT;
1142
1143 delta_snapshot = parameter_dump_packet.sy_lfr_n_swf_p[0]*256
1144 + parameter_dump_packet.sy_lfr_n_swf_p[1];
1145
1146 #ifdef GSA
1147 #else
1148 if ( delta_snapshot < MIN_DELTA_SNAPSHOT )
1149 {
1150 aux = MIN_DELTA_SNAPSHOT;
1151 ret = LFR_DEFAULT;
1152 }
1153 else
1154 {
1155 aux = delta_snapshot ;
1156 ret = LFR_SUCCESSFUL;
1157 }
1158 waveform_picker_regs->delta_snapshot = aux - 1; // max 2 bytes
1159 #endif
1160
1161 return ret;
1162 }
1163
1164 #ifdef VHDL_DEV
1165 void set_wfp_burst_enable_register( unsigned char mode )
1200 void set_wfp_burst_enable_register( unsigned char mode )
1166 {
1201 {
1167 /** This function sets the waveform picker burst_enable register depending on the mode.
1202 /** This function sets the waveform picker burst_enable register depending on the mode.
@@ -1196,267 +1231,63 void set_wfp_burst_enable_register( unsi
1196 break;
1231 break;
1197 }
1232 }
1198 }
1233 }
1199 #else
1234
1200 void set_wfp_burst_enable_register( unsigned char mode )
1235 void set_wfp_delta_snapshot( void )
1201 {
1236 {
1202 /** This function sets the waveform picker burst_enable register depending on the mode.
1237 /** This function sets the delta_snapshot register of the waveform picker module.
1203 *
1204 * @param mode is the LFR mode to launch.
1205 *
1206 * The burst bits shall be before the enable bits.
1207 *
1238 *
1208 */
1239 * The value is read from two (unsigned char) of the parameter_dump_packet structure:
1209
1240 * - sy_lfr_n_swf_p[0]
1210 // [0000 0000] burst f2, f1, f0 enable f3 f2 f1 f0
1241 * - sy_lfr_n_swf_p[1]
1211 // the burst bits shall be set first, before the enable bits
1212 switch(mode) {
1213 case(LFR_MODE_NORMAL):
1214 waveform_picker_regs->burst_enable = 0x00; // [0000 0000] no burst enable
1215 waveform_picker_regs->burst_enable = 0x0f; // [0000 1111] enable f3 f2 f1 f0
1216 break;
1217 case(LFR_MODE_BURST):
1218 waveform_picker_regs->burst_enable = 0x40; // [0100 0000] f2 burst enabled
1219 waveform_picker_regs->burst_enable = waveform_picker_regs->burst_enable | 0x04; // [0100] enable f2
1220 break;
1221 case(LFR_MODE_SBM1):
1222 waveform_picker_regs->burst_enable = 0x20; // [0010 0000] f1 burst enabled
1223 waveform_picker_regs->burst_enable = waveform_picker_regs->burst_enable | 0x0f; // [1111] enable f3 f2 f1 f0
1224 break;
1225 case(LFR_MODE_SBM2):
1226 waveform_picker_regs->burst_enable = 0x40; // [0100 0000] f2 burst enabled
1227 waveform_picker_regs->burst_enable = waveform_picker_regs->burst_enable | 0x0f; // [1111] enable f3 f2 f1 f0
1228 break;
1229 default:
1230 waveform_picker_regs->burst_enable = 0x00; // [0000 0000] no burst enabled, no waveform enabled
1231 break;
1232 }
1233 }
1234 #endif
1235
1236 void reset_wfp_burst_enable()
1237 {
1238 /** This function resets the waveform picker burst_enable register.
1239 *
1240 * The burst bits [f2 f1 f0] and the enable bits [f3 f2 f1 f0] are set to 0.
1241 *
1242 */
1243
1244 #ifdef VHDL_DEV
1245 waveform_picker_regs->run_burst_enable = 0x00; // burst f2, f1, f0 enable f3, f2, f1, f0
1246 #else
1247 waveform_picker_regs->burst_enable = 0x00; // burst f2, f1, f0 enable f3, f2, f1, f0
1248 #endif
1249 }
1250
1251 void reset_wfp_status()
1252 {
1253 /** This function resets the waveform picker status register.
1254 *
1255 * All status bits are set to 0 [new_err full_err full].
1256 *
1242 *
1257 */
1243 */
1258
1244
1259 #ifdef GSA
1245 unsigned int delta_snapshot;
1260 #else
1246 unsigned int delta_snapshot_in_T2;
1261 waveform_picker_regs->status = 0x00; // burst f2, f1, f0 enable f3, f2, f1, f0
1262 #endif
1263 }
1264
1247
1265 void reset_waveform_picker_regs_vhdl_dev()
1248 delta_snapshot = parameter_dump_packet.sy_lfr_n_swf_p[0]*256
1266 {
1249 + parameter_dump_packet.sy_lfr_n_swf_p[1];
1267 /** This function resets the waveform picker module registers.
1250
1268 *
1251 delta_snapshot_in_T2 = delta_snapshot * 256;
1269 * The registers affected by this function are located at the following offset addresses:
1252 waveform_picker_regs->delta_snapshot = delta_snapshot_in_T2; // max 4 bytes
1270 * - 0x00 data_shaping
1271 * - 0x04 run_burst_enable
1272 * - 0x08 addr_data_f0
1273 * - 0x0C addr_data_f1
1274 * - 0x10 addr_data_f2
1275 * - 0x14 addr_data_f3
1276 * - 0x18 status
1277 * - 0x1C delta_snapshot
1278 * - 0x20 delta_f0
1279 * - 0x24 delta_f0_2
1280 * - 0x28 delta_f1
1281 * - 0x2c delta_f2
1282 * - 0x30 nb_data_by_buffer
1283 * - 0x34 nb_snapshot_param
1284 * - 0x38 start_date
1285 * - 0x3c nb_word_in_buffer
1286 *
1287 */
1288 waveform_picker_regs->data_shaping = 0x01; // 0x00 *** R1 R0 SP1 SP0 BW
1289 waveform_picker_regs->run_burst_enable = 0x00; // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
1290 //waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0); // 0x08
1291 waveform_picker_regs->addr_data_f0 = current_ring_node_f0->buffer_address; // 0x08
1292 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address; // 0x0c
1293 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address; // 0x10
1294 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_a); // 0x14
1295 waveform_picker_regs->status = 0x00; // 0x18
1296 //
1297 waveform_picker_regs->delta_snapshot = 0x1000; // 0x1c *** 4096 = 16 * 256
1298 waveform_picker_regs->delta_f0 = 0xc0b; // 0x20 *** 3083 = 4096 - 1013
1299 waveform_picker_regs->delta_f0_2 = 0x7; // 0x24 *** 7 [7 bits]
1300 waveform_picker_regs->delta_f1 = 0xc40; // 0x28 *** 3136 = 4096 - 960
1301 waveform_picker_regs->delta_f2 = 0xc00; // 0x2c *** 3072 = 12 * 256
1302 //
1303 // waveform_picker_regs->delta_snapshot = 0x1000; // 0x1c *** 4096 = 16 * 256
1304 // waveform_picker_regs->delta_f0 = 0x1; // 0x20 ***
1305 // waveform_picker_regs->delta_f0_2 = 0x7; // 0x24 *** 7 [7 bits]
1306 // waveform_picker_regs->delta_f1 = 0x1; // 0x28 ***
1307 // waveform_picker_regs->delta_f2 = 0x1; // 0x2c ***
1308 //
1309 // waveform_picker_regs->delta_snapshot = 0x1000; // 0x1c *** 4096 = 16 * 256
1310 // waveform_picker_regs->delta_f0 = 0x0fff; // 0x20 ***
1311 // waveform_picker_regs->delta_f0_2 = 0x7; // 0x24 *** 7 [7 bits]
1312 // waveform_picker_regs->delta_f1 = 0x0fff; // 0x28 ***
1313 // waveform_picker_regs->delta_f2 = 0x1; // 0x2c ***
1314 // 2048
1315 // waveform_picker_regs->nb_data_by_buffer = 0x7ff; // 0x30 *** 2048 -1 => nb samples -1
1316 // waveform_picker_regs->snapshot_param = 0x800; // 0x34 *** 2048 => nb samples
1317 // waveform_picker_regs->start_date = 0x00; // 0x38
1318 // waveform_picker_regs->nb_word_in_buffer = 0x1802; // 0x3c *** 2048 * 3 + 2 = 6146
1319 // 2352 = 7 * 336
1320 // waveform_picker_regs->nb_data_by_buffer = 0x92f; // 0x30 *** 2352 - 1 => nb samples -1
1321 // waveform_picker_regs->snapshot_param = 0x930; // 0x34 *** 2352 => nb samples
1322 // waveform_picker_regs->start_date = 0x00; // 0x38
1323 // waveform_picker_regs->nb_word_in_buffer = 0x1b92; // 0x3c *** 2352 * 3 + 2 = 7058
1324 // 128
1325 waveform_picker_regs->nb_data_by_buffer = 0x7f; // 0x30 *** 128 - 1 => nb samples -1
1326 waveform_picker_regs->snapshot_param = 0x80; // 0x34 *** 128 => nb samples
1327 waveform_picker_regs->start_date = 0x00; // 0x38
1328 waveform_picker_regs->nb_word_in_buffer = 0x182; // 0x3c *** 128 * 3 + 2 = 386
1329 }
1253 }
1330
1254
1331 void reset_waveform_picker_regs_vhdl_dev_debug()
1255 void set_wfp_delta_f0_f0_2( void )
1332 {
1256 {
1333 /** This function resets the waveform picker module registers.
1257 unsigned int delta_snapshot;
1334 *
1258 unsigned int nb_samples_per_snapshot;
1335 * The registers affected by this function are located at the following offset addresses:
1259 float delta_f0_in_float;
1336 * - 0x00 data_shaping
1260
1337 * - 0x04 run_burst_enable
1261 delta_snapshot = waveform_picker_regs->delta_snapshot;
1338 * - 0x08 addr_data_f0
1262 nb_samples_per_snapshot = parameter_dump_packet.sy_lfr_n_swf_l[0] * 256 + parameter_dump_packet.sy_lfr_n_swf_l[1];
1339 * - 0x0C addr_data_f1
1263 delta_f0_in_float =nb_samples_per_snapshot / 2. * ( 1. / 256. - 1. / 24576.) * 256.;
1340 * - 0x10 addr_data_f2
1264
1341 * - 0x14 addr_data_f3
1265 waveform_picker_regs->delta_f0 = delta_snapshot - floor( delta_f0_in_float );
1342 * - 0x18 status
1266 waveform_picker_regs->delta_f0_2 = 0x7; // max 7 bits
1343 * - 0x1C delta_snapshot
1344 * - 0x20 delta_f0
1345 * - 0x24 delta_f0_2
1346 * - 0x28 delta_f1
1347 * - 0x2c delta_f2
1348 * - 0x30 nb_data_by_buffer
1349 * - 0x34 nb_snapshot_param
1350 * - 0x38 start_date
1351 * - 0x3c nb_word_in_buffer
1352 *
1353 */
1354 waveform_picker_regs->data_shaping = 0x01; // 0x00 *** R1 R0 SP1 SP0 BW
1355 waveform_picker_regs->run_burst_enable = 0x00; // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
1356 //waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0); // 0x08
1357 waveform_picker_regs->addr_data_f0 = current_ring_node_f0->buffer_address; // 0x08
1358 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address; // 0x0c
1359 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address; // 0x10
1360 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_a); // 0x14
1361 waveform_picker_regs->status = 0x00; // 0x18
1362 //
1363 waveform_picker_regs->delta_snapshot = 0x100; // 0x1c *** 256
1364 waveform_picker_regs->delta_f0 = 0xc1; // 0x20 *** 256 - 63
1365 waveform_picker_regs->delta_f0_2 = 0x7; // 0x24 *** 7 [7 bits]
1366 waveform_picker_regs->delta_f1 = 0xc4; // 0x28 *** 256 - 60
1367 waveform_picker_regs->delta_f2 = 0xc0; // 0x2c *** 192
1368 // 128
1369 waveform_picker_regs->nb_data_by_buffer = 0x7f; // 0x30 *** 128 - 1 => nb samples -1
1370 waveform_picker_regs->snapshot_param = 0x80; // 0x34 *** 128 => nb samples
1371 waveform_picker_regs->start_date = 0x00; // 0x38
1372 waveform_picker_regs->nb_word_in_buffer = 0x182; // 0x3c *** 128 * 3 + 2 = 386
1373 }
1267 }
1374
1268
1375 void reset_waveform_picker_regs_vhdl_dev_debug_64()
1269 void set_wfp_delta_f1( void )
1376 {
1270 {
1377 /** This function resets the waveform picker module registers.
1271 unsigned int delta_snapshot;
1378 *
1272 unsigned int nb_samples_per_snapshot;
1379 * The registers affected by this function are located at the following offset addresses:
1273 float delta_f1_in_float;
1380 * - 0x00 data_shaping
1274
1381 * - 0x04 run_burst_enable
1275 delta_snapshot = waveform_picker_regs->delta_snapshot;
1382 * - 0x08 addr_data_f0
1276 nb_samples_per_snapshot = parameter_dump_packet.sy_lfr_n_swf_l[0] * 256 + parameter_dump_packet.sy_lfr_n_swf_l[1];
1383 * - 0x0C addr_data_f1
1277 delta_f1_in_float = nb_samples_per_snapshot / 2. * ( 1. / 256. - 1. / 4096.) * 256.;
1384 * - 0x10 addr_data_f2
1278
1385 * - 0x14 addr_data_f3
1279 waveform_picker_regs->delta_f1 = delta_snapshot - floor( delta_f1_in_float );
1386 * - 0x18 status
1387 * - 0x1C delta_snapshot
1388 * - 0x20 delta_f0
1389 * - 0x24 delta_f0_2
1390 * - 0x28 delta_f1
1391 * - 0x2c delta_f2
1392 * - 0x30 nb_data_by_buffer
1393 * - 0x34 nb_snapshot_param
1394 * - 0x38 start_date
1395 * - 0x3c nb_word_in_buffer
1396 *
1397 */
1398 waveform_picker_regs->data_shaping = 0x01; // 0x00 *** R1 R0 SP1 SP0 BW
1399 waveform_picker_regs->run_burst_enable = 0x00; // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
1400 //waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0); // 0x08
1401 waveform_picker_regs->addr_data_f0 = current_ring_node_f0->buffer_address; // 0x08
1402 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address; // 0x0c
1403 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address; // 0x10
1404 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_a); // 0x14
1405 waveform_picker_regs->status = 0x00; // 0x18
1406 //
1407 waveform_picker_regs->delta_snapshot = 0x80; // 0x1c *** 128
1408 waveform_picker_regs->delta_f0 = 0x60; // 0x20 *** 128 - 32 = 96
1409 waveform_picker_regs->delta_f0_2 = 0x7; // 0x24 *** 7 [7 bits]
1410 waveform_picker_regs->delta_f1 = 0x62; // 0x28 *** 128 - 30 = 90
1411 waveform_picker_regs->delta_f2 = 0x60; // 0x2c *** 192
1412 // 128
1413 waveform_picker_regs->nb_data_by_buffer = 0x3f; // 0x30 *** 64 - 1 => nb samples -1
1414 waveform_picker_regs->snapshot_param = 0x40; // 0x34 *** 64 => nb samples
1415 waveform_picker_regs->start_date = 0x00; // 0x38
1416 waveform_picker_regs->nb_word_in_buffer = 0xc2; // 0x3c *** 64 * 3 + 2 = 194
1417 }
1280 }
1418
1281
1419 void reset_waveform_picker_regs()
1282 void set_wfp_delta_f2()
1420 {
1283 {
1421 /** This function resets the waveform picker module registers.
1284 unsigned int delta_snapshot;
1422 *
1285 unsigned int nb_samples_per_snapshot;
1423 * The registers affected by this function are located at the following offset addresses:
1424 * - 0x00 data_shaping
1425 * - 0x04 burst_enable
1426 * - 0x08 addr_data_f0
1427 * - 0x0C addr_data_f1
1428 * - 0x10 addr_data_f2
1429 * - 0x14 addr_data_f3
1430 * - 0x18 status
1431 * - 0x1C delta_snapshot
1432 * - 0x20 delta_f2_f1
1433 * - 0x24 delta_f2_f0
1434 * - 0x28 nb_burst
1435 * - 0x2C nb_snapshot
1436 *
1437 */
1438
1286
1439 #ifdef VHDL_DEV
1287 delta_snapshot = waveform_picker_regs->delta_snapshot;
1440 #else
1288 nb_samples_per_snapshot = parameter_dump_packet.sy_lfr_n_swf_l[0] * 256 + parameter_dump_packet.sy_lfr_n_swf_l[1];
1441 reset_wfp_burst_enable();
1289
1442 reset_wfp_status();
1290 waveform_picker_regs->delta_f2 = delta_snapshot - nb_samples_per_snapshot / 2;
1443 // set buffer addresses
1444 waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0);
1445 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address;
1446 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
1447 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_a);
1448 // set other parameters
1449 set_wfp_data_shaping();
1450 set_wfp_delta_snapshot(); // time in seconds between two snapshots
1451 waveform_picker_regs->delta_f2_f1 = 0xffff; // 0x16800 => 92160 (max 4 bytes)
1452 waveform_picker_regs->delta_f2_f0 = 0x17c00; // 97 280 (max 5 bytes)
1453 // waveform_picker_regs->nb_burst_available = 0x180; // max 3 bytes, size of the buffer in burst (1 burst = 16 x 4 octets)
1454 // // 3 * 2048 / 16 = 384
1455 // waveform_picker_regs->nb_snapshot_param = 0x7ff; // max 3 octets, 2048 - 1
1456 waveform_picker_regs->nb_burst_available = 0x1b9; // max 3 bytes, size of the buffer in burst (1 burst = 16 x 4 octets)
1457 // 3 * 2352 / 16 = 441
1458 waveform_picker_regs->nb_snapshot_param = 0x944; // max 3 octets, 2372 - 1
1459 #endif
1460 }
1291 }
1461
1292
1462 //*****************
1293 //*****************
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