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r182:4c7c1d90c7d1 VHDL_0_1_28
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1 a0aa2c6f13574ae69c8645af2a2afa5d448e6c76 LFR_basic-parameters
1 0f2eb26d750be2b6d8a3f5dee479b4575d3b93be LFR_basic-parameters
2 a8668a35669295aaba22432d247158626f00a52a header/lfr_common_headers
2 95a8d83f1d0c59f28a679e66e23464f21c12dd8a header/lfr_common_headers
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1 #ifndef FSW_MISC_H_INCLUDED
1 #ifndef FSW_MISC_H_INCLUDED
2 #define FSW_MISC_H_INCLUDED
2 #define FSW_MISC_H_INCLUDED
3
3
4 #include <rtems.h>
4 #include <rtems.h>
5 #include <stdio.h>
5 #include <stdio.h>
6 #include <grspw.h>
6 #include <grspw.h>
7 #include <grlib_regs.h>
7 #include <grlib_regs.h>
8
8
9 #include "fsw_params.h"
9 #include "fsw_params.h"
10 #include "fsw_spacewire.h"
10 #include "fsw_spacewire.h"
11 #include "lfr_cpu_usage_report.h"
11 #include "lfr_cpu_usage_report.h"
12
12
13 rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic
13 rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic
14 rtems_id HK_id; // id of the HK rate monotonic period
14 rtems_id HK_id; // id of the HK rate monotonic period
15
15
16 void configure_timer(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider,
16 void configure_timer(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider,
17 unsigned char interrupt_level, rtems_isr (*timer_isr)() );
17 unsigned char interrupt_level, rtems_isr (*timer_isr)() );
18 void timer_start( gptimer_regs_t *gptimer_regs, unsigned char timer );
18 void timer_start( gptimer_regs_t *gptimer_regs, unsigned char timer );
19 void timer_stop( gptimer_regs_t *gptimer_regs, unsigned char timer );
19 void timer_stop( gptimer_regs_t *gptimer_regs, unsigned char timer );
20 void timer_set_clock_divider(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider);
20 void timer_set_clock_divider(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider);
21
21
22 // SERIAL LINK
22 // SERIAL LINK
23 int send_console_outputs_on_apbuart_port( void );
23 int send_console_outputs_on_apbuart_port( void );
24 int enable_apbuart_transmitter( void );
24 int enable_apbuart_transmitter( void );
25 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value);
25 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value);
26
26
27 // RTEMS TASKS
27 // RTEMS TASKS
28 rtems_task stat_task( rtems_task_argument argument );
28 rtems_task stat_task( rtems_task_argument argument );
29 rtems_task hous_task( rtems_task_argument argument );
29 rtems_task hous_task( rtems_task_argument argument );
30 rtems_task dumb_task( rtems_task_argument unused );
30 rtems_task dumb_task( rtems_task_argument unused );
31
31
32 void init_housekeeping_parameters( void );
32 void init_housekeeping_parameters( void );
33 void increment_seq_counter(unsigned short *packetSequenceControl);
33 void increment_seq_counter(unsigned short *packetSequenceControl);
34 void getTime( unsigned char *time);
34 void getTime( unsigned char *time);
35 unsigned long long int getTimeAsUnsignedLongLongInt( );
35 unsigned long long int getTimeAsUnsignedLongLongInt( );
36 void send_dumb_hk( void );
36 void send_dumb_hk( void );
37 void get_v_e1_e2_f3(unsigned char *spacecraft_potential);
37 void get_v_e1_e2_f3( unsigned char *spacecraft_potential );
38 void get_temperatures( unsigned char *temperatures );
38 void get_cpu_load( unsigned char *resource_statistics );
39 void get_cpu_load( unsigned char *resource_statistics );
39
40
40 extern int sched_yield( void );
41 extern int sched_yield( void );
41 extern void rtems_cpu_usage_reset();
42 extern void rtems_cpu_usage_reset();
42 extern ring_node *current_ring_node_f3;
43 extern ring_node *current_ring_node_f3;
43 extern ring_node *ring_node_to_send_cwf_f3;
44 extern ring_node *ring_node_to_send_cwf_f3;
44 extern ring_node waveform_ring_f3[];
45 extern ring_node waveform_ring_f3[];
45 extern unsigned short sequenceCounterHK;
46 extern unsigned short sequenceCounterHK;
46
47
47 #endif // FSW_MISC_H_INCLUDED
48 #endif // FSW_MISC_H_INCLUDED
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1 #ifndef GRLIB_REGS_H_INCLUDED
1 #ifndef GRLIB_REGS_H_INCLUDED
2 #define GRLIB_REGS_H_INCLUDED
2 #define GRLIB_REGS_H_INCLUDED
3
3
4 #define NB_GPTIMER 3
4 #define NB_GPTIMER 3
5
5
6 struct apbuart_regs_str{
6 struct apbuart_regs_str{
7 volatile unsigned int data;
7 volatile unsigned int data;
8 volatile unsigned int status;
8 volatile unsigned int status;
9 volatile unsigned int ctrl;
9 volatile unsigned int ctrl;
10 volatile unsigned int scaler;
10 volatile unsigned int scaler;
11 volatile unsigned int fifoDebug;
11 volatile unsigned int fifoDebug;
12 };
12 };
13
13
14 struct grgpio_regs_str{
14 struct grgpio_regs_str{
15 volatile int io_port_data_register;
15 volatile int io_port_data_register;
16 int io_port_output_register;
16 int io_port_output_register;
17 int io_port_direction_register;
17 int io_port_direction_register;
18 int interrupt_mak_register;
18 int interrupt_mak_register;
19 int interrupt_polarity_register;
19 int interrupt_polarity_register;
20 int interrupt_edge_register;
20 int interrupt_edge_register;
21 int bypass_register;
21 int bypass_register;
22 int reserved;
22 int reserved;
23 // 0x20-0x3c interrupt map register(s)
23 // 0x20-0x3c interrupt map register(s)
24 };
24 };
25
25
26 typedef struct {
26 typedef struct {
27 volatile unsigned int counter;
27 volatile unsigned int counter;
28 volatile unsigned int reload;
28 volatile unsigned int reload;
29 volatile unsigned int ctrl;
29 volatile unsigned int ctrl;
30 volatile unsigned int unused;
30 volatile unsigned int unused;
31 } timer_regs_t;
31 } timer_regs_t;
32
32
33 typedef struct {
33 typedef struct {
34 volatile unsigned int scaler_value;
34 volatile unsigned int scaler_value;
35 volatile unsigned int scaler_reload;
35 volatile unsigned int scaler_reload;
36 volatile unsigned int conf;
36 volatile unsigned int conf;
37 volatile unsigned int unused0;
37 volatile unsigned int unused0;
38 timer_regs_t timer[NB_GPTIMER];
38 timer_regs_t timer[NB_GPTIMER];
39 } gptimer_regs_t;
39 } gptimer_regs_t;
40
40
41 typedef struct {
41 typedef struct {
42 volatile int ctrl; // bit 0 forces the load of the coarse_time_load value and resets the fine_time
42 volatile int ctrl; // bit 0 forces the load of the coarse_time_load value and resets the fine_time
43 // bit 1 is the soft reset for the time management module
43 // bit 1 is the soft reset for the time management module
44 // bit 2 is the soft reset for the waveform picker and the spectral matrix modules, set to 1 after HW reset
44 // bit 2 is the soft reset for the waveform picker and the spectral matrix modules, set to 1 after HW reset
45 volatile int coarse_time_load;
45 volatile int coarse_time_load;
46 volatile int coarse_time;
46 volatile int coarse_time;
47 volatile int fine_time;
47 volatile int fine_time;
48 volatile int temp_scm;
49 volatile int temp_pcb;
50 volatile int temp_fpga;
48 } time_management_regs_t;
51 } time_management_regs_t;
49
52
50 // PDB >= 0.1.28
53 // PDB >= 0.1.28
51 typedef struct{
54 typedef struct{
52 int data_shaping; // 0x00 00 *** R1 R0 SP1 SP0 BW
55 int data_shaping; // 0x00 00 *** R1 R0 SP1 SP0 BW
53 int run_burst_enable; // 0x04 01 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
56 int run_burst_enable; // 0x04 01 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
54 int addr_data_f0_0; // 0x08
57 int addr_data_f0_0; // 0x08
55 int addr_data_f0_1; // 0x0c
58 int addr_data_f0_1; // 0x0c
56 int addr_data_f1_0; // 0x10
59 int addr_data_f1_0; // 0x10
57 int addr_data_f1_1; // 0x14
60 int addr_data_f1_1; // 0x14
58 int addr_data_f2_0; // 0x18
61 int addr_data_f2_0; // 0x18
59 int addr_data_f2_1; // 0x1c
62 int addr_data_f2_1; // 0x1c
60 int addr_data_f3_0; // 0x20
63 int addr_data_f3_0; // 0x20
61 int addr_data_f3_1; // 0x24
64 int addr_data_f3_1; // 0x24
62 volatile int status; // 0x28
65 volatile int status; // 0x28
63 int delta_snapshot; // 0x2c
66 int delta_snapshot; // 0x2c
64 int delta_f0; // 0x30
67 int delta_f0; // 0x30
65 int delta_f0_2; // 0x34
68 int delta_f0_2; // 0x34
66 int delta_f1; // 0x38
69 int delta_f1; // 0x38
67 int delta_f2; // 0x3c
70 int delta_f2; // 0x3c
68 int nb_data_by_buffer; // 0x40 number of samples in a buffer = 2688
71 int nb_data_by_buffer; // 0x40 number of samples in a buffer = 2688
69 int snapshot_param; // 0x44
72 int snapshot_param; // 0x44
70 int start_date; // 0x48
73 int start_date; // 0x48
71 //
74 //
72 volatile unsigned int f0_0_coarse_time; // 0x4c
75 volatile unsigned int f0_0_coarse_time; // 0x4c
73 volatile unsigned int f0_0_fine_time; // 0x50
76 volatile unsigned int f0_0_fine_time; // 0x50
74 volatile unsigned int f0_1_coarse_time; // 0x54
77 volatile unsigned int f0_1_coarse_time; // 0x54
75 volatile unsigned int f0_1_fine_time; // 0x58
78 volatile unsigned int f0_1_fine_time; // 0x58
76 //
79 //
77 volatile unsigned int f1_0_coarse_time; // 0x5c
80 volatile unsigned int f1_0_coarse_time; // 0x5c
78 volatile unsigned int f1_0_fine_time; // 0x60
81 volatile unsigned int f1_0_fine_time; // 0x60
79 volatile unsigned int f1_1_coarse_time; // 0x64
82 volatile unsigned int f1_1_coarse_time; // 0x64
80 volatile unsigned int f1_1_fine_time; // 0x68
83 volatile unsigned int f1_1_fine_time; // 0x68
81 //
84 //
82 volatile unsigned int f2_0_coarse_time; // 0x6c
85 volatile unsigned int f2_0_coarse_time; // 0x6c
83 volatile unsigned int f2_0_fine_time; // 0x70
86 volatile unsigned int f2_0_fine_time; // 0x70
84 volatile unsigned int f2_1_coarse_time; // 0x74
87 volatile unsigned int f2_1_coarse_time; // 0x74
85 volatile unsigned int f2_1_fine_time; // 0x78
88 volatile unsigned int f2_1_fine_time; // 0x78
86 //
89 //
87 volatile unsigned int f3_0_coarse_time; // 0x7c
90 volatile unsigned int f3_0_coarse_time; // 0x7c
88 volatile unsigned int f3_0_fine_time; // 0x80
91 volatile unsigned int f3_0_fine_time; // 0x80
89 volatile unsigned int f3_1_coarse_time; // 0x84
92 volatile unsigned int f3_1_coarse_time; // 0x84
90 volatile unsigned int f3_1_fine_time; // 0x88
93 volatile unsigned int f3_1_fine_time; // 0x88
91 //
94 //
92 unsigned int buffer_length; // 0x8c = buffer length in burst 2688 / 16 = 168
95 unsigned int buffer_length; // 0x8c = buffer length in burst 2688 / 16 = 168
93 //
96 //
94 volatile unsigned int v; // 0x90
97 volatile unsigned int v; // 0x90
95 volatile unsigned int e1; // 0x94
98 volatile unsigned int e1; // 0x94
96 volatile unsigned int e2; // 0x98
99 volatile unsigned int e2; // 0x98
97 } waveform_picker_regs_0_1_18_t;
100 } waveform_picker_regs_0_1_18_t;
98
101
99 typedef struct {
102 typedef struct {
100 volatile int config; // 0x00
103 volatile int config; // 0x00
101 volatile int status; // 0x04
104 volatile int status; // 0x04
102 volatile int f0_0_address; // 0x08
105 volatile int f0_0_address; // 0x08
103 volatile int f0_1_address; // 0x0C
106 volatile int f0_1_address; // 0x0C
104 //
107 //
105 volatile int f1_0_address; // 0x10
108 volatile int f1_0_address; // 0x10
106 volatile int f1_1_address; // 0x14
109 volatile int f1_1_address; // 0x14
107 volatile int f2_0_address; // 0x18
110 volatile int f2_0_address; // 0x18
108 volatile int f2_1_address; // 0x1C
111 volatile int f2_1_address; // 0x1C
109 //
112 //
110 volatile unsigned int f0_0_coarse_time; // 0x20
113 volatile unsigned int f0_0_coarse_time; // 0x20
111 volatile unsigned int f0_0_fine_time; // 0x24
114 volatile unsigned int f0_0_fine_time; // 0x24
112 volatile unsigned int f0_1_coarse_time; // 0x28
115 volatile unsigned int f0_1_coarse_time; // 0x28
113 volatile unsigned int f0_1_fine_time; // 0x2C
116 volatile unsigned int f0_1_fine_time; // 0x2C
114 //
117 //
115 volatile unsigned int f1_0_coarse_time; // 0x30
118 volatile unsigned int f1_0_coarse_time; // 0x30
116 volatile unsigned int f1_0_fine_time; // 0x34
119 volatile unsigned int f1_0_fine_time; // 0x34
117 volatile unsigned int f1_1_coarse_time; // 0x38
120 volatile unsigned int f1_1_coarse_time; // 0x38
118 volatile unsigned int f1_1_fine_time; // 0x3C
121 volatile unsigned int f1_1_fine_time; // 0x3C
119 //
122 //
120 volatile unsigned int f2_0_coarse_time; // 0x40
123 volatile unsigned int f2_0_coarse_time; // 0x40
121 volatile unsigned int f2_0_fine_time; // 0x44
124 volatile unsigned int f2_0_fine_time; // 0x44
122 volatile unsigned int f2_1_coarse_time; // 0x48
125 volatile unsigned int f2_1_coarse_time; // 0x48
123 volatile unsigned int f2_1_fine_time; // 0x4C
126 volatile unsigned int f2_1_fine_time; // 0x4C
124 //
127 //
125 unsigned int matrix_length; // 0x50, length of a spectral matrix in burst 3200 / 16 = 200 = 0xc8
128 unsigned int matrix_length; // 0x50, length of a spectral matrix in burst 3200 / 16 = 200 = 0xc8
126 } spectral_matrix_regs_t;
129 } spectral_matrix_regs_t;
127
130
128 #endif // GRLIB_REGS_H_INCLUDED
131 #endif // GRLIB_REGS_H_INCLUDED
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1 #ifndef FSW_PROCESSING_H_INCLUDED
1 #ifndef FSW_PROCESSING_H_INCLUDED
2 #define FSW_PROCESSING_H_INCLUDED
2 #define FSW_PROCESSING_H_INCLUDED
3
3
4 #include <rtems.h>
4 #include <rtems.h>
5 #include <grspw.h>
5 #include <grspw.h>
6 #include <math.h>
6 #include <math.h>
7 #include <stdlib.h> // abs() is in the stdlib
7 #include <stdlib.h> // abs() is in the stdlib
8 #include <stdio.h> // printf()
8 #include <stdio.h> // printf()
9 #include <math.h>
9 #include <math.h>
10 #include <grlib_regs.h>
10 #include <grlib_regs.h>
11
11
12 #include "fsw_params.h"
12 #include "fsw_params.h"
13 #include "fsw_spacewire.h"
13 #include "fsw_spacewire.h"
14
14
15 typedef struct ring_node_asm
15 typedef struct ring_node_asm
16 {
16 {
17 struct ring_node_asm *next;
17 struct ring_node_asm *next;
18 float matrix[ TOTAL_SIZE_SM ];
18 float matrix[ TOTAL_SIZE_SM ];
19 unsigned int status;
19 unsigned int status;
20 } ring_node_asm;
20 } ring_node_asm;
21
21
22 typedef struct
22 typedef struct
23 {
23 {
24 unsigned char targetLogicalAddress;
24 unsigned char targetLogicalAddress;
25 unsigned char protocolIdentifier;
25 unsigned char protocolIdentifier;
26 unsigned char reserved;
26 unsigned char reserved;
27 unsigned char userApplication;
27 unsigned char userApplication;
28 unsigned char packetID[2];
28 unsigned char packetID[2];
29 unsigned char packetSequenceControl[2];
29 unsigned char packetSequenceControl[2];
30 unsigned char packetLength[2];
30 unsigned char packetLength[2];
31 // DATA FIELD HEADER
31 // DATA FIELD HEADER
32 unsigned char spare1_pusVersion_spare2;
32 unsigned char spare1_pusVersion_spare2;
33 unsigned char serviceType;
33 unsigned char serviceType;
34 unsigned char serviceSubType;
34 unsigned char serviceSubType;
35 unsigned char destinationID;
35 unsigned char destinationID;
36 unsigned char time[6];
36 unsigned char time[6];
37 // AUXILIARY HEADER
37 // AUXILIARY HEADER
38 unsigned char sid;
38 unsigned char sid;
39 unsigned char biaStatusInfo;
39 unsigned char biaStatusInfo;
40 unsigned char acquisitionTime[6];
40 unsigned char acquisitionTime[6];
41 unsigned char pa_lfr_bp_blk_nr[2];
41 unsigned char pa_lfr_bp_blk_nr[2];
42 // SOURCE DATA
42 // SOURCE DATA
43 unsigned char data[ 780 ]; // MAX size is 26 bins * 30 Bytes [TM_LFR_SCIENCE_BURST_BP2_F1]
43 unsigned char data[ 780 ]; // MAX size is 26 bins * 30 Bytes [TM_LFR_SCIENCE_BURST_BP2_F1]
44 } bp_packet;
44 } bp_packet;
45
45
46 typedef struct
46 typedef struct
47 {
47 {
48 unsigned char targetLogicalAddress;
48 unsigned char targetLogicalAddress;
49 unsigned char protocolIdentifier;
49 unsigned char protocolIdentifier;
50 unsigned char reserved;
50 unsigned char reserved;
51 unsigned char userApplication;
51 unsigned char userApplication;
52 unsigned char packetID[2];
52 unsigned char packetID[2];
53 unsigned char packetSequenceControl[2];
53 unsigned char packetSequenceControl[2];
54 unsigned char packetLength[2];
54 unsigned char packetLength[2];
55 // DATA FIELD HEADER
55 // DATA FIELD HEADER
56 unsigned char spare1_pusVersion_spare2;
56 unsigned char spare1_pusVersion_spare2;
57 unsigned char serviceType;
57 unsigned char serviceType;
58 unsigned char serviceSubType;
58 unsigned char serviceSubType;
59 unsigned char destinationID;
59 unsigned char destinationID;
60 unsigned char time[6];
60 unsigned char time[6];
61 // AUXILIARY HEADER
61 // AUXILIARY HEADER
62 unsigned char sid;
62 unsigned char sid;
63 unsigned char biaStatusInfo;
63 unsigned char biaStatusInfo;
64 unsigned char acquisitionTime[6];
64 unsigned char acquisitionTime[6];
65 unsigned char source_data_spare;
65 unsigned char source_data_spare;
66 unsigned char pa_lfr_bp_blk_nr[2];
66 unsigned char pa_lfr_bp_blk_nr[2];
67 // SOURCE DATA
67 // SOURCE DATA
68 unsigned char data[ 117 ]; // 13 bins * 9 Bytes only for TM_LFR_SCIENCE_NORMAL_BP1_F0 and F1
68 unsigned char data[ 117 ]; // 13 bins * 9 Bytes only for TM_LFR_SCIENCE_NORMAL_BP1_F0 and F1
69 } bp_packet_with_spare;
69 } bp_packet_with_spare;
70
70
71 typedef struct
71 typedef struct
72 {
72 {
73 ring_node_asm *norm;
73 ring_node_asm *norm;
74 ring_node_asm *burst_sbm;
74 ring_node_asm *burst_sbm;
75 rtems_event_set event;
75 rtems_event_set event;
76 unsigned int coarseTimeNORM;
76 unsigned int coarseTimeNORM;
77 unsigned int fineTimeNORM;
77 unsigned int fineTimeNORM;
78 unsigned int coarseTimeSBM;
78 unsigned int coarseTimeSBM;
79 unsigned int fineTimeSBM;
79 unsigned int fineTimeSBM;
80 } asm_msg;
80 } asm_msg;
81
81
82 extern volatile int sm_f0[ ];
82 extern volatile int sm_f0[ ];
83 extern volatile int sm_f1[ ];
83 extern volatile int sm_f1[ ];
84 extern volatile int sm_f2[ ];
84 extern volatile int sm_f2[ ];
85
85
86 // parameters
86 // parameters
87 extern struct param_local_str param_local;
87 extern struct param_local_str param_local;
88
88
89 // registers
89 // registers
90 extern time_management_regs_t *time_management_regs;
90 extern time_management_regs_t *time_management_regs;
91 extern volatile spectral_matrix_regs_t *spectral_matrix_regs;
91 extern volatile spectral_matrix_regs_t *spectral_matrix_regs;
92
92
93 extern rtems_name misc_name[5];
93 extern rtems_name misc_name[5];
94 extern rtems_id Task_id[20]; /* array of task ids */
94 extern rtems_id Task_id[20]; /* array of task ids */
95
95
96 //
96 //
97 ring_node * getRingNodeForAveraging( unsigned char frequencyChannel);
97 ring_node * getRingNodeForAveraging( unsigned char frequencyChannel);
98 // ISR
98 // ISR
99 rtems_isr spectral_matrices_isr( rtems_vector_number vector );
99 rtems_isr spectral_matrices_isr( rtems_vector_number vector );
100 rtems_isr spectral_matrices_isr_simu( rtems_vector_number vector );
100 rtems_isr spectral_matrices_isr_simu( rtems_vector_number vector );
101
101
102 //******************
102 //******************
103 // Spectral Matrices
103 // Spectral Matrices
104 void reset_nb_sm( void );
104 void reset_nb_sm( void );
105 // SM
105 // SM
106 void SM_init_rings( void );
106 void SM_init_rings( void );
107 void SM_reset_current_ring_nodes( void );
107 void SM_reset_current_ring_nodes( void );
108 // ASM
108 // ASM
109 void ASM_generic_init_ring(ring_node_asm *ring, unsigned char nbNodes );
109 void ASM_generic_init_ring(ring_node_asm *ring, unsigned char nbNodes );
110
110
111 //*****************
111 //*****************
112 // Basic Parameters
112 // Basic Parameters
113
113
114 void BP_reset_current_ring_nodes( void );
114 void BP_reset_current_ring_nodes( void );
115 void BP_init_header(bp_packet *packet,
115 void BP_init_header(bp_packet *packet,
116 unsigned int apid, unsigned char sid,
116 unsigned int apid, unsigned char sid,
117 unsigned int packetLength , unsigned char blkNr);
117 unsigned int packetLength , unsigned char blkNr);
118 void BP_init_header_with_spare(bp_packet_with_spare *packet,
118 void BP_init_header_with_spare(bp_packet_with_spare *packet,
119 unsigned int apid, unsigned char sid,
119 unsigned int apid, unsigned char sid,
120 unsigned int packetLength, unsigned char blkNr );
120 unsigned int packetLength, unsigned char blkNr );
121 void BP_send( char *data,
121 void BP_send( char *data,
122 rtems_id queue_id ,
122 rtems_id queue_id ,
123 unsigned int nbBytesToSend , unsigned int sid );
123 unsigned int nbBytesToSend , unsigned int sid );
124
124
125 //******************
125 //******************
126 // general functions
126 // general functions
127 void reset_sm_status( void );
127 void reset_sm_status( void );
128 void reset_spectral_matrix_regs( void );
128 void reset_spectral_matrix_regs( void );
129 void set_time(unsigned char *time, unsigned char *timeInBuffer );
129 void set_time(unsigned char *time, unsigned char *timeInBuffer );
130 unsigned long long int get_acquisition_time( unsigned char *timePtr );
130 unsigned long long int get_acquisition_time( unsigned char *timePtr );
131 unsigned char getSID( rtems_event_set event );
131 unsigned char getSID( rtems_event_set event );
132
132
133 extern rtems_status_code get_message_queue_id_prc1( rtems_id *queue_id );
133 extern rtems_status_code get_message_queue_id_prc1( rtems_id *queue_id );
134 extern rtems_status_code get_message_queue_id_prc2( rtems_id *queue_id );
134 extern rtems_status_code get_message_queue_id_prc2( rtems_id *queue_id );
135
135
136 //***************************************
136 //***************************************
137 // DEFINITIONS OF STATIC INLINE FUNCTIONS
137 // DEFINITIONS OF STATIC INLINE FUNCTIONS
138 static inline void SM_average(float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
138 static inline void SM_average(float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
139 ring_node *ring_node_tab[],
139 ring_node *ring_node_tab[],
140 unsigned int nbAverageNORM, unsigned int nbAverageSBM,
140 unsigned int nbAverageNORM, unsigned int nbAverageSBM,
141 asm_msg *msgForMATR );
141 asm_msg *msgForMATR );
142 static inline void SM_average_debug( float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
142 static inline void SM_average_debug( float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
143 ring_node *ring_node_tab[],
143 ring_node *ring_node_tab[],
144 unsigned int nbAverageNORM, unsigned int nbAverageSBM );
144 unsigned int nbAverageNORM, unsigned int nbAverageSBM );
145
146 void ASM_patch( float *inputASM, float *outputASM );
147 void extractReImVectors(float *inputASM, float *outputASM, unsigned int asmComponent );
148
145 static inline void ASM_reorganize_and_divide(float *averaged_spec_mat, float *averaged_spec_mat_reorganized,
149 static inline void ASM_reorganize_and_divide(float *averaged_spec_mat, float *averaged_spec_mat_reorganized,
146 float divider );
150 float divider );
147 static inline void ASM_compress_reorganize_and_divide(float *averaged_spec_mat, float *compressed_spec_mat,
151 static inline void ASM_compress_reorganize_and_divide(float *averaged_spec_mat, float *compressed_spec_mat,
148 float divider,
152 float divider,
149 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage , unsigned char ASMIndexStart);
153 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage , unsigned char ASMIndexStart);
150 static inline void ASM_convert(volatile float *input_matrix, char *output_matrix);
154 static inline void ASM_convert(volatile float *input_matrix, char *output_matrix);
151
155
152 void SM_average( float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
156 void SM_average( float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
153 ring_node *ring_node_tab[],
157 ring_node *ring_node_tab[],
154 unsigned int nbAverageNORM, unsigned int nbAverageSBM,
158 unsigned int nbAverageNORM, unsigned int nbAverageSBM,
155 asm_msg *msgForMATR )
159 asm_msg *msgForMATR )
156 {
160 {
157 float sum;
161 float sum;
158 unsigned int i;
162 unsigned int i;
159
163
160 for(i=0; i<TOTAL_SIZE_SM; i++)
164 for(i=0; i<TOTAL_SIZE_SM; i++)
161 {
165 {
162 sum = ( (int *) (ring_node_tab[0]->buffer_address) ) [ i ]
166 sum = ( (int *) (ring_node_tab[0]->buffer_address) ) [ i ]
163 + ( (int *) (ring_node_tab[1]->buffer_address) ) [ i ]
167 + ( (int *) (ring_node_tab[1]->buffer_address) ) [ i ]
164 + ( (int *) (ring_node_tab[2]->buffer_address) ) [ i ]
168 + ( (int *) (ring_node_tab[2]->buffer_address) ) [ i ]
165 + ( (int *) (ring_node_tab[3]->buffer_address) ) [ i ]
169 + ( (int *) (ring_node_tab[3]->buffer_address) ) [ i ]
166 + ( (int *) (ring_node_tab[4]->buffer_address) ) [ i ]
170 + ( (int *) (ring_node_tab[4]->buffer_address) ) [ i ]
167 + ( (int *) (ring_node_tab[5]->buffer_address) ) [ i ]
171 + ( (int *) (ring_node_tab[5]->buffer_address) ) [ i ]
168 + ( (int *) (ring_node_tab[6]->buffer_address) ) [ i ]
172 + ( (int *) (ring_node_tab[6]->buffer_address) ) [ i ]
169 + ( (int *) (ring_node_tab[7]->buffer_address) ) [ i ];
173 + ( (int *) (ring_node_tab[7]->buffer_address) ) [ i ];
170
174
171 if ( (nbAverageNORM == 0) && (nbAverageSBM == 0) )
175 if ( (nbAverageNORM == 0) && (nbAverageSBM == 0) )
172 {
176 {
173 averaged_spec_mat_NORM[ i ] = sum;
177 averaged_spec_mat_NORM[ i ] = sum;
174 averaged_spec_mat_SBM[ i ] = sum;
178 averaged_spec_mat_SBM[ i ] = sum;
175 msgForMATR->coarseTimeNORM = ring_node_tab[0]->coarseTime;
179 msgForMATR->coarseTimeNORM = ring_node_tab[0]->coarseTime;
176 msgForMATR->fineTimeNORM = ring_node_tab[0]->fineTime;
180 msgForMATR->fineTimeNORM = ring_node_tab[0]->fineTime;
177 msgForMATR->coarseTimeSBM = ring_node_tab[0]->coarseTime;
181 msgForMATR->coarseTimeSBM = ring_node_tab[0]->coarseTime;
178 msgForMATR->fineTimeSBM = ring_node_tab[0]->fineTime;
182 msgForMATR->fineTimeSBM = ring_node_tab[0]->fineTime;
179 }
183 }
180 else if ( (nbAverageNORM != 0) && (nbAverageSBM != 0) )
184 else if ( (nbAverageNORM != 0) && (nbAverageSBM != 0) )
181 {
185 {
182 averaged_spec_mat_NORM[ i ] = ( averaged_spec_mat_NORM[ i ] + sum );
186 averaged_spec_mat_NORM[ i ] = ( averaged_spec_mat_NORM[ i ] + sum );
183 averaged_spec_mat_SBM[ i ] = ( averaged_spec_mat_SBM[ i ] + sum );
187 averaged_spec_mat_SBM[ i ] = ( averaged_spec_mat_SBM[ i ] + sum );
184 }
188 }
185 else if ( (nbAverageNORM != 0) && (nbAverageSBM == 0) )
189 else if ( (nbAverageNORM != 0) && (nbAverageSBM == 0) )
186 {
190 {
187 averaged_spec_mat_NORM[ i ] = ( averaged_spec_mat_NORM[ i ] + sum );
191 averaged_spec_mat_NORM[ i ] = ( averaged_spec_mat_NORM[ i ] + sum );
188 averaged_spec_mat_SBM[ i ] = sum;
192 averaged_spec_mat_SBM[ i ] = sum;
189 msgForMATR->coarseTimeSBM = ring_node_tab[0]->coarseTime;
193 msgForMATR->coarseTimeSBM = ring_node_tab[0]->coarseTime;
190 msgForMATR->fineTimeSBM = ring_node_tab[0]->fineTime;
194 msgForMATR->fineTimeSBM = ring_node_tab[0]->fineTime;
191 }
195 }
192 else
196 else
193 {
197 {
194 PRINTF2("ERR *** in SM_average *** unexpected parameters %d %d\n", nbAverageNORM, nbAverageSBM)
198 PRINTF2("ERR *** in SM_average *** unexpected parameters %d %d\n", nbAverageNORM, nbAverageSBM)
195 }
199 }
196 }
200 }
197 }
201 }
198
202
199 void SM_average_debug( float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
203 void SM_average_debug( float *averaged_spec_mat_NORM, float *averaged_spec_mat_SBM,
200 ring_node *ring_node_tab[],
204 ring_node *ring_node_tab[],
201 unsigned int nbAverageNORM, unsigned int nbAverageSBM )
205 unsigned int nbAverageNORM, unsigned int nbAverageSBM )
202 {
206 {
203 float sum;
207 float sum;
204 unsigned int i;
208 unsigned int i;
205
209
206 for(i=0; i<TOTAL_SIZE_SM; i++)
210 for(i=0; i<TOTAL_SIZE_SM; i++)
207 {
211 {
208 sum = ( (int *) (ring_node_tab[0]->buffer_address) ) [ i ];
212 sum = ( (int *) (ring_node_tab[0]->buffer_address) ) [ i ];
209
213
210 if ( (nbAverageNORM == 0) && (nbAverageSBM == 0) )
214 if ( (nbAverageNORM == 0) && (nbAverageSBM == 0) )
211 {
215 {
212 averaged_spec_mat_NORM[ i ] = sum;
216 averaged_spec_mat_NORM[ i ] = sum;
213 averaged_spec_mat_SBM[ i ] = sum;
217 averaged_spec_mat_SBM[ i ] = sum;
214 }
218 }
215 else if ( (nbAverageNORM != 0) && (nbAverageSBM != 0) )
219 else if ( (nbAverageNORM != 0) && (nbAverageSBM != 0) )
216 {
220 {
217 averaged_spec_mat_NORM[ i ] = sum;
221 averaged_spec_mat_NORM[ i ] = sum;
218 averaged_spec_mat_SBM[ i ] = sum;
222 averaged_spec_mat_SBM[ i ] = sum;
219 }
223 }
220 else if ( (nbAverageNORM != 0) && (nbAverageSBM == 0) )
224 else if ( (nbAverageNORM != 0) && (nbAverageSBM == 0) )
221 {
225 {
222 averaged_spec_mat_NORM[ i ] = sum;
226 averaged_spec_mat_NORM[ i ] = sum;
223 averaged_spec_mat_SBM[ i ] = sum;
227 averaged_spec_mat_SBM[ i ] = sum;
224 }
228 }
225 else
229 else
226 {
230 {
227 PRINTF2("ERR *** in SM_average *** unexpected parameters %d %d\n", nbAverageNORM, nbAverageSBM)
231 PRINTF2("ERR *** in SM_average *** unexpected parameters %d %d\n", nbAverageNORM, nbAverageSBM)
228 }
232 }
229 }
233 }
230 }
234 }
231
235
232 void ASM_reorganize_and_divide( float *averaged_spec_mat, float *averaged_spec_mat_reorganized, float divider )
236 void ASM_reorganize_and_divide( float *averaged_spec_mat, float *averaged_spec_mat_reorganized, float divider )
233 {
237 {
234 int frequencyBin;
238 int frequencyBin;
235 int asmComponent;
239 int asmComponent;
236 unsigned int offsetASM;
240 unsigned int offsetASM;
237 unsigned int offsetASMReorganized;
241 unsigned int offsetASMReorganized;
238
242
239 // BUILD DATA
243 // BUILD DATA
240 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
244 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
241 {
245 {
242 for( frequencyBin = 0; frequencyBin < NB_BINS_PER_SM; frequencyBin++ )
246 for( frequencyBin = 0; frequencyBin < NB_BINS_PER_SM; frequencyBin++ )
243 {
247 {
244 offsetASMReorganized =
248 offsetASMReorganized =
245 frequencyBin * NB_VALUES_PER_SM
249 frequencyBin * NB_VALUES_PER_SM
246 + asmComponent;
250 + asmComponent;
247 offsetASM =
251 offsetASM =
248 asmComponent * NB_BINS_PER_SM
252 asmComponent * NB_BINS_PER_SM
249 + frequencyBin;
253 + frequencyBin;
250 averaged_spec_mat_reorganized[offsetASMReorganized ] =
254 averaged_spec_mat_reorganized[offsetASMReorganized ] =
251 averaged_spec_mat[ offsetASM ] / divider;
255 averaged_spec_mat[ offsetASM ] / divider;
252 }
256 }
253 }
257 }
254 }
258 }
255
259
256 void ASM_compress_reorganize_and_divide(float *averaged_spec_mat, float *compressed_spec_mat , float divider,
260 void ASM_compress_reorganize_and_divide(float *averaged_spec_mat, float *compressed_spec_mat , float divider,
257 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage, unsigned char ASMIndexStart )
261 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage, unsigned char ASMIndexStart )
258 {
262 {
259 int frequencyBin;
263 int frequencyBin;
260 int asmComponent;
264 int asmComponent;
261 int offsetASM;
265 int offsetASM;
262 int offsetCompressed;
266 int offsetCompressed;
263 int k;
267 int k;
264
268
265 // BUILD DATA
269 // BUILD DATA
266 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
270 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
267 {
271 {
268 for( frequencyBin = 0; frequencyBin < nbBinsCompressedMatrix; frequencyBin++ )
272 for( frequencyBin = 0; frequencyBin < nbBinsCompressedMatrix; frequencyBin++ )
269 {
273 {
270 offsetCompressed = // NO TIME OFFSET
274 offsetCompressed = // NO TIME OFFSET
271 frequencyBin * NB_VALUES_PER_SM
275 frequencyBin * NB_VALUES_PER_SM
272 + asmComponent;
276 + asmComponent;
273 offsetASM = // NO TIME OFFSET
277 offsetASM = // NO TIME OFFSET
274 asmComponent * NB_BINS_PER_SM
278 asmComponent * NB_BINS_PER_SM
275 + ASMIndexStart
279 + ASMIndexStart
276 + frequencyBin * nbBinsToAverage;
280 + frequencyBin * nbBinsToAverage;
277 compressed_spec_mat[ offsetCompressed ] = 0;
281 compressed_spec_mat[ offsetCompressed ] = 0;
278 for ( k = 0; k < nbBinsToAverage; k++ )
282 for ( k = 0; k < nbBinsToAverage; k++ )
279 {
283 {
280 compressed_spec_mat[offsetCompressed ] =
284 compressed_spec_mat[offsetCompressed ] =
281 ( compressed_spec_mat[ offsetCompressed ]
285 ( compressed_spec_mat[ offsetCompressed ]
282 + averaged_spec_mat[ offsetASM + k ] );
286 + averaged_spec_mat[ offsetASM + k ] );
283 }
287 }
284 compressed_spec_mat[ offsetCompressed ] =
288 compressed_spec_mat[ offsetCompressed ] =
285 compressed_spec_mat[ offsetCompressed ] / (divider * nbBinsToAverage);
289 compressed_spec_mat[ offsetCompressed ] / (divider * nbBinsToAverage);
286 }
290 }
287 }
291 }
288 }
292 }
289
293
290 void ASM_convert( volatile float *input_matrix, char *output_matrix)
294 void ASM_convert( volatile float *input_matrix, char *output_matrix)
291 {
295 {
292 unsigned int frequencyBin;
296 unsigned int frequencyBin;
293 unsigned int asmComponent;
297 unsigned int asmComponent;
294 char * pt_char_input;
298 char * pt_char_input;
295 char * pt_char_output;
299 char * pt_char_output;
296 unsigned int offsetInput;
300 unsigned int offsetInput;
297 unsigned int offsetOutput;
301 unsigned int offsetOutput;
298
302
299 pt_char_input = (char*) &input_matrix;
303 pt_char_input = (char*) &input_matrix;
300 pt_char_output = (char*) &output_matrix;
304 pt_char_output = (char*) &output_matrix;
301
305
302 // convert all other data
306 // convert all other data
303 for( frequencyBin=0; frequencyBin<NB_BINS_PER_SM; frequencyBin++)
307 for( frequencyBin=0; frequencyBin<NB_BINS_PER_SM; frequencyBin++)
304 {
308 {
305 for ( asmComponent=0; asmComponent<NB_VALUES_PER_SM; asmComponent++)
309 for ( asmComponent=0; asmComponent<NB_VALUES_PER_SM; asmComponent++)
306 {
310 {
307 offsetInput = (frequencyBin*NB_VALUES_PER_SM) + asmComponent ;
311 offsetInput = (frequencyBin*NB_VALUES_PER_SM) + asmComponent ;
308 offsetOutput = 2 * ( (frequencyBin*NB_VALUES_PER_SM) + asmComponent ) ;
312 offsetOutput = 2 * ( (frequencyBin*NB_VALUES_PER_SM) + asmComponent ) ;
309 pt_char_input = (char*) &input_matrix [ offsetInput ];
313 pt_char_input = (char*) &input_matrix [ offsetInput ];
310 pt_char_output = (char*) &output_matrix[ offsetOutput ];
314 pt_char_output = (char*) &output_matrix[ offsetOutput ];
311 pt_char_output[0] = pt_char_input[0]; // bits 31 downto 24 of the float
315 pt_char_output[0] = pt_char_input[0]; // bits 31 downto 24 of the float
312 pt_char_output[1] = pt_char_input[1]; // bits 23 downto 16 of the float
316 pt_char_output[1] = pt_char_input[1]; // bits 23 downto 16 of the float
313 }
317 }
314 }
318 }
315 }
319 }
316
320
317 #endif // FSW_PROCESSING_H_INCLUDED
321 #endif // FSW_PROCESSING_H_INCLUDED
Show file before | Show file after | Hide comments
@@ -1,810 +1,810
1 /** This is the RTEMS initialization module.
1 /** This is the RTEMS initialization module.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 * This module contains two very different information:
6 * This module contains two very different information:
7 * - specific instructions to configure the compilation of the RTEMS executive
7 * - specific instructions to configure the compilation of the RTEMS executive
8 * - functions related to the fligth softwre initialization, especially the INIT RTEMS task
8 * - functions related to the fligth softwre initialization, especially the INIT RTEMS task
9 *
9 *
10 */
10 */
11
11
12 //*************************
12 //*************************
13 // GPL reminder to be added
13 // GPL reminder to be added
14 //*************************
14 //*************************
15
15
16 #include <rtems.h>
16 #include <rtems.h>
17
17
18 /* configuration information */
18 /* configuration information */
19
19
20 #define CONFIGURE_INIT
20 #define CONFIGURE_INIT
21
21
22 #include <bsp.h> /* for device driver prototypes */
22 #include <bsp.h> /* for device driver prototypes */
23
23
24 /* configuration information */
24 /* configuration information */
25
25
26 #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
26 #define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
27 #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
27 #define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
28
28
29 #define CONFIGURE_MAXIMUM_TASKS 20
29 #define CONFIGURE_MAXIMUM_TASKS 20
30 #define CONFIGURE_RTEMS_INIT_TASKS_TABLE
30 #define CONFIGURE_RTEMS_INIT_TASKS_TABLE
31 #define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE)
31 #define CONFIGURE_EXTRA_TASK_STACKS (3 * RTEMS_MINIMUM_STACK_SIZE)
32 #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32
32 #define CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS 32
33 #define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100
33 #define CONFIGURE_INIT_TASK_PRIORITY 1 // instead of 100
34 #define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT)
34 #define CONFIGURE_INIT_TASK_MODE (RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT)
35 #define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT)
35 #define CONFIGURE_INIT_TASK_ATTRIBUTES (RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT)
36 #define CONFIGURE_MAXIMUM_DRIVERS 16
36 #define CONFIGURE_MAXIMUM_DRIVERS 16
37 #define CONFIGURE_MAXIMUM_PERIODS 5
37 #define CONFIGURE_MAXIMUM_PERIODS 5
38 #define CONFIGURE_MAXIMUM_TIMERS 5 // STAT (1s), send SWF (0.3s), send CWF3 (1s)
38 #define CONFIGURE_MAXIMUM_TIMERS 5 // STAT (1s), send SWF (0.3s), send CWF3 (1s)
39 #define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5
39 #define CONFIGURE_MAXIMUM_MESSAGE_QUEUES 5
40 #ifdef PRINT_STACK_REPORT
40 #ifdef PRINT_STACK_REPORT
41 #define CONFIGURE_STACK_CHECKER_ENABLED
41 #define CONFIGURE_STACK_CHECKER_ENABLED
42 #endif
42 #endif
43
43
44 #include <rtems/confdefs.h>
44 #include <rtems/confdefs.h>
45
45
46 /* If --drvmgr was enabled during the configuration of the RTEMS kernel */
46 /* If --drvmgr was enabled during the configuration of the RTEMS kernel */
47 #ifdef RTEMS_DRVMGR_STARTUP
47 #ifdef RTEMS_DRVMGR_STARTUP
48 #ifdef LEON3
48 #ifdef LEON3
49 /* Add Timer and UART Driver */
49 /* Add Timer and UART Driver */
50 #ifdef CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
50 #ifdef CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
51 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER
51 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GPTIMER
52 #endif
52 #endif
53 #ifdef CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
53 #ifdef CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
54 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART
54 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_APBUART
55 #endif
55 #endif
56 #endif
56 #endif
57 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW /* GRSPW Driver */
57 #define CONFIGURE_DRIVER_AMBAPP_GAISLER_GRSPW /* GRSPW Driver */
58 #include <drvmgr/drvmgr_confdefs.h>
58 #include <drvmgr/drvmgr_confdefs.h>
59 #endif
59 #endif
60
60
61 #include "fsw_init.h"
61 #include "fsw_init.h"
62 #include "fsw_config.c"
62 #include "fsw_config.c"
63
63
64 void initCache()
64 void initCache()
65 {
65 {
66 // unsigned int cacheControlRegister;
66 // unsigned int cacheControlRegister;
67
67
68 // cacheControlRegister = getCacheControlRegister();
68 // cacheControlRegister = getCacheControlRegister();
69 // printf("(0) cacheControlRegister = %x\n", cacheControlRegister);
69 // printf("(0) cacheControlRegister = %x\n", cacheControlRegister);
70
70
71 enableInstructionCache();
71 enableInstructionCache();
72 enableDataCache();
72 enableDataCache();
73 enableInstructionBurstFetch();
73 enableInstructionBurstFetch();
74
74
75 // cacheControlRegister = getCacheControlRegister();
75 // cacheControlRegister = getCacheControlRegister();
76 // printf("(1) cacheControlRegister = %x\n", cacheControlRegister);
76 // printf("(1) cacheControlRegister = %x\n", cacheControlRegister);
77 }
77 }
78
78
79 rtems_task Init( rtems_task_argument ignored )
79 rtems_task Init( rtems_task_argument ignored )
80 {
80 {
81 /** This is the RTEMS INIT taks, it the first task launched by the system.
81 /** This is the RTEMS INIT taks, it the first task launched by the system.
82 *
82 *
83 * @param unused is the starting argument of the RTEMS task
83 * @param unused is the starting argument of the RTEMS task
84 *
84 *
85 * The INIT task create and run all other RTEMS tasks.
85 * The INIT task create and run all other RTEMS tasks.
86 *
86 *
87 */
87 */
88
88
89 //***********
89 //***********
90 // INIT CACHE
90 // INIT CACHE
91
91
92 unsigned char *vhdlVersion;
92 unsigned char *vhdlVersion;
93
93
94 reset_lfr();
94 reset_lfr();
95
95
96 reset_local_time();
96 reset_local_time();
97
97
98 rtems_cpu_usage_reset();
98 rtems_cpu_usage_reset();
99
99
100 rtems_status_code status;
100 rtems_status_code status;
101 rtems_status_code status_spw;
101 rtems_status_code status_spw;
102 rtems_isr_entry old_isr_handler;
102 rtems_isr_entry old_isr_handler;
103
103
104 // UART settings
104 // UART settings
105 send_console_outputs_on_apbuart_port();
105 send_console_outputs_on_apbuart_port();
106 set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE);
106 set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE);
107 enable_apbuart_transmitter();
107 enable_apbuart_transmitter();
108
108
109 DEBUG_PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n")
109 DEBUG_PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n")
110
110
111
111
112 PRINTF("\n\n\n\n\n")
112 PRINTF("\n\n\n\n\n")
113
113
114 initCache();
114 initCache();
115
115
116 PRINTF("*************************\n")
116 PRINTF("*************************\n")
117 PRINTF("** LFR Flight Software **\n")
117 PRINTF("** LFR Flight Software **\n")
118 PRINTF1("** %d.", SW_VERSION_N1)
118 PRINTF1("** %d.", SW_VERSION_N1)
119 PRINTF1("%d." , SW_VERSION_N2)
119 PRINTF1("%d." , SW_VERSION_N2)
120 PRINTF1("%d." , SW_VERSION_N3)
120 PRINTF1("%d." , SW_VERSION_N3)
121 PRINTF1("%d **\n", SW_VERSION_N4)
121 PRINTF1("%d **\n", SW_VERSION_N4)
122
122
123 vhdlVersion = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
123 vhdlVersion = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
124 PRINTF("** VHDL **\n")
124 PRINTF("** VHDL **\n")
125 PRINTF1("** %d.", vhdlVersion[1])
125 PRINTF1("** %d.", vhdlVersion[1])
126 PRINTF1("%d." , vhdlVersion[2])
126 PRINTF1("%d." , vhdlVersion[2])
127 PRINTF1("%d **\n", vhdlVersion[3])
127 PRINTF1("%d **\n", vhdlVersion[3])
128 PRINTF("*************************\n")
128 PRINTF("*************************\n")
129 PRINTF("\n\n")
129 PRINTF("\n\n")
130
130
131 init_parameter_dump();
131 init_parameter_dump();
132 init_local_mode_parameters();
132 init_local_mode_parameters();
133 init_housekeeping_parameters();
133 init_housekeeping_parameters();
134 init_k_coefficients_f0();
134 init_k_coefficients_f0();
135 init_k_coefficients_f1();
135 init_k_coefficients_f1();
136 init_k_coefficients_f2();
136 init_k_coefficients_f2();
137
137
138 // waveform picker initialization
138 // waveform picker initialization
139 WFP_init_rings(); // initialize the waveform rings
139 WFP_init_rings(); // initialize the waveform rings
140 WFP_reset_current_ring_nodes();
140 WFP_reset_current_ring_nodes();
141 reset_waveform_picker_regs();
141 reset_waveform_picker_regs();
142
142
143 // spectral matrices initialization
143 // spectral matrices initialization
144 SM_init_rings(); // initialize spectral matrices rings
144 SM_init_rings(); // initialize spectral matrices rings
145 SM_reset_current_ring_nodes();
145 SM_reset_current_ring_nodes();
146 reset_spectral_matrix_regs();
146 reset_spectral_matrix_regs();
147
147
148 updateLFRCurrentMode();
148 updateLFRCurrentMode();
149
149
150 BOOT_PRINTF1("in INIT *** lfrCurrentMode is %d\n", lfrCurrentMode)
150 BOOT_PRINTF1("in INIT *** lfrCurrentMode is %d\n", lfrCurrentMode)
151
151
152 create_names(); // create all names
152 create_names(); // create all names
153
153
154 status = create_message_queues(); // create message queues
154 status = create_message_queues(); // create message queues
155 if (status != RTEMS_SUCCESSFUL)
155 if (status != RTEMS_SUCCESSFUL)
156 {
156 {
157 PRINTF1("in INIT *** ERR in create_message_queues, code %d", status)
157 PRINTF1("in INIT *** ERR in create_message_queues, code %d", status)
158 }
158 }
159
159
160 status = create_all_tasks(); // create all tasks
160 status = create_all_tasks(); // create all tasks
161 if (status != RTEMS_SUCCESSFUL)
161 if (status != RTEMS_SUCCESSFUL)
162 {
162 {
163 PRINTF1("in INIT *** ERR in create_all_tasks, code %d\n", status)
163 PRINTF1("in INIT *** ERR in create_all_tasks, code %d\n", status)
164 }
164 }
165
165
166 // **************************
166 // **************************
167 // <SPACEWIRE INITIALIZATION>
167 // <SPACEWIRE INITIALIZATION>
168 grspw_timecode_callback = &timecode_irq_handler;
168 grspw_timecode_callback = &timecode_irq_handler;
169
169
170 status_spw = spacewire_open_link(); // (1) open the link
170 status_spw = spacewire_open_link(); // (1) open the link
171 if ( status_spw != RTEMS_SUCCESSFUL )
171 if ( status_spw != RTEMS_SUCCESSFUL )
172 {
172 {
173 PRINTF1("in INIT *** ERR spacewire_open_link code %d\n", status_spw )
173 PRINTF1("in INIT *** ERR spacewire_open_link code %d\n", status_spw )
174 }
174 }
175
175
176 if ( status_spw == RTEMS_SUCCESSFUL ) // (2) configure the link
176 if ( status_spw == RTEMS_SUCCESSFUL ) // (2) configure the link
177 {
177 {
178 status_spw = spacewire_configure_link( fdSPW );
178 status_spw = spacewire_configure_link( fdSPW );
179 if ( status_spw != RTEMS_SUCCESSFUL )
179 if ( status_spw != RTEMS_SUCCESSFUL )
180 {
180 {
181 PRINTF1("in INIT *** ERR spacewire_configure_link code %d\n", status_spw )
181 PRINTF1("in INIT *** ERR spacewire_configure_link code %d\n", status_spw )
182 }
182 }
183 }
183 }
184
184
185 if ( status_spw == RTEMS_SUCCESSFUL) // (3) start the link
185 if ( status_spw == RTEMS_SUCCESSFUL) // (3) start the link
186 {
186 {
187 status_spw = spacewire_start_link( fdSPW );
187 status_spw = spacewire_start_link( fdSPW );
188 if ( status_spw != RTEMS_SUCCESSFUL )
188 if ( status_spw != RTEMS_SUCCESSFUL )
189 {
189 {
190 PRINTF1("in INIT *** ERR spacewire_start_link code %d\n", status_spw )
190 PRINTF1("in INIT *** ERR spacewire_start_link code %d\n", status_spw )
191 }
191 }
192 }
192 }
193 // </SPACEWIRE INITIALIZATION>
193 // </SPACEWIRE INITIALIZATION>
194 // ***************************
194 // ***************************
195
195
196 status = start_all_tasks(); // start all tasks
196 status = start_all_tasks(); // start all tasks
197 if (status != RTEMS_SUCCESSFUL)
197 if (status != RTEMS_SUCCESSFUL)
198 {
198 {
199 PRINTF1("in INIT *** ERR in start_all_tasks, code %d", status)
199 PRINTF1("in INIT *** ERR in start_all_tasks, code %d", status)
200 }
200 }
201
201
202 // start RECV and SEND *AFTER* SpaceWire Initialization, due to the timeout of the start call during the initialization
202 // start RECV and SEND *AFTER* SpaceWire Initialization, due to the timeout of the start call during the initialization
203 status = start_recv_send_tasks();
203 status = start_recv_send_tasks();
204 if ( status != RTEMS_SUCCESSFUL )
204 if ( status != RTEMS_SUCCESSFUL )
205 {
205 {
206 PRINTF1("in INIT *** ERR start_recv_send_tasks code %d\n", status )
206 PRINTF1("in INIT *** ERR start_recv_send_tasks code %d\n", status )
207 }
207 }
208
208
209 // suspend science tasks, they will be restarted later depending on the mode
209 // suspend science tasks, they will be restarted later depending on the mode
210 status = suspend_science_tasks(); // suspend science tasks (not done in stop_current_mode if current mode = STANDBY)
210 status = suspend_science_tasks(); // suspend science tasks (not done in stop_current_mode if current mode = STANDBY)
211 if (status != RTEMS_SUCCESSFUL)
211 if (status != RTEMS_SUCCESSFUL)
212 {
212 {
213 PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status)
213 PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status)
214 }
214 }
215
215
216 //******************************
216 //******************************
217 // <SPECTRAL MATRICES SIMULATOR>
217 // <SPECTRAL MATRICES SIMULATOR>
218 LEON_Mask_interrupt( IRQ_SM_SIMULATOR );
218 LEON_Mask_interrupt( IRQ_SM_SIMULATOR );
219 configure_timer((gptimer_regs_t*) REGS_ADDR_GPTIMER, TIMER_SM_SIMULATOR, CLKDIV_SM_SIMULATOR,
219 configure_timer((gptimer_regs_t*) REGS_ADDR_GPTIMER, TIMER_SM_SIMULATOR, CLKDIV_SM_SIMULATOR,
220 IRQ_SPARC_SM_SIMULATOR, spectral_matrices_isr_simu );
220 IRQ_SPARC_SM_SIMULATOR, spectral_matrices_isr_simu );
221 // </SPECTRAL MATRICES SIMULATOR>
221 // </SPECTRAL MATRICES SIMULATOR>
222 //*******************************
222 //*******************************
223
223
224 // configure IRQ handling for the waveform picker unit
224 // configure IRQ handling for the waveform picker unit
225 status = rtems_interrupt_catch( waveforms_isr,
225 status = rtems_interrupt_catch( waveforms_isr,
226 IRQ_SPARC_WAVEFORM_PICKER,
226 IRQ_SPARC_WAVEFORM_PICKER,
227 &old_isr_handler) ;
227 &old_isr_handler) ;
228 // configure IRQ handling for the spectral matrices unit
228 // configure IRQ handling for the spectral matrices unit
229 status = rtems_interrupt_catch( spectral_matrices_isr,
229 status = rtems_interrupt_catch( spectral_matrices_isr,
230 IRQ_SPARC_SPECTRAL_MATRIX,
230 IRQ_SPARC_SPECTRAL_MATRIX,
231 &old_isr_handler) ;
231 &old_isr_handler) ;
232
232
233 // if the spacewire link is not up then send an event to the SPIQ task for link recovery
233 // if the spacewire link is not up then send an event to the SPIQ task for link recovery
234 if ( status_spw != RTEMS_SUCCESSFUL )
234 if ( status_spw != RTEMS_SUCCESSFUL )
235 {
235 {
236 status = rtems_event_send( Task_id[TASKID_SPIQ], SPW_LINKERR_EVENT );
236 status = rtems_event_send( Task_id[TASKID_SPIQ], SPW_LINKERR_EVENT );
237 if ( status != RTEMS_SUCCESSFUL ) {
237 if ( status != RTEMS_SUCCESSFUL ) {
238 PRINTF1("in INIT *** ERR rtems_event_send to SPIQ code %d\n", status )
238 PRINTF1("in INIT *** ERR rtems_event_send to SPIQ code %d\n", status )
239 }
239 }
240 }
240 }
241
241
242 BOOT_PRINTF("delete INIT\n")
242 BOOT_PRINTF("delete INIT\n")
243
243
244 // test_TCH();
244 // test_TCH();
245
245
246 status = rtems_task_delete(RTEMS_SELF);
246 status = rtems_task_delete(RTEMS_SELF);
247
247
248 }
248 }
249
249
250 void init_local_mode_parameters( void )
250 void init_local_mode_parameters( void )
251 {
251 {
252 /** This function initialize the param_local global variable with default values.
252 /** This function initialize the param_local global variable with default values.
253 *
253 *
254 */
254 */
255
255
256 unsigned int i;
256 unsigned int i;
257
257
258 // LOCAL PARAMETERS
258 // LOCAL PARAMETERS
259
259
260 BOOT_PRINTF1("local_sbm1_nb_cwf_max %d \n", param_local.local_sbm1_nb_cwf_max)
260 BOOT_PRINTF1("local_sbm1_nb_cwf_max %d \n", param_local.local_sbm1_nb_cwf_max)
261 BOOT_PRINTF1("local_sbm2_nb_cwf_max %d \n", param_local.local_sbm2_nb_cwf_max)
261 BOOT_PRINTF1("local_sbm2_nb_cwf_max %d \n", param_local.local_sbm2_nb_cwf_max)
262 BOOT_PRINTF1("nb_interrupt_f0_MAX = %d\n", param_local.local_nb_interrupt_f0_MAX)
262 BOOT_PRINTF1("nb_interrupt_f0_MAX = %d\n", param_local.local_nb_interrupt_f0_MAX)
263
263
264 // init sequence counters
264 // init sequence counters
265
265
266 for(i = 0; i<SEQ_CNT_NB_DEST_ID; i++)
266 for(i = 0; i<SEQ_CNT_NB_DEST_ID; i++)
267 {
267 {
268 sequenceCounters_TC_EXE[i] = 0x00;
268 sequenceCounters_TC_EXE[i] = 0x00;
269 }
269 }
270 sequenceCounters_SCIENCE_NORMAL_BURST = 0x00;
270 sequenceCounters_SCIENCE_NORMAL_BURST = 0x00;
271 sequenceCounters_SCIENCE_SBM1_SBM2 = 0x00;
271 sequenceCounters_SCIENCE_SBM1_SBM2 = 0x00;
272 sequenceCounterHK = TM_PACKET_SEQ_CTRL_STANDALONE << 8;
272 sequenceCounterHK = TM_PACKET_SEQ_CTRL_STANDALONE << 8;
273 sequenceCounterParameterDump = TM_PACKET_SEQ_CTRL_STANDALONE << 8;
273 sequenceCounterParameterDump = TM_PACKET_SEQ_CTRL_STANDALONE << 8;
274 }
274 }
275
275
276 void reset_local_time( void )
276 void reset_local_time( void )
277 {
277 {
278 time_management_regs->ctrl = time_management_regs->ctrl | 0x02; // [0010] software reset, coarse time = 0x80000000
278 time_management_regs->ctrl = time_management_regs->ctrl | 0x02; // [0010] software reset, coarse time = 0x80000000
279 }
279 }
280
280
281 void create_names( void ) // create all names for tasks and queues
281 void create_names( void ) // create all names for tasks and queues
282 {
282 {
283 /** This function creates all RTEMS names used in the software for tasks and queues.
283 /** This function creates all RTEMS names used in the software for tasks and queues.
284 *
284 *
285 * @return RTEMS directive status codes:
285 * @return RTEMS directive status codes:
286 * - RTEMS_SUCCESSFUL - successful completion
286 * - RTEMS_SUCCESSFUL - successful completion
287 *
287 *
288 */
288 */
289
289
290 // task names
290 // task names
291 Task_name[TASKID_RECV] = rtems_build_name( 'R', 'E', 'C', 'V' );
291 Task_name[TASKID_RECV] = rtems_build_name( 'R', 'E', 'C', 'V' );
292 Task_name[TASKID_ACTN] = rtems_build_name( 'A', 'C', 'T', 'N' );
292 Task_name[TASKID_ACTN] = rtems_build_name( 'A', 'C', 'T', 'N' );
293 Task_name[TASKID_SPIQ] = rtems_build_name( 'S', 'P', 'I', 'Q' );
293 Task_name[TASKID_SPIQ] = rtems_build_name( 'S', 'P', 'I', 'Q' );
294 Task_name[TASKID_STAT] = rtems_build_name( 'S', 'T', 'A', 'T' );
294 Task_name[TASKID_STAT] = rtems_build_name( 'S', 'T', 'A', 'T' );
295 Task_name[TASKID_AVF0] = rtems_build_name( 'A', 'V', 'F', '0' );
295 Task_name[TASKID_AVF0] = rtems_build_name( 'A', 'V', 'F', '0' );
296 Task_name[TASKID_SWBD] = rtems_build_name( 'S', 'W', 'B', 'D' );
296 Task_name[TASKID_SWBD] = rtems_build_name( 'S', 'W', 'B', 'D' );
297 Task_name[TASKID_WFRM] = rtems_build_name( 'W', 'F', 'R', 'M' );
297 Task_name[TASKID_WFRM] = rtems_build_name( 'W', 'F', 'R', 'M' );
298 Task_name[TASKID_DUMB] = rtems_build_name( 'D', 'U', 'M', 'B' );
298 Task_name[TASKID_DUMB] = rtems_build_name( 'D', 'U', 'M', 'B' );
299 Task_name[TASKID_HOUS] = rtems_build_name( 'H', 'O', 'U', 'S' );
299 Task_name[TASKID_HOUS] = rtems_build_name( 'H', 'O', 'U', 'S' );
300 Task_name[TASKID_PRC0] = rtems_build_name( 'P', 'R', 'C', '0' );
300 Task_name[TASKID_PRC0] = rtems_build_name( 'P', 'R', 'C', '0' );
301 Task_name[TASKID_CWF3] = rtems_build_name( 'C', 'W', 'F', '3' );
301 Task_name[TASKID_CWF3] = rtems_build_name( 'C', 'W', 'F', '3' );
302 Task_name[TASKID_CWF2] = rtems_build_name( 'C', 'W', 'F', '2' );
302 Task_name[TASKID_CWF2] = rtems_build_name( 'C', 'W', 'F', '2' );
303 Task_name[TASKID_CWF1] = rtems_build_name( 'C', 'W', 'F', '1' );
303 Task_name[TASKID_CWF1] = rtems_build_name( 'C', 'W', 'F', '1' );
304 Task_name[TASKID_SEND] = rtems_build_name( 'S', 'E', 'N', 'D' );
304 Task_name[TASKID_SEND] = rtems_build_name( 'S', 'E', 'N', 'D' );
305 Task_name[TASKID_WTDG] = rtems_build_name( 'W', 'T', 'D', 'G' );
305 Task_name[TASKID_WTDG] = rtems_build_name( 'W', 'T', 'D', 'G' );
306 Task_name[TASKID_AVF1] = rtems_build_name( 'A', 'V', 'F', '1' );
306 Task_name[TASKID_AVF1] = rtems_build_name( 'A', 'V', 'F', '1' );
307 Task_name[TASKID_PRC1] = rtems_build_name( 'P', 'R', 'C', '1' );
307 Task_name[TASKID_PRC1] = rtems_build_name( 'P', 'R', 'C', '1' );
308 Task_name[TASKID_AVF2] = rtems_build_name( 'A', 'V', 'F', '2' );
308 Task_name[TASKID_AVF2] = rtems_build_name( 'A', 'V', 'F', '2' );
309 Task_name[TASKID_PRC2] = rtems_build_name( 'P', 'R', 'C', '2' );
309 Task_name[TASKID_PRC2] = rtems_build_name( 'P', 'R', 'C', '2' );
310
310
311 // rate monotonic period names
311 // rate monotonic period names
312 name_hk_rate_monotonic = rtems_build_name( 'H', 'O', 'U', 'S' );
312 name_hk_rate_monotonic = rtems_build_name( 'H', 'O', 'U', 'S' );
313
313
314 misc_name[QUEUE_RECV] = rtems_build_name( 'Q', '_', 'R', 'V' );
314 misc_name[QUEUE_RECV] = rtems_build_name( 'Q', '_', 'R', 'V' );
315 misc_name[QUEUE_SEND] = rtems_build_name( 'Q', '_', 'S', 'D' );
315 misc_name[QUEUE_SEND] = rtems_build_name( 'Q', '_', 'S', 'D' );
316 misc_name[QUEUE_PRC0] = rtems_build_name( 'Q', '_', 'P', '0' );
316 misc_name[QUEUE_PRC0] = rtems_build_name( 'Q', '_', 'P', '0' );
317 misc_name[QUEUE_PRC1] = rtems_build_name( 'Q', '_', 'P', '1' );
317 misc_name[QUEUE_PRC1] = rtems_build_name( 'Q', '_', 'P', '1' );
318 misc_name[QUEUE_PRC2] = rtems_build_name( 'Q', '_', 'P', '2' );
318 misc_name[QUEUE_PRC2] = rtems_build_name( 'Q', '_', 'P', '2' );
319 }
319 }
320
320
321 int create_all_tasks( void ) // create all tasks which run in the software
321 int create_all_tasks( void ) // create all tasks which run in the software
322 {
322 {
323 /** This function creates all RTEMS tasks used in the software.
323 /** This function creates all RTEMS tasks used in the software.
324 *
324 *
325 * @return RTEMS directive status codes:
325 * @return RTEMS directive status codes:
326 * - RTEMS_SUCCESSFUL - task created successfully
326 * - RTEMS_SUCCESSFUL - task created successfully
327 * - RTEMS_INVALID_ADDRESS - id is NULL
327 * - RTEMS_INVALID_ADDRESS - id is NULL
328 * - RTEMS_INVALID_NAME - invalid task name
328 * - RTEMS_INVALID_NAME - invalid task name
329 * - RTEMS_INVALID_PRIORITY - invalid task priority
329 * - RTEMS_INVALID_PRIORITY - invalid task priority
330 * - RTEMS_MP_NOT_CONFIGURED - multiprocessing not configured
330 * - RTEMS_MP_NOT_CONFIGURED - multiprocessing not configured
331 * - RTEMS_TOO_MANY - too many tasks created
331 * - RTEMS_TOO_MANY - too many tasks created
332 * - RTEMS_UNSATISFIED - not enough memory for stack/FP context
332 * - RTEMS_UNSATISFIED - not enough memory for stack/FP context
333 * - RTEMS_TOO_MANY - too many global objects
333 * - RTEMS_TOO_MANY - too many global objects
334 *
334 *
335 */
335 */
336
336
337 rtems_status_code status;
337 rtems_status_code status;
338
338
339 //**********
339 //**********
340 // SPACEWIRE
340 // SPACEWIRE
341 // RECV
341 // RECV
342 status = rtems_task_create(
342 status = rtems_task_create(
343 Task_name[TASKID_RECV], TASK_PRIORITY_RECV, RTEMS_MINIMUM_STACK_SIZE,
343 Task_name[TASKID_RECV], TASK_PRIORITY_RECV, RTEMS_MINIMUM_STACK_SIZE,
344 RTEMS_DEFAULT_MODES,
344 RTEMS_DEFAULT_MODES,
345 RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_RECV]
345 RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_RECV]
346 );
346 );
347 if (status == RTEMS_SUCCESSFUL) // SEND
347 if (status == RTEMS_SUCCESSFUL) // SEND
348 {
348 {
349 status = rtems_task_create(
349 status = rtems_task_create(
350 Task_name[TASKID_SEND], TASK_PRIORITY_SEND, RTEMS_MINIMUM_STACK_SIZE * 2,
350 Task_name[TASKID_SEND], TASK_PRIORITY_SEND, RTEMS_MINIMUM_STACK_SIZE * 2,
351 RTEMS_DEFAULT_MODES,
351 RTEMS_DEFAULT_MODES,
352 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_SEND]
352 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_SEND]
353 );
353 );
354 }
354 }
355 if (status == RTEMS_SUCCESSFUL) // WTDG
355 if (status == RTEMS_SUCCESSFUL) // WTDG
356 {
356 {
357 status = rtems_task_create(
357 status = rtems_task_create(
358 Task_name[TASKID_WTDG], TASK_PRIORITY_WTDG, RTEMS_MINIMUM_STACK_SIZE,
358 Task_name[TASKID_WTDG], TASK_PRIORITY_WTDG, RTEMS_MINIMUM_STACK_SIZE,
359 RTEMS_DEFAULT_MODES,
359 RTEMS_DEFAULT_MODES,
360 RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_WTDG]
360 RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_WTDG]
361 );
361 );
362 }
362 }
363 if (status == RTEMS_SUCCESSFUL) // ACTN
363 if (status == RTEMS_SUCCESSFUL) // ACTN
364 {
364 {
365 status = rtems_task_create(
365 status = rtems_task_create(
366 Task_name[TASKID_ACTN], TASK_PRIORITY_ACTN, RTEMS_MINIMUM_STACK_SIZE,
366 Task_name[TASKID_ACTN], TASK_PRIORITY_ACTN, RTEMS_MINIMUM_STACK_SIZE,
367 RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT,
367 RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT,
368 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_ACTN]
368 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_ACTN]
369 );
369 );
370 }
370 }
371 if (status == RTEMS_SUCCESSFUL) // SPIQ
371 if (status == RTEMS_SUCCESSFUL) // SPIQ
372 {
372 {
373 status = rtems_task_create(
373 status = rtems_task_create(
374 Task_name[TASKID_SPIQ], TASK_PRIORITY_SPIQ, RTEMS_MINIMUM_STACK_SIZE,
374 Task_name[TASKID_SPIQ], TASK_PRIORITY_SPIQ, RTEMS_MINIMUM_STACK_SIZE,
375 RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT,
375 RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT,
376 RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_SPIQ]
376 RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_SPIQ]
377 );
377 );
378 }
378 }
379
379
380 //******************
380 //******************
381 // SPECTRAL MATRICES
381 // SPECTRAL MATRICES
382 if (status == RTEMS_SUCCESSFUL) // AVF0
382 if (status == RTEMS_SUCCESSFUL) // AVF0
383 {
383 {
384 status = rtems_task_create(
384 status = rtems_task_create(
385 Task_name[TASKID_AVF0], TASK_PRIORITY_AVF0, RTEMS_MINIMUM_STACK_SIZE,
385 Task_name[TASKID_AVF0], TASK_PRIORITY_AVF0, RTEMS_MINIMUM_STACK_SIZE,
386 RTEMS_DEFAULT_MODES,
386 RTEMS_DEFAULT_MODES,
387 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_AVF0]
387 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_AVF0]
388 );
388 );
389 }
389 }
390 if (status == RTEMS_SUCCESSFUL) // PRC0
390 if (status == RTEMS_SUCCESSFUL) // PRC0
391 {
391 {
392 status = rtems_task_create(
392 status = rtems_task_create(
393 Task_name[TASKID_PRC0], TASK_PRIORITY_PRC0, RTEMS_MINIMUM_STACK_SIZE * 2,
393 Task_name[TASKID_PRC0], TASK_PRIORITY_PRC0, RTEMS_MINIMUM_STACK_SIZE * 2,
394 RTEMS_DEFAULT_MODES,
394 RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT,
395 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_PRC0]
395 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_PRC0]
396 );
396 );
397 }
397 }
398 if (status == RTEMS_SUCCESSFUL) // AVF1
398 if (status == RTEMS_SUCCESSFUL) // AVF1
399 {
399 {
400 status = rtems_task_create(
400 status = rtems_task_create(
401 Task_name[TASKID_AVF1], TASK_PRIORITY_AVF1, RTEMS_MINIMUM_STACK_SIZE,
401 Task_name[TASKID_AVF1], TASK_PRIORITY_AVF1, RTEMS_MINIMUM_STACK_SIZE,
402 RTEMS_DEFAULT_MODES,
402 RTEMS_DEFAULT_MODES,
403 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_AVF1]
403 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_AVF1]
404 );
404 );
405 }
405 }
406 if (status == RTEMS_SUCCESSFUL) // PRC1
406 if (status == RTEMS_SUCCESSFUL) // PRC1
407 {
407 {
408 status = rtems_task_create(
408 status = rtems_task_create(
409 Task_name[TASKID_PRC1], TASK_PRIORITY_PRC1, RTEMS_MINIMUM_STACK_SIZE * 2,
409 Task_name[TASKID_PRC1], TASK_PRIORITY_PRC1, RTEMS_MINIMUM_STACK_SIZE * 2,
410 RTEMS_DEFAULT_MODES,
410 RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT,
411 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_PRC1]
411 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_PRC1]
412 );
412 );
413 }
413 }
414 if (status == RTEMS_SUCCESSFUL) // AVF2
414 if (status == RTEMS_SUCCESSFUL) // AVF2
415 {
415 {
416 status = rtems_task_create(
416 status = rtems_task_create(
417 Task_name[TASKID_AVF2], TASK_PRIORITY_AVF2, RTEMS_MINIMUM_STACK_SIZE,
417 Task_name[TASKID_AVF2], TASK_PRIORITY_AVF2, RTEMS_MINIMUM_STACK_SIZE,
418 RTEMS_DEFAULT_MODES,
418 RTEMS_DEFAULT_MODES,
419 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_AVF2]
419 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_AVF2]
420 );
420 );
421 }
421 }
422 if (status == RTEMS_SUCCESSFUL) // PRC2
422 if (status == RTEMS_SUCCESSFUL) // PRC2
423 {
423 {
424 status = rtems_task_create(
424 status = rtems_task_create(
425 Task_name[TASKID_PRC2], TASK_PRIORITY_PRC2, RTEMS_MINIMUM_STACK_SIZE * 2,
425 Task_name[TASKID_PRC2], TASK_PRIORITY_PRC2, RTEMS_MINIMUM_STACK_SIZE * 2,
426 RTEMS_DEFAULT_MODES,
426 RTEMS_DEFAULT_MODES | RTEMS_NO_PREEMPT,
427 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_PRC2]
427 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_PRC2]
428 );
428 );
429 }
429 }
430
430
431 //****************
431 //****************
432 // WAVEFORM PICKER
432 // WAVEFORM PICKER
433 if (status == RTEMS_SUCCESSFUL) // WFRM
433 if (status == RTEMS_SUCCESSFUL) // WFRM
434 {
434 {
435 status = rtems_task_create(
435 status = rtems_task_create(
436 Task_name[TASKID_WFRM], TASK_PRIORITY_WFRM, RTEMS_MINIMUM_STACK_SIZE,
436 Task_name[TASKID_WFRM], TASK_PRIORITY_WFRM, RTEMS_MINIMUM_STACK_SIZE,
437 RTEMS_DEFAULT_MODES,
437 RTEMS_DEFAULT_MODES,
438 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_WFRM]
438 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_WFRM]
439 );
439 );
440 }
440 }
441 if (status == RTEMS_SUCCESSFUL) // CWF3
441 if (status == RTEMS_SUCCESSFUL) // CWF3
442 {
442 {
443 status = rtems_task_create(
443 status = rtems_task_create(
444 Task_name[TASKID_CWF3], TASK_PRIORITY_CWF3, RTEMS_MINIMUM_STACK_SIZE,
444 Task_name[TASKID_CWF3], TASK_PRIORITY_CWF3, RTEMS_MINIMUM_STACK_SIZE,
445 RTEMS_DEFAULT_MODES,
445 RTEMS_DEFAULT_MODES,
446 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_CWF3]
446 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_CWF3]
447 );
447 );
448 }
448 }
449 if (status == RTEMS_SUCCESSFUL) // CWF2
449 if (status == RTEMS_SUCCESSFUL) // CWF2
450 {
450 {
451 status = rtems_task_create(
451 status = rtems_task_create(
452 Task_name[TASKID_CWF2], TASK_PRIORITY_CWF2, RTEMS_MINIMUM_STACK_SIZE,
452 Task_name[TASKID_CWF2], TASK_PRIORITY_CWF2, RTEMS_MINIMUM_STACK_SIZE,
453 RTEMS_DEFAULT_MODES,
453 RTEMS_DEFAULT_MODES,
454 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_CWF2]
454 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_CWF2]
455 );
455 );
456 }
456 }
457 if (status == RTEMS_SUCCESSFUL) // CWF1
457 if (status == RTEMS_SUCCESSFUL) // CWF1
458 {
458 {
459 status = rtems_task_create(
459 status = rtems_task_create(
460 Task_name[TASKID_CWF1], TASK_PRIORITY_CWF1, RTEMS_MINIMUM_STACK_SIZE,
460 Task_name[TASKID_CWF1], TASK_PRIORITY_CWF1, RTEMS_MINIMUM_STACK_SIZE,
461 RTEMS_DEFAULT_MODES,
461 RTEMS_DEFAULT_MODES,
462 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_CWF1]
462 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_CWF1]
463 );
463 );
464 }
464 }
465 if (status == RTEMS_SUCCESSFUL) // SWBD
465 if (status == RTEMS_SUCCESSFUL) // SWBD
466 {
466 {
467 status = rtems_task_create(
467 status = rtems_task_create(
468 Task_name[TASKID_SWBD], TASK_PRIORITY_SWBD, RTEMS_MINIMUM_STACK_SIZE,
468 Task_name[TASKID_SWBD], TASK_PRIORITY_SWBD, RTEMS_MINIMUM_STACK_SIZE,
469 RTEMS_DEFAULT_MODES,
469 RTEMS_DEFAULT_MODES,
470 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_SWBD]
470 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_SWBD]
471 );
471 );
472 }
472 }
473
473
474 //*****
474 //*****
475 // MISC
475 // MISC
476 if (status == RTEMS_SUCCESSFUL) // STAT
476 if (status == RTEMS_SUCCESSFUL) // STAT
477 {
477 {
478 status = rtems_task_create(
478 status = rtems_task_create(
479 Task_name[TASKID_STAT], TASK_PRIORITY_STAT, RTEMS_MINIMUM_STACK_SIZE,
479 Task_name[TASKID_STAT], TASK_PRIORITY_STAT, RTEMS_MINIMUM_STACK_SIZE,
480 RTEMS_DEFAULT_MODES,
480 RTEMS_DEFAULT_MODES,
481 RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_STAT]
481 RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_STAT]
482 );
482 );
483 }
483 }
484 if (status == RTEMS_SUCCESSFUL) // DUMB
484 if (status == RTEMS_SUCCESSFUL) // DUMB
485 {
485 {
486 status = rtems_task_create(
486 status = rtems_task_create(
487 Task_name[TASKID_DUMB], TASK_PRIORITY_DUMB, RTEMS_MINIMUM_STACK_SIZE,
487 Task_name[TASKID_DUMB], TASK_PRIORITY_DUMB, RTEMS_MINIMUM_STACK_SIZE,
488 RTEMS_DEFAULT_MODES,
488 RTEMS_DEFAULT_MODES,
489 RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_DUMB]
489 RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_DUMB]
490 );
490 );
491 }
491 }
492 if (status == RTEMS_SUCCESSFUL) // HOUS
492 if (status == RTEMS_SUCCESSFUL) // HOUS
493 {
493 {
494 status = rtems_task_create(
494 status = rtems_task_create(
495 Task_name[TASKID_HOUS], TASK_PRIORITY_HOUS, RTEMS_MINIMUM_STACK_SIZE,
495 Task_name[TASKID_HOUS], TASK_PRIORITY_HOUS, RTEMS_MINIMUM_STACK_SIZE,
496 RTEMS_DEFAULT_MODES,
496 RTEMS_DEFAULT_MODES,
497 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_HOUS]
497 RTEMS_DEFAULT_ATTRIBUTES | RTEMS_FLOATING_POINT, &Task_id[TASKID_HOUS]
498 );
498 );
499 }
499 }
500
500
501 return status;
501 return status;
502 }
502 }
503
503
504 int start_recv_send_tasks( void )
504 int start_recv_send_tasks( void )
505 {
505 {
506 rtems_status_code status;
506 rtems_status_code status;
507
507
508 status = rtems_task_start( Task_id[TASKID_RECV], recv_task, 1 );
508 status = rtems_task_start( Task_id[TASKID_RECV], recv_task, 1 );
509 if (status!=RTEMS_SUCCESSFUL) {
509 if (status!=RTEMS_SUCCESSFUL) {
510 BOOT_PRINTF("in INIT *** Error starting TASK_RECV\n")
510 BOOT_PRINTF("in INIT *** Error starting TASK_RECV\n")
511 }
511 }
512
512
513 if (status == RTEMS_SUCCESSFUL) // SEND
513 if (status == RTEMS_SUCCESSFUL) // SEND
514 {
514 {
515 status = rtems_task_start( Task_id[TASKID_SEND], send_task, 1 );
515 status = rtems_task_start( Task_id[TASKID_SEND], send_task, 1 );
516 if (status!=RTEMS_SUCCESSFUL) {
516 if (status!=RTEMS_SUCCESSFUL) {
517 BOOT_PRINTF("in INIT *** Error starting TASK_SEND\n")
517 BOOT_PRINTF("in INIT *** Error starting TASK_SEND\n")
518 }
518 }
519 }
519 }
520
520
521 return status;
521 return status;
522 }
522 }
523
523
524 int start_all_tasks( void ) // start all tasks except SEND RECV and HOUS
524 int start_all_tasks( void ) // start all tasks except SEND RECV and HOUS
525 {
525 {
526 /** This function starts all RTEMS tasks used in the software.
526 /** This function starts all RTEMS tasks used in the software.
527 *
527 *
528 * @return RTEMS directive status codes:
528 * @return RTEMS directive status codes:
529 * - RTEMS_SUCCESSFUL - ask started successfully
529 * - RTEMS_SUCCESSFUL - ask started successfully
530 * - RTEMS_INVALID_ADDRESS - invalid task entry point
530 * - RTEMS_INVALID_ADDRESS - invalid task entry point
531 * - RTEMS_INVALID_ID - invalid task id
531 * - RTEMS_INVALID_ID - invalid task id
532 * - RTEMS_INCORRECT_STATE - task not in the dormant state
532 * - RTEMS_INCORRECT_STATE - task not in the dormant state
533 * - RTEMS_ILLEGAL_ON_REMOTE_OBJECT - cannot start remote task
533 * - RTEMS_ILLEGAL_ON_REMOTE_OBJECT - cannot start remote task
534 *
534 *
535 */
535 */
536 // starts all the tasks fot eh flight software
536 // starts all the tasks fot eh flight software
537
537
538 rtems_status_code status;
538 rtems_status_code status;
539
539
540 //**********
540 //**********
541 // SPACEWIRE
541 // SPACEWIRE
542 status = rtems_task_start( Task_id[TASKID_SPIQ], spiq_task, 1 );
542 status = rtems_task_start( Task_id[TASKID_SPIQ], spiq_task, 1 );
543 if (status!=RTEMS_SUCCESSFUL) {
543 if (status!=RTEMS_SUCCESSFUL) {
544 BOOT_PRINTF("in INIT *** Error starting TASK_SPIQ\n")
544 BOOT_PRINTF("in INIT *** Error starting TASK_SPIQ\n")
545 }
545 }
546
546
547 if (status == RTEMS_SUCCESSFUL) // WTDG
547 if (status == RTEMS_SUCCESSFUL) // WTDG
548 {
548 {
549 status = rtems_task_start( Task_id[TASKID_WTDG], wtdg_task, 1 );
549 status = rtems_task_start( Task_id[TASKID_WTDG], wtdg_task, 1 );
550 if (status!=RTEMS_SUCCESSFUL) {
550 if (status!=RTEMS_SUCCESSFUL) {
551 BOOT_PRINTF("in INIT *** Error starting TASK_WTDG\n")
551 BOOT_PRINTF("in INIT *** Error starting TASK_WTDG\n")
552 }
552 }
553 }
553 }
554
554
555 if (status == RTEMS_SUCCESSFUL) // ACTN
555 if (status == RTEMS_SUCCESSFUL) // ACTN
556 {
556 {
557 status = rtems_task_start( Task_id[TASKID_ACTN], actn_task, 1 );
557 status = rtems_task_start( Task_id[TASKID_ACTN], actn_task, 1 );
558 if (status!=RTEMS_SUCCESSFUL) {
558 if (status!=RTEMS_SUCCESSFUL) {
559 BOOT_PRINTF("in INIT *** Error starting TASK_ACTN\n")
559 BOOT_PRINTF("in INIT *** Error starting TASK_ACTN\n")
560 }
560 }
561 }
561 }
562
562
563 //******************
563 //******************
564 // SPECTRAL MATRICES
564 // SPECTRAL MATRICES
565 if (status == RTEMS_SUCCESSFUL) // AVF0
565 if (status == RTEMS_SUCCESSFUL) // AVF0
566 {
566 {
567 status = rtems_task_start( Task_id[TASKID_AVF0], avf0_task, LFR_MODE_STANDBY );
567 status = rtems_task_start( Task_id[TASKID_AVF0], avf0_task, LFR_MODE_STANDBY );
568 if (status!=RTEMS_SUCCESSFUL) {
568 if (status!=RTEMS_SUCCESSFUL) {
569 BOOT_PRINTF("in INIT *** Error starting TASK_AVF0\n")
569 BOOT_PRINTF("in INIT *** Error starting TASK_AVF0\n")
570 }
570 }
571 }
571 }
572 if (status == RTEMS_SUCCESSFUL) // PRC0
572 if (status == RTEMS_SUCCESSFUL) // PRC0
573 {
573 {
574 status = rtems_task_start( Task_id[TASKID_PRC0], prc0_task, LFR_MODE_STANDBY );
574 status = rtems_task_start( Task_id[TASKID_PRC0], prc0_task, LFR_MODE_STANDBY );
575 if (status!=RTEMS_SUCCESSFUL) {
575 if (status!=RTEMS_SUCCESSFUL) {
576 BOOT_PRINTF("in INIT *** Error starting TASK_PRC0\n")
576 BOOT_PRINTF("in INIT *** Error starting TASK_PRC0\n")
577 }
577 }
578 }
578 }
579 if (status == RTEMS_SUCCESSFUL) // AVF1
579 if (status == RTEMS_SUCCESSFUL) // AVF1
580 {
580 {
581 status = rtems_task_start( Task_id[TASKID_AVF1], avf1_task, LFR_MODE_STANDBY );
581 status = rtems_task_start( Task_id[TASKID_AVF1], avf1_task, LFR_MODE_STANDBY );
582 if (status!=RTEMS_SUCCESSFUL) {
582 if (status!=RTEMS_SUCCESSFUL) {
583 BOOT_PRINTF("in INIT *** Error starting TASK_AVF1\n")
583 BOOT_PRINTF("in INIT *** Error starting TASK_AVF1\n")
584 }
584 }
585 }
585 }
586 if (status == RTEMS_SUCCESSFUL) // PRC1
586 if (status == RTEMS_SUCCESSFUL) // PRC1
587 {
587 {
588 status = rtems_task_start( Task_id[TASKID_PRC1], prc1_task, LFR_MODE_STANDBY );
588 status = rtems_task_start( Task_id[TASKID_PRC1], prc1_task, LFR_MODE_STANDBY );
589 if (status!=RTEMS_SUCCESSFUL) {
589 if (status!=RTEMS_SUCCESSFUL) {
590 BOOT_PRINTF("in INIT *** Error starting TASK_PRC1\n")
590 BOOT_PRINTF("in INIT *** Error starting TASK_PRC1\n")
591 }
591 }
592 }
592 }
593 if (status == RTEMS_SUCCESSFUL) // AVF2
593 if (status == RTEMS_SUCCESSFUL) // AVF2
594 {
594 {
595 status = rtems_task_start( Task_id[TASKID_AVF2], avf2_task, 1 );
595 status = rtems_task_start( Task_id[TASKID_AVF2], avf2_task, 1 );
596 if (status!=RTEMS_SUCCESSFUL) {
596 if (status!=RTEMS_SUCCESSFUL) {
597 BOOT_PRINTF("in INIT *** Error starting TASK_AVF2\n")
597 BOOT_PRINTF("in INIT *** Error starting TASK_AVF2\n")
598 }
598 }
599 }
599 }
600 if (status == RTEMS_SUCCESSFUL) // PRC2
600 if (status == RTEMS_SUCCESSFUL) // PRC2
601 {
601 {
602 status = rtems_task_start( Task_id[TASKID_PRC2], prc2_task, 1 );
602 status = rtems_task_start( Task_id[TASKID_PRC2], prc2_task, 1 );
603 if (status!=RTEMS_SUCCESSFUL) {
603 if (status!=RTEMS_SUCCESSFUL) {
604 BOOT_PRINTF("in INIT *** Error starting TASK_PRC2\n")
604 BOOT_PRINTF("in INIT *** Error starting TASK_PRC2\n")
605 }
605 }
606 }
606 }
607
607
608 //****************
608 //****************
609 // WAVEFORM PICKER
609 // WAVEFORM PICKER
610 if (status == RTEMS_SUCCESSFUL) // WFRM
610 if (status == RTEMS_SUCCESSFUL) // WFRM
611 {
611 {
612 status = rtems_task_start( Task_id[TASKID_WFRM], wfrm_task, 1 );
612 status = rtems_task_start( Task_id[TASKID_WFRM], wfrm_task, 1 );
613 if (status!=RTEMS_SUCCESSFUL) {
613 if (status!=RTEMS_SUCCESSFUL) {
614 BOOT_PRINTF("in INIT *** Error starting TASK_WFRM\n")
614 BOOT_PRINTF("in INIT *** Error starting TASK_WFRM\n")
615 }
615 }
616 }
616 }
617 if (status == RTEMS_SUCCESSFUL) // CWF3
617 if (status == RTEMS_SUCCESSFUL) // CWF3
618 {
618 {
619 status = rtems_task_start( Task_id[TASKID_CWF3], cwf3_task, 1 );
619 status = rtems_task_start( Task_id[TASKID_CWF3], cwf3_task, 1 );
620 if (status!=RTEMS_SUCCESSFUL) {
620 if (status!=RTEMS_SUCCESSFUL) {
621 BOOT_PRINTF("in INIT *** Error starting TASK_CWF3\n")
621 BOOT_PRINTF("in INIT *** Error starting TASK_CWF3\n")
622 }
622 }
623 }
623 }
624 if (status == RTEMS_SUCCESSFUL) // CWF2
624 if (status == RTEMS_SUCCESSFUL) // CWF2
625 {
625 {
626 status = rtems_task_start( Task_id[TASKID_CWF2], cwf2_task, 1 );
626 status = rtems_task_start( Task_id[TASKID_CWF2], cwf2_task, 1 );
627 if (status!=RTEMS_SUCCESSFUL) {
627 if (status!=RTEMS_SUCCESSFUL) {
628 BOOT_PRINTF("in INIT *** Error starting TASK_CWF2\n")
628 BOOT_PRINTF("in INIT *** Error starting TASK_CWF2\n")
629 }
629 }
630 }
630 }
631 if (status == RTEMS_SUCCESSFUL) // CWF1
631 if (status == RTEMS_SUCCESSFUL) // CWF1
632 {
632 {
633 status = rtems_task_start( Task_id[TASKID_CWF1], cwf1_task, 1 );
633 status = rtems_task_start( Task_id[TASKID_CWF1], cwf1_task, 1 );
634 if (status!=RTEMS_SUCCESSFUL) {
634 if (status!=RTEMS_SUCCESSFUL) {
635 BOOT_PRINTF("in INIT *** Error starting TASK_CWF1\n")
635 BOOT_PRINTF("in INIT *** Error starting TASK_CWF1\n")
636 }
636 }
637 }
637 }
638 if (status == RTEMS_SUCCESSFUL) // SWBD
638 if (status == RTEMS_SUCCESSFUL) // SWBD
639 {
639 {
640 status = rtems_task_start( Task_id[TASKID_SWBD], swbd_task, 1 );
640 status = rtems_task_start( Task_id[TASKID_SWBD], swbd_task, 1 );
641 if (status!=RTEMS_SUCCESSFUL) {
641 if (status!=RTEMS_SUCCESSFUL) {
642 BOOT_PRINTF("in INIT *** Error starting TASK_SWBD\n")
642 BOOT_PRINTF("in INIT *** Error starting TASK_SWBD\n")
643 }
643 }
644 }
644 }
645
645
646 //*****
646 //*****
647 // MISC
647 // MISC
648 if (status == RTEMS_SUCCESSFUL) // HOUS
648 if (status == RTEMS_SUCCESSFUL) // HOUS
649 {
649 {
650 status = rtems_task_start( Task_id[TASKID_HOUS], hous_task, 1 );
650 status = rtems_task_start( Task_id[TASKID_HOUS], hous_task, 1 );
651 if (status!=RTEMS_SUCCESSFUL) {
651 if (status!=RTEMS_SUCCESSFUL) {
652 BOOT_PRINTF("in INIT *** Error starting TASK_HOUS\n")
652 BOOT_PRINTF("in INIT *** Error starting TASK_HOUS\n")
653 }
653 }
654 }
654 }
655 if (status == RTEMS_SUCCESSFUL) // DUMB
655 if (status == RTEMS_SUCCESSFUL) // DUMB
656 {
656 {
657 status = rtems_task_start( Task_id[TASKID_DUMB], dumb_task, 1 );
657 status = rtems_task_start( Task_id[TASKID_DUMB], dumb_task, 1 );
658 if (status!=RTEMS_SUCCESSFUL) {
658 if (status!=RTEMS_SUCCESSFUL) {
659 BOOT_PRINTF("in INIT *** Error starting TASK_DUMB\n")
659 BOOT_PRINTF("in INIT *** Error starting TASK_DUMB\n")
660 }
660 }
661 }
661 }
662 if (status == RTEMS_SUCCESSFUL) // STAT
662 if (status == RTEMS_SUCCESSFUL) // STAT
663 {
663 {
664 status = rtems_task_start( Task_id[TASKID_STAT], stat_task, 1 );
664 status = rtems_task_start( Task_id[TASKID_STAT], stat_task, 1 );
665 if (status!=RTEMS_SUCCESSFUL) {
665 if (status!=RTEMS_SUCCESSFUL) {
666 BOOT_PRINTF("in INIT *** Error starting TASK_STAT\n")
666 BOOT_PRINTF("in INIT *** Error starting TASK_STAT\n")
667 }
667 }
668 }
668 }
669
669
670 return status;
670 return status;
671 }
671 }
672
672
673 rtems_status_code create_message_queues( void ) // create the two message queues used in the software
673 rtems_status_code create_message_queues( void ) // create the two message queues used in the software
674 {
674 {
675 rtems_status_code status_recv;
675 rtems_status_code status_recv;
676 rtems_status_code status_send;
676 rtems_status_code status_send;
677 rtems_status_code status_q_p0;
677 rtems_status_code status_q_p0;
678 rtems_status_code status_q_p1;
678 rtems_status_code status_q_p1;
679 rtems_status_code status_q_p2;
679 rtems_status_code status_q_p2;
680 rtems_status_code ret;
680 rtems_status_code ret;
681 rtems_id queue_id;
681 rtems_id queue_id;
682
682
683 //****************************************
683 //****************************************
684 // create the queue for handling valid TCs
684 // create the queue for handling valid TCs
685 status_recv = rtems_message_queue_create( misc_name[QUEUE_RECV],
685 status_recv = rtems_message_queue_create( misc_name[QUEUE_RECV],
686 MSG_QUEUE_COUNT_RECV, CCSDS_TC_PKT_MAX_SIZE,
686 MSG_QUEUE_COUNT_RECV, CCSDS_TC_PKT_MAX_SIZE,
687 RTEMS_FIFO | RTEMS_LOCAL, &queue_id );
687 RTEMS_FIFO | RTEMS_LOCAL, &queue_id );
688 if ( status_recv != RTEMS_SUCCESSFUL ) {
688 if ( status_recv != RTEMS_SUCCESSFUL ) {
689 PRINTF1("in create_message_queues *** ERR creating QUEU queue, %d\n", status_recv)
689 PRINTF1("in create_message_queues *** ERR creating QUEU queue, %d\n", status_recv)
690 }
690 }
691
691
692 //************************************************
692 //************************************************
693 // create the queue for handling TM packet sending
693 // create the queue for handling TM packet sending
694 status_send = rtems_message_queue_create( misc_name[QUEUE_SEND],
694 status_send = rtems_message_queue_create( misc_name[QUEUE_SEND],
695 MSG_QUEUE_COUNT_SEND, MSG_QUEUE_SIZE_SEND,
695 MSG_QUEUE_COUNT_SEND, MSG_QUEUE_SIZE_SEND,
696 RTEMS_FIFO | RTEMS_LOCAL, &queue_id );
696 RTEMS_FIFO | RTEMS_LOCAL, &queue_id );
697 if ( status_send != RTEMS_SUCCESSFUL ) {
697 if ( status_send != RTEMS_SUCCESSFUL ) {
698 PRINTF1("in create_message_queues *** ERR creating PKTS queue, %d\n", status_send)
698 PRINTF1("in create_message_queues *** ERR creating PKTS queue, %d\n", status_send)
699 }
699 }
700
700
701 //*****************************************************************************
701 //*****************************************************************************
702 // create the queue for handling averaged spectral matrices for processing @ f0
702 // create the queue for handling averaged spectral matrices for processing @ f0
703 status_q_p0 = rtems_message_queue_create( misc_name[QUEUE_PRC0],
703 status_q_p0 = rtems_message_queue_create( misc_name[QUEUE_PRC0],
704 MSG_QUEUE_COUNT_PRC0, MSG_QUEUE_SIZE_PRC0,
704 MSG_QUEUE_COUNT_PRC0, MSG_QUEUE_SIZE_PRC0,
705 RTEMS_FIFO | RTEMS_LOCAL, &queue_id );
705 RTEMS_FIFO | RTEMS_LOCAL, &queue_id );
706 if ( status_q_p0 != RTEMS_SUCCESSFUL ) {
706 if ( status_q_p0 != RTEMS_SUCCESSFUL ) {
707 PRINTF1("in create_message_queues *** ERR creating Q_P0 queue, %d\n", status_q_p0)
707 PRINTF1("in create_message_queues *** ERR creating Q_P0 queue, %d\n", status_q_p0)
708 }
708 }
709
709
710 //*****************************************************************************
710 //*****************************************************************************
711 // create the queue for handling averaged spectral matrices for processing @ f1
711 // create the queue for handling averaged spectral matrices for processing @ f1
712 status_q_p1 = rtems_message_queue_create( misc_name[QUEUE_PRC1],
712 status_q_p1 = rtems_message_queue_create( misc_name[QUEUE_PRC1],
713 MSG_QUEUE_COUNT_PRC1, MSG_QUEUE_SIZE_PRC1,
713 MSG_QUEUE_COUNT_PRC1, MSG_QUEUE_SIZE_PRC1,
714 RTEMS_FIFO | RTEMS_LOCAL, &queue_id );
714 RTEMS_FIFO | RTEMS_LOCAL, &queue_id );
715 if ( status_q_p1 != RTEMS_SUCCESSFUL ) {
715 if ( status_q_p1 != RTEMS_SUCCESSFUL ) {
716 PRINTF1("in create_message_queues *** ERR creating Q_P1 queue, %d\n", status_q_p1)
716 PRINTF1("in create_message_queues *** ERR creating Q_P1 queue, %d\n", status_q_p1)
717 }
717 }
718
718
719 //*****************************************************************************
719 //*****************************************************************************
720 // create the queue for handling averaged spectral matrices for processing @ f2
720 // create the queue for handling averaged spectral matrices for processing @ f2
721 status_q_p2 = rtems_message_queue_create( misc_name[QUEUE_PRC2],
721 status_q_p2 = rtems_message_queue_create( misc_name[QUEUE_PRC2],
722 MSG_QUEUE_COUNT_PRC2, MSG_QUEUE_SIZE_PRC2,
722 MSG_QUEUE_COUNT_PRC2, MSG_QUEUE_SIZE_PRC2,
723 RTEMS_FIFO | RTEMS_LOCAL, &queue_id );
723 RTEMS_FIFO | RTEMS_LOCAL, &queue_id );
724 if ( status_q_p2 != RTEMS_SUCCESSFUL ) {
724 if ( status_q_p2 != RTEMS_SUCCESSFUL ) {
725 PRINTF1("in create_message_queues *** ERR creating Q_P2 queue, %d\n", status_q_p2)
725 PRINTF1("in create_message_queues *** ERR creating Q_P2 queue, %d\n", status_q_p2)
726 }
726 }
727
727
728 if ( status_recv != RTEMS_SUCCESSFUL )
728 if ( status_recv != RTEMS_SUCCESSFUL )
729 {
729 {
730 ret = status_recv;
730 ret = status_recv;
731 }
731 }
732 else if( status_send != RTEMS_SUCCESSFUL )
732 else if( status_send != RTEMS_SUCCESSFUL )
733 {
733 {
734 ret = status_send;
734 ret = status_send;
735 }
735 }
736 else if( status_q_p0 != RTEMS_SUCCESSFUL )
736 else if( status_q_p0 != RTEMS_SUCCESSFUL )
737 {
737 {
738 ret = status_q_p0;
738 ret = status_q_p0;
739 }
739 }
740 else if( status_q_p1 != RTEMS_SUCCESSFUL )
740 else if( status_q_p1 != RTEMS_SUCCESSFUL )
741 {
741 {
742 ret = status_q_p1;
742 ret = status_q_p1;
743 }
743 }
744 else
744 else
745 {
745 {
746 ret = status_q_p2;
746 ret = status_q_p2;
747 }
747 }
748
748
749 return ret;
749 return ret;
750 }
750 }
751
751
752 rtems_status_code get_message_queue_id_send( rtems_id *queue_id )
752 rtems_status_code get_message_queue_id_send( rtems_id *queue_id )
753 {
753 {
754 rtems_status_code status;
754 rtems_status_code status;
755 rtems_name queue_name;
755 rtems_name queue_name;
756
756
757 queue_name = rtems_build_name( 'Q', '_', 'S', 'D' );
757 queue_name = rtems_build_name( 'Q', '_', 'S', 'D' );
758
758
759 status = rtems_message_queue_ident( queue_name, 0, queue_id );
759 status = rtems_message_queue_ident( queue_name, 0, queue_id );
760
760
761 return status;
761 return status;
762 }
762 }
763
763
764 rtems_status_code get_message_queue_id_recv( rtems_id *queue_id )
764 rtems_status_code get_message_queue_id_recv( rtems_id *queue_id )
765 {
765 {
766 rtems_status_code status;
766 rtems_status_code status;
767 rtems_name queue_name;
767 rtems_name queue_name;
768
768
769 queue_name = rtems_build_name( 'Q', '_', 'R', 'V' );
769 queue_name = rtems_build_name( 'Q', '_', 'R', 'V' );
770
770
771 status = rtems_message_queue_ident( queue_name, 0, queue_id );
771 status = rtems_message_queue_ident( queue_name, 0, queue_id );
772
772
773 return status;
773 return status;
774 }
774 }
775
775
776 rtems_status_code get_message_queue_id_prc0( rtems_id *queue_id )
776 rtems_status_code get_message_queue_id_prc0( rtems_id *queue_id )
777 {
777 {
778 rtems_status_code status;
778 rtems_status_code status;
779 rtems_name queue_name;
779 rtems_name queue_name;
780
780
781 queue_name = rtems_build_name( 'Q', '_', 'P', '0' );
781 queue_name = rtems_build_name( 'Q', '_', 'P', '0' );
782
782
783 status = rtems_message_queue_ident( queue_name, 0, queue_id );
783 status = rtems_message_queue_ident( queue_name, 0, queue_id );
784
784
785 return status;
785 return status;
786 }
786 }
787
787
788 rtems_status_code get_message_queue_id_prc1( rtems_id *queue_id )
788 rtems_status_code get_message_queue_id_prc1( rtems_id *queue_id )
789 {
789 {
790 rtems_status_code status;
790 rtems_status_code status;
791 rtems_name queue_name;
791 rtems_name queue_name;
792
792
793 queue_name = rtems_build_name( 'Q', '_', 'P', '1' );
793 queue_name = rtems_build_name( 'Q', '_', 'P', '1' );
794
794
795 status = rtems_message_queue_ident( queue_name, 0, queue_id );
795 status = rtems_message_queue_ident( queue_name, 0, queue_id );
796
796
797 return status;
797 return status;
798 }
798 }
799
799
800 rtems_status_code get_message_queue_id_prc2( rtems_id *queue_id )
800 rtems_status_code get_message_queue_id_prc2( rtems_id *queue_id )
801 {
801 {
802 rtems_status_code status;
802 rtems_status_code status;
803 rtems_name queue_name;
803 rtems_name queue_name;
804
804
805 queue_name = rtems_build_name( 'Q', '_', 'P', '2' );
805 queue_name = rtems_build_name( 'Q', '_', 'P', '2' );
806
806
807 status = rtems_message_queue_ident( queue_name, 0, queue_id );
807 status = rtems_message_queue_ident( queue_name, 0, queue_id );
808
808
809 return status;
809 return status;
810 }
810 }
Show file before | Show file after | Hide comments
@@ -1,487 +1,506
1 /** General usage functions and RTEMS tasks.
1 /** General usage functions and RTEMS tasks.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 */
6 */
7
7
8 #include "fsw_misc.h"
8 #include "fsw_misc.h"
9
9
10 void configure_timer(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider,
10 void configure_timer(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider,
11 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
11 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
12 {
12 {
13 /** This function configures a GPTIMER timer instantiated in the VHDL design.
13 /** This function configures a GPTIMER timer instantiated in the VHDL design.
14 *
14 *
15 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
15 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
16 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
16 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
17 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
17 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
18 * @param interrupt_level is the interrupt level that the timer drives.
18 * @param interrupt_level is the interrupt level that the timer drives.
19 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
19 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
20 *
20 *
21 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
21 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
22 *
22 *
23 */
23 */
24
24
25 rtems_status_code status;
25 rtems_status_code status;
26 rtems_isr_entry old_isr_handler;
26 rtems_isr_entry old_isr_handler;
27
27
28 gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register
28 gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register
29
29
30 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
30 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
31 if (status!=RTEMS_SUCCESSFUL)
31 if (status!=RTEMS_SUCCESSFUL)
32 {
32 {
33 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
33 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
34 }
34 }
35
35
36 timer_set_clock_divider( gptimer_regs, timer, clock_divider);
36 timer_set_clock_divider( gptimer_regs, timer, clock_divider);
37 }
37 }
38
38
39 void timer_start(gptimer_regs_t *gptimer_regs, unsigned char timer)
39 void timer_start(gptimer_regs_t *gptimer_regs, unsigned char timer)
40 {
40 {
41 /** This function starts a GPTIMER timer.
41 /** This function starts a GPTIMER timer.
42 *
42 *
43 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
43 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
44 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
44 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
45 *
45 *
46 */
46 */
47
47
48 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
48 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
49 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register
49 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register
50 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer
50 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer
51 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart
51 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart
52 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable
52 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable
53 }
53 }
54
54
55 void timer_stop(gptimer_regs_t *gptimer_regs, unsigned char timer)
55 void timer_stop(gptimer_regs_t *gptimer_regs, unsigned char timer)
56 {
56 {
57 /** This function stops a GPTIMER timer.
57 /** This function stops a GPTIMER timer.
58 *
58 *
59 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
59 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
60 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
60 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
61 *
61 *
62 */
62 */
63
63
64 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer
64 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer
65 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable
65 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable
66 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
66 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
67 }
67 }
68
68
69 void timer_set_clock_divider(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider)
69 void timer_set_clock_divider(gptimer_regs_t *gptimer_regs, unsigned char timer, unsigned int clock_divider)
70 {
70 {
71 /** This function sets the clock divider of a GPTIMER timer.
71 /** This function sets the clock divider of a GPTIMER timer.
72 *
72 *
73 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
73 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
74 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
74 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
75 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
75 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
76 *
76 *
77 */
77 */
78
78
79 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
79 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
80 }
80 }
81
81
82 int send_console_outputs_on_apbuart_port( void ) // Send the console outputs on the apbuart port
82 int send_console_outputs_on_apbuart_port( void ) // Send the console outputs on the apbuart port
83 {
83 {
84 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
84 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
85
85
86 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
86 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
87
87
88 return 0;
88 return 0;
89 }
89 }
90
90
91 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
91 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
92 {
92 {
93 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
93 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
94
94
95 apbuart_regs->ctrl = apbuart_regs->ctrl | APBUART_CTRL_REG_MASK_TE;
95 apbuart_regs->ctrl = apbuart_regs->ctrl | APBUART_CTRL_REG_MASK_TE;
96
96
97 return 0;
97 return 0;
98 }
98 }
99
99
100 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
100 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
101 {
101 {
102 /** This function sets the scaler reload register of the apbuart module
102 /** This function sets the scaler reload register of the apbuart module
103 *
103 *
104 * @param regs is the address of the apbuart registers in memory
104 * @param regs is the address of the apbuart registers in memory
105 * @param value is the value that will be stored in the scaler register
105 * @param value is the value that will be stored in the scaler register
106 *
106 *
107 * The value shall be set by the software to get data on the serial interface.
107 * The value shall be set by the software to get data on the serial interface.
108 *
108 *
109 */
109 */
110
110
111 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
111 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
112
112
113 apbuart_regs->scaler = value;
113 apbuart_regs->scaler = value;
114 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
114 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
115 }
115 }
116
116
117 //************
117 //************
118 // RTEMS TASKS
118 // RTEMS TASKS
119
119
120 rtems_task stat_task(rtems_task_argument argument)
120 rtems_task stat_task(rtems_task_argument argument)
121 {
121 {
122 int i;
122 int i;
123 int j;
123 int j;
124 i = 0;
124 i = 0;
125 j = 0;
125 j = 0;
126 BOOT_PRINTF("in STAT *** \n")
126 BOOT_PRINTF("in STAT *** \n")
127 while(1){
127 while(1){
128 rtems_task_wake_after(1000);
128 rtems_task_wake_after(1000);
129 PRINTF1("%d\n", j)
129 PRINTF1("%d\n", j)
130 if (i == CPU_USAGE_REPORT_PERIOD) {
130 if (i == CPU_USAGE_REPORT_PERIOD) {
131 // #ifdef PRINT_TASK_STATISTICS
131 // #ifdef PRINT_TASK_STATISTICS
132 // rtems_cpu_usage_report();
132 // rtems_cpu_usage_report();
133 // rtems_cpu_usage_reset();
133 // rtems_cpu_usage_reset();
134 // #endif
134 // #endif
135 i = 0;
135 i = 0;
136 }
136 }
137 else i++;
137 else i++;
138 j++;
138 j++;
139 }
139 }
140 }
140 }
141
141
142 rtems_task hous_task(rtems_task_argument argument)
142 rtems_task hous_task(rtems_task_argument argument)
143 {
143 {
144 rtems_status_code status;
144 rtems_status_code status;
145 rtems_status_code spare_status;
145 rtems_status_code spare_status;
146 rtems_id queue_id;
146 rtems_id queue_id;
147 rtems_rate_monotonic_period_status period_status;
147 rtems_rate_monotonic_period_status period_status;
148
148
149 status = get_message_queue_id_send( &queue_id );
149 status = get_message_queue_id_send( &queue_id );
150 if (status != RTEMS_SUCCESSFUL)
150 if (status != RTEMS_SUCCESSFUL)
151 {
151 {
152 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
152 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
153 }
153 }
154
154
155 BOOT_PRINTF("in HOUS ***\n")
155 BOOT_PRINTF("in HOUS ***\n")
156
156
157 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
157 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
158 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
158 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
159 if( status != RTEMS_SUCCESSFUL ) {
159 if( status != RTEMS_SUCCESSFUL ) {
160 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status )
160 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status )
161 }
161 }
162 }
162 }
163
163
164 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
164 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
165 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
165 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
166 housekeeping_packet.reserved = DEFAULT_RESERVED;
166 housekeeping_packet.reserved = DEFAULT_RESERVED;
167 housekeeping_packet.userApplication = CCSDS_USER_APP;
167 housekeeping_packet.userApplication = CCSDS_USER_APP;
168 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
168 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
169 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
169 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
170 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
170 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
171 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
171 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
172 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
172 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
173 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
173 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
174 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
174 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
175 housekeeping_packet.serviceType = TM_TYPE_HK;
175 housekeeping_packet.serviceType = TM_TYPE_HK;
176 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
176 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
177 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
177 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
178 housekeeping_packet.sid = SID_HK;
178 housekeeping_packet.sid = SID_HK;
179
179
180 status = rtems_rate_monotonic_cancel(HK_id);
180 status = rtems_rate_monotonic_cancel(HK_id);
181 if( status != RTEMS_SUCCESSFUL ) {
181 if( status != RTEMS_SUCCESSFUL ) {
182 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status )
182 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status )
183 }
183 }
184 else {
184 else {
185 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n")
185 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n")
186 }
186 }
187
187
188 // startup phase
188 // startup phase
189 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
189 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
190 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
190 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
191 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
191 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
192 while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
192 while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
193 {
193 {
194 if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization
194 if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization
195 {
195 {
196 break; // break if LFR is synchronized
196 break; // break if LFR is synchronized
197 }
197 }
198 else
198 else
199 {
199 {
200 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
200 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
201 // sched_yield();
201 // sched_yield();
202 status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms
202 status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms
203 }
203 }
204 }
204 }
205 status = rtems_rate_monotonic_cancel(HK_id);
205 status = rtems_rate_monotonic_cancel(HK_id);
206 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
206 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
207
207
208 while(1){ // launch the rate monotonic task
208 while(1){ // launch the rate monotonic task
209 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
209 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
210 if ( status != RTEMS_SUCCESSFUL ) {
210 if ( status != RTEMS_SUCCESSFUL ) {
211 PRINTF1( "in HOUS *** ERR period: %d\n", status);
211 PRINTF1( "in HOUS *** ERR period: %d\n", status);
212 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
212 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
213 }
213 }
214 else {
214 else {
215 housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8);
215 housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8);
216 housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK );
216 housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK );
217 increment_seq_counter( &sequenceCounterHK );
217 increment_seq_counter( &sequenceCounterHK );
218
218
219 housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
219 housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
220 housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
220 housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
221 housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
221 housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
222 housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
222 housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
223 housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
223 housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
224 housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
224 housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
225
225
226 spacewire_update_statistics();
226 spacewire_update_statistics();
227
227
228 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
228 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
229 get_temperatures( housekeeping_packet.hk_lfr_temp_scm);
229 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
230 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
230
231
231 // SEND PACKET
232 // SEND PACKET
232 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
233 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
233 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
234 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
234 if (status != RTEMS_SUCCESSFUL) {
235 if (status != RTEMS_SUCCESSFUL) {
235 PRINTF1("in HOUS *** ERR send: %d\n", status)
236 PRINTF1("in HOUS *** ERR send: %d\n", status)
236 }
237 }
237 }
238 }
238 }
239 }
239
240
240 PRINTF("in HOUS *** deleting task\n")
241 PRINTF("in HOUS *** deleting task\n")
241
242
242 status = rtems_task_delete( RTEMS_SELF ); // should not return
243 status = rtems_task_delete( RTEMS_SELF ); // should not return
243 printf( "rtems_task_delete returned with status of %d.\n", status );
244 printf( "rtems_task_delete returned with status of %d.\n", status );
244 return;
245 return;
245 }
246 }
246
247
247 rtems_task dumb_task( rtems_task_argument unused )
248 rtems_task dumb_task( rtems_task_argument unused )
248 {
249 {
249 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
250 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
250 *
251 *
251 * @param unused is the starting argument of the RTEMS task
252 * @param unused is the starting argument of the RTEMS task
252 *
253 *
253 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
254 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
254 *
255 *
255 */
256 */
256
257
257 unsigned int i;
258 unsigned int i;
258 unsigned int intEventOut;
259 unsigned int intEventOut;
259 unsigned int coarse_time = 0;
260 unsigned int coarse_time = 0;
260 unsigned int fine_time = 0;
261 unsigned int fine_time = 0;
261 rtems_event_set event_out;
262 rtems_event_set event_out;
262
263
263 char *DumbMessages[12] = {"in DUMB *** default", // RTEMS_EVENT_0
264 char *DumbMessages[12] = {"in DUMB *** default", // RTEMS_EVENT_0
264 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
265 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
265 "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2
266 "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2
266 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
267 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
267 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
268 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
268 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
269 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
269 "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6
270 "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6
270 "ready for dump", // RTEMS_EVENT_7
271 "ready for dump", // RTEMS_EVENT_7
271 "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8
272 "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8
272 "tick", // RTEMS_EVENT_9
273 "tick", // RTEMS_EVENT_9
273 "VHDL ERR *** waveform picker", // RTEMS_EVENT_10
274 "VHDL ERR *** waveform picker", // RTEMS_EVENT_10
274 "VHDL ERR *** unexpected ready matrix values" // RTEMS_EVENT_11
275 "VHDL ERR *** unexpected ready matrix values" // RTEMS_EVENT_11
275 };
276 };
276
277
277 BOOT_PRINTF("in DUMB *** \n")
278 BOOT_PRINTF("in DUMB *** \n")
278
279
279 while(1){
280 while(1){
280 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
281 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
281 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
282 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
282 | RTEMS_EVENT_8 | RTEMS_EVENT_9,
283 | RTEMS_EVENT_8 | RTEMS_EVENT_9,
283 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
284 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
284 intEventOut = (unsigned int) event_out;
285 intEventOut = (unsigned int) event_out;
285 for ( i=0; i<32; i++)
286 for ( i=0; i<32; i++)
286 {
287 {
287 if ( ((intEventOut >> i) & 0x0001) != 0)
288 if ( ((intEventOut >> i) & 0x0001) != 0)
288 {
289 {
289 coarse_time = time_management_regs->coarse_time;
290 coarse_time = time_management_regs->coarse_time;
290 fine_time = time_management_regs->fine_time;
291 fine_time = time_management_regs->fine_time;
291 printf("in DUMB *** coarse: %x, fine: %x, %s\n", coarse_time, fine_time, DumbMessages[i]);
292 printf("in DUMB *** coarse: %x, fine: %x, %s\n", coarse_time, fine_time, DumbMessages[i]);
292 if (i==8)
293 if (i==8)
293 {
294 {
294 }
295 }
295 if (i==10)
296 if (i==10)
296 {
297 {
297 }
298 }
298 }
299 }
299 }
300 }
300 }
301 }
301 }
302 }
302
303
303 //*****************************
304 //*****************************
304 // init housekeeping parameters
305 // init housekeeping parameters
305
306
306 void init_housekeeping_parameters( void )
307 void init_housekeeping_parameters( void )
307 {
308 {
308 /** This function initialize the housekeeping_packet global variable with default values.
309 /** This function initialize the housekeeping_packet global variable with default values.
309 *
310 *
310 */
311 */
311
312
312 unsigned int i = 0;
313 unsigned int i = 0;
313 unsigned char *parameters;
314 unsigned char *parameters;
314
315
315 parameters = (unsigned char*) &housekeeping_packet.lfr_status_word;
316 parameters = (unsigned char*) &housekeeping_packet.lfr_status_word;
316 for(i = 0; i< SIZE_HK_PARAMETERS; i++)
317 for(i = 0; i< SIZE_HK_PARAMETERS; i++)
317 {
318 {
318 parameters[i] = 0x00;
319 parameters[i] = 0x00;
319 }
320 }
320 // init status word
321 // init status word
321 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
322 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
322 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
323 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
323 // init software version
324 // init software version
324 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
325 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
325 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
326 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
326 housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3;
327 housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3;
327 housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4;
328 housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4;
328 // init fpga version
329 // init fpga version
329 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
330 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
330 housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1
331 housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1
331 housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2
332 housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2
332 housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3
333 housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3
333 }
334 }
334
335
335 void increment_seq_counter( unsigned short *packetSequenceControl )
336 void increment_seq_counter( unsigned short *packetSequenceControl )
336 {
337 {
337 /** This function increment the sequence counter psased in argument.
338 /** This function increment the sequence counter psased in argument.
338 *
339 *
339 * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0.
340 * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0.
340 *
341 *
341 */
342 */
342
343
343 unsigned short segmentation_grouping_flag;
344 unsigned short segmentation_grouping_flag;
344 unsigned short sequence_cnt;
345 unsigned short sequence_cnt;
345
346
346 segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << 8; // keep bits 7 downto 6
347 segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << 8; // keep bits 7 downto 6
347 sequence_cnt = (*packetSequenceControl) & 0x3fff; // [0011 1111 1111 1111]
348 sequence_cnt = (*packetSequenceControl) & 0x3fff; // [0011 1111 1111 1111]
348
349
349 if ( sequence_cnt < SEQ_CNT_MAX)
350 if ( sequence_cnt < SEQ_CNT_MAX)
350 {
351 {
351 sequence_cnt = sequence_cnt + 1;
352 sequence_cnt = sequence_cnt + 1;
352 }
353 }
353 else
354 else
354 {
355 {
355 sequence_cnt = 0;
356 sequence_cnt = 0;
356 }
357 }
357
358
358 *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ;
359 *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ;
359 }
360 }
360
361
361 void getTime( unsigned char *time)
362 void getTime( unsigned char *time)
362 {
363 {
363 /** This function write the current local time in the time buffer passed in argument.
364 /** This function write the current local time in the time buffer passed in argument.
364 *
365 *
365 */
366 */
366
367
367 time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
368 time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
368 time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
369 time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
369 time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
370 time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
370 time[3] = (unsigned char) (time_management_regs->coarse_time);
371 time[3] = (unsigned char) (time_management_regs->coarse_time);
371 time[4] = (unsigned char) (time_management_regs->fine_time>>8);
372 time[4] = (unsigned char) (time_management_regs->fine_time>>8);
372 time[5] = (unsigned char) (time_management_regs->fine_time);
373 time[5] = (unsigned char) (time_management_regs->fine_time);
373 }
374 }
374
375
375 unsigned long long int getTimeAsUnsignedLongLongInt( )
376 unsigned long long int getTimeAsUnsignedLongLongInt( )
376 {
377 {
377 /** This function write the current local time in the time buffer passed in argument.
378 /** This function write the current local time in the time buffer passed in argument.
378 *
379 *
379 */
380 */
380 unsigned long long int time;
381 unsigned long long int time;
381
382
382 time = ( (unsigned long long int) (time_management_regs->coarse_time & 0x7fffffff) << 16 )
383 time = ( (unsigned long long int) (time_management_regs->coarse_time & 0x7fffffff) << 16 )
383 + time_management_regs->fine_time;
384 + time_management_regs->fine_time;
384
385
385 return time;
386 return time;
386 }
387 }
387
388
388 void send_dumb_hk( void )
389 void send_dumb_hk( void )
389 {
390 {
390 Packet_TM_LFR_HK_t dummy_hk_packet;
391 Packet_TM_LFR_HK_t dummy_hk_packet;
391 unsigned char *parameters;
392 unsigned char *parameters;
392 unsigned int i;
393 unsigned int i;
393 rtems_id queue_id;
394 rtems_id queue_id;
394
395
395 dummy_hk_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
396 dummy_hk_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
396 dummy_hk_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
397 dummy_hk_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
397 dummy_hk_packet.reserved = DEFAULT_RESERVED;
398 dummy_hk_packet.reserved = DEFAULT_RESERVED;
398 dummy_hk_packet.userApplication = CCSDS_USER_APP;
399 dummy_hk_packet.userApplication = CCSDS_USER_APP;
399 dummy_hk_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
400 dummy_hk_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
400 dummy_hk_packet.packetID[1] = (unsigned char) (APID_TM_HK);
401 dummy_hk_packet.packetID[1] = (unsigned char) (APID_TM_HK);
401 dummy_hk_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
402 dummy_hk_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
402 dummy_hk_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
403 dummy_hk_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
403 dummy_hk_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
404 dummy_hk_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
404 dummy_hk_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
405 dummy_hk_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
405 dummy_hk_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
406 dummy_hk_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
406 dummy_hk_packet.serviceType = TM_TYPE_HK;
407 dummy_hk_packet.serviceType = TM_TYPE_HK;
407 dummy_hk_packet.serviceSubType = TM_SUBTYPE_HK;
408 dummy_hk_packet.serviceSubType = TM_SUBTYPE_HK;
408 dummy_hk_packet.destinationID = TM_DESTINATION_ID_GROUND;
409 dummy_hk_packet.destinationID = TM_DESTINATION_ID_GROUND;
409 dummy_hk_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
410 dummy_hk_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
410 dummy_hk_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
411 dummy_hk_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
411 dummy_hk_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
412 dummy_hk_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
412 dummy_hk_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
413 dummy_hk_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
413 dummy_hk_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
414 dummy_hk_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
414 dummy_hk_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
415 dummy_hk_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
415 dummy_hk_packet.sid = SID_HK;
416 dummy_hk_packet.sid = SID_HK;
416
417
417 // init status word
418 // init status word
418 dummy_hk_packet.lfr_status_word[0] = 0xff;
419 dummy_hk_packet.lfr_status_word[0] = 0xff;
419 dummy_hk_packet.lfr_status_word[1] = 0xff;
420 dummy_hk_packet.lfr_status_word[1] = 0xff;
420 // init software version
421 // init software version
421 dummy_hk_packet.lfr_sw_version[0] = SW_VERSION_N1;
422 dummy_hk_packet.lfr_sw_version[0] = SW_VERSION_N1;
422 dummy_hk_packet.lfr_sw_version[1] = SW_VERSION_N2;
423 dummy_hk_packet.lfr_sw_version[1] = SW_VERSION_N2;
423 dummy_hk_packet.lfr_sw_version[2] = SW_VERSION_N3;
424 dummy_hk_packet.lfr_sw_version[2] = SW_VERSION_N3;
424 dummy_hk_packet.lfr_sw_version[3] = SW_VERSION_N4;
425 dummy_hk_packet.lfr_sw_version[3] = SW_VERSION_N4;
425 // init fpga version
426 // init fpga version
426 parameters = (unsigned char *) (REGS_ADDR_WAVEFORM_PICKER + 0xb0);
427 parameters = (unsigned char *) (REGS_ADDR_WAVEFORM_PICKER + 0xb0);
427 dummy_hk_packet.lfr_fpga_version[0] = parameters[1]; // n1
428 dummy_hk_packet.lfr_fpga_version[0] = parameters[1]; // n1
428 dummy_hk_packet.lfr_fpga_version[1] = parameters[2]; // n2
429 dummy_hk_packet.lfr_fpga_version[1] = parameters[2]; // n2
429 dummy_hk_packet.lfr_fpga_version[2] = parameters[3]; // n3
430 dummy_hk_packet.lfr_fpga_version[2] = parameters[3]; // n3
430
431
431 parameters = (unsigned char *) &dummy_hk_packet.hk_lfr_cpu_load;
432 parameters = (unsigned char *) &dummy_hk_packet.hk_lfr_cpu_load;
432
433
433 for (i=0; i<100; i++)
434 for (i=0; i<100; i++)
434 {
435 {
435 parameters[i] = 0xff;
436 parameters[i] = 0xff;
436 }
437 }
437
438
438 get_message_queue_id_send( &queue_id );
439 get_message_queue_id_send( &queue_id );
439
440
440 rtems_message_queue_send( queue_id, &dummy_hk_packet,
441 rtems_message_queue_send( queue_id, &dummy_hk_packet,
441 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
442 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
442 }
443 }
443
444
444 void get_v_e1_e2_f3( unsigned char *spacecraft_potential )
445 void get_v_e1_e2_f3( unsigned char *spacecraft_potential )
445 {
446 {
446 unsigned char* v_ptr;
447 unsigned char* v_ptr;
447 unsigned char* e1_ptr;
448 unsigned char* e1_ptr;
448 unsigned char* e2_ptr;
449 unsigned char* e2_ptr;
449
450
450 v_ptr = (unsigned char *) &waveform_picker_regs->v;
451 v_ptr = (unsigned char *) &waveform_picker_regs->v;
451 e1_ptr = (unsigned char *) &waveform_picker_regs->e1;
452 e1_ptr = (unsigned char *) &waveform_picker_regs->e1;
452 e2_ptr = (unsigned char *) &waveform_picker_regs->e2;
453 e2_ptr = (unsigned char *) &waveform_picker_regs->e2;
453
454
454 spacecraft_potential[0] = v_ptr[2];
455 spacecraft_potential[0] = v_ptr[2];
455 spacecraft_potential[1] = v_ptr[3];
456 spacecraft_potential[1] = v_ptr[3];
456 spacecraft_potential[2] = e1_ptr[2];
457 spacecraft_potential[2] = e1_ptr[2];
457 spacecraft_potential[3] = e1_ptr[3];
458 spacecraft_potential[3] = e1_ptr[3];
458 spacecraft_potential[4] = e2_ptr[2];
459 spacecraft_potential[4] = e2_ptr[2];
459 spacecraft_potential[5] = e2_ptr[3];
460 spacecraft_potential[5] = e2_ptr[3];
460 }
461 }
461
462
463 void get_temperatures( unsigned char *temperatures )
464 {
465 unsigned char* temp_scm_ptr;
466 unsigned char* temp_pcb_ptr;
467 unsigned char* temp_fpga_ptr;
468
469 temp_scm_ptr = (unsigned char *) &time_management_regs->temp_scm;
470 temp_pcb_ptr = (unsigned char *) &time_management_regs->temp_pcb;
471 temp_fpga_ptr = (unsigned char *) &time_management_regs->temp_fpga;
472
473 temperatures[0] = temp_scm_ptr[2];
474 temperatures[1] = temp_scm_ptr[3];
475 temperatures[2] = temp_pcb_ptr[2];
476 temperatures[3] = temp_pcb_ptr[3];
477 temperatures[4] = temp_fpga_ptr[2];
478 temperatures[5] = temp_fpga_ptr[3];
479 }
480
462 void get_cpu_load( unsigned char *resource_statistics )
481 void get_cpu_load( unsigned char *resource_statistics )
463 {
482 {
464 unsigned char cpu_load;
483 unsigned char cpu_load;
465
484
466 cpu_load = lfr_rtems_cpu_usage_report();
485 cpu_load = lfr_rtems_cpu_usage_report();
467
486
468 // HK_LFR_CPU_LOAD
487 // HK_LFR_CPU_LOAD
469 resource_statistics[0] = cpu_load;
488 resource_statistics[0] = cpu_load;
470
489
471 // HK_LFR_CPU_LOAD_MAX
490 // HK_LFR_CPU_LOAD_MAX
472 if (cpu_load > resource_statistics[1])
491 if (cpu_load > resource_statistics[1])
473 {
492 {
474 resource_statistics[1] = cpu_load;
493 resource_statistics[1] = cpu_load;
475 }
494 }
476
495
477 // CPU_LOAD_AVE
496 // CPU_LOAD_AVE
478 resource_statistics[2] = 0;
497 resource_statistics[2] = 0;
479
498
480 #ifndef PRINT_TASK_STATISTICS
499 #ifndef PRINT_TASK_STATISTICS
481 rtems_cpu_usage_reset();
500 rtems_cpu_usage_reset();
482 #endif
501 #endif
483
502
484 }
503 }
485
504
486
505
487
506
Show file before | Show file after | Hide comments
@@ -1,391 +1,397
1 /** Functions related to data processing.
1 /** Functions related to data processing.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 * These function are related to data processing, i.e. spectral matrices averaging and basic parameters computation.
6 * These function are related to data processing, i.e. spectral matrices averaging and basic parameters computation.
7 *
7 *
8 */
8 */
9
9
10 #include "avf0_prc0.h"
10 #include "avf0_prc0.h"
11 #include "fsw_processing.h"
11 #include "fsw_processing.h"
12
12
13 nb_sm_before_bp_asm_f0 nb_sm_before_f0;
13 nb_sm_before_bp_asm_f0 nb_sm_before_f0;
14
14
15 //***
15 //***
16 // F0
16 // F0
17 ring_node_asm asm_ring_norm_f0 [ NB_RING_NODES_ASM_NORM_F0 ];
17 ring_node_asm asm_ring_norm_f0 [ NB_RING_NODES_ASM_NORM_F0 ];
18 ring_node_asm asm_ring_burst_sbm_f0 [ NB_RING_NODES_ASM_BURST_SBM_F0 ];
18 ring_node_asm asm_ring_burst_sbm_f0 [ NB_RING_NODES_ASM_BURST_SBM_F0 ];
19
19
20 ring_node ring_to_send_asm_f0 [ NB_RING_NODES_ASM_F0 ];
20 ring_node ring_to_send_asm_f0 [ NB_RING_NODES_ASM_F0 ];
21 int buffer_asm_f0 [ NB_RING_NODES_ASM_F0 * TOTAL_SIZE_SM ];
21 int buffer_asm_f0 [ NB_RING_NODES_ASM_F0 * TOTAL_SIZE_SM ];
22
22
23 float asm_f0_reorganized [ TOTAL_SIZE_SM ];
23 float asm_f0_patched_norm [ TOTAL_SIZE_SM ];
24 float asm_f0_patched_burst_sbm [ TOTAL_SIZE_SM ];
25 float asm_f0_reorganized [ TOTAL_SIZE_SM ];
26
24 char asm_f0_char [ TIME_OFFSET_IN_BYTES + (TOTAL_SIZE_SM * 2) ];
27 char asm_f0_char [ TIME_OFFSET_IN_BYTES + (TOTAL_SIZE_SM * 2) ];
25 float compressed_sm_norm_f0[ TOTAL_SIZE_COMPRESSED_ASM_NORM_F0];
28 float compressed_sm_norm_f0[ TOTAL_SIZE_COMPRESSED_ASM_NORM_F0];
26 float compressed_sm_sbm_f0 [ TOTAL_SIZE_COMPRESSED_ASM_SBM_F0 ];
29 float compressed_sm_sbm_f0 [ TOTAL_SIZE_COMPRESSED_ASM_SBM_F0 ];
27
30
28 float k_coeff_intercalib_f0_norm[ NB_BINS_COMPRESSED_SM_F0 * NB_K_COEFF_PER_BIN ]; // 11 * 32 = 352
31 float k_coeff_intercalib_f0_norm[ NB_BINS_COMPRESSED_SM_F0 * NB_K_COEFF_PER_BIN ]; // 11 * 32 = 352
29 float k_coeff_intercalib_f0_sbm[ NB_BINS_COMPRESSED_SM_SBM_F0 * NB_K_COEFF_PER_BIN ]; // 22 * 32 = 704
32 float k_coeff_intercalib_f0_sbm[ NB_BINS_COMPRESSED_SM_SBM_F0 * NB_K_COEFF_PER_BIN ]; // 22 * 32 = 704
30
33
31 //************
34 //************
32 // RTEMS TASKS
35 // RTEMS TASKS
33
36
34 rtems_task avf0_task( rtems_task_argument lfrRequestedMode )
37 rtems_task avf0_task( rtems_task_argument lfrRequestedMode )
35 {
38 {
36 int i;
39 int i;
37
40
38 rtems_event_set event_out;
41 rtems_event_set event_out;
39 rtems_status_code status;
42 rtems_status_code status;
40 rtems_id queue_id_prc0;
43 rtems_id queue_id_prc0;
41 asm_msg msgForMATR;
44 asm_msg msgForMATR;
42 ring_node *nodeForAveraging;
45 ring_node *nodeForAveraging;
43 ring_node *ring_node_tab[8];
46 ring_node *ring_node_tab[8];
44 ring_node_asm *current_ring_node_asm_burst_sbm_f0;
47 ring_node_asm *current_ring_node_asm_burst_sbm_f0;
45 ring_node_asm *current_ring_node_asm_norm_f0;
48 ring_node_asm *current_ring_node_asm_norm_f0;
46
49
47 unsigned int nb_norm_bp1;
50 unsigned int nb_norm_bp1;
48 unsigned int nb_norm_bp2;
51 unsigned int nb_norm_bp2;
49 unsigned int nb_norm_asm;
52 unsigned int nb_norm_asm;
50 unsigned int nb_sbm_bp1;
53 unsigned int nb_sbm_bp1;
51 unsigned int nb_sbm_bp2;
54 unsigned int nb_sbm_bp2;
52
55
53 nb_norm_bp1 = 0;
56 nb_norm_bp1 = 0;
54 nb_norm_bp2 = 0;
57 nb_norm_bp2 = 0;
55 nb_norm_asm = 0;
58 nb_norm_asm = 0;
56 nb_sbm_bp1 = 0;
59 nb_sbm_bp1 = 0;
57 nb_sbm_bp2 = 0;
60 nb_sbm_bp2 = 0;
58
61
59 reset_nb_sm_f0( lfrRequestedMode ); // reset the sm counters that drive the BP and ASM computations / transmissions
62 reset_nb_sm_f0( lfrRequestedMode ); // reset the sm counters that drive the BP and ASM computations / transmissions
60 ASM_generic_init_ring( asm_ring_norm_f0, NB_RING_NODES_ASM_NORM_F0 );
63 ASM_generic_init_ring( asm_ring_norm_f0, NB_RING_NODES_ASM_NORM_F0 );
61 ASM_generic_init_ring( asm_ring_burst_sbm_f0, NB_RING_NODES_ASM_BURST_SBM_F0 );
64 ASM_generic_init_ring( asm_ring_burst_sbm_f0, NB_RING_NODES_ASM_BURST_SBM_F0 );
62 current_ring_node_asm_norm_f0 = asm_ring_norm_f0;
65 current_ring_node_asm_norm_f0 = asm_ring_norm_f0;
63 current_ring_node_asm_burst_sbm_f0 = asm_ring_burst_sbm_f0;
66 current_ring_node_asm_burst_sbm_f0 = asm_ring_burst_sbm_f0;
64
67
65 BOOT_PRINTF1("in AVFO *** lfrRequestedMode = %d\n", (int) lfrRequestedMode)
68 BOOT_PRINTF1("in AVFO *** lfrRequestedMode = %d\n", (int) lfrRequestedMode)
66
69
67 status = get_message_queue_id_prc0( &queue_id_prc0 );
70 status = get_message_queue_id_prc0( &queue_id_prc0 );
68 if (status != RTEMS_SUCCESSFUL)
71 if (status != RTEMS_SUCCESSFUL)
69 {
72 {
70 PRINTF1("in MATR *** ERR get_message_queue_id_prc0 %d\n", status)
73 PRINTF1("in MATR *** ERR get_message_queue_id_prc0 %d\n", status)
71 }
74 }
72
75
73 while(1){
76 while(1){
74 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
77 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
75
78
76 //****************************************
79 //****************************************
77 // initialize the mesage for the MATR task
80 // initialize the mesage for the MATR task
78 msgForMATR.norm = current_ring_node_asm_norm_f0;
81 msgForMATR.norm = current_ring_node_asm_norm_f0;
79 msgForMATR.burst_sbm = current_ring_node_asm_burst_sbm_f0;
82 msgForMATR.burst_sbm = current_ring_node_asm_burst_sbm_f0;
80 msgForMATR.event = 0x00; // this composite event will be sent to the PRC0 task
83 msgForMATR.event = 0x00; // this composite event will be sent to the PRC0 task
81 //
84 //
82 //****************************************
85 //****************************************
83
86
84 nodeForAveraging = getRingNodeForAveraging( 0 );
87 nodeForAveraging = getRingNodeForAveraging( 0 );
85
88
86 ring_node_tab[NB_SM_BEFORE_AVF0-1] = nodeForAveraging;
89 ring_node_tab[NB_SM_BEFORE_AVF0-1] = nodeForAveraging;
87 for ( i = 2; i < (NB_SM_BEFORE_AVF0+1); i++ )
90 for ( i = 2; i < (NB_SM_BEFORE_AVF0+1); i++ )
88 {
91 {
89 nodeForAveraging = nodeForAveraging->previous;
92 nodeForAveraging = nodeForAveraging->previous;
90 ring_node_tab[NB_SM_BEFORE_AVF0-i] = nodeForAveraging;
93 ring_node_tab[NB_SM_BEFORE_AVF0-i] = nodeForAveraging;
91 }
94 }
92
95
93 // compute the average and store it in the averaged_sm_f1 buffer
96 // compute the average and store it in the averaged_sm_f1 buffer
94 SM_average( current_ring_node_asm_norm_f0->matrix,
97 SM_average( current_ring_node_asm_norm_f0->matrix,
95 current_ring_node_asm_burst_sbm_f0->matrix,
98 current_ring_node_asm_burst_sbm_f0->matrix,
96 ring_node_tab,
99 ring_node_tab,
97 nb_norm_bp1, nb_sbm_bp1,
100 nb_norm_bp1, nb_sbm_bp1,
98 &msgForMATR );
101 &msgForMATR );
99
102
100 // update nb_average
103 // update nb_average
101 nb_norm_bp1 = nb_norm_bp1 + NB_SM_BEFORE_AVF0;
104 nb_norm_bp1 = nb_norm_bp1 + NB_SM_BEFORE_AVF0;
102 nb_norm_bp2 = nb_norm_bp2 + NB_SM_BEFORE_AVF0;
105 nb_norm_bp2 = nb_norm_bp2 + NB_SM_BEFORE_AVF0;
103 nb_norm_asm = nb_norm_asm + NB_SM_BEFORE_AVF0;
106 nb_norm_asm = nb_norm_asm + NB_SM_BEFORE_AVF0;
104 nb_sbm_bp1 = nb_sbm_bp1 + NB_SM_BEFORE_AVF0;
107 nb_sbm_bp1 = nb_sbm_bp1 + NB_SM_BEFORE_AVF0;
105 nb_sbm_bp2 = nb_sbm_bp2 + NB_SM_BEFORE_AVF0;
108 nb_sbm_bp2 = nb_sbm_bp2 + NB_SM_BEFORE_AVF0;
106
109
107 if (nb_sbm_bp1 == nb_sm_before_f0.burst_sbm_bp1)
110 if (nb_sbm_bp1 == nb_sm_before_f0.burst_sbm_bp1)
108 {
111 {
109 nb_sbm_bp1 = 0;
112 nb_sbm_bp1 = 0;
110 // set another ring for the ASM storage
113 // set another ring for the ASM storage
111 current_ring_node_asm_burst_sbm_f0 = current_ring_node_asm_burst_sbm_f0->next;
114 current_ring_node_asm_burst_sbm_f0 = current_ring_node_asm_burst_sbm_f0->next;
112 if ( lfrCurrentMode == LFR_MODE_BURST )
115 if ( lfrCurrentMode == LFR_MODE_BURST )
113 {
116 {
114 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_BURST_BP1_F0;
117 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_BURST_BP1_F0;
115 }
118 }
116 else if ( (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
119 else if ( (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
117 {
120 {
118 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_SBM_BP1_F0;
121 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_SBM_BP1_F0;
119 }
122 }
120 }
123 }
121
124
122 if (nb_sbm_bp2 == nb_sm_before_f0.burst_sbm_bp2)
125 if (nb_sbm_bp2 == nb_sm_before_f0.burst_sbm_bp2)
123 {
126 {
124 nb_sbm_bp2 = 0;
127 nb_sbm_bp2 = 0;
125 if ( lfrCurrentMode == LFR_MODE_BURST )
128 if ( lfrCurrentMode == LFR_MODE_BURST )
126 {
129 {
127 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_BURST_BP2_F0;
130 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_BURST_BP2_F0;
128 }
131 }
129 else if ( (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
132 else if ( (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
130 {
133 {
131 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_SBM_BP2_F0;
134 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_SBM_BP2_F0;
132 }
135 }
133 }
136 }
134
137
135 if (nb_norm_bp1 == nb_sm_before_f0.norm_bp1)
138 if (nb_norm_bp1 == nb_sm_before_f0.norm_bp1)
136 {
139 {
137 nb_norm_bp1 = 0;
140 nb_norm_bp1 = 0;
138 // set another ring for the ASM storage
141 // set another ring for the ASM storage
139 current_ring_node_asm_norm_f0 = current_ring_node_asm_norm_f0->next;
142 current_ring_node_asm_norm_f0 = current_ring_node_asm_norm_f0->next;
140 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
143 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
141 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
144 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
142 {
145 {
143 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_BP1_F0;
146 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_BP1_F0;
144 }
147 }
145 }
148 }
146
149
147 if (nb_norm_bp2 == nb_sm_before_f0.norm_bp2)
150 if (nb_norm_bp2 == nb_sm_before_f0.norm_bp2)
148 {
151 {
149 nb_norm_bp2 = 0;
152 nb_norm_bp2 = 0;
150 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
153 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
151 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
154 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
152 {
155 {
153 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_BP2_F0;
156 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_BP2_F0;
154 }
157 }
155 }
158 }
156
159
157 if (nb_norm_asm == nb_sm_before_f0.norm_asm)
160 if (nb_norm_asm == nb_sm_before_f0.norm_asm)
158 {
161 {
159 nb_norm_asm = 0;
162 nb_norm_asm = 0;
160 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
163 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
161 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
164 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
162 {
165 {
163 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_ASM_F0;
166 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_ASM_F0;
164 }
167 }
165 }
168 }
166
169
167 //*************************
170 //*************************
168 // send the message to MATR
171 // send the message to MATR
169 if (msgForMATR.event != 0x00)
172 if (msgForMATR.event != 0x00)
170 {
173 {
171 status = rtems_message_queue_send( queue_id_prc0, (char *) &msgForMATR, MSG_QUEUE_SIZE_PRC0);
174 status = rtems_message_queue_send( queue_id_prc0, (char *) &msgForMATR, MSG_QUEUE_SIZE_PRC0);
172 }
175 }
173
176
174 if (status != RTEMS_SUCCESSFUL) {
177 if (status != RTEMS_SUCCESSFUL) {
175 printf("in AVF0 *** Error sending message to MATR, code %d\n", status);
178 printf("in AVF0 *** Error sending message to MATR, code %d\n", status);
176 }
179 }
177 }
180 }
178 }
181 }
179
182
180 rtems_task prc0_task( rtems_task_argument lfrRequestedMode )
183 rtems_task prc0_task( rtems_task_argument lfrRequestedMode )
181 {
184 {
182 char incomingData[MSG_QUEUE_SIZE_SEND]; // incoming data buffer
185 char incomingData[MSG_QUEUE_SIZE_SEND]; // incoming data buffer
183 size_t size; // size of the incoming TC packet
186 size_t size; // size of the incoming TC packet
184 asm_msg *incomingMsg;
187 asm_msg *incomingMsg;
185 //
188 //
186 unsigned char sid;
189 unsigned char sid;
187 rtems_status_code status;
190 rtems_status_code status;
188 rtems_id queue_id;
191 rtems_id queue_id;
189 rtems_id queue_id_q_p0;
192 rtems_id queue_id_q_p0;
190 bp_packet_with_spare packet_norm_bp1;
193 bp_packet_with_spare packet_norm_bp1;
191 bp_packet packet_norm_bp2;
194 bp_packet packet_norm_bp2;
192 bp_packet packet_sbm_bp1;
195 bp_packet packet_sbm_bp1;
193 bp_packet packet_sbm_bp2;
196 bp_packet packet_sbm_bp2;
194 ring_node *current_ring_node_to_send_asm_f0;
197 ring_node *current_ring_node_to_send_asm_f0;
195
198
196 // init the ring of the averaged spectral matrices which will be transmitted to the DPU
199 // init the ring of the averaged spectral matrices which will be transmitted to the DPU
197 init_ring( ring_to_send_asm_f0, NB_RING_NODES_ASM_F0, (volatile int*) buffer_asm_f0, TOTAL_SIZE_SM );
200 init_ring( ring_to_send_asm_f0, NB_RING_NODES_ASM_F0, (volatile int*) buffer_asm_f0, TOTAL_SIZE_SM );
198 current_ring_node_to_send_asm_f0 = ring_to_send_asm_f0;
201 current_ring_node_to_send_asm_f0 = ring_to_send_asm_f0;
199
202
200 //*************
203 //*************
201 // NORM headers
204 // NORM headers
202 BP_init_header_with_spare( &packet_norm_bp1,
205 BP_init_header_with_spare( &packet_norm_bp1,
203 APID_TM_SCIENCE_NORMAL_BURST, SID_NORM_BP1_F0,
206 APID_TM_SCIENCE_NORMAL_BURST, SID_NORM_BP1_F0,
204 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP1_F0, NB_BINS_COMPRESSED_SM_F0 );
207 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP1_F0, NB_BINS_COMPRESSED_SM_F0 );
205 BP_init_header( &packet_norm_bp2,
208 BP_init_header( &packet_norm_bp2,
206 APID_TM_SCIENCE_NORMAL_BURST, SID_NORM_BP2_F0,
209 APID_TM_SCIENCE_NORMAL_BURST, SID_NORM_BP2_F0,
207 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP2_F0, NB_BINS_COMPRESSED_SM_F0);
210 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP2_F0, NB_BINS_COMPRESSED_SM_F0);
208
211
209 //****************************
212 //****************************
210 // BURST SBM1 and SBM2 headers
213 // BURST SBM1 and SBM2 headers
211 if ( lfrRequestedMode == LFR_MODE_BURST )
214 if ( lfrRequestedMode == LFR_MODE_BURST )
212 {
215 {
213 BP_init_header( &packet_sbm_bp1,
216 BP_init_header( &packet_sbm_bp1,
214 APID_TM_SCIENCE_NORMAL_BURST, SID_BURST_BP1_F0,
217 APID_TM_SCIENCE_NORMAL_BURST, SID_BURST_BP1_F0,
215 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP1_F0, NB_BINS_COMPRESSED_SM_SBM_F0);
218 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP1_F0, NB_BINS_COMPRESSED_SM_SBM_F0);
216 BP_init_header( &packet_sbm_bp2,
219 BP_init_header( &packet_sbm_bp2,
217 APID_TM_SCIENCE_NORMAL_BURST, SID_BURST_BP2_F0,
220 APID_TM_SCIENCE_NORMAL_BURST, SID_BURST_BP2_F0,
218 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP2_F0, NB_BINS_COMPRESSED_SM_SBM_F0);
221 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP2_F0, NB_BINS_COMPRESSED_SM_SBM_F0);
219 }
222 }
220 else if ( lfrRequestedMode == LFR_MODE_SBM1 )
223 else if ( lfrRequestedMode == LFR_MODE_SBM1 )
221 {
224 {
222 BP_init_header( &packet_sbm_bp1,
225 BP_init_header( &packet_sbm_bp1,
223 APID_TM_SCIENCE_SBM1_SBM2, SID_SBM1_BP1_F0,
226 APID_TM_SCIENCE_SBM1_SBM2, SID_SBM1_BP1_F0,
224 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP1_F0, NB_BINS_COMPRESSED_SM_SBM_F0);
227 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP1_F0, NB_BINS_COMPRESSED_SM_SBM_F0);
225 BP_init_header( &packet_sbm_bp2,
228 BP_init_header( &packet_sbm_bp2,
226 APID_TM_SCIENCE_SBM1_SBM2, SID_SBM1_BP2_F0,
229 APID_TM_SCIENCE_SBM1_SBM2, SID_SBM1_BP2_F0,
227 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP2_F0, NB_BINS_COMPRESSED_SM_SBM_F0);
230 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP2_F0, NB_BINS_COMPRESSED_SM_SBM_F0);
228 }
231 }
229 else if ( lfrRequestedMode == LFR_MODE_SBM2 )
232 else if ( lfrRequestedMode == LFR_MODE_SBM2 )
230 {
233 {
231 BP_init_header( &packet_sbm_bp1,
234 BP_init_header( &packet_sbm_bp1,
232 APID_TM_SCIENCE_SBM1_SBM2, SID_SBM2_BP1_F0,
235 APID_TM_SCIENCE_SBM1_SBM2, SID_SBM2_BP1_F0,
233 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP1_F0, NB_BINS_COMPRESSED_SM_SBM_F0);
236 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP1_F0, NB_BINS_COMPRESSED_SM_SBM_F0);
234 BP_init_header( &packet_sbm_bp2,
237 BP_init_header( &packet_sbm_bp2,
235 APID_TM_SCIENCE_SBM1_SBM2, SID_SBM2_BP2_F0,
238 APID_TM_SCIENCE_SBM1_SBM2, SID_SBM2_BP2_F0,
236 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP2_F0, NB_BINS_COMPRESSED_SM_SBM_F0);
239 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP2_F0, NB_BINS_COMPRESSED_SM_SBM_F0);
237 }
240 }
238 else
241 else
239 {
242 {
240 PRINTF1("in PRC0 *** lfrRequestedMode is %d, several headers not initialized\n", (unsigned int) lfrRequestedMode)
243 PRINTF1("in PRC0 *** lfrRequestedMode is %d, several headers not initialized\n", (unsigned int) lfrRequestedMode)
241 }
244 }
242
245
243 status = get_message_queue_id_send( &queue_id );
246 status = get_message_queue_id_send( &queue_id );
244 if (status != RTEMS_SUCCESSFUL)
247 if (status != RTEMS_SUCCESSFUL)
245 {
248 {
246 PRINTF1("in PRC0 *** ERR get_message_queue_id_send %d\n", status)
249 PRINTF1("in PRC0 *** ERR get_message_queue_id_send %d\n", status)
247 }
250 }
248 status = get_message_queue_id_prc0( &queue_id_q_p0);
251 status = get_message_queue_id_prc0( &queue_id_q_p0);
249 if (status != RTEMS_SUCCESSFUL)
252 if (status != RTEMS_SUCCESSFUL)
250 {
253 {
251 PRINTF1("in PRC0 *** ERR get_message_queue_id_prc0 %d\n", status)
254 PRINTF1("in PRC0 *** ERR get_message_queue_id_prc0 %d\n", status)
252 }
255 }
253
256
254 BOOT_PRINTF1("in PRC0 *** lfrRequestedMode = %d\n", (int) lfrRequestedMode)
257 BOOT_PRINTF1("in PRC0 *** lfrRequestedMode = %d\n", (int) lfrRequestedMode)
255
258
256 while(1){
259 while(1){
257 status = rtems_message_queue_receive( queue_id_q_p0, incomingData, &size, //************************************
260 status = rtems_message_queue_receive( queue_id_q_p0, incomingData, &size, //************************************
258 RTEMS_WAIT, RTEMS_NO_TIMEOUT ); // wait for a message coming from AVF0
261 RTEMS_WAIT, RTEMS_NO_TIMEOUT ); // wait for a message coming from AVF0
259
262
260 incomingMsg = (asm_msg*) incomingData;
263 incomingMsg = (asm_msg*) incomingData;
261
264
265 ASM_patch( incomingMsg->norm->matrix, asm_f0_patched_norm );
266 ASM_patch( incomingMsg->burst_sbm->matrix, asm_f0_patched_burst_sbm );
267
262 //****************
268 //****************
263 //****************
269 //****************
264 // BURST SBM1 SBM2
270 // BURST SBM1 SBM2
265 //****************
271 //****************
266 //****************
272 //****************
267 if ( (incomingMsg->event & RTEMS_EVENT_BURST_BP1_F0 ) || (incomingMsg->event & RTEMS_EVENT_SBM_BP1_F0 ) )
273 if ( (incomingMsg->event & RTEMS_EVENT_BURST_BP1_F0 ) || (incomingMsg->event & RTEMS_EVENT_SBM_BP1_F0 ) )
268 {
274 {
269 sid = getSID( incomingMsg->event );
275 sid = getSID( incomingMsg->event );
270 // 1) compress the matrix for Basic Parameters calculation
276 // 1) compress the matrix for Basic Parameters calculation
271 ASM_compress_reorganize_and_divide( incomingMsg->burst_sbm->matrix, compressed_sm_sbm_f0,
277 ASM_compress_reorganize_and_divide( asm_f0_patched_burst_sbm, compressed_sm_sbm_f0,
272 nb_sm_before_f0.burst_sbm_bp1,
278 nb_sm_before_f0.burst_sbm_bp1,
273 NB_BINS_COMPRESSED_SM_SBM_F0, NB_BINS_TO_AVERAGE_ASM_SBM_F0,
279 NB_BINS_COMPRESSED_SM_SBM_F0, NB_BINS_TO_AVERAGE_ASM_SBM_F0,
274 ASM_F0_INDICE_START);
280 ASM_F0_INDICE_START);
275 // 2) compute the BP1 set
281 // 2) compute the BP1 set
276 BP1_set( compressed_sm_sbm_f0, k_coeff_intercalib_f0_sbm, NB_BINS_COMPRESSED_SM_SBM_F0, packet_sbm_bp1.data );
282 // BP1_set( compressed_sm_sbm_f0, k_coeff_intercalib_f0_sbm, NB_BINS_COMPRESSED_SM_SBM_F0, packet_sbm_bp1.data );
277 // 3) send the BP1 set
283 // 3) send the BP1 set
278 set_time( packet_sbm_bp1.time, (unsigned char *) &incomingMsg->coarseTimeSBM );
284 set_time( packet_sbm_bp1.time, (unsigned char *) &incomingMsg->coarseTimeSBM );
279 set_time( packet_sbm_bp1.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeSBM );
285 set_time( packet_sbm_bp1.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeSBM );
280 BP_send( (char *) &packet_sbm_bp1, queue_id,
286 BP_send( (char *) &packet_sbm_bp1, queue_id,
281 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP1_F0 + PACKET_LENGTH_DELTA,
287 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP1_F0 + PACKET_LENGTH_DELTA,
282 sid);
288 sid);
283 // 4) compute the BP2 set if needed
289 // 4) compute the BP2 set if needed
284 if ( (incomingMsg->event & RTEMS_EVENT_BURST_BP2_F0) || (incomingMsg->event & RTEMS_EVENT_SBM_BP2_F0) )
290 if ( (incomingMsg->event & RTEMS_EVENT_BURST_BP2_F0) || (incomingMsg->event & RTEMS_EVENT_SBM_BP2_F0) )
285 {
291 {
286 // 1) compute the BP2 set
292 // 1) compute the BP2 set
287 BP2_set( compressed_sm_sbm_f0, NB_BINS_COMPRESSED_SM_SBM_F0, packet_sbm_bp2.data );
293 BP2_set( compressed_sm_sbm_f0, NB_BINS_COMPRESSED_SM_SBM_F0, packet_sbm_bp2.data );
288 // 2) send the BP2 set
294 // 2) send the BP2 set
289 set_time( packet_sbm_bp2.time, (unsigned char *) &incomingMsg->coarseTimeSBM );
295 set_time( packet_sbm_bp2.time, (unsigned char *) &incomingMsg->coarseTimeSBM );
290 set_time( packet_sbm_bp2.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeSBM );
296 set_time( packet_sbm_bp2.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeSBM );
291 BP_send( (char *) &packet_sbm_bp2, queue_id,
297 BP_send( (char *) &packet_sbm_bp2, queue_id,
292 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP2_F0 + PACKET_LENGTH_DELTA,
298 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP2_F0 + PACKET_LENGTH_DELTA,
293 sid);
299 sid);
294 }
300 }
295 }
301 }
296
302
297 //*****
303 //*****
298 //*****
304 //*****
299 // NORM
305 // NORM
300 //*****
306 //*****
301 //*****
307 //*****
302 if (incomingMsg->event & RTEMS_EVENT_NORM_BP1_F0)
308 if (incomingMsg->event & RTEMS_EVENT_NORM_BP1_F0)
303 {
309 {
304 // 1) compress the matrix for Basic Parameters calculation
310 // 1) compress the matrix for Basic Parameters calculation
305 ASM_compress_reorganize_and_divide( incomingMsg->norm->matrix, compressed_sm_norm_f0,
311 ASM_compress_reorganize_and_divide( asm_f0_patched_norm, compressed_sm_norm_f0,
306 nb_sm_before_f0.norm_bp1,
312 nb_sm_before_f0.norm_bp1,
307 NB_BINS_COMPRESSED_SM_F0, NB_BINS_TO_AVERAGE_ASM_F0,
313 NB_BINS_COMPRESSED_SM_F0, NB_BINS_TO_AVERAGE_ASM_F0,
308 ASM_F0_INDICE_START );
314 ASM_F0_INDICE_START );
309 // 2) compute the BP1 set
315 // 2) compute the BP1 set
310 BP1_set( compressed_sm_norm_f0, k_coeff_intercalib_f0_norm, NB_BINS_COMPRESSED_SM_F0, packet_norm_bp1.data );
316 // BP1_set( compressed_sm_norm_f0, k_coeff_intercalib_f0_norm, NB_BINS_COMPRESSED_SM_F0, packet_norm_bp1.data );
311 // 3) send the BP1 set
317 // 3) send the BP1 set
312 set_time( packet_norm_bp1.time, (unsigned char *) &incomingMsg->coarseTimeNORM );
318 set_time( packet_norm_bp1.time, (unsigned char *) &incomingMsg->coarseTimeNORM );
313 set_time( packet_norm_bp1.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeNORM );
319 set_time( packet_norm_bp1.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeNORM );
314 BP_send( (char *) &packet_norm_bp1, queue_id,
320 BP_send( (char *) &packet_norm_bp1, queue_id,
315 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP1_F0 + PACKET_LENGTH_DELTA,
321 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP1_F0 + PACKET_LENGTH_DELTA,
316 SID_NORM_BP1_F0 );
322 SID_NORM_BP1_F0 );
317 if (incomingMsg->event & RTEMS_EVENT_NORM_BP2_F0)
323 if (incomingMsg->event & RTEMS_EVENT_NORM_BP2_F0)
318 {
324 {
319 // 1) compute the BP2 set using the same ASM as the one used for BP1
325 // 1) compute the BP2 set using the same ASM as the one used for BP1
320 BP2_set( compressed_sm_norm_f0, NB_BINS_COMPRESSED_SM_F0, packet_norm_bp2.data );
326 BP2_set( compressed_sm_norm_f0, NB_BINS_COMPRESSED_SM_F0, packet_norm_bp2.data );
321 // 2) send the BP2 set
327 // 2) send the BP2 set
322 set_time( packet_norm_bp2.time, (unsigned char *) &incomingMsg->coarseTimeNORM );
328 set_time( packet_norm_bp2.time, (unsigned char *) &incomingMsg->coarseTimeNORM );
323 set_time( packet_norm_bp2.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeNORM );
329 set_time( packet_norm_bp2.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeNORM );
324 BP_send( (char *) &packet_norm_bp2, queue_id,
330 BP_send( (char *) &packet_norm_bp2, queue_id,
325 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP2_F0 + PACKET_LENGTH_DELTA,
331 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP2_F0 + PACKET_LENGTH_DELTA,
326 SID_NORM_BP2_F0);
332 SID_NORM_BP2_F0);
327 }
333 }
328 }
334 }
329
335
330 if (incomingMsg->event & RTEMS_EVENT_NORM_ASM_F0)
336 if (incomingMsg->event & RTEMS_EVENT_NORM_ASM_F0)
331 {
337 {
332 // 1) reorganize the ASM and divide
338 // 1) reorganize the ASM and divide
333 ASM_reorganize_and_divide( incomingMsg->norm->matrix,
339 ASM_reorganize_and_divide( asm_f0_patched_norm,
334 asm_f0_reorganized,
340 asm_f0_reorganized,
335 nb_sm_before_f0.norm_bp1 );
341 nb_sm_before_f0.norm_bp1 );
336 // 2) convert the float array in a char array
342 // 2) convert the float array in a char array
337 ASM_convert( asm_f0_reorganized, (char*) current_ring_node_to_send_asm_f0->buffer_address );
343 ASM_convert( asm_f0_reorganized, (char*) current_ring_node_to_send_asm_f0->buffer_address );
338 current_ring_node_to_send_asm_f0->coarseTime = incomingMsg->coarseTimeNORM;
344 current_ring_node_to_send_asm_f0->coarseTime = incomingMsg->coarseTimeNORM;
339 current_ring_node_to_send_asm_f0->fineTime = incomingMsg->fineTimeNORM;
345 current_ring_node_to_send_asm_f0->fineTime = incomingMsg->fineTimeNORM;
340 current_ring_node_to_send_asm_f0->sid = SID_NORM_ASM_F0;
346 current_ring_node_to_send_asm_f0->sid = SID_NORM_ASM_F0;
341
347
342 // 3) send the spectral matrix packets
348 // 3) send the spectral matrix packets
343 status = rtems_message_queue_send( queue_id, &current_ring_node_to_send_asm_f0, sizeof( ring_node* ) );
349 status = rtems_message_queue_send( queue_id, &current_ring_node_to_send_asm_f0, sizeof( ring_node* ) );
344 // change asm ring node
350 // change asm ring node
345 current_ring_node_to_send_asm_f0 = current_ring_node_to_send_asm_f0->next;
351 current_ring_node_to_send_asm_f0 = current_ring_node_to_send_asm_f0->next;
346 }
352 }
347 }
353 }
348 }
354 }
349
355
350 //**********
356 //**********
351 // FUNCTIONS
357 // FUNCTIONS
352
358
353 void reset_nb_sm_f0( unsigned char lfrMode )
359 void reset_nb_sm_f0( unsigned char lfrMode )
354 {
360 {
355 nb_sm_before_f0.norm_bp1 = parameter_dump_packet.sy_lfr_n_bp_p0 * 96;
361 nb_sm_before_f0.norm_bp1 = parameter_dump_packet.sy_lfr_n_bp_p0 * 96;
356 nb_sm_before_f0.norm_bp2 = parameter_dump_packet.sy_lfr_n_bp_p1 * 96;
362 nb_sm_before_f0.norm_bp2 = parameter_dump_packet.sy_lfr_n_bp_p1 * 96;
357 nb_sm_before_f0.norm_asm = (parameter_dump_packet.sy_lfr_n_asm_p[0] * 256 + parameter_dump_packet.sy_lfr_n_asm_p[1]) * 96;
363 nb_sm_before_f0.norm_asm = (parameter_dump_packet.sy_lfr_n_asm_p[0] * 256 + parameter_dump_packet.sy_lfr_n_asm_p[1]) * 96;
358 nb_sm_before_f0.sbm1_bp1 = parameter_dump_packet.sy_lfr_s1_bp_p0 * 24; // 0.25 s per digit
364 nb_sm_before_f0.sbm1_bp1 = parameter_dump_packet.sy_lfr_s1_bp_p0 * 24; // 0.25 s per digit
359 nb_sm_before_f0.sbm1_bp2 = parameter_dump_packet.sy_lfr_s1_bp_p1 * 96;
365 nb_sm_before_f0.sbm1_bp2 = parameter_dump_packet.sy_lfr_s1_bp_p1 * 96;
360 nb_sm_before_f0.sbm2_bp1 = parameter_dump_packet.sy_lfr_s2_bp_p0 * 96;
366 nb_sm_before_f0.sbm2_bp1 = parameter_dump_packet.sy_lfr_s2_bp_p0 * 96;
361 nb_sm_before_f0.sbm2_bp2 = parameter_dump_packet.sy_lfr_s2_bp_p1 * 96;
367 nb_sm_before_f0.sbm2_bp2 = parameter_dump_packet.sy_lfr_s2_bp_p1 * 96;
362 nb_sm_before_f0.burst_bp1 = parameter_dump_packet.sy_lfr_b_bp_p0 * 96;
368 nb_sm_before_f0.burst_bp1 = parameter_dump_packet.sy_lfr_b_bp_p0 * 96;
363 nb_sm_before_f0.burst_bp2 = parameter_dump_packet.sy_lfr_b_bp_p1 * 96;
369 nb_sm_before_f0.burst_bp2 = parameter_dump_packet.sy_lfr_b_bp_p1 * 96;
364
370
365 if (lfrMode == LFR_MODE_SBM1)
371 if (lfrMode == LFR_MODE_SBM1)
366 {
372 {
367 nb_sm_before_f0.burst_sbm_bp1 = nb_sm_before_f0.sbm1_bp1;
373 nb_sm_before_f0.burst_sbm_bp1 = nb_sm_before_f0.sbm1_bp1;
368 nb_sm_before_f0.burst_sbm_bp2 = nb_sm_before_f0.sbm1_bp2;
374 nb_sm_before_f0.burst_sbm_bp2 = nb_sm_before_f0.sbm1_bp2;
369 }
375 }
370 else if (lfrMode == LFR_MODE_SBM2)
376 else if (lfrMode == LFR_MODE_SBM2)
371 {
377 {
372 nb_sm_before_f0.burst_sbm_bp1 = nb_sm_before_f0.sbm2_bp1;
378 nb_sm_before_f0.burst_sbm_bp1 = nb_sm_before_f0.sbm2_bp1;
373 nb_sm_before_f0.burst_sbm_bp2 = nb_sm_before_f0.sbm2_bp2;
379 nb_sm_before_f0.burst_sbm_bp2 = nb_sm_before_f0.sbm2_bp2;
374 }
380 }
375 else if (lfrMode == LFR_MODE_BURST)
381 else if (lfrMode == LFR_MODE_BURST)
376 {
382 {
377 nb_sm_before_f0.burst_sbm_bp1 = nb_sm_before_f0.burst_bp1;
383 nb_sm_before_f0.burst_sbm_bp1 = nb_sm_before_f0.burst_bp1;
378 nb_sm_before_f0.burst_sbm_bp2 = nb_sm_before_f0.burst_bp2;
384 nb_sm_before_f0.burst_sbm_bp2 = nb_sm_before_f0.burst_bp2;
379 }
385 }
380 else
386 else
381 {
387 {
382 nb_sm_before_f0.burst_sbm_bp1 = nb_sm_before_f0.burst_bp1;
388 nb_sm_before_f0.burst_sbm_bp1 = nb_sm_before_f0.burst_bp1;
383 nb_sm_before_f0.burst_sbm_bp2 = nb_sm_before_f0.burst_bp2;
389 nb_sm_before_f0.burst_sbm_bp2 = nb_sm_before_f0.burst_bp2;
384 }
390 }
385 }
391 }
386
392
387 void init_k_coefficients_f0( void )
393 void init_k_coefficients_f0( void )
388 {
394 {
389 init_k_coefficients( k_coeff_intercalib_f0_norm, NB_BINS_COMPRESSED_SM_F0 );
395 init_k_coefficients( k_coeff_intercalib_f0_norm, NB_BINS_COMPRESSED_SM_F0 );
390 init_k_coefficients( k_coeff_intercalib_f0_sbm, NB_BINS_COMPRESSED_SM_SBM_F0);
396 init_k_coefficients( k_coeff_intercalib_f0_sbm, NB_BINS_COMPRESSED_SM_SBM_F0);
391 }
397 }
Show file before | Show file after | Hide comments
@@ -1,379 +1,379
1 /** Functions related to data processing.
1 /** Functions related to data processing.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 * These function are related to data processing, i.e. spectral matrices averaging and basic parameters computation.
6 * These function are related to data processing, i.e. spectral matrices averaging and basic parameters computation.
7 *
7 *
8 */
8 */
9
9
10 #include "avf1_prc1.h"
10 #include "avf1_prc1.h"
11
11
12 nb_sm_before_bp_asm_f1 nb_sm_before_f1;
12 nb_sm_before_bp_asm_f1 nb_sm_before_f1;
13
13
14 extern ring_node sm_ring_f1[ ];
14 extern ring_node sm_ring_f1[ ];
15
15
16 //***
16 //***
17 // F1
17 // F1
18 ring_node_asm asm_ring_norm_f1 [ NB_RING_NODES_ASM_NORM_F1 ];
18 ring_node_asm asm_ring_norm_f1 [ NB_RING_NODES_ASM_NORM_F1 ];
19 ring_node_asm asm_ring_burst_sbm_f1 [ NB_RING_NODES_ASM_BURST_SBM_F1 ];
19 ring_node_asm asm_ring_burst_sbm_f1 [ NB_RING_NODES_ASM_BURST_SBM_F1 ];
20
20
21 ring_node ring_to_send_asm_f1 [ NB_RING_NODES_ASM_F1 ];
21 ring_node ring_to_send_asm_f1 [ NB_RING_NODES_ASM_F1 ];
22 int buffer_asm_f1 [ NB_RING_NODES_ASM_F1 * TOTAL_SIZE_SM ];
22 int buffer_asm_f1 [ NB_RING_NODES_ASM_F1 * TOTAL_SIZE_SM ];
23
23
24 float asm_f1_reorganized [ TOTAL_SIZE_SM ];
24 float asm_f1_reorganized [ TOTAL_SIZE_SM ];
25 char asm_f1_char [ TIME_OFFSET_IN_BYTES + (TOTAL_SIZE_SM * 2) ];
25 char asm_f1_char [ TOTAL_SIZE_SM * 2 ];
26 float compressed_sm_norm_f1[ TOTAL_SIZE_COMPRESSED_ASM_NORM_F1];
26 float compressed_sm_norm_f1[ TOTAL_SIZE_COMPRESSED_ASM_NORM_F1];
27 float compressed_sm_sbm_f1 [ TOTAL_SIZE_COMPRESSED_ASM_SBM_F1 ];
27 float compressed_sm_sbm_f1 [ TOTAL_SIZE_COMPRESSED_ASM_SBM_F1 ];
28
28
29 float k_coeff_intercalib_f1_norm[ NB_BINS_COMPRESSED_SM_F1 * NB_K_COEFF_PER_BIN ]; // 13 * 32 = 416
29 float k_coeff_intercalib_f1_norm[ NB_BINS_COMPRESSED_SM_F1 * NB_K_COEFF_PER_BIN ]; // 13 * 32 = 416
30 float k_coeff_intercalib_f1_sbm[ NB_BINS_COMPRESSED_SM_SBM_F1 * NB_K_COEFF_PER_BIN ]; // 26 * 32 = 832
30 float k_coeff_intercalib_f1_sbm[ NB_BINS_COMPRESSED_SM_SBM_F1 * NB_K_COEFF_PER_BIN ]; // 26 * 32 = 832
31
31
32 //************
32 //************
33 // RTEMS TASKS
33 // RTEMS TASKS
34
34
35 rtems_task avf1_task( rtems_task_argument lfrRequestedMode )
35 rtems_task avf1_task( rtems_task_argument lfrRequestedMode )
36 {
36 {
37 int i;
37 int i;
38
38
39 rtems_event_set event_out;
39 rtems_event_set event_out;
40 rtems_status_code status;
40 rtems_status_code status;
41 rtems_id queue_id_prc1;
41 rtems_id queue_id_prc1;
42 asm_msg msgForMATR;
42 asm_msg msgForMATR;
43 ring_node *nodeForAveraging;
43 ring_node *nodeForAveraging;
44 ring_node *ring_node_tab[NB_SM_BEFORE_AVF0];
44 ring_node *ring_node_tab[NB_SM_BEFORE_AVF0];
45 ring_node_asm *current_ring_node_asm_burst_sbm_f1;
45 ring_node_asm *current_ring_node_asm_burst_sbm_f1;
46 ring_node_asm *current_ring_node_asm_norm_f1;
46 ring_node_asm *current_ring_node_asm_norm_f1;
47
47
48 unsigned int nb_norm_bp1;
48 unsigned int nb_norm_bp1;
49 unsigned int nb_norm_bp2;
49 unsigned int nb_norm_bp2;
50 unsigned int nb_norm_asm;
50 unsigned int nb_norm_asm;
51 unsigned int nb_sbm_bp1;
51 unsigned int nb_sbm_bp1;
52 unsigned int nb_sbm_bp2;
52 unsigned int nb_sbm_bp2;
53
53
54 nb_norm_bp1 = 0;
54 nb_norm_bp1 = 0;
55 nb_norm_bp2 = 0;
55 nb_norm_bp2 = 0;
56 nb_norm_asm = 0;
56 nb_norm_asm = 0;
57 nb_sbm_bp1 = 0;
57 nb_sbm_bp1 = 0;
58 nb_sbm_bp2 = 0;
58 nb_sbm_bp2 = 0;
59
59
60 reset_nb_sm_f1( lfrRequestedMode ); // reset the sm counters that drive the BP and ASM computations / transmissions
60 reset_nb_sm_f1( lfrRequestedMode ); // reset the sm counters that drive the BP and ASM computations / transmissions
61 ASM_generic_init_ring( asm_ring_norm_f1, NB_RING_NODES_ASM_NORM_F1 );
61 ASM_generic_init_ring( asm_ring_norm_f1, NB_RING_NODES_ASM_NORM_F1 );
62 ASM_generic_init_ring( asm_ring_burst_sbm_f1, NB_RING_NODES_ASM_BURST_SBM_F1 );
62 ASM_generic_init_ring( asm_ring_burst_sbm_f1, NB_RING_NODES_ASM_BURST_SBM_F1 );
63 current_ring_node_asm_norm_f1 = asm_ring_norm_f1;
63 current_ring_node_asm_norm_f1 = asm_ring_norm_f1;
64 current_ring_node_asm_burst_sbm_f1 = asm_ring_burst_sbm_f1;
64 current_ring_node_asm_burst_sbm_f1 = asm_ring_burst_sbm_f1;
65
65
66 BOOT_PRINTF1("in AVF1 *** lfrRequestedMode = %d\n", (int) lfrRequestedMode)
66 BOOT_PRINTF1("in AVF1 *** lfrRequestedMode = %d\n", (int) lfrRequestedMode)
67
67
68 status = get_message_queue_id_prc1( &queue_id_prc1 );
68 status = get_message_queue_id_prc1( &queue_id_prc1 );
69 if (status != RTEMS_SUCCESSFUL)
69 if (status != RTEMS_SUCCESSFUL)
70 {
70 {
71 PRINTF1("in AVF1 *** ERR get_message_queue_id_prc1 %d\n", status)
71 PRINTF1("in AVF1 *** ERR get_message_queue_id_prc1 %d\n", status)
72 }
72 }
73
73
74 while(1){
74 while(1){
75 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
75 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
76
76
77 //****************************************
77 //****************************************
78 // initialize the mesage for the MATR task
78 // initialize the mesage for the MATR task
79 msgForMATR.norm = current_ring_node_asm_norm_f1;
79 msgForMATR.norm = current_ring_node_asm_norm_f1;
80 msgForMATR.burst_sbm = current_ring_node_asm_burst_sbm_f1;
80 msgForMATR.burst_sbm = current_ring_node_asm_burst_sbm_f1;
81 msgForMATR.event = 0x00; // this composite event will be sent to the PRC1 task
81 msgForMATR.event = 0x00; // this composite event will be sent to the PRC1 task
82 //
82 //
83 //****************************************
83 //****************************************
84
84
85 nodeForAveraging = getRingNodeForAveraging( 1 );
85 nodeForAveraging = getRingNodeForAveraging( 1 );
86
86
87 ring_node_tab[NB_SM_BEFORE_AVF1-1] = nodeForAveraging;
87 ring_node_tab[NB_SM_BEFORE_AVF1-1] = nodeForAveraging;
88 for ( i = 2; i < (NB_SM_BEFORE_AVF1+1); i++ )
88 for ( i = 2; i < (NB_SM_BEFORE_AVF1+1); i++ )
89 {
89 {
90 nodeForAveraging = nodeForAveraging->previous;
90 nodeForAveraging = nodeForAveraging->previous;
91 ring_node_tab[NB_SM_BEFORE_AVF1-i] = nodeForAveraging;
91 ring_node_tab[NB_SM_BEFORE_AVF1-i] = nodeForAveraging;
92 }
92 }
93
93
94 // compute the average and store it in the averaged_sm_f1 buffer
94 // compute the average and store it in the averaged_sm_f1 buffer
95 SM_average( current_ring_node_asm_norm_f1->matrix,
95 SM_average( current_ring_node_asm_norm_f1->matrix,
96 current_ring_node_asm_burst_sbm_f1->matrix,
96 current_ring_node_asm_burst_sbm_f1->matrix,
97 ring_node_tab,
97 ring_node_tab,
98 nb_norm_bp1, nb_sbm_bp1,
98 nb_norm_bp1, nb_sbm_bp1,
99 &msgForMATR );
99 &msgForMATR );
100
100
101 // update nb_average
101 // update nb_average
102 nb_norm_bp1 = nb_norm_bp1 + NB_SM_BEFORE_AVF1;
102 nb_norm_bp1 = nb_norm_bp1 + NB_SM_BEFORE_AVF1;
103 nb_norm_bp2 = nb_norm_bp2 + NB_SM_BEFORE_AVF1;
103 nb_norm_bp2 = nb_norm_bp2 + NB_SM_BEFORE_AVF1;
104 nb_norm_asm = nb_norm_asm + NB_SM_BEFORE_AVF1;
104 nb_norm_asm = nb_norm_asm + NB_SM_BEFORE_AVF1;
105 nb_sbm_bp1 = nb_sbm_bp1 + NB_SM_BEFORE_AVF1;
105 nb_sbm_bp1 = nb_sbm_bp1 + NB_SM_BEFORE_AVF1;
106 nb_sbm_bp2 = nb_sbm_bp2 + NB_SM_BEFORE_AVF1;
106 nb_sbm_bp2 = nb_sbm_bp2 + NB_SM_BEFORE_AVF1;
107
107
108 if (nb_sbm_bp1 == nb_sm_before_f1.burst_sbm_bp1)
108 if (nb_sbm_bp1 == nb_sm_before_f1.burst_sbm_bp1)
109 {
109 {
110 nb_sbm_bp1 = 0;
110 nb_sbm_bp1 = 0;
111 // set another ring for the ASM storage
111 // set another ring for the ASM storage
112 current_ring_node_asm_burst_sbm_f1 = current_ring_node_asm_burst_sbm_f1->next;
112 current_ring_node_asm_burst_sbm_f1 = current_ring_node_asm_burst_sbm_f1->next;
113 if ( lfrCurrentMode == LFR_MODE_BURST )
113 if ( lfrCurrentMode == LFR_MODE_BURST )
114 {
114 {
115 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_BURST_BP1_F1;
115 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_BURST_BP1_F1;
116 }
116 }
117 else if ( lfrCurrentMode == LFR_MODE_SBM2 )
117 else if ( lfrCurrentMode == LFR_MODE_SBM2 )
118 {
118 {
119 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_SBM_BP1_F1;
119 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_SBM_BP1_F1;
120 }
120 }
121 }
121 }
122
122
123 if (nb_sbm_bp2 == nb_sm_before_f1.burst_sbm_bp2)
123 if (nb_sbm_bp2 == nb_sm_before_f1.burst_sbm_bp2)
124 {
124 {
125 nb_sbm_bp2 = 0;
125 nb_sbm_bp2 = 0;
126 if ( lfrCurrentMode == LFR_MODE_BURST )
126 if ( lfrCurrentMode == LFR_MODE_BURST )
127 {
127 {
128 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_BURST_BP2_F1;
128 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_BURST_BP2_F1;
129 }
129 }
130 else if ( lfrCurrentMode == LFR_MODE_SBM2 )
130 else if ( lfrCurrentMode == LFR_MODE_SBM2 )
131 {
131 {
132 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_SBM_BP2_F1;
132 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_SBM_BP2_F1;
133 }
133 }
134 }
134 }
135
135
136 if (nb_norm_bp1 == nb_sm_before_f1.norm_bp1)
136 if (nb_norm_bp1 == nb_sm_before_f1.norm_bp1)
137 {
137 {
138 nb_norm_bp1 = 0;
138 nb_norm_bp1 = 0;
139 // set another ring for the ASM storage
139 // set another ring for the ASM storage
140 current_ring_node_asm_norm_f1 = current_ring_node_asm_norm_f1->next;
140 current_ring_node_asm_norm_f1 = current_ring_node_asm_norm_f1->next;
141 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
141 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
142 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
142 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
143 {
143 {
144 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_BP1_F1;
144 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_BP1_F1;
145 }
145 }
146 }
146 }
147
147
148 if (nb_norm_bp2 == nb_sm_before_f1.norm_bp2)
148 if (nb_norm_bp2 == nb_sm_before_f1.norm_bp2)
149 {
149 {
150 nb_norm_bp2 = 0;
150 nb_norm_bp2 = 0;
151 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
151 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
152 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
152 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
153 {
153 {
154 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_BP2_F1;
154 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_BP2_F1;
155 }
155 }
156 }
156 }
157
157
158 if (nb_norm_asm == nb_sm_before_f1.norm_asm)
158 if (nb_norm_asm == nb_sm_before_f1.norm_asm)
159 {
159 {
160 nb_norm_asm = 0;
160 nb_norm_asm = 0;
161 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
161 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
162 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
162 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
163 {
163 {
164 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_ASM_F1;
164 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_ASM_F1;
165 }
165 }
166 }
166 }
167
167
168 //*************************
168 //*************************
169 // send the message to MATR
169 // send the message to MATR
170 if (msgForMATR.event != 0x00)
170 if (msgForMATR.event != 0x00)
171 {
171 {
172 status = rtems_message_queue_send( queue_id_prc1, (char *) &msgForMATR, MSG_QUEUE_SIZE_PRC1);
172 status = rtems_message_queue_send( queue_id_prc1, (char *) &msgForMATR, MSG_QUEUE_SIZE_PRC1);
173 }
173 }
174
174
175 if (status != RTEMS_SUCCESSFUL) {
175 if (status != RTEMS_SUCCESSFUL) {
176 printf("in AVF1 *** Error sending message to PRC1, code %d\n", status);
176 printf("in AVF1 *** Error sending message to PRC1, code %d\n", status);
177 }
177 }
178 }
178 }
179 }
179 }
180
180
181 rtems_task prc1_task( rtems_task_argument lfrRequestedMode )
181 rtems_task prc1_task( rtems_task_argument lfrRequestedMode )
182 {
182 {
183 char incomingData[MSG_QUEUE_SIZE_SEND]; // incoming data buffer
183 char incomingData[MSG_QUEUE_SIZE_SEND]; // incoming data buffer
184 size_t size; // size of the incoming TC packet
184 size_t size; // size of the incoming TC packet
185 asm_msg *incomingMsg;
185 asm_msg *incomingMsg;
186 //
186 //
187 unsigned char sid;
187 unsigned char sid;
188 rtems_status_code status;
188 rtems_status_code status;
189 rtems_id queue_id_send;
189 rtems_id queue_id_send;
190 rtems_id queue_id_q_p1;
190 rtems_id queue_id_q_p1;
191 bp_packet_with_spare packet_norm_bp1;
191 bp_packet_with_spare packet_norm_bp1;
192 bp_packet packet_norm_bp2;
192 bp_packet packet_norm_bp2;
193 bp_packet packet_sbm_bp1;
193 bp_packet packet_sbm_bp1;
194 bp_packet packet_sbm_bp2;
194 bp_packet packet_sbm_bp2;
195 ring_node *current_ring_node_to_send_asm_f1;
195 ring_node *current_ring_node_to_send_asm_f1;
196
196
197 unsigned long long int localTime;
197 unsigned long long int localTime;
198
198
199 // init the ring of the averaged spectral matrices which will be transmitted to the DPU
199 // init the ring of the averaged spectral matrices which will be transmitted to the DPU
200 init_ring( ring_to_send_asm_f1, NB_RING_NODES_ASM_F1, (volatile int*) buffer_asm_f1, TOTAL_SIZE_SM );
200 init_ring( ring_to_send_asm_f1, NB_RING_NODES_ASM_F1, (volatile int*) buffer_asm_f1, TOTAL_SIZE_SM );
201 current_ring_node_to_send_asm_f1 = ring_to_send_asm_f1;
201 current_ring_node_to_send_asm_f1 = ring_to_send_asm_f1;
202
202
203 //*************
203 //*************
204 // NORM headers
204 // NORM headers
205 BP_init_header_with_spare( &packet_norm_bp1,
205 BP_init_header_with_spare( &packet_norm_bp1,
206 APID_TM_SCIENCE_NORMAL_BURST, SID_NORM_BP1_F1,
206 APID_TM_SCIENCE_NORMAL_BURST, SID_NORM_BP1_F1,
207 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP1_F1, NB_BINS_COMPRESSED_SM_F1 );
207 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP1_F1, NB_BINS_COMPRESSED_SM_F1 );
208 BP_init_header( &packet_norm_bp2,
208 BP_init_header( &packet_norm_bp2,
209 APID_TM_SCIENCE_NORMAL_BURST, SID_NORM_BP2_F1,
209 APID_TM_SCIENCE_NORMAL_BURST, SID_NORM_BP2_F1,
210 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP2_F1, NB_BINS_COMPRESSED_SM_F1);
210 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP2_F1, NB_BINS_COMPRESSED_SM_F1);
211
211
212 //***********************
212 //***********************
213 // BURST and SBM2 headers
213 // BURST and SBM2 headers
214 if ( lfrRequestedMode == LFR_MODE_BURST )
214 if ( lfrRequestedMode == LFR_MODE_BURST )
215 {
215 {
216 BP_init_header( &packet_sbm_bp1,
216 BP_init_header( &packet_sbm_bp1,
217 APID_TM_SCIENCE_NORMAL_BURST, SID_BURST_BP1_F1,
217 APID_TM_SCIENCE_NORMAL_BURST, SID_BURST_BP1_F1,
218 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP1_F1, NB_BINS_COMPRESSED_SM_SBM_F1);
218 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP1_F1, NB_BINS_COMPRESSED_SM_SBM_F1);
219 BP_init_header( &packet_sbm_bp2,
219 BP_init_header( &packet_sbm_bp2,
220 APID_TM_SCIENCE_NORMAL_BURST, SID_BURST_BP2_F1,
220 APID_TM_SCIENCE_NORMAL_BURST, SID_BURST_BP2_F1,
221 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP2_F1, NB_BINS_COMPRESSED_SM_SBM_F1);
221 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP2_F1, NB_BINS_COMPRESSED_SM_SBM_F1);
222 }
222 }
223 else if ( lfrRequestedMode == LFR_MODE_SBM2 )
223 else if ( lfrRequestedMode == LFR_MODE_SBM2 )
224 {
224 {
225 BP_init_header( &packet_sbm_bp1,
225 BP_init_header( &packet_sbm_bp1,
226 APID_TM_SCIENCE_SBM1_SBM2, SID_SBM2_BP1_F1,
226 APID_TM_SCIENCE_SBM1_SBM2, SID_SBM2_BP1_F1,
227 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP1_F1, NB_BINS_COMPRESSED_SM_SBM_F1);
227 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP1_F1, NB_BINS_COMPRESSED_SM_SBM_F1);
228 BP_init_header( &packet_sbm_bp2,
228 BP_init_header( &packet_sbm_bp2,
229 APID_TM_SCIENCE_SBM1_SBM2, SID_SBM2_BP2_F1,
229 APID_TM_SCIENCE_SBM1_SBM2, SID_SBM2_BP2_F1,
230 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP2_F1, NB_BINS_COMPRESSED_SM_SBM_F1);
230 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP2_F1, NB_BINS_COMPRESSED_SM_SBM_F1);
231 }
231 }
232 else
232 else
233 {
233 {
234 PRINTF1("in PRC1 *** lfrRequestedMode is %d, several headers not initialized\n", (unsigned int) lfrRequestedMode)
234 PRINTF1("in PRC1 *** lfrRequestedMode is %d, several headers not initialized\n", (unsigned int) lfrRequestedMode)
235 }
235 }
236
236
237 status = get_message_queue_id_send( &queue_id_send );
237 status = get_message_queue_id_send( &queue_id_send );
238 if (status != RTEMS_SUCCESSFUL)
238 if (status != RTEMS_SUCCESSFUL)
239 {
239 {
240 PRINTF1("in PRC1 *** ERR get_message_queue_id_send %d\n", status)
240 PRINTF1("in PRC1 *** ERR get_message_queue_id_send %d\n", status)
241 }
241 }
242 status = get_message_queue_id_prc1( &queue_id_q_p1);
242 status = get_message_queue_id_prc1( &queue_id_q_p1);
243 if (status != RTEMS_SUCCESSFUL)
243 if (status != RTEMS_SUCCESSFUL)
244 {
244 {
245 PRINTF1("in PRC1 *** ERR get_message_queue_id_prc1 %d\n", status)
245 PRINTF1("in PRC1 *** ERR get_message_queue_id_prc1 %d\n", status)
246 }
246 }
247
247
248 BOOT_PRINTF1("in PRC1 *** lfrRequestedMode = %d\n", (int) lfrRequestedMode)
248 BOOT_PRINTF1("in PRC1 *** lfrRequestedMode = %d\n", (int) lfrRequestedMode)
249
249
250 while(1){
250 while(1){
251 status = rtems_message_queue_receive( queue_id_q_p1, incomingData, &size, //************************************
251 status = rtems_message_queue_receive( queue_id_q_p1, incomingData, &size, //************************************
252 RTEMS_WAIT, RTEMS_NO_TIMEOUT ); // wait for a message coming from AVF0
252 RTEMS_WAIT, RTEMS_NO_TIMEOUT ); // wait for a message coming from AVF0
253
253
254 incomingMsg = (asm_msg*) incomingData;
254 incomingMsg = (asm_msg*) incomingData;
255
255
256 localTime = getTimeAsUnsignedLongLongInt( );
256 localTime = getTimeAsUnsignedLongLongInt( );
257 //***********
257 //***********
258 //***********
258 //***********
259 // BURST SBM2
259 // BURST SBM2
260 //***********
260 //***********
261 //***********
261 //***********
262 if ( (incomingMsg->event & RTEMS_EVENT_BURST_BP1_F1) || (incomingMsg->event & RTEMS_EVENT_SBM_BP1_F1) )
262 if ( (incomingMsg->event & RTEMS_EVENT_BURST_BP1_F1) || (incomingMsg->event & RTEMS_EVENT_SBM_BP1_F1) )
263 {
263 {
264 sid = getSID( incomingMsg->event );
264 sid = getSID( incomingMsg->event );
265 // 1) compress the matrix for Basic Parameters calculation
265 // 1) compress the matrix for Basic Parameters calculation
266 ASM_compress_reorganize_and_divide( incomingMsg->burst_sbm->matrix, compressed_sm_sbm_f1,
266 ASM_compress_reorganize_and_divide( incomingMsg->burst_sbm->matrix, compressed_sm_sbm_f1,
267 nb_sm_before_f1.burst_sbm_bp1,
267 nb_sm_before_f1.burst_sbm_bp1,
268 NB_BINS_COMPRESSED_SM_SBM_F1, NB_BINS_TO_AVERAGE_ASM_SBM_F1,
268 NB_BINS_COMPRESSED_SM_SBM_F1, NB_BINS_TO_AVERAGE_ASM_SBM_F1,
269 ASM_F1_INDICE_START);
269 ASM_F1_INDICE_START);
270 // 2) compute the BP1 set
270 // 2) compute the BP1 set
271 BP1_set( compressed_sm_sbm_f1, k_coeff_intercalib_f1_sbm, NB_BINS_COMPRESSED_SM_SBM_F1, packet_sbm_bp1.data );
271 BP1_set( compressed_sm_sbm_f1, k_coeff_intercalib_f1_sbm, NB_BINS_COMPRESSED_SM_SBM_F1, packet_sbm_bp1.data );
272 // 3) send the BP1 set
272 // 3) send the BP1 set
273 set_time( packet_sbm_bp1.time, (unsigned char *) &incomingMsg->coarseTimeSBM );
273 set_time( packet_sbm_bp1.time, (unsigned char *) &incomingMsg->coarseTimeSBM );
274 set_time( packet_sbm_bp1.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeSBM );
274 set_time( packet_sbm_bp1.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeSBM );
275 BP_send( (char *) &packet_sbm_bp1, queue_id_send,
275 BP_send( (char *) &packet_sbm_bp1, queue_id_send,
276 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP1_F1 + PACKET_LENGTH_DELTA,
276 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP1_F1 + PACKET_LENGTH_DELTA,
277 sid );
277 sid );
278 // 4) compute the BP2 set if needed
278 // 4) compute the BP2 set if needed
279 if ( (incomingMsg->event & RTEMS_EVENT_BURST_BP2_F1) || (incomingMsg->event & RTEMS_EVENT_SBM_BP2_F1) )
279 if ( (incomingMsg->event & RTEMS_EVENT_BURST_BP2_F1) || (incomingMsg->event & RTEMS_EVENT_SBM_BP2_F1) )
280 {
280 {
281 // 1) compute the BP2 set
281 // 1) compute the BP2 set
282 BP2_set( compressed_sm_sbm_f1, NB_BINS_COMPRESSED_SM_SBM_F1, packet_norm_bp2.data );
282 BP2_set( compressed_sm_sbm_f1, NB_BINS_COMPRESSED_SM_SBM_F1, packet_norm_bp2.data );
283 // 2) send the BP2 set
283 // 2) send the BP2 set
284 set_time( packet_sbm_bp2.time, (unsigned char *) &incomingMsg->coarseTimeSBM );
284 set_time( packet_sbm_bp2.time, (unsigned char *) &incomingMsg->coarseTimeSBM );
285 set_time( packet_sbm_bp2.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeSBM );
285 set_time( packet_sbm_bp2.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeSBM );
286 BP_send( (char *) &packet_sbm_bp2, queue_id_send,
286 BP_send( (char *) &packet_sbm_bp2, queue_id_send,
287 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP2_F1 + PACKET_LENGTH_DELTA,
287 PACKET_LENGTH_TM_LFR_SCIENCE_SBM_BP2_F1 + PACKET_LENGTH_DELTA,
288 sid );
288 sid );
289 }
289 }
290 }
290 }
291
291
292 //*****
292 //*****
293 //*****
293 //*****
294 // NORM
294 // NORM
295 //*****
295 //*****
296 //*****
296 //*****
297 if (incomingMsg->event & RTEMS_EVENT_NORM_BP1_F1)
297 if (incomingMsg->event & RTEMS_EVENT_NORM_BP1_F1)
298 {
298 {
299 // 1) compress the matrix for Basic Parameters calculation
299 // 1) compress the matrix for Basic Parameters calculation
300 ASM_compress_reorganize_and_divide( incomingMsg->norm->matrix, compressed_sm_norm_f1,
300 ASM_compress_reorganize_and_divide( incomingMsg->norm->matrix, compressed_sm_norm_f1,
301 nb_sm_before_f1.norm_bp1,
301 nb_sm_before_f1.norm_bp1,
302 NB_BINS_COMPRESSED_SM_F1, NB_BINS_TO_AVERAGE_ASM_F1,
302 NB_BINS_COMPRESSED_SM_F1, NB_BINS_TO_AVERAGE_ASM_F1,
303 ASM_F1_INDICE_START );
303 ASM_F1_INDICE_START );
304 // 2) compute the BP1 set
304 // 2) compute the BP1 set
305 BP1_set( compressed_sm_norm_f1, k_coeff_intercalib_f1_norm, NB_BINS_COMPRESSED_SM_F1, packet_norm_bp1.data );
305 // BP1_set( compressed_sm_norm_f1, k_coeff_intercalib_f1_norm, NB_BINS_COMPRESSED_SM_F1, packet_norm_bp1.data );
306 // 3) send the BP1 set
306 // 3) send the BP1 set
307 set_time( packet_norm_bp1.time, (unsigned char *) &incomingMsg->coarseTimeNORM );
307 set_time( packet_norm_bp1.time, (unsigned char *) &incomingMsg->coarseTimeNORM );
308 set_time( packet_norm_bp1.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeNORM );
308 set_time( packet_norm_bp1.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeNORM );
309 BP_send( (char *) &packet_norm_bp1, queue_id_send,
309 BP_send( (char *) &packet_norm_bp1, queue_id_send,
310 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP1_F1 + PACKET_LENGTH_DELTA,
310 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP1_F1 + PACKET_LENGTH_DELTA,
311 SID_NORM_BP1_F1 );
311 SID_NORM_BP1_F1 );
312 if (incomingMsg->event & RTEMS_EVENT_NORM_BP2_F1)
312 if (incomingMsg->event & RTEMS_EVENT_NORM_BP2_F1)
313 {
313 {
314 // 1) compute the BP2 set
314 // 1) compute the BP2 set
315 BP2_set( compressed_sm_norm_f1, NB_BINS_COMPRESSED_SM_F1, packet_norm_bp2.data );
315 BP2_set( compressed_sm_norm_f1, NB_BINS_COMPRESSED_SM_F1, packet_norm_bp2.data );
316 // 2) send the BP2 set
316 // 2) send the BP2 set
317 set_time( packet_norm_bp2.time, (unsigned char *) &incomingMsg->coarseTimeNORM );
317 set_time( packet_norm_bp2.time, (unsigned char *) &incomingMsg->coarseTimeNORM );
318 set_time( packet_norm_bp2.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeNORM );
318 set_time( packet_norm_bp2.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeNORM );
319 BP_send( (char *) &packet_norm_bp2, queue_id_send,
319 BP_send( (char *) &packet_norm_bp2, queue_id_send,
320 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP2_F1 + PACKET_LENGTH_DELTA,
320 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP2_F1 + PACKET_LENGTH_DELTA,
321 SID_NORM_BP2_F1 );
321 SID_NORM_BP2_F1 );
322 }
322 }
323 }
323 }
324
324
325 if (incomingMsg->event & RTEMS_EVENT_NORM_ASM_F1)
325 if (incomingMsg->event & RTEMS_EVENT_NORM_ASM_F1)
326 {
326 {
327 // 1) reorganize the ASM and divide
327 // 1) reorganize the ASM and divide
328 ASM_reorganize_and_divide( incomingMsg->norm->matrix,
328 ASM_reorganize_and_divide( incomingMsg->norm->matrix,
329 asm_f1_reorganized,
329 asm_f1_reorganized,
330 nb_sm_before_f1.norm_bp1 );
330 nb_sm_before_f1.norm_bp1 );
331 // 2) convert the float array in a char array
331 // 2) convert the float array in a char array
332 ASM_convert( asm_f1_reorganized, (char*) current_ring_node_to_send_asm_f1->buffer_address );
332 ASM_convert( asm_f1_reorganized, (char*) current_ring_node_to_send_asm_f1->buffer_address );
333 current_ring_node_to_send_asm_f1->coarseTime = incomingMsg->coarseTimeNORM;
333 current_ring_node_to_send_asm_f1->coarseTime = incomingMsg->coarseTimeNORM;
334 current_ring_node_to_send_asm_f1->fineTime = incomingMsg->fineTimeNORM;
334 current_ring_node_to_send_asm_f1->fineTime = incomingMsg->fineTimeNORM;
335 current_ring_node_to_send_asm_f1->sid = SID_NORM_ASM_F1;
335 current_ring_node_to_send_asm_f1->sid = SID_NORM_ASM_F1;
336 // 3) send the spectral matrix packets
336 // 3) send the spectral matrix packets
337 status = rtems_message_queue_send( queue_id_send, &current_ring_node_to_send_asm_f1, sizeof( ring_node* ) );
337 status = rtems_message_queue_send( queue_id_send, &current_ring_node_to_send_asm_f1, sizeof( ring_node* ) );
338 // change asm ring node
338 // change asm ring node
339 current_ring_node_to_send_asm_f1 = current_ring_node_to_send_asm_f1->next;
339 current_ring_node_to_send_asm_f1 = current_ring_node_to_send_asm_f1->next;
340 }
340 }
341
341
342 }
342 }
343 }
343 }
344
344
345 //**********
345 //**********
346 // FUNCTIONS
346 // FUNCTIONS
347
347
348 void reset_nb_sm_f1( unsigned char lfrMode )
348 void reset_nb_sm_f1( unsigned char lfrMode )
349 {
349 {
350 nb_sm_before_f1.norm_bp1 = parameter_dump_packet.sy_lfr_n_bp_p0 * 16;
350 nb_sm_before_f1.norm_bp1 = parameter_dump_packet.sy_lfr_n_bp_p0 * 16;
351 nb_sm_before_f1.norm_bp2 = parameter_dump_packet.sy_lfr_n_bp_p1 * 16;
351 nb_sm_before_f1.norm_bp2 = parameter_dump_packet.sy_lfr_n_bp_p1 * 16;
352 nb_sm_before_f1.norm_asm = (parameter_dump_packet.sy_lfr_n_asm_p[0] * 256 + parameter_dump_packet.sy_lfr_n_asm_p[1]) * 16;
352 nb_sm_before_f1.norm_asm = (parameter_dump_packet.sy_lfr_n_asm_p[0] * 256 + parameter_dump_packet.sy_lfr_n_asm_p[1]) * 16;
353 nb_sm_before_f1.sbm2_bp1 = parameter_dump_packet.sy_lfr_s2_bp_p0 * 16;
353 nb_sm_before_f1.sbm2_bp1 = parameter_dump_packet.sy_lfr_s2_bp_p0 * 16;
354 nb_sm_before_f1.sbm2_bp2 = parameter_dump_packet.sy_lfr_s2_bp_p1 * 16;
354 nb_sm_before_f1.sbm2_bp2 = parameter_dump_packet.sy_lfr_s2_bp_p1 * 16;
355 nb_sm_before_f1.burst_bp1 = parameter_dump_packet.sy_lfr_b_bp_p0 * 16;
355 nb_sm_before_f1.burst_bp1 = parameter_dump_packet.sy_lfr_b_bp_p0 * 16;
356 nb_sm_before_f1.burst_bp2 = parameter_dump_packet.sy_lfr_b_bp_p1 * 16;
356 nb_sm_before_f1.burst_bp2 = parameter_dump_packet.sy_lfr_b_bp_p1 * 16;
357
357
358 if (lfrMode == LFR_MODE_SBM2)
358 if (lfrMode == LFR_MODE_SBM2)
359 {
359 {
360 nb_sm_before_f1.burst_sbm_bp1 = nb_sm_before_f1.sbm2_bp1;
360 nb_sm_before_f1.burst_sbm_bp1 = nb_sm_before_f1.sbm2_bp1;
361 nb_sm_before_f1.burst_sbm_bp2 = nb_sm_before_f1.sbm2_bp2;
361 nb_sm_before_f1.burst_sbm_bp2 = nb_sm_before_f1.sbm2_bp2;
362 }
362 }
363 else if (lfrMode == LFR_MODE_BURST)
363 else if (lfrMode == LFR_MODE_BURST)
364 {
364 {
365 nb_sm_before_f1.burst_sbm_bp1 = nb_sm_before_f1.burst_bp1;
365 nb_sm_before_f1.burst_sbm_bp1 = nb_sm_before_f1.burst_bp1;
366 nb_sm_before_f1.burst_sbm_bp2 = nb_sm_before_f1.burst_bp2;
366 nb_sm_before_f1.burst_sbm_bp2 = nb_sm_before_f1.burst_bp2;
367 }
367 }
368 else
368 else
369 {
369 {
370 nb_sm_before_f1.burst_sbm_bp1 = nb_sm_before_f1.burst_bp1;
370 nb_sm_before_f1.burst_sbm_bp1 = nb_sm_before_f1.burst_bp1;
371 nb_sm_before_f1.burst_sbm_bp2 = nb_sm_before_f1.burst_bp2;
371 nb_sm_before_f1.burst_sbm_bp2 = nb_sm_before_f1.burst_bp2;
372 }
372 }
373 }
373 }
374
374
375 void init_k_coefficients_f1( void )
375 void init_k_coefficients_f1( void )
376 {
376 {
377 init_k_coefficients( k_coeff_intercalib_f1_norm, NB_BINS_COMPRESSED_SM_F1 );
377 init_k_coefficients( k_coeff_intercalib_f1_norm, NB_BINS_COMPRESSED_SM_F1 );
378 init_k_coefficients( k_coeff_intercalib_f1_sbm, NB_BINS_COMPRESSED_SM_SBM_F1);
378 init_k_coefficients( k_coeff_intercalib_f1_sbm, NB_BINS_COMPRESSED_SM_SBM_F1);
379 }
379 }
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@@ -1,283 +1,285
1 /** Functions related to data processing.
1 /** Functions related to data processing.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 * These function are related to data processing, i.e. spectral matrices averaging and basic parameters computation.
6 * These function are related to data processing, i.e. spectral matrices averaging and basic parameters computation.
7 *
7 *
8 */
8 */
9
9
10 #include "avf2_prc2.h"
10 #include "avf2_prc2.h"
11
11
12 nb_sm_before_bp_asm_f2 nb_sm_before_f2;
12 nb_sm_before_bp_asm_f2 nb_sm_before_f2;
13
13
14 extern ring_node sm_ring_f2[ ];
14 extern ring_node sm_ring_f2[ ];
15
15
16 //***
16 //***
17 // F2
17 // F2
18 ring_node_asm asm_ring_norm_f2 [ NB_RING_NODES_ASM_NORM_F2 ];
18 ring_node_asm asm_ring_norm_f2 [ NB_RING_NODES_ASM_NORM_F2 ];
19
19
20 ring_node ring_to_send_asm_f2 [ NB_RING_NODES_ASM_F2 ];
20 ring_node ring_to_send_asm_f2 [ NB_RING_NODES_ASM_F2 ];
21 int buffer_asm_f2 [ NB_RING_NODES_ASM_F2 * TOTAL_SIZE_SM ];
21 int buffer_asm_f2 [ NB_RING_NODES_ASM_F2 * TOTAL_SIZE_SM ];
22
22
23 float asm_f2_reorganized [ TOTAL_SIZE_SM ];
23 float asm_f2_reorganized [ TOTAL_SIZE_SM ];
24 char asm_f2_char [ TOTAL_SIZE_SM * 2 ];
24 char asm_f2_char [ TOTAL_SIZE_SM * 2 ];
25 float compressed_sm_norm_f2[ TOTAL_SIZE_COMPRESSED_ASM_NORM_F2];
25 float compressed_sm_norm_f2[ TOTAL_SIZE_COMPRESSED_ASM_NORM_F2];
26
26
27 float k_coeff_intercalib_f2[ NB_BINS_COMPRESSED_SM_F2 * NB_K_COEFF_PER_BIN ]; // 12 * 32 = 384
27 float k_coeff_intercalib_f2[ NB_BINS_COMPRESSED_SM_F2 * NB_K_COEFF_PER_BIN ]; // 12 * 32 = 384
28
28
29 //************
29 //************
30 // RTEMS TASKS
30 // RTEMS TASKS
31
31
32 //***
32 //***
33 // F2
33 // F2
34 rtems_task avf2_task( rtems_task_argument argument )
34 rtems_task avf2_task( rtems_task_argument argument )
35 {
35 {
36 rtems_event_set event_out;
36 rtems_event_set event_out;
37 rtems_status_code status;
37 rtems_status_code status;
38 rtems_id queue_id_prc2;
38 rtems_id queue_id_prc2;
39 asm_msg msgForMATR;
39 asm_msg msgForMATR;
40 ring_node *nodeForAveraging;
40 ring_node *nodeForAveraging;
41 ring_node_asm *current_ring_node_asm_norm_f2;
41 ring_node_asm *current_ring_node_asm_norm_f2;
42
42
43 unsigned int nb_norm_bp1;
43 unsigned int nb_norm_bp1;
44 unsigned int nb_norm_bp2;
44 unsigned int nb_norm_bp2;
45 unsigned int nb_norm_asm;
45 unsigned int nb_norm_asm;
46
46
47 nb_norm_bp1 = 0;
47 nb_norm_bp1 = 0;
48 nb_norm_bp2 = 0;
48 nb_norm_bp2 = 0;
49 nb_norm_asm = 0;
49 nb_norm_asm = 0;
50
50
51 reset_nb_sm_f2( ); // reset the sm counters that drive the BP and ASM computations / transmissions
51 reset_nb_sm_f2( ); // reset the sm counters that drive the BP and ASM computations / transmissions
52 ASM_generic_init_ring( asm_ring_norm_f2, NB_RING_NODES_ASM_NORM_F2 );
52 ASM_generic_init_ring( asm_ring_norm_f2, NB_RING_NODES_ASM_NORM_F2 );
53 current_ring_node_asm_norm_f2 = asm_ring_norm_f2;
53 current_ring_node_asm_norm_f2 = asm_ring_norm_f2;
54
54
55 BOOT_PRINTF("in AVF2 ***\n")
55 BOOT_PRINTF("in AVF2 ***\n")
56
56
57 status = get_message_queue_id_prc2( &queue_id_prc2 );
57 status = get_message_queue_id_prc2( &queue_id_prc2 );
58 if (status != RTEMS_SUCCESSFUL)
58 if (status != RTEMS_SUCCESSFUL)
59 {
59 {
60 PRINTF1("in AVF2 *** ERR get_message_queue_id_prc2 %d\n", status)
60 PRINTF1("in AVF2 *** ERR get_message_queue_id_prc2 %d\n", status)
61 }
61 }
62
62
63 while(1){
63 while(1){
64 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
64 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
65
65
66 //****************************************
66 //****************************************
67 // initialize the mesage for the MATR task
67 // initialize the mesage for the MATR task
68 msgForMATR.norm = current_ring_node_asm_norm_f2;
68 msgForMATR.norm = current_ring_node_asm_norm_f2;
69 msgForMATR.burst_sbm = NULL;
69 msgForMATR.burst_sbm = NULL;
70 msgForMATR.event = 0x00; // this composite event will be sent to the PRC2 task
70 msgForMATR.event = 0x00; // this composite event will be sent to the PRC2 task
71 //
71 //
72 //****************************************
72 //****************************************
73
73
74 nodeForAveraging = getRingNodeForAveraging( 2 );
74 nodeForAveraging = getRingNodeForAveraging( 2 );
75
75
76 // printf(" **0** %x . %x", sm_ring_f2[0].coarseTime, sm_ring_f2[0].fineTime);
76 // printf(" **0** %x . %x", sm_ring_f2[0].coarseTime, sm_ring_f2[0].fineTime);
77 // printf(" **1** %x . %x", sm_ring_f2[1].coarseTime, sm_ring_f2[1].fineTime);
77 // printf(" **1** %x . %x", sm_ring_f2[1].coarseTime, sm_ring_f2[1].fineTime);
78 // printf(" **2** %x . %x", sm_ring_f2[2].coarseTime, sm_ring_f2[2].fineTime);
78 // printf(" **2** %x . %x", sm_ring_f2[2].coarseTime, sm_ring_f2[2].fineTime);
79 // printf(" **3** %x . %x", sm_ring_f2[3].coarseTime, sm_ring_f2[3].fineTime);
79 // printf(" **3** %x . %x", sm_ring_f2[3].coarseTime, sm_ring_f2[3].fineTime);
80 // printf(" **4** %x . %x", sm_ring_f2[4].coarseTime, sm_ring_f2[4].fineTime);
80 // printf(" **4** %x . %x", sm_ring_f2[4].coarseTime, sm_ring_f2[4].fineTime);
81 // printf(" **5** %x . %x", sm_ring_f2[5].coarseTime, sm_ring_f2[5].fineTime);
81 // printf(" **5** %x . %x", sm_ring_f2[5].coarseTime, sm_ring_f2[5].fineTime);
82 // printf(" **6** %x . %x", sm_ring_f2[6].coarseTime, sm_ring_f2[6].fineTime);
82 // printf(" **6** %x . %x", sm_ring_f2[6].coarseTime, sm_ring_f2[6].fineTime);
83 // printf(" **7** %x . %x", sm_ring_f2[7].coarseTime, sm_ring_f2[7].fineTime);
83 // printf(" **7** %x . %x", sm_ring_f2[7].coarseTime, sm_ring_f2[7].fineTime);
84 // printf(" **8** %x . %x", sm_ring_f2[8].coarseTime, sm_ring_f2[8].fineTime);
84 // printf(" **8** %x . %x", sm_ring_f2[8].coarseTime, sm_ring_f2[8].fineTime);
85 // printf(" **9** %x . %x", sm_ring_f2[9].coarseTime, sm_ring_f2[9].fineTime);
85 // printf(" **9** %x . %x", sm_ring_f2[9].coarseTime, sm_ring_f2[9].fineTime);
86 // printf(" **10** %x . %x\n", sm_ring_f2[10].coarseTime, sm_ring_f2[10].fineTime);
86 // printf(" **10** %x . %x\n", sm_ring_f2[10].coarseTime, sm_ring_f2[10].fineTime);
87
87
88 // compute the average and store it in the averaged_sm_f2 buffer
88 // compute the average and store it in the averaged_sm_f2 buffer
89 SM_average_f2( current_ring_node_asm_norm_f2->matrix,
89 SM_average_f2( current_ring_node_asm_norm_f2->matrix,
90 nodeForAveraging,
90 nodeForAveraging,
91 nb_norm_bp1,
91 nb_norm_bp1,
92 &msgForMATR );
92 &msgForMATR );
93
93
94 // update nb_average
94 // update nb_average
95 nb_norm_bp1 = nb_norm_bp1 + NB_SM_BEFORE_AVF2;
95 nb_norm_bp1 = nb_norm_bp1 + NB_SM_BEFORE_AVF2;
96 nb_norm_bp2 = nb_norm_bp2 + NB_SM_BEFORE_AVF2;
96 nb_norm_bp2 = nb_norm_bp2 + NB_SM_BEFORE_AVF2;
97 nb_norm_asm = nb_norm_asm + NB_SM_BEFORE_AVF2;
97 nb_norm_asm = nb_norm_asm + NB_SM_BEFORE_AVF2;
98
98
99 if (nb_norm_bp1 == nb_sm_before_f2.norm_bp1)
99 if (nb_norm_bp1 == nb_sm_before_f2.norm_bp1)
100 {
100 {
101 nb_norm_bp1 = 0;
101 nb_norm_bp1 = 0;
102 // set another ring for the ASM storage
102 // set another ring for the ASM storage
103 current_ring_node_asm_norm_f2 = current_ring_node_asm_norm_f2->next;
103 current_ring_node_asm_norm_f2 = current_ring_node_asm_norm_f2->next;
104 if ( (lfrCurrentMode == LFR_MODE_NORMAL) || (lfrCurrentMode == LFR_MODE_SBM1)
104 if ( (lfrCurrentMode == LFR_MODE_NORMAL) || (lfrCurrentMode == LFR_MODE_SBM1)
105 || (lfrCurrentMode == LFR_MODE_SBM2) )
105 || (lfrCurrentMode == LFR_MODE_SBM2) )
106 {
106 {
107 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_BP1_F2;
107 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_BP1_F2;
108 }
108 }
109 }
109 }
110
110
111 if (nb_norm_bp2 == nb_sm_before_f2.norm_bp2)
111 if (nb_norm_bp2 == nb_sm_before_f2.norm_bp2)
112 {
112 {
113 nb_norm_bp2 = 0;
113 nb_norm_bp2 = 0;
114 if ( (lfrCurrentMode == LFR_MODE_NORMAL) || (lfrCurrentMode == LFR_MODE_SBM1)
114 if ( (lfrCurrentMode == LFR_MODE_NORMAL) || (lfrCurrentMode == LFR_MODE_SBM1)
115 || (lfrCurrentMode == LFR_MODE_SBM2) )
115 || (lfrCurrentMode == LFR_MODE_SBM2) )
116 {
116 {
117 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_BP2_F2;
117 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_BP2_F2;
118 }
118 }
119 }
119 }
120
120
121 if (nb_norm_asm == nb_sm_before_f2.norm_asm)
121 if (nb_norm_asm == nb_sm_before_f2.norm_asm)
122 {
122 {
123 nb_norm_asm = 0;
123 nb_norm_asm = 0;
124 if ( (lfrCurrentMode == LFR_MODE_NORMAL) || (lfrCurrentMode == LFR_MODE_SBM1)
124 if ( (lfrCurrentMode == LFR_MODE_NORMAL) || (lfrCurrentMode == LFR_MODE_SBM1)
125 || (lfrCurrentMode == LFR_MODE_SBM2) )
125 || (lfrCurrentMode == LFR_MODE_SBM2) )
126 {
126 {
127 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_ASM_F2;
127 msgForMATR.event = msgForMATR.event | RTEMS_EVENT_NORM_ASM_F2;
128 }
128 }
129 }
129 }
130
130
131 //*************************
131 //*************************
132 // send the message to MATR
132 // send the message to MATR
133 if (msgForMATR.event != 0x00)
133 if (msgForMATR.event != 0x00)
134 {
134 {
135 status = rtems_message_queue_send( queue_id_prc2, (char *) &msgForMATR, MSG_QUEUE_SIZE_PRC2);
135 status = rtems_message_queue_send( queue_id_prc2, (char *) &msgForMATR, MSG_QUEUE_SIZE_PRC2);
136 }
136 }
137
137
138 if (status != RTEMS_SUCCESSFUL) {
138 if (status != RTEMS_SUCCESSFUL) {
139 printf("in AVF2 *** Error sending message to MATR, code %d\n", status);
139 printf("in AVF2 *** Error sending message to MATR, code %d\n", status);
140 }
140 }
141 }
141 }
142 }
142 }
143
143
144 rtems_task prc2_task( rtems_task_argument argument )
144 rtems_task prc2_task( rtems_task_argument argument )
145 {
145 {
146 char incomingData[MSG_QUEUE_SIZE_SEND]; // incoming data buffer
146 char incomingData[MSG_QUEUE_SIZE_SEND]; // incoming data buffer
147 size_t size; // size of the incoming TC packet
147 size_t size; // size of the incoming TC packet
148 asm_msg *incomingMsg;
148 asm_msg *incomingMsg;
149 //
149 //
150 rtems_status_code status;
150 rtems_status_code status;
151 rtems_id queue_id_send;
151 rtems_id queue_id_send;
152 rtems_id queue_id_q_p2;
152 rtems_id queue_id_q_p2;
153 bp_packet packet_norm_bp1;
153 bp_packet packet_norm_bp1;
154 bp_packet packet_norm_bp2;
154 bp_packet packet_norm_bp2;
155 ring_node *current_ring_node_to_send_asm_f2;
155 ring_node *current_ring_node_to_send_asm_f2;
156
156
157 unsigned long long int localTime;
157 unsigned long long int localTime;
158
158
159 // init the ring of the averaged spectral matrices which will be transmitted to the DPU
159 // init the ring of the averaged spectral matrices which will be transmitted to the DPU
160 init_ring( ring_to_send_asm_f2, NB_RING_NODES_ASM_F2, (volatile int*) buffer_asm_f2, TOTAL_SIZE_SM );
160 init_ring( ring_to_send_asm_f2, NB_RING_NODES_ASM_F2, (volatile int*) buffer_asm_f2, TOTAL_SIZE_SM );
161 current_ring_node_to_send_asm_f2 = ring_to_send_asm_f2;
161 current_ring_node_to_send_asm_f2 = ring_to_send_asm_f2;
162
162
163 //*************
163 //*************
164 // NORM headers
164 // NORM headers
165 BP_init_header( &packet_norm_bp1,
165 BP_init_header( &packet_norm_bp1,
166 APID_TM_SCIENCE_NORMAL_BURST, SID_NORM_BP1_F2,
166 APID_TM_SCIENCE_NORMAL_BURST, SID_NORM_BP1_F2,
167 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP1_F2, NB_BINS_COMPRESSED_SM_F2 );
167 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP1_F2, NB_BINS_COMPRESSED_SM_F2 );
168 BP_init_header( &packet_norm_bp2,
168 BP_init_header( &packet_norm_bp2,
169 APID_TM_SCIENCE_NORMAL_BURST, SID_NORM_BP2_F2,
169 APID_TM_SCIENCE_NORMAL_BURST, SID_NORM_BP2_F2,
170 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP2_F2, NB_BINS_COMPRESSED_SM_F2 );
170 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP2_F2, NB_BINS_COMPRESSED_SM_F2 );
171
171
172 status = get_message_queue_id_send( &queue_id_send );
172 status = get_message_queue_id_send( &queue_id_send );
173 if (status != RTEMS_SUCCESSFUL)
173 if (status != RTEMS_SUCCESSFUL)
174 {
174 {
175 PRINTF1("in PRC2 *** ERR get_message_queue_id_send %d\n", status)
175 PRINTF1("in PRC2 *** ERR get_message_queue_id_send %d\n", status)
176 }
176 }
177 status = get_message_queue_id_prc2( &queue_id_q_p2);
177 status = get_message_queue_id_prc2( &queue_id_q_p2);
178 if (status != RTEMS_SUCCESSFUL)
178 if (status != RTEMS_SUCCESSFUL)
179 {
179 {
180 PRINTF1("in PRC2 *** ERR get_message_queue_id_prc2 %d\n", status)
180 PRINTF1("in PRC2 *** ERR get_message_queue_id_prc2 %d\n", status)
181 }
181 }
182
182
183 BOOT_PRINTF("in PRC2 ***\n")
183 BOOT_PRINTF("in PRC2 ***\n")
184
184
185 while(1){
185 while(1){
186 status = rtems_message_queue_receive( queue_id_q_p2, incomingData, &size, //************************************
186 status = rtems_message_queue_receive( queue_id_q_p2, incomingData, &size, //************************************
187 RTEMS_WAIT, RTEMS_NO_TIMEOUT ); // wait for a message coming from AVF0
187 RTEMS_WAIT, RTEMS_NO_TIMEOUT ); // wait for a message coming from AVF2
188
188
189 incomingMsg = (asm_msg*) incomingData;
189 incomingMsg = (asm_msg*) incomingData;
190
190
191 localTime = getTimeAsUnsignedLongLongInt( );
191 localTime = getTimeAsUnsignedLongLongInt( );
192
192
193 //*****
193 //*****
194 //*****
194 //*****
195 // NORM
195 // NORM
196 //*****
196 //*****
197 //*****
197 //*****
198 // 1) compress the matrix for Basic Parameters calculation
199 ASM_compress_reorganize_and_divide( incomingMsg->norm->matrix, compressed_sm_norm_f2,
200 nb_sm_before_f2.norm_bp1,
201 NB_BINS_COMPRESSED_SM_F2, NB_BINS_TO_AVERAGE_ASM_F2,
202 ASM_F2_INDICE_START );
203 // BP1_F2
198 if (incomingMsg->event & RTEMS_EVENT_NORM_BP1_F2)
204 if (incomingMsg->event & RTEMS_EVENT_NORM_BP1_F2)
199 {
205 {
200 // 1) compress the matrix for Basic Parameters calculation
206 // 1) compute the BP1 set
201 ASM_compress_reorganize_and_divide( incomingMsg->norm->matrix, compressed_sm_norm_f2,
207 // BP1_set( compressed_sm_norm_f2, k_coeff_intercalib_f2, NB_BINS_COMPRESSED_SM_F2, packet_norm_bp1.data );
202 nb_sm_before_f2.norm_bp1,
208 // 2) send the BP1 set
203 NB_BINS_COMPRESSED_SM_F2, NB_BINS_TO_AVERAGE_ASM_F2,
204 ASM_F2_INDICE_START );
205 // 2) compute the BP1 set
206 BP1_set( compressed_sm_norm_f2, k_coeff_intercalib_f2, NB_BINS_COMPRESSED_SM_F2, packet_norm_bp1.data );
207 // 3) send the BP1 set
208 set_time( packet_norm_bp1.time, (unsigned char *) &incomingMsg->coarseTimeNORM );
209 set_time( packet_norm_bp1.time, (unsigned char *) &incomingMsg->coarseTimeNORM );
209 set_time( packet_norm_bp1.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeNORM );
210 set_time( packet_norm_bp1.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeNORM );
210 BP_send( (char *) &packet_norm_bp1, queue_id_send,
211 BP_send( (char *) &packet_norm_bp1, queue_id_send,
211 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP1_F2 + PACKET_LENGTH_DELTA,
212 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP1_F2 + PACKET_LENGTH_DELTA,
212 SID_NORM_BP1_F2 );
213 SID_NORM_BP1_F2 );
213 if (incomingMsg->event & RTEMS_EVENT_NORM_BP2_F2)
214 }
214 {
215 // BP2_F2
215 // 1) compute the BP2 set using the same ASM as the one used for BP1
216 if (incomingMsg->event & RTEMS_EVENT_NORM_BP2_F2)
216 BP2_set( compressed_sm_norm_f2, NB_BINS_COMPRESSED_SM_F2, packet_norm_bp2.data );
217 {
217 // 2) send the BP2 set
218 // 1) compute the BP2 set
218 set_time( packet_norm_bp2.time, (unsigned char *) &incomingMsg->coarseTimeNORM );
219 BP2_set( compressed_sm_norm_f2, NB_BINS_COMPRESSED_SM_F2, packet_norm_bp2.data );
219 set_time( packet_norm_bp2.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeNORM );
220 // 2) send the BP2 set
220 BP_send( (char *) &packet_norm_bp2, queue_id_send,
221 set_time( packet_norm_bp2.time, (unsigned char *) &incomingMsg->coarseTimeNORM );
221 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP2_F2 + PACKET_LENGTH_DELTA,
222 set_time( packet_norm_bp2.acquisitionTime, (unsigned char *) &incomingMsg->coarseTimeNORM );
222 SID_NORM_BP2_F2 );
223 BP_send( (char *) &packet_norm_bp2, queue_id_send,
223 }
224 PACKET_LENGTH_TM_LFR_SCIENCE_NORM_BP2_F2 + PACKET_LENGTH_DELTA,
225 SID_NORM_BP2_F2 );
224 }
226 }
225
227
226 if (incomingMsg->event & RTEMS_EVENT_NORM_ASM_F2)
228 if (incomingMsg->event & RTEMS_EVENT_NORM_ASM_F2)
227 {
229 {
228 // 1) reorganize the ASM and divide
230 // 1) reorganize the ASM and divide
229 ASM_reorganize_and_divide( incomingMsg->norm->matrix,
231 ASM_reorganize_and_divide( incomingMsg->norm->matrix,
230 asm_f2_reorganized,
232 asm_f2_reorganized,
231 nb_sm_before_f2.norm_bp1 );
233 nb_sm_before_f2.norm_bp1 );
232 // 2) convert the float array in a char array
234 // 2) convert the float array in a char array
233 ASM_convert( asm_f2_reorganized, (char*) current_ring_node_to_send_asm_f2->buffer_address );
235 ASM_convert( asm_f2_reorganized, (char*) current_ring_node_to_send_asm_f2->buffer_address );
234 current_ring_node_to_send_asm_f2->coarseTime = incomingMsg->coarseTimeNORM;
236 current_ring_node_to_send_asm_f2->coarseTime = incomingMsg->coarseTimeNORM;
235 current_ring_node_to_send_asm_f2->fineTime = incomingMsg->fineTimeNORM;
237 current_ring_node_to_send_asm_f2->fineTime = incomingMsg->fineTimeNORM;
236 current_ring_node_to_send_asm_f2->sid = SID_NORM_ASM_F2;
238 current_ring_node_to_send_asm_f2->sid = SID_NORM_ASM_F2;
237 // 3) send the spectral matrix packets
239 // 3) send the spectral matrix packets
238 status = rtems_message_queue_send( queue_id_send, &current_ring_node_to_send_asm_f2, sizeof( ring_node* ) );
240 status = rtems_message_queue_send( queue_id_send, &current_ring_node_to_send_asm_f2, sizeof( ring_node* ) );
239 // change asm ring node
241 // change asm ring node
240 current_ring_node_to_send_asm_f2 = current_ring_node_to_send_asm_f2->next;
242 current_ring_node_to_send_asm_f2 = current_ring_node_to_send_asm_f2->next;
241 }
243 }
242
244
243 }
245 }
244 }
246 }
245
247
246 //**********
248 //**********
247 // FUNCTIONS
249 // FUNCTIONS
248
250
249 void reset_nb_sm_f2( void )
251 void reset_nb_sm_f2( void )
250 {
252 {
251 nb_sm_before_f2.norm_bp1 = parameter_dump_packet.sy_lfr_n_bp_p0;
253 nb_sm_before_f2.norm_bp1 = parameter_dump_packet.sy_lfr_n_bp_p0;
252 nb_sm_before_f2.norm_bp2 = parameter_dump_packet.sy_lfr_n_bp_p1;
254 nb_sm_before_f2.norm_bp2 = parameter_dump_packet.sy_lfr_n_bp_p1;
253 nb_sm_before_f2.norm_asm = parameter_dump_packet.sy_lfr_n_asm_p[0] * 256 + parameter_dump_packet.sy_lfr_n_asm_p[1];
255 nb_sm_before_f2.norm_asm = parameter_dump_packet.sy_lfr_n_asm_p[0] * 256 + parameter_dump_packet.sy_lfr_n_asm_p[1];
254 }
256 }
255
257
256 void SM_average_f2( float *averaged_spec_mat_f2,
258 void SM_average_f2( float *averaged_spec_mat_f2,
257 ring_node *ring_node,
259 ring_node *ring_node,
258 unsigned int nbAverageNormF2,
260 unsigned int nbAverageNormF2,
259 asm_msg *msgForMATR )
261 asm_msg *msgForMATR )
260 {
262 {
261 float sum;
263 float sum;
262 unsigned int i;
264 unsigned int i;
263
265
264 for(i=0; i<TOTAL_SIZE_SM; i++)
266 for(i=0; i<TOTAL_SIZE_SM; i++)
265 {
267 {
266 sum = ( (int *) (ring_node->buffer_address) ) [ i ];
268 sum = ( (int *) (ring_node->buffer_address) ) [ i ];
267 if ( (nbAverageNormF2 == 0) )
269 if ( (nbAverageNormF2 == 0) )
268 {
270 {
269 averaged_spec_mat_f2[ i ] = sum;
271 averaged_spec_mat_f2[ i ] = sum;
270 msgForMATR->coarseTimeNORM = ring_node->coarseTime;
272 msgForMATR->coarseTimeNORM = ring_node->coarseTime;
271 msgForMATR->fineTimeNORM = ring_node->fineTime;
273 msgForMATR->fineTimeNORM = ring_node->fineTime;
272 }
274 }
273 else
275 else
274 {
276 {
275 averaged_spec_mat_f2[ i ] = ( averaged_spec_mat_f2[ i ] + sum );
277 averaged_spec_mat_f2[ i ] = ( averaged_spec_mat_f2[ i ] + sum );
276 }
278 }
277 }
279 }
278 }
280 }
279
281
280 void init_k_coefficients_f2( void )
282 void init_k_coefficients_f2( void )
281 {
283 {
282 init_k_coefficients( k_coeff_intercalib_f2, NB_BINS_COMPRESSED_SM_F2);
284 init_k_coefficients( k_coeff_intercalib_f2, NB_BINS_COMPRESSED_SM_F2);
283 }
285 }
Show file before | Show file after | Hide comments
@@ -1,538 +1,586
1 /** Functions related to data processing.
1 /** Functions related to data processing.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 * These function are related to data processing, i.e. spectral matrices averaging and basic parameters computation.
6 * These function are related to data processing, i.e. spectral matrices averaging and basic parameters computation.
7 *
7 *
8 */
8 */
9
9
10 #include "fsw_processing.h"
10 #include "fsw_processing.h"
11 #include "fsw_processing_globals.c"
11 #include "fsw_processing_globals.c"
12
12
13 unsigned int nb_sm_f0;
13 unsigned int nb_sm_f0;
14 unsigned int nb_sm_f0_aux_f1;
14 unsigned int nb_sm_f0_aux_f1;
15 unsigned int nb_sm_f1;
15 unsigned int nb_sm_f1;
16 unsigned int nb_sm_f0_aux_f2;
16 unsigned int nb_sm_f0_aux_f2;
17
17
18 //************************
18 //************************
19 // spectral matrices rings
19 // spectral matrices rings
20 ring_node sm_ring_f0[ NB_RING_NODES_SM_F0 ];
20 ring_node sm_ring_f0[ NB_RING_NODES_SM_F0 ];
21 ring_node sm_ring_f1[ NB_RING_NODES_SM_F1 ];
21 ring_node sm_ring_f1[ NB_RING_NODES_SM_F1 ];
22 ring_node sm_ring_f2[ NB_RING_NODES_SM_F2 ];
22 ring_node sm_ring_f2[ NB_RING_NODES_SM_F2 ];
23 ring_node *current_ring_node_sm_f0;
23 ring_node *current_ring_node_sm_f0;
24 ring_node *current_ring_node_sm_f1;
24 ring_node *current_ring_node_sm_f1;
25 ring_node *current_ring_node_sm_f2;
25 ring_node *current_ring_node_sm_f2;
26 ring_node *ring_node_for_averaging_sm_f0;
26 ring_node *ring_node_for_averaging_sm_f0;
27 ring_node *ring_node_for_averaging_sm_f1;
27 ring_node *ring_node_for_averaging_sm_f1;
28 ring_node *ring_node_for_averaging_sm_f2;
28 ring_node *ring_node_for_averaging_sm_f2;
29
29
30 //
30 //
31 ring_node * getRingNodeForAveraging( unsigned char frequencyChannel)
31 ring_node * getRingNodeForAveraging( unsigned char frequencyChannel)
32 {
32 {
33 ring_node *node;
33 ring_node *node;
34
34
35 node = NULL;
35 node = NULL;
36 switch ( frequencyChannel ) {
36 switch ( frequencyChannel ) {
37 case 0:
37 case 0:
38 node = ring_node_for_averaging_sm_f0;
38 node = ring_node_for_averaging_sm_f0;
39 break;
39 break;
40 case 1:
40 case 1:
41 node = ring_node_for_averaging_sm_f1;
41 node = ring_node_for_averaging_sm_f1;
42 break;
42 break;
43 case 2:
43 case 2:
44 node = ring_node_for_averaging_sm_f2;
44 node = ring_node_for_averaging_sm_f2;
45 break;
45 break;
46 default:
46 default:
47 break;
47 break;
48 }
48 }
49
49
50 return node;
50 return node;
51 }
51 }
52
52
53 //***********************************************************
53 //***********************************************************
54 // Interrupt Service Routine for spectral matrices processing
54 // Interrupt Service Routine for spectral matrices processing
55
55
56 void spectral_matrices_isr_f0( void )
56 void spectral_matrices_isr_f0( unsigned char statusReg )
57 {
57 {
58 unsigned char status;
58 unsigned char status;
59 rtems_status_code status_code;
59 rtems_status_code status_code;
60 ring_node *full_ring_node;
60 ring_node *full_ring_node;
61
61
62 status = spectral_matrix_regs->status & 0x03; // [0011] get the status_ready_matrix_f0_x bits
62 status = statusReg & 0x03; // [0011] get the status_ready_matrix_f0_x bits
63
63
64 switch(status)
64 switch(status)
65 {
65 {
66 case 0:
66 case 0:
67 break;
67 break;
68 case 3:
68 case 3:
69 // UNEXPECTED VALUE
69 // UNEXPECTED VALUE
70 spectral_matrix_regs->status = 0x03; // [0011]
70 spectral_matrix_regs->status = 0x03; // [0011]
71 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_11 );
71 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_11 );
72 break;
72 break;
73 case 1:
73 case 1:
74 full_ring_node = current_ring_node_sm_f0->previous;
74 full_ring_node = current_ring_node_sm_f0->previous;
75 full_ring_node->coarseTime = spectral_matrix_regs->f0_0_coarse_time;
75 full_ring_node->coarseTime = spectral_matrix_regs->f0_0_coarse_time;
76 full_ring_node->fineTime = spectral_matrix_regs->f0_0_fine_time;
76 full_ring_node->fineTime = spectral_matrix_regs->f0_0_fine_time;
77 current_ring_node_sm_f0 = current_ring_node_sm_f0->next;
77 current_ring_node_sm_f0 = current_ring_node_sm_f0->next;
78 spectral_matrix_regs->f0_0_address = current_ring_node_sm_f0->buffer_address;
78 spectral_matrix_regs->f0_0_address = current_ring_node_sm_f0->buffer_address;
79 // if there are enough ring nodes ready, wake up an AVFx task
79 // if there are enough ring nodes ready, wake up an AVFx task
80 nb_sm_f0 = nb_sm_f0 + 1;
80 nb_sm_f0 = nb_sm_f0 + 1;
81 if (nb_sm_f0 == NB_SM_BEFORE_AVF0)
81 if (nb_sm_f0 == NB_SM_BEFORE_AVF0)
82 {
82 {
83 ring_node_for_averaging_sm_f0 = full_ring_node;
83 ring_node_for_averaging_sm_f0 = full_ring_node;
84 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
84 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
85 {
85 {
86 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
86 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
87 }
87 }
88 nb_sm_f0 = 0;
88 nb_sm_f0 = 0;
89 }
89 }
90 spectral_matrix_regs->status = 0x01; // [0000 0001]
90 spectral_matrix_regs->status = 0x01; // [0000 0001]
91 break;
91 break;
92 case 2:
92 case 2:
93 full_ring_node = current_ring_node_sm_f0->previous;
93 full_ring_node = current_ring_node_sm_f0->previous;
94 full_ring_node->coarseTime = spectral_matrix_regs->f0_1_coarse_time;
94 full_ring_node->coarseTime = spectral_matrix_regs->f0_1_coarse_time;
95 full_ring_node->fineTime = spectral_matrix_regs->f0_1_fine_time;
95 full_ring_node->fineTime = spectral_matrix_regs->f0_1_fine_time;
96 current_ring_node_sm_f0 = current_ring_node_sm_f0->next;
96 current_ring_node_sm_f0 = current_ring_node_sm_f0->next;
97 spectral_matrix_regs->f0_1_address = current_ring_node_sm_f0->buffer_address;
97 spectral_matrix_regs->f0_1_address = current_ring_node_sm_f0->buffer_address;
98 // if there are enough ring nodes ready, wake up an AVFx task
98 // if there are enough ring nodes ready, wake up an AVFx task
99 nb_sm_f0 = nb_sm_f0 + 1;
99 nb_sm_f0 = nb_sm_f0 + 1;
100 if (nb_sm_f0 == NB_SM_BEFORE_AVF0)
100 if (nb_sm_f0 == NB_SM_BEFORE_AVF0)
101 {
101 {
102 ring_node_for_averaging_sm_f0 = full_ring_node;
102 ring_node_for_averaging_sm_f0 = full_ring_node;
103 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
103 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
104 {
104 {
105 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
105 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
106 }
106 }
107 nb_sm_f0 = 0;
107 nb_sm_f0 = 0;
108 }
108 }
109 spectral_matrix_regs->status = 0x02; // [0000 0010]
109 spectral_matrix_regs->status = 0x02; // [0000 0010]
110 break;
110 break;
111 }
111 }
112 }
112 }
113
113
114 void spectral_matrices_isr_f1( void )
114 void spectral_matrices_isr_f1( unsigned char statusReg )
115 {
115 {
116 rtems_status_code status_code;
116 rtems_status_code status_code;
117 unsigned char status;
117 unsigned char status;
118 ring_node *full_ring_node;
118 ring_node *full_ring_node;
119
119
120 status = (spectral_matrix_regs->status & 0x0c) >> 2; // [1100] get the status_ready_matrix_f0_x bits
120 status = (statusReg & 0x0c) >> 2; // [1100] get the status_ready_matrix_f0_x bits
121
121
122 switch(status)
122 switch(status)
123 {
123 {
124 case 0:
124 case 0:
125 break;
125 break;
126 case 3:
126 case 3:
127 // UNEXPECTED VALUE
127 // UNEXPECTED VALUE
128 spectral_matrix_regs->status = 0xc0; // [1100]
128 spectral_matrix_regs->status = 0xc0; // [1100]
129 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_11 );
129 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_11 );
130 break;
130 break;
131 case 1:
131 case 1:
132 full_ring_node = current_ring_node_sm_f1->previous;
132 full_ring_node = current_ring_node_sm_f1->previous;
133 full_ring_node->coarseTime = spectral_matrix_regs->f1_0_coarse_time;
133 full_ring_node->coarseTime = spectral_matrix_regs->f1_0_coarse_time;
134 full_ring_node->fineTime = spectral_matrix_regs->f1_0_fine_time;
134 full_ring_node->fineTime = spectral_matrix_regs->f1_0_fine_time;
135 current_ring_node_sm_f1 = current_ring_node_sm_f1->next;
135 current_ring_node_sm_f1 = current_ring_node_sm_f1->next;
136 spectral_matrix_regs->f1_0_address = current_ring_node_sm_f1->buffer_address;
136 spectral_matrix_regs->f1_0_address = current_ring_node_sm_f1->buffer_address;
137 // if there are enough ring nodes ready, wake up an AVFx task
137 // if there are enough ring nodes ready, wake up an AVFx task
138 nb_sm_f1 = nb_sm_f1 + 1;
138 nb_sm_f1 = nb_sm_f1 + 1;
139 if (nb_sm_f1 == NB_SM_BEFORE_AVF1)
139 if (nb_sm_f1 == NB_SM_BEFORE_AVF1)
140 {
140 {
141 ring_node_for_averaging_sm_f1 = full_ring_node;
141 ring_node_for_averaging_sm_f1 = full_ring_node;
142 if (rtems_event_send( Task_id[TASKID_AVF1], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
142 if (rtems_event_send( Task_id[TASKID_AVF1], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
143 {
143 {
144 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
144 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
145 }
145 }
146 nb_sm_f1 = 0;
146 nb_sm_f1 = 0;
147 }
147 }
148 spectral_matrix_regs->status = 0x04; // [0000 0100]
148 spectral_matrix_regs->status = 0x04; // [0000 0100]
149 break;
149 break;
150 case 2:
150 case 2:
151 full_ring_node = current_ring_node_sm_f1->previous;
151 full_ring_node = current_ring_node_sm_f1->previous;
152 full_ring_node->coarseTime = spectral_matrix_regs->f1_1_coarse_time;
152 full_ring_node->coarseTime = spectral_matrix_regs->f1_1_coarse_time;
153 full_ring_node->fineTime = spectral_matrix_regs->f1_1_fine_time;
153 full_ring_node->fineTime = spectral_matrix_regs->f1_1_fine_time;
154 current_ring_node_sm_f1 = current_ring_node_sm_f1->next;
154 current_ring_node_sm_f1 = current_ring_node_sm_f1->next;
155 spectral_matrix_regs->f1_1_address = current_ring_node_sm_f1->buffer_address;
155 spectral_matrix_regs->f1_1_address = current_ring_node_sm_f1->buffer_address;
156 // if there are enough ring nodes ready, wake up an AVFx task
156 // if there are enough ring nodes ready, wake up an AVFx task
157 nb_sm_f1 = nb_sm_f1 + 1;
157 nb_sm_f1 = nb_sm_f1 + 1;
158 if (nb_sm_f1 == NB_SM_BEFORE_AVF1)
158 if (nb_sm_f1 == NB_SM_BEFORE_AVF1)
159 {
159 {
160 ring_node_for_averaging_sm_f1 = full_ring_node;
160 ring_node_for_averaging_sm_f1 = full_ring_node;
161 if (rtems_event_send( Task_id[TASKID_AVF1], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
161 if (rtems_event_send( Task_id[TASKID_AVF1], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
162 {
162 {
163 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
163 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
164 }
164 }
165 nb_sm_f1 = 0;
165 nb_sm_f1 = 0;
166 }
166 }
167 spectral_matrix_regs->status = 0x08; // [1000 0000]
167 spectral_matrix_regs->status = 0x08; // [1000 0000]
168 break;
168 break;
169 }
169 }
170 }
170 }
171
171
172 void spectral_matrices_isr_f2( void )
172 void spectral_matrices_isr_f2( unsigned char statusReg )
173 {
173 {
174 unsigned char status;
174 unsigned char status;
175 rtems_status_code status_code;
175 rtems_status_code status_code;
176
176
177 status = (spectral_matrix_regs->status & 0x30) >> 4; // [0011 0000] get the status_ready_matrix_f0_x bits
177 status = (statusReg & 0x30) >> 4; // [0011 0000] get the status_ready_matrix_f0_x bits
178
178
179 switch(status)
179 switch(status)
180 {
180 {
181 case 0:
181 case 0:
182 break;
182 break;
183 case 3:
183 case 3:
184 // UNEXPECTED VALUE
184 // UNEXPECTED VALUE
185 spectral_matrix_regs->status = 0x30; // [0011 0000]
185 spectral_matrix_regs->status = 0x30; // [0011 0000]
186 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_11 );
186 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_11 );
187 break;
187 break;
188 case 1:
188 case 1:
189 ring_node_for_averaging_sm_f2 = current_ring_node_sm_f2->previous;
189 ring_node_for_averaging_sm_f2 = current_ring_node_sm_f2->previous;
190 current_ring_node_sm_f2 = current_ring_node_sm_f2->next;
190 current_ring_node_sm_f2 = current_ring_node_sm_f2->next;
191 ring_node_for_averaging_sm_f2->coarseTime = spectral_matrix_regs->f2_0_coarse_time;
191 ring_node_for_averaging_sm_f2->coarseTime = spectral_matrix_regs->f2_0_coarse_time;
192 ring_node_for_averaging_sm_f2->fineTime = spectral_matrix_regs->f2_0_fine_time;
192 ring_node_for_averaging_sm_f2->fineTime = spectral_matrix_regs->f2_0_fine_time;
193 spectral_matrix_regs->f2_0_address = current_ring_node_sm_f2->buffer_address;
193 spectral_matrix_regs->f2_0_address = current_ring_node_sm_f2->buffer_address;
194 spectral_matrix_regs->status = 0x10; // [0001 0000]
194 spectral_matrix_regs->status = 0x10; // [0001 0000]
195 if (rtems_event_send( Task_id[TASKID_AVF2], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
195 if (rtems_event_send( Task_id[TASKID_AVF2], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
196 {
196 {
197 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
197 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
198 }
198 }
199 break;
199 break;
200 case 2:
200 case 2:
201 ring_node_for_averaging_sm_f2 = current_ring_node_sm_f2->previous;
201 ring_node_for_averaging_sm_f2 = current_ring_node_sm_f2->previous;
202 current_ring_node_sm_f2 = current_ring_node_sm_f2->next;
202 current_ring_node_sm_f2 = current_ring_node_sm_f2->next;
203 ring_node_for_averaging_sm_f2->coarseTime = spectral_matrix_regs->f2_1_coarse_time;
203 ring_node_for_averaging_sm_f2->coarseTime = spectral_matrix_regs->f2_1_coarse_time;
204 ring_node_for_averaging_sm_f2->fineTime = spectral_matrix_regs->f2_1_fine_time;
204 ring_node_for_averaging_sm_f2->fineTime = spectral_matrix_regs->f2_1_fine_time;
205 spectral_matrix_regs->f2_1_address = current_ring_node_sm_f2->buffer_address;
205 spectral_matrix_regs->f2_1_address = current_ring_node_sm_f2->buffer_address;
206 spectral_matrix_regs->status = 0x20; // [0010 0000]
206 spectral_matrix_regs->status = 0x20; // [0010 0000]
207 if (rtems_event_send( Task_id[TASKID_AVF2], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
207 if (rtems_event_send( Task_id[TASKID_AVF2], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
208 {
208 {
209 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
209 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
210 }
210 }
211 break;
211 break;
212 }
212 }
213 }
213 }
214
214
215 void spectral_matrix_isr_error_handler( void )
215 void spectral_matrix_isr_error_handler( unsigned char statusReg )
216 {
216 {
217 rtems_status_code status_code;
217 rtems_status_code status_code;
218
218
219 if (spectral_matrix_regs->status & 0x7c0) // [0111 1100 0000]
219 if (statusReg & 0x7c0) // [0111 1100 0000]
220 {
220 {
221 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_8 );
221 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_8 );
222 }
222 }
223
223
224 spectral_matrix_regs->status = spectral_matrix_regs->status & 0x7c0;
224 spectral_matrix_regs->status = spectral_matrix_regs->status & 0x7c0;
225 }
225 }
226
226
227 rtems_isr spectral_matrices_isr( rtems_vector_number vector )
227 rtems_isr spectral_matrices_isr( rtems_vector_number vector )
228 {
228 {
229 // STATUS REGISTER
229 // STATUS REGISTER
230 // input_fifo_write(2) *** input_fifo_write(1) *** input_fifo_write(0)
230 // input_fifo_write(2) *** input_fifo_write(1) *** input_fifo_write(0)
231 // 10 9 8
231 // 10 9 8
232 // buffer_full ** bad_component_err ** f2_1 ** f2_0 ** f1_1 ** f1_0 ** f0_1 ** f0_0
232 // buffer_full ** bad_component_err ** f2_1 ** f2_0 ** f1_1 ** f1_0 ** f0_1 ** f0_0
233 // 7 6 5 4 3 2 1 0
233 // 7 6 5 4 3 2 1 0
234
234
235 spectral_matrices_isr_f0();
235 unsigned char statusReg;
236
236
237 spectral_matrices_isr_f1();
237 statusReg = spectral_matrix_regs->status;
238
239 spectral_matrices_isr_f0( statusReg );
238
240
239 spectral_matrices_isr_f2();
241 spectral_matrices_isr_f1( statusReg );
240
242
241 spectral_matrix_isr_error_handler();
243 spectral_matrices_isr_f2( statusReg );
244
245 spectral_matrix_isr_error_handler( statusReg );
242 }
246 }
243
247
244 rtems_isr spectral_matrices_isr_simu( rtems_vector_number vector )
248 rtems_isr spectral_matrices_isr_simu( rtems_vector_number vector )
245 {
249 {
246 rtems_status_code status_code;
250 rtems_status_code status_code;
247
251
248 //***
252 //***
249 // F0
253 // F0
250 nb_sm_f0 = nb_sm_f0 + 1;
254 nb_sm_f0 = nb_sm_f0 + 1;
251 if (nb_sm_f0 == NB_SM_BEFORE_AVF0 )
255 if (nb_sm_f0 == NB_SM_BEFORE_AVF0 )
252 {
256 {
253 ring_node_for_averaging_sm_f0 = current_ring_node_sm_f0;
257 ring_node_for_averaging_sm_f0 = current_ring_node_sm_f0;
254 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
258 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
255 {
259 {
256 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
260 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
257 }
261 }
258 nb_sm_f0 = 0;
262 nb_sm_f0 = 0;
259 }
263 }
260
264
261 //***
265 //***
262 // F1
266 // F1
263 nb_sm_f0_aux_f1 = nb_sm_f0_aux_f1 + 1;
267 nb_sm_f0_aux_f1 = nb_sm_f0_aux_f1 + 1;
264 if (nb_sm_f0_aux_f1 == 6)
268 if (nb_sm_f0_aux_f1 == 6)
265 {
269 {
266 nb_sm_f0_aux_f1 = 0;
270 nb_sm_f0_aux_f1 = 0;
267 nb_sm_f1 = nb_sm_f1 + 1;
271 nb_sm_f1 = nb_sm_f1 + 1;
268 }
272 }
269 if (nb_sm_f1 == NB_SM_BEFORE_AVF1 )
273 if (nb_sm_f1 == NB_SM_BEFORE_AVF1 )
270 {
274 {
271 ring_node_for_averaging_sm_f1 = current_ring_node_sm_f1;
275 ring_node_for_averaging_sm_f1 = current_ring_node_sm_f1;
272 if (rtems_event_send( Task_id[TASKID_AVF1], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
276 if (rtems_event_send( Task_id[TASKID_AVF1], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
273 {
277 {
274 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
278 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
275 }
279 }
276 nb_sm_f1 = 0;
280 nb_sm_f1 = 0;
277 }
281 }
278
282
279 //***
283 //***
280 // F2
284 // F2
281 nb_sm_f0_aux_f2 = nb_sm_f0_aux_f2 + 1;
285 nb_sm_f0_aux_f2 = nb_sm_f0_aux_f2 + 1;
282 if (nb_sm_f0_aux_f2 == 96)
286 if (nb_sm_f0_aux_f2 == 96)
283 {
287 {
284 nb_sm_f0_aux_f2 = 0;
288 nb_sm_f0_aux_f2 = 0;
285 ring_node_for_averaging_sm_f2 = current_ring_node_sm_f2;
289 ring_node_for_averaging_sm_f2 = current_ring_node_sm_f2;
286 if (rtems_event_send( Task_id[TASKID_AVF2], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
290 if (rtems_event_send( Task_id[TASKID_AVF2], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
287 {
291 {
288 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
292 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
289 }
293 }
290 }
294 }
291 }
295 }
292
296
293 //******************
297 //******************
294 // Spectral Matrices
298 // Spectral Matrices
295
299
296 void reset_nb_sm( void )
300 void reset_nb_sm( void )
297 {
301 {
298 nb_sm_f0 = 0;
302 nb_sm_f0 = 0;
299 nb_sm_f0_aux_f1 = 0;
303 nb_sm_f0_aux_f1 = 0;
300 nb_sm_f0_aux_f2 = 0;
304 nb_sm_f0_aux_f2 = 0;
301
305
302 nb_sm_f1 = 0;
306 nb_sm_f1 = 0;
303 }
307 }
304
308
305 void SM_init_rings( void )
309 void SM_init_rings( void )
306 {
310 {
307 init_ring( sm_ring_f0, NB_RING_NODES_SM_F0, sm_f0, TOTAL_SIZE_SM );
311 init_ring( sm_ring_f0, NB_RING_NODES_SM_F0, sm_f0, TOTAL_SIZE_SM );
308 init_ring( sm_ring_f1, NB_RING_NODES_SM_F1, sm_f1, TOTAL_SIZE_SM );
312 init_ring( sm_ring_f1, NB_RING_NODES_SM_F1, sm_f1, TOTAL_SIZE_SM );
309 init_ring( sm_ring_f2, NB_RING_NODES_SM_F2, sm_f2, TOTAL_SIZE_SM );
313 init_ring( sm_ring_f2, NB_RING_NODES_SM_F2, sm_f2, TOTAL_SIZE_SM );
310
314
311 DEBUG_PRINTF1("sm_ring_f0 @%x\n", (unsigned int) sm_ring_f0)
315 DEBUG_PRINTF1("sm_ring_f0 @%x\n", (unsigned int) sm_ring_f0)
312 DEBUG_PRINTF1("sm_ring_f1 @%x\n", (unsigned int) sm_ring_f1)
316 DEBUG_PRINTF1("sm_ring_f1 @%x\n", (unsigned int) sm_ring_f1)
313 DEBUG_PRINTF1("sm_ring_f2 @%x\n", (unsigned int) sm_ring_f2)
317 DEBUG_PRINTF1("sm_ring_f2 @%x\n", (unsigned int) sm_ring_f2)
314 DEBUG_PRINTF1("sm_f0 @%x\n", (unsigned int) sm_f0)
318 DEBUG_PRINTF1("sm_f0 @%x\n", (unsigned int) sm_f0)
315 DEBUG_PRINTF1("sm_f1 @%x\n", (unsigned int) sm_f1)
319 DEBUG_PRINTF1("sm_f1 @%x\n", (unsigned int) sm_f1)
316 DEBUG_PRINTF1("sm_f2 @%x\n", (unsigned int) sm_f2)
320 DEBUG_PRINTF1("sm_f2 @%x\n", (unsigned int) sm_f2)
317 }
321 }
318
322
319 void ASM_generic_init_ring( ring_node_asm *ring, unsigned char nbNodes )
323 void ASM_generic_init_ring( ring_node_asm *ring, unsigned char nbNodes )
320 {
324 {
321 unsigned char i;
325 unsigned char i;
322
326
323 ring[ nbNodes - 1 ].next
327 ring[ nbNodes - 1 ].next
324 = (ring_node_asm*) &ring[ 0 ];
328 = (ring_node_asm*) &ring[ 0 ];
325
329
326 for(i=0; i<nbNodes-1; i++)
330 for(i=0; i<nbNodes-1; i++)
327 {
331 {
328 ring[ i ].next = (ring_node_asm*) &ring[ i + 1 ];
332 ring[ i ].next = (ring_node_asm*) &ring[ i + 1 ];
329 }
333 }
330 }
334 }
331
335
332 void SM_reset_current_ring_nodes( void )
336 void SM_reset_current_ring_nodes( void )
333 {
337 {
334 current_ring_node_sm_f0 = sm_ring_f0[0].next;
338 current_ring_node_sm_f0 = sm_ring_f0[0].next;
335 current_ring_node_sm_f1 = sm_ring_f1[0].next;
339 current_ring_node_sm_f1 = sm_ring_f1[0].next;
336 current_ring_node_sm_f2 = sm_ring_f2[0].next;
340 current_ring_node_sm_f2 = sm_ring_f2[0].next;
337
341
338 ring_node_for_averaging_sm_f0 = NULL;
342 ring_node_for_averaging_sm_f0 = NULL;
339 ring_node_for_averaging_sm_f1 = NULL;
343 ring_node_for_averaging_sm_f1 = NULL;
340 ring_node_for_averaging_sm_f2 = NULL;
344 ring_node_for_averaging_sm_f2 = NULL;
341 }
345 }
342
346
343 //*****************
347 //*****************
344 // Basic Parameters
348 // Basic Parameters
345
349
346 void BP_init_header( bp_packet *packet,
350 void BP_init_header( bp_packet *packet,
347 unsigned int apid, unsigned char sid,
351 unsigned int apid, unsigned char sid,
348 unsigned int packetLength, unsigned char blkNr )
352 unsigned int packetLength, unsigned char blkNr )
349 {
353 {
350 packet->targetLogicalAddress = CCSDS_DESTINATION_ID;
354 packet->targetLogicalAddress = CCSDS_DESTINATION_ID;
351 packet->protocolIdentifier = CCSDS_PROTOCOLE_ID;
355 packet->protocolIdentifier = CCSDS_PROTOCOLE_ID;
352 packet->reserved = 0x00;
356 packet->reserved = 0x00;
353 packet->userApplication = CCSDS_USER_APP;
357 packet->userApplication = CCSDS_USER_APP;
354 packet->packetID[0] = (unsigned char) (apid >> 8);
358 packet->packetID[0] = (unsigned char) (apid >> 8);
355 packet->packetID[1] = (unsigned char) (apid);
359 packet->packetID[1] = (unsigned char) (apid);
356 packet->packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
360 packet->packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
357 packet->packetSequenceControl[1] = 0x00;
361 packet->packetSequenceControl[1] = 0x00;
358 packet->packetLength[0] = (unsigned char) (packetLength >> 8);
362 packet->packetLength[0] = (unsigned char) (packetLength >> 8);
359 packet->packetLength[1] = (unsigned char) (packetLength);
363 packet->packetLength[1] = (unsigned char) (packetLength);
360 // DATA FIELD HEADER
364 // DATA FIELD HEADER
361 packet->spare1_pusVersion_spare2 = 0x10;
365 packet->spare1_pusVersion_spare2 = 0x10;
362 packet->serviceType = TM_TYPE_LFR_SCIENCE; // service type
366 packet->serviceType = TM_TYPE_LFR_SCIENCE; // service type
363 packet->serviceSubType = TM_SUBTYPE_LFR_SCIENCE; // service subtype
367 packet->serviceSubType = TM_SUBTYPE_LFR_SCIENCE; // service subtype
364 packet->destinationID = TM_DESTINATION_ID_GROUND;
368 packet->destinationID = TM_DESTINATION_ID_GROUND;
365 packet->time[0] = 0x00;
369 packet->time[0] = 0x00;
366 packet->time[1] = 0x00;
370 packet->time[1] = 0x00;
367 packet->time[2] = 0x00;
371 packet->time[2] = 0x00;
368 packet->time[3] = 0x00;
372 packet->time[3] = 0x00;
369 packet->time[4] = 0x00;
373 packet->time[4] = 0x00;
370 packet->time[5] = 0x00;
374 packet->time[5] = 0x00;
371 // AUXILIARY DATA HEADER
375 // AUXILIARY DATA HEADER
372 packet->sid = sid;
376 packet->sid = sid;
373 packet->biaStatusInfo = 0x00;
377 packet->biaStatusInfo = 0x00;
374 packet->acquisitionTime[0] = 0x00;
378 packet->acquisitionTime[0] = 0x00;
375 packet->acquisitionTime[1] = 0x00;
379 packet->acquisitionTime[1] = 0x00;
376 packet->acquisitionTime[2] = 0x00;
380 packet->acquisitionTime[2] = 0x00;
377 packet->acquisitionTime[3] = 0x00;
381 packet->acquisitionTime[3] = 0x00;
378 packet->acquisitionTime[4] = 0x00;
382 packet->acquisitionTime[4] = 0x00;
379 packet->acquisitionTime[5] = 0x00;
383 packet->acquisitionTime[5] = 0x00;
380 packet->pa_lfr_bp_blk_nr[0] = 0x00; // BLK_NR MSB
384 packet->pa_lfr_bp_blk_nr[0] = 0x00; // BLK_NR MSB
381 packet->pa_lfr_bp_blk_nr[1] = blkNr; // BLK_NR LSB
385 packet->pa_lfr_bp_blk_nr[1] = blkNr; // BLK_NR LSB
382 }
386 }
383
387
384 void BP_init_header_with_spare( bp_packet_with_spare *packet,
388 void BP_init_header_with_spare( bp_packet_with_spare *packet,
385 unsigned int apid, unsigned char sid,
389 unsigned int apid, unsigned char sid,
386 unsigned int packetLength , unsigned char blkNr)
390 unsigned int packetLength , unsigned char blkNr)
387 {
391 {
388 packet->targetLogicalAddress = CCSDS_DESTINATION_ID;
392 packet->targetLogicalAddress = CCSDS_DESTINATION_ID;
389 packet->protocolIdentifier = CCSDS_PROTOCOLE_ID;
393 packet->protocolIdentifier = CCSDS_PROTOCOLE_ID;
390 packet->reserved = 0x00;
394 packet->reserved = 0x00;
391 packet->userApplication = CCSDS_USER_APP;
395 packet->userApplication = CCSDS_USER_APP;
392 packet->packetID[0] = (unsigned char) (apid >> 8);
396 packet->packetID[0] = (unsigned char) (apid >> 8);
393 packet->packetID[1] = (unsigned char) (apid);
397 packet->packetID[1] = (unsigned char) (apid);
394 packet->packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
398 packet->packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
395 packet->packetSequenceControl[1] = 0x00;
399 packet->packetSequenceControl[1] = 0x00;
396 packet->packetLength[0] = (unsigned char) (packetLength >> 8);
400 packet->packetLength[0] = (unsigned char) (packetLength >> 8);
397 packet->packetLength[1] = (unsigned char) (packetLength);
401 packet->packetLength[1] = (unsigned char) (packetLength);
398 // DATA FIELD HEADER
402 // DATA FIELD HEADER
399 packet->spare1_pusVersion_spare2 = 0x10;
403 packet->spare1_pusVersion_spare2 = 0x10;
400 packet->serviceType = TM_TYPE_LFR_SCIENCE; // service type
404 packet->serviceType = TM_TYPE_LFR_SCIENCE; // service type
401 packet->serviceSubType = TM_SUBTYPE_LFR_SCIENCE; // service subtype
405 packet->serviceSubType = TM_SUBTYPE_LFR_SCIENCE; // service subtype
402 packet->destinationID = TM_DESTINATION_ID_GROUND;
406 packet->destinationID = TM_DESTINATION_ID_GROUND;
403 // AUXILIARY DATA HEADER
407 // AUXILIARY DATA HEADER
404 packet->sid = sid;
408 packet->sid = sid;
405 packet->biaStatusInfo = 0x00;
409 packet->biaStatusInfo = 0x00;
406 packet->time[0] = 0x00;
410 packet->time[0] = 0x00;
407 packet->time[0] = 0x00;
411 packet->time[0] = 0x00;
408 packet->time[0] = 0x00;
412 packet->time[0] = 0x00;
409 packet->time[0] = 0x00;
413 packet->time[0] = 0x00;
410 packet->time[0] = 0x00;
414 packet->time[0] = 0x00;
411 packet->time[0] = 0x00;
415 packet->time[0] = 0x00;
412 packet->source_data_spare = 0x00;
416 packet->source_data_spare = 0x00;
413 packet->pa_lfr_bp_blk_nr[0] = 0x00; // BLK_NR MSB
417 packet->pa_lfr_bp_blk_nr[0] = 0x00; // BLK_NR MSB
414 packet->pa_lfr_bp_blk_nr[1] = blkNr; // BLK_NR LSB
418 packet->pa_lfr_bp_blk_nr[1] = blkNr; // BLK_NR LSB
415 }
419 }
416
420
417 void BP_send(char *data, rtems_id queue_id, unsigned int nbBytesToSend, unsigned int sid )
421 void BP_send(char *data, rtems_id queue_id, unsigned int nbBytesToSend, unsigned int sid )
418 {
422 {
419 rtems_status_code status;
423 rtems_status_code status;
420
424
421 // SET THE SEQUENCE_CNT PARAMETER
425 // SET THE SEQUENCE_CNT PARAMETER
422 increment_seq_counter_source_id( (unsigned char*) &data[ PACKET_POS_SEQUENCE_CNT ], sid );
426 increment_seq_counter_source_id( (unsigned char*) &data[ PACKET_POS_SEQUENCE_CNT ], sid );
423 // SEND PACKET
427 // SEND PACKET
424 status = rtems_message_queue_send( queue_id, data, nbBytesToSend);
428 status = rtems_message_queue_send( queue_id, data, nbBytesToSend);
425 if (status != RTEMS_SUCCESSFUL)
429 if (status != RTEMS_SUCCESSFUL)
426 {
430 {
427 printf("ERR *** in BP_send *** ERR %d\n", (int) status);
431 printf("ERR *** in BP_send *** ERR %d\n", (int) status);
428 }
432 }
429 }
433 }
430
434
431 //******************
435 //******************
432 // general functions
436 // general functions
433
437
434 void reset_sm_status( void )
438 void reset_sm_status( void )
435 {
439 {
436 // error
440 // error
437 // 10 --------------- 9 ---------------- 8 ---------------- 7 ---------
441 // 10 --------------- 9 ---------------- 8 ---------------- 7 ---------
438 // input_fif0_write_2 input_fifo_write_1 input_fifo_write_0 buffer_full
442 // input_fif0_write_2 input_fifo_write_1 input_fifo_write_0 buffer_full
439 // ---------- 5 -- 4 -- 3 -- 2 -- 1 -- 0 --
443 // ---------- 5 -- 4 -- 3 -- 2 -- 1 -- 0 --
440 // ready bits f2_1 f2_0 f1_1 f1_1 f0_1 f0_0
444 // ready bits f2_1 f2_0 f1_1 f1_1 f0_1 f0_0
441
445
442 spectral_matrix_regs->status = 0x7ff; // [0111 1111 1111]
446 spectral_matrix_regs->status = 0x7ff; // [0111 1111 1111]
443 }
447 }
444
448
445 void reset_spectral_matrix_regs( void )
449 void reset_spectral_matrix_regs( void )
446 {
450 {
447 /** This function resets the spectral matrices module registers.
451 /** This function resets the spectral matrices module registers.
448 *
452 *
449 * The registers affected by this function are located at the following offset addresses:
453 * The registers affected by this function are located at the following offset addresses:
450 *
454 *
451 * - 0x00 config
455 * - 0x00 config
452 * - 0x04 status
456 * - 0x04 status
453 * - 0x08 matrixF0_Address0
457 * - 0x08 matrixF0_Address0
454 * - 0x10 matrixFO_Address1
458 * - 0x10 matrixFO_Address1
455 * - 0x14 matrixF1_Address
459 * - 0x14 matrixF1_Address
456 * - 0x18 matrixF2_Address
460 * - 0x18 matrixF2_Address
457 *
461 *
458 */
462 */
459
463
460 set_sm_irq_onError( 0 );
464 set_sm_irq_onError( 0 );
461
465
462 set_sm_irq_onNewMatrix( 0 );
466 set_sm_irq_onNewMatrix( 0 );
463
467
464 reset_sm_status();
468 reset_sm_status();
465
469
466 // F1
470 // F1
467 spectral_matrix_regs->f0_0_address = current_ring_node_sm_f0->previous->buffer_address;
471 spectral_matrix_regs->f0_0_address = current_ring_node_sm_f0->previous->buffer_address;
468 spectral_matrix_regs->f0_1_address = current_ring_node_sm_f0->buffer_address;
472 spectral_matrix_regs->f0_1_address = current_ring_node_sm_f0->buffer_address;
469 // F2
473 // F2
470 spectral_matrix_regs->f1_0_address = current_ring_node_sm_f1->previous->buffer_address;
474 spectral_matrix_regs->f1_0_address = current_ring_node_sm_f1->previous->buffer_address;
471 spectral_matrix_regs->f1_1_address = current_ring_node_sm_f1->buffer_address;
475 spectral_matrix_regs->f1_1_address = current_ring_node_sm_f1->buffer_address;
472 // F3
476 // F3
473 spectral_matrix_regs->f2_0_address = current_ring_node_sm_f2->previous->buffer_address;
477 spectral_matrix_regs->f2_0_address = current_ring_node_sm_f2->previous->buffer_address;
474 spectral_matrix_regs->f2_1_address = current_ring_node_sm_f2->buffer_address;
478 spectral_matrix_regs->f2_1_address = current_ring_node_sm_f2->buffer_address;
475
479
476 spectral_matrix_regs->matrix_length = 0xc8; // 25 * 128 / 16 = 200 = 0xc8
480 spectral_matrix_regs->matrix_length = 0xc8; // 25 * 128 / 16 = 200 = 0xc8
477 }
481 }
478
482
479 void set_time( unsigned char *time, unsigned char * timeInBuffer )
483 void set_time( unsigned char *time, unsigned char * timeInBuffer )
480 {
484 {
481 time[0] = timeInBuffer[0];
485 time[0] = timeInBuffer[0];
482 time[1] = timeInBuffer[1];
486 time[1] = timeInBuffer[1];
483 time[2] = timeInBuffer[2];
487 time[2] = timeInBuffer[2];
484 time[3] = timeInBuffer[3];
488 time[3] = timeInBuffer[3];
485 time[4] = timeInBuffer[6];
489 time[4] = timeInBuffer[6];
486 time[5] = timeInBuffer[7];
490 time[5] = timeInBuffer[7];
487 }
491 }
488
492
489 unsigned long long int get_acquisition_time( unsigned char *timePtr )
493 unsigned long long int get_acquisition_time( unsigned char *timePtr )
490 {
494 {
491 unsigned long long int acquisitionTimeAslong;
495 unsigned long long int acquisitionTimeAslong;
492 acquisitionTimeAslong = 0x00;
496 acquisitionTimeAslong = 0x00;
493 acquisitionTimeAslong = ( (unsigned long long int) (timePtr[0] & 0x7f) << 40 ) // [0111 1111] mask the synchronization bit
497 acquisitionTimeAslong = ( (unsigned long long int) (timePtr[0] & 0x7f) << 40 ) // [0111 1111] mask the synchronization bit
494 + ( (unsigned long long int) timePtr[1] << 32 )
498 + ( (unsigned long long int) timePtr[1] << 32 )
495 + ( (unsigned long long int) timePtr[2] << 24 )
499 + ( (unsigned long long int) timePtr[2] << 24 )
496 + ( (unsigned long long int) timePtr[3] << 16 )
500 + ( (unsigned long long int) timePtr[3] << 16 )
497 + ( (unsigned long long int) timePtr[6] << 8 )
501 + ( (unsigned long long int) timePtr[6] << 8 )
498 + ( (unsigned long long int) timePtr[7] );
502 + ( (unsigned long long int) timePtr[7] );
499 return acquisitionTimeAslong;
503 return acquisitionTimeAslong;
500 }
504 }
501
505
502 unsigned char getSID( rtems_event_set event )
506 unsigned char getSID( rtems_event_set event )
503 {
507 {
504 unsigned char sid;
508 unsigned char sid;
505
509
506 rtems_event_set eventSetBURST;
510 rtems_event_set eventSetBURST;
507 rtems_event_set eventSetSBM;
511 rtems_event_set eventSetSBM;
508
512
509 //******
513 //******
510 // BURST
514 // BURST
511 eventSetBURST = RTEMS_EVENT_BURST_BP1_F0
515 eventSetBURST = RTEMS_EVENT_BURST_BP1_F0
512 | RTEMS_EVENT_BURST_BP1_F1
516 | RTEMS_EVENT_BURST_BP1_F1
513 | RTEMS_EVENT_BURST_BP2_F0
517 | RTEMS_EVENT_BURST_BP2_F0
514 | RTEMS_EVENT_BURST_BP2_F1;
518 | RTEMS_EVENT_BURST_BP2_F1;
515
519
516 //****
520 //****
517 // SBM
521 // SBM
518 eventSetSBM = RTEMS_EVENT_SBM_BP1_F0
522 eventSetSBM = RTEMS_EVENT_SBM_BP1_F0
519 | RTEMS_EVENT_SBM_BP1_F1
523 | RTEMS_EVENT_SBM_BP1_F1
520 | RTEMS_EVENT_SBM_BP2_F0
524 | RTEMS_EVENT_SBM_BP2_F0
521 | RTEMS_EVENT_SBM_BP2_F1;
525 | RTEMS_EVENT_SBM_BP2_F1;
522
526
523 if (event & eventSetBURST)
527 if (event & eventSetBURST)
524 {
528 {
525 sid = SID_BURST_BP1_F0;
529 sid = SID_BURST_BP1_F0;
526 }
530 }
527 else if (event & eventSetSBM)
531 else if (event & eventSetSBM)
528 {
532 {
529 sid = SID_SBM1_BP1_F0;
533 sid = SID_SBM1_BP1_F0;
530 }
534 }
531 else
535 else
532 {
536 {
533 sid = 0;
537 sid = 0;
534 }
538 }
535
539
536 return sid;
540 return sid;
537 }
541 }
538
542
543 void extractReImVectors( float *inputASM, float *outputASM, unsigned int asmComponent )
544 {
545 unsigned int i;
546 float re;
547 float im;
548
549 for (i=0; i<NB_BINS_PER_SM; i++){
550 re = inputASM[ (asmComponent*NB_BINS_PER_SM) + i * 2 ];
551 im = inputASM[ (asmComponent*NB_BINS_PER_SM) + i * 2 + 1];
552 outputASM[ (asmComponent *NB_BINS_PER_SM) + i] = re;
553 outputASM[ (asmComponent+1)*NB_BINS_PER_SM + i] = im;
554 }
555 }
556
557 void copyReVectors( float *inputASM, float *outputASM, unsigned int asmComponent )
558 {
559 unsigned int i;
560 float re;
561
562 for (i=0; i<NB_BINS_PER_SM; i++){
563 re = inputASM[ (asmComponent*NB_BINS_PER_SM) + i];
564 outputASM[ (asmComponent*NB_BINS_PER_SM) + i] = re;
565 }
566 }
567
568 void ASM_patch( float *inputASM, float *outputASM )
569 {
570 extractReImVectors( inputASM, outputASM, 1); // b1b2
571 extractReImVectors( inputASM, outputASM, 3 ); // b1b3
572 extractReImVectors( inputASM, outputASM, 5 ); // b1e1
573 extractReImVectors( inputASM, outputASM, 7 ); // b1e2
574 extractReImVectors( inputASM, outputASM, 10 ); // b2b3
575 extractReImVectors( inputASM, outputASM, 12 ); // b2e1
576 extractReImVectors( inputASM, outputASM, 14 ); // b2e2
577 extractReImVectors( inputASM, outputASM, 17 ); // b3e1
578 extractReImVectors( inputASM, outputASM, 19 ); // b3e2
579 extractReImVectors( inputASM, outputASM, 22 ); // e1e2
580
581 copyReVectors(inputASM, outputASM, 0 ); // b1b1
582 copyReVectors(inputASM, outputASM, 9 ); // b2b2
583 copyReVectors(inputASM, outputASM, 16); // b3b3
584 copyReVectors(inputASM, outputASM, 21); // e1e1
585 copyReVectors(inputASM, outputASM, 24); // e2e2
586 }
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@@ -1,65 +1,94
1 #define NB_VALUES_PER_SM 25
1 #define NB_VALUES_PER_SM 25
2 #define NB_BINS_PER_SM 128
2 #define NB_BINS_PER_SM 128
3
3
4 #define NB_BINS_COMPRESSED_SM_F0 11
4 #define NB_BINS_COMPRESSED_SM_F0 11
5 #define ASM_F0_INDICE_START 17 // 88 bins
5 #define ASM_F0_INDICE_START 17 // 88 bins
6 #define ASM_F0_INDICE_STOP 104 // 2 packets of 44 bins
6 #define ASM_F0_INDICE_STOP 104 // 2 packets of 44 bins
7 #define NB_BINS_TO_AVERAGE_ASM_F0 8
7 #define NB_BINS_TO_AVERAGE_ASM_F0 8
8
8
9 void ASM_reorganize_and_divide( float *averaged_spec_mat, float *averaged_spec_mat_reorganized, float divider )
9 void ASM_reorganize_and_divide( float *averaged_spec_mat, float *averaged_spec_mat_reorganized, float divider )
10 {
10 {
11 int frequencyBin;
11 int frequencyBin;
12 int asmComponent;
12 int asmComponent;
13 unsigned int offsetASM;
13 unsigned int offsetASM;
14 unsigned int offsetASMReorganized;
14 unsigned int offsetASMReorganized;
15
15
16 // BUILD DATA
16 // BUILD DATA
17 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
17 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
18 {
18 {
19 for( frequencyBin = 0; frequencyBin < NB_BINS_PER_SM; frequencyBin++ )
19 for( frequencyBin = 0; frequencyBin < NB_BINS_PER_SM; frequencyBin++ )
20 {
20 {
21 offsetASMReorganized =
21 offsetASMReorganized =
22 frequencyBin * NB_VALUES_PER_SM
22 frequencyBin * NB_VALUES_PER_SM
23 + asmComponent;
23 + asmComponent;
24 offsetASM =
24 offsetASM =
25 asmComponent * NB_BINS_PER_SM
25 asmComponent * NB_BINS_PER_SM
26 + frequencyBin;
26 + frequencyBin;
27 averaged_spec_mat_reorganized[offsetASMReorganized ] =
27 averaged_spec_mat_reorganized[offsetASMReorganized ] =
28 averaged_spec_mat[ offsetASM ] / divider;
28 averaged_spec_mat[ offsetASM ] / divider;
29 }
29 }
30 }
30 }
31 }
31 }
32
32
33 void ASM_compress_reorganize_and_divide(float *averaged_spec_mat, float *compressed_spec_mat , float divider,
33 void ASM_compress_reorganize_and_divide(float *averaged_spec_mat, float *compressed_spec_mat , float divider,
34 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage, unsigned char ASMIndexStart )
34 unsigned char nbBinsCompressedMatrix, unsigned char nbBinsToAverage, unsigned char ASMIndexStart )
35 {
35 {
36 int frequencyBin;
36 int frequencyBin;
37 int asmComponent;
37 int asmComponent;
38 int offsetASM;
38 int offsetASM;
39 int offsetCompressed;
39 int offsetCompressed;
40 int k;
40 int k;
41
41
42 // BUILD DATA
42 // BUILD DATA
43 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
43 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
44 {
44 {
45 for( frequencyBin = 0; frequencyBin < nbBinsCompressedMatrix; frequencyBin++ )
45 for( frequencyBin = 0; frequencyBin < nbBinsCompressedMatrix; frequencyBin++ )
46 {
46 {
47 offsetCompressed = // NO TIME OFFSET
47 offsetCompressed = // NO TIME OFFSET
48 frequencyBin * NB_VALUES_PER_SM
48 frequencyBin * NB_VALUES_PER_SM
49 + asmComponent;
49 + asmComponent;
50 offsetASM = // NO TIME OFFSET
50 offsetASM = // NO TIME OFFSET
51 asmComponent * NB_BINS_PER_SM
51 asmComponent * NB_BINS_PER_SM
52 + ASMIndexStart
52 + ASMIndexStart
53 + frequencyBin * nbBinsToAverage;
53 + frequencyBin * nbBinsToAverage;
54 compressed_spec_mat[ offsetCompressed ] = 0;
54 compressed_spec_mat[ offsetCompressed ] = 0;
55 for ( k = 0; k < nbBinsToAverage; k++ )
55 for ( k = 0; k < nbBinsToAverage; k++ )
56 {
56 {
57 compressed_spec_mat[offsetCompressed ] =
57 compressed_spec_mat[offsetCompressed ] =
58 ( compressed_spec_mat[ offsetCompressed ]
58 ( compressed_spec_mat[ offsetCompressed ]
59 + averaged_spec_mat[ offsetASM + k ] );
59 + averaged_spec_mat[ offsetASM + k ] );
60 }
60 }
61 compressed_spec_mat[ offsetCompressed ] =
61 compressed_spec_mat[ offsetCompressed ] =
62 compressed_spec_mat[ offsetCompressed ] / (divider * nbBinsToAverage);
62 compressed_spec_mat[ offsetCompressed ] / (divider * nbBinsToAverage);
63 }
63 }
64 }
64 }
65 }
65 }
66
67 void extractReImVectors( float *inputASM, float *outputASM, unsigned int asmComponent )
68 {
69 unsigned int i;
70 float re;
71 float im;
72
73 for (i=0; i<NB_BINS_PER_SM; i++){
74 re = inputASM[ (asmComponent*NB_BINS_PER_SM) + i * 2 ];
75 im = inputASM[ (asmComponent*NB_BINS_PER_SM) + i * 2 + 1];
76 outputASM[ (asmComponent *NB_BINS_PER_SM) + i] = re;
77 outputASM[ (asmComponent+1)*NB_BINS_PER_SM + i] = im;
78 }
79
80 }
81
82 void ASM_patch( float *inputASM, float *outputASM )
83 {
84 extractReImVectors( inputASM, outputASM, 1); // b1b2
85 extractReImVectors( inputASM, outputASM, 3 ); // b1b3
86 extractReImVectors( inputASM, outputASM, 5 ); // b1e1
87 extractReImVectors( inputASM, outputASM, 7 ); // b1e2
88 extractReImVectors( inputASM, outputASM, 10 ); // b2b3
89 extractReImVectors( inputASM, outputASM, 12 ); // b2e1
90 extractReImVectors( inputASM, outputASM, 14 ); // b2e2
91 extractReImVectors( inputASM, outputASM, 17 ); // b3e1
92 extractReImVectors( inputASM, outputASM, 19 ); // b3e2
93 extractReImVectors( inputASM, outputASM, 22 ); // e1e2
94 }
Show file before | Show file after | Hide comments
@@ -1,64 +1,69
1 #include <stdio.h>
1 #include <stdio.h>
2
2
3 #include "functions.h"
3 #include "functions.h"
4
4
5 int main(void)
5 int main(void)
6 {
6 {
7 printf("Hello World!\n");
7 printf("Hello World!\n");
8
8
9 unsigned int asmComponent;
9 unsigned int asmComponent;
10 unsigned int frequencyBin;
10 unsigned int frequencyBin;
11 unsigned int offset_input_ASM;
11 unsigned int offset_input_ASM;
12
12
13 float input_ASM [ NB_VALUES_PER_SM * NB_BINS_PER_SM ];
13 float input_ASM [ NB_VALUES_PER_SM * NB_BINS_PER_SM ];
14 float output_ASM [ NB_VALUES_PER_SM * NB_BINS_PER_SM ];
14 float output_ASM [ NB_VALUES_PER_SM * NB_BINS_PER_SM ];
15 float patched_ASM [ NB_VALUES_PER_SM * NB_BINS_PER_SM ];
15 float output_ASM_compressed [ NB_VALUES_PER_SM * NB_BINS_COMPRESSED_SM_F0 ];
16 float output_ASM_compressed [ NB_VALUES_PER_SM * NB_BINS_COMPRESSED_SM_F0 ];
16
17
17 //*******
18 //*******
18 // TEST 1
19 // TEST 1
19
20
20 offset_input_ASM = 0;
21 offset_input_ASM = 0;
21
22
22 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
23 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
23 {
24 {
24 for (frequencyBin = 0; frequencyBin < NB_BINS_PER_SM; frequencyBin++)
25 for (frequencyBin = 0; frequencyBin < NB_BINS_PER_SM; frequencyBin++)
25 {
26 {
26 offset_input_ASM = asmComponent * NB_BINS_PER_SM + frequencyBin;
27 offset_input_ASM = asmComponent * NB_BINS_PER_SM + frequencyBin;
27 input_ASM[ offset_input_ASM ] = asmComponent;
28 input_ASM[ offset_input_ASM ] = asmComponent;
28 }
29 }
29 }
30 }
30
31
32 ASM_patch( input_ASM, patched_ASM );
33
31 ASM_reorganize_and_divide( input_ASM, output_ASM,
34 ASM_reorganize_and_divide( input_ASM, output_ASM,
32 1 ); // divider
35 1 ); // divider
33
36
34 ASM_compress_reorganize_and_divide( input_ASM, output_ASM_compressed,
37 ASM_compress_reorganize_and_divide( input_ASM, output_ASM_compressed,
35 1, // divider
38 1, // divider
36 NB_BINS_COMPRESSED_SM_F0,
39 NB_BINS_COMPRESSED_SM_F0,
37 NB_BINS_TO_AVERAGE_ASM_F0,
40 NB_BINS_TO_AVERAGE_ASM_F0,
38 ASM_F0_INDICE_START);
41 ASM_F0_INDICE_START);
39
42
40 //*******
43 //*******
41 // TEST 2
44 // TEST 2
42 offset_input_ASM = 0;
45 offset_input_ASM = 0;
43
46
44 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
47 for (asmComponent = 0; asmComponent < NB_VALUES_PER_SM; asmComponent++)
45 {
48 {
46 for (frequencyBin = 0; frequencyBin < NB_BINS_PER_SM; frequencyBin++)
49 for (frequencyBin = 0; frequencyBin < NB_BINS_PER_SM; frequencyBin++)
47 {
50 {
48 offset_input_ASM = asmComponent * NB_BINS_PER_SM + frequencyBin;
51 offset_input_ASM = asmComponent * NB_BINS_PER_SM + frequencyBin;
49 input_ASM[ offset_input_ASM ] = asmComponent * NB_BINS_PER_SM + frequencyBin;
52 input_ASM[ offset_input_ASM ] = asmComponent * NB_BINS_PER_SM + frequencyBin;
50 }
53 }
51 }
54 }
52
55
53 ASM_reorganize_and_divide( input_ASM, output_ASM,
56 ASM_reorganize_and_divide( input_ASM, output_ASM,
54 1 ); // divider
57 1 ); // divider
55
58
56 ASM_compress_reorganize_and_divide( input_ASM, output_ASM_compressed,
59 ASM_compress_reorganize_and_divide( input_ASM, output_ASM_compressed,
57 10, // divider
60 10, // divider
58 NB_BINS_COMPRESSED_SM_F0,
61 NB_BINS_COMPRESSED_SM_F0,
59 NB_BINS_TO_AVERAGE_ASM_F0,
62 NB_BINS_TO_AVERAGE_ASM_F0,
60 ASM_F0_INDICE_START);
63 ASM_F0_INDICE_START);
61
64
65 ASM_patch( input_ASM, patched_ASM );
66
62 return 0;
67 return 0;
63 }
68 }
64
69
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