##// END OF EJS Templates
Sync
paul -
r95:2543157c542c VHDLib206
parent child
Show More
@@ -1,6 +1,6
1 #############################################################################
1 #############################################################################
2 # Makefile for building: bin/fsw-vhdl-dev
2 # Makefile for building: bin/fsw-vhdl-dev
3 # Generated by qmake (2.01a) (Qt 4.8.5) on: Thu Feb 6 09:29:25 2014
3 # Generated by qmake (2.01a) (Qt 4.8.5) on: Thu Feb 13 07:43:27 2014
4 # Project: fsw-qt.pro
4 # Project: fsw-qt.pro
5 # Template: app
5 # Template: app
6 # Command: /usr/bin/qmake-qt4 -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro
6 # Command: /usr/bin/qmake-qt4 -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro
@@ -10,10 +10,10
10
10
11 CC = sparc-rtems-gcc
11 CC = sparc-rtems-gcc
12 CXX = sparc-rtems-g++
12 CXX = sparc-rtems-g++
13 DEFINES = -DSW_VERSION_N1=1 -DSW_VERSION_N2=0 -DSW_VERSION_N3=0 -DSW_VERSION_N4=1 -DPRINT_MESSAGES_ON_CONSOLE -DDEBUG_MESSAGES -DVHDL_DEV
13 DEFINES = -DSW_VERSION_N1=1 -DSW_VERSION_N2=0 -DSW_VERSION_N3=0 -DSW_VERSION_N4=1 -DPRINT_MESSAGES_ON_CONSOLE -DDEBUG_MESSAGES -DPRINT_TASK_STATISTICS -DVHDL_DEV
14 CFLAGS = -pipe -O3 -Wall $(DEFINES)
14 CFLAGS = -pipe -O3 -Wall $(DEFINES)
15 CXXFLAGS = -pipe -O3 -Wall $(DEFINES)
15 CXXFLAGS = -pipe -O3 -Wall $(DEFINES)
16 INCPATH = -I/usr/lib64/qt4/mkspecs/linux-g++ -I. -I../src -I../header
16 INCPATH = -I/usr/lib64/qt4/mkspecs/linux-g++ -I. -I../src -I../header -I../../LFR_basic-parameters
17 LINK = sparc-rtems-g++
17 LINK = sparc-rtems-g++
18 LFLAGS =
18 LFLAGS =
19 LIBS = $(SUBLIBS)
19 LIBS = $(SUBLIBS)
@@ -52,7 +52,8 SOURCES = ../src/wf_handler.c \
52 ../src/fsw_spacewire.c \
52 ../src/fsw_spacewire.c \
53 ../src/tc_load_dump_parameters.c \
53 ../src/tc_load_dump_parameters.c \
54 ../src/tm_lfr_tc_exe.c \
54 ../src/tm_lfr_tc_exe.c \
55 ../src/tc_acceptance.c
55 ../src/tc_acceptance.c \
56 ../../LFR_basic-parameters/basic_parameters.c
56 OBJECTS = obj/wf_handler.o \
57 OBJECTS = obj/wf_handler.o \
57 obj/tc_handler.o \
58 obj/tc_handler.o \
58 obj/fsw_processing.o \
59 obj/fsw_processing.o \
@@ -62,7 +63,8 OBJECTS = obj/wf_handler.o \
62 obj/fsw_spacewire.o \
63 obj/fsw_spacewire.o \
63 obj/tc_load_dump_parameters.o \
64 obj/tc_load_dump_parameters.o \
64 obj/tm_lfr_tc_exe.o \
65 obj/tm_lfr_tc_exe.o \
65 obj/tc_acceptance.o
66 obj/tc_acceptance.o \
67 obj/basic_parameters.o
66 DIST = /usr/lib64/qt4/mkspecs/common/unix.conf \
68 DIST = /usr/lib64/qt4/mkspecs/common/unix.conf \
67 /usr/lib64/qt4/mkspecs/common/linux.conf \
69 /usr/lib64/qt4/mkspecs/common/linux.conf \
68 /usr/lib64/qt4/mkspecs/common/gcc-base.conf \
70 /usr/lib64/qt4/mkspecs/common/gcc-base.conf \
@@ -238,6 +240,9 obj/tm_lfr_tc_exe.o: ../src/tm_lfr_tc_ex
238 obj/tc_acceptance.o: ../src/tc_acceptance.c
240 obj/tc_acceptance.o: ../src/tc_acceptance.c
239 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/tc_acceptance.o ../src/tc_acceptance.c
241 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/tc_acceptance.o ../src/tc_acceptance.c
240
242
243 obj/basic_parameters.o: ../../LFR_basic-parameters/basic_parameters.c ../../LFR_basic-parameters/basic_parameters.h
244 $(CC) -c $(CFLAGS) $(INCPATH) -o obj/basic_parameters.o ../../LFR_basic-parameters/basic_parameters.c
245
241 ####### Install
246 ####### Install
242
247
243 install: FORCE
248 install: FORCE
@@ -1,7 +1,7
1 TEMPLATE = app
1 TEMPLATE = app
2 # CONFIG += console v8 sim
2 # CONFIG += console v8 sim
3 # CONFIG options = verbose *** boot_messages *** debug_messages *** cpu_usage_report *** stack_report *** gsa *** vhdl_dev
3 # CONFIG options = verbose *** boot_messages *** debug_messages *** cpu_usage_report *** stack_report *** gsa *** vhdl_dev
4 CONFIG += console verbose debug_messages vhdl_dev
4 CONFIG += console verbose debug_messages vhdl_dev cpu_usage_report
5 CONFIG -= qt
5 CONFIG -= qt
6
6
7 include(./sparc.pri)
7 include(./sparc.pri)
@@ -51,7 +51,8 contains( CONFIG, vhdl_dev ) {
51
51
52 INCLUDEPATH += \
52 INCLUDEPATH += \
53 ../src \
53 ../src \
54 ../header
54 ../header \
55 ../../LFR_basic-parameters
55
56
56 SOURCES += \
57 SOURCES += \
57 ../src/wf_handler.c \
58 ../src/wf_handler.c \
@@ -63,7 +64,8 SOURCES += \
63 ../src/fsw_spacewire.c \
64 ../src/fsw_spacewire.c \
64 ../src/tc_load_dump_parameters.c \
65 ../src/tc_load_dump_parameters.c \
65 ../src/tm_lfr_tc_exe.c \
66 ../src/tm_lfr_tc_exe.c \
66 ../src/tc_acceptance.c
67 ../src/tc_acceptance.c \
68 ../../LFR_basic-parameters/basic_parameters.c
67
69
68
70
69 HEADERS += \
71 HEADERS += \
@@ -81,5 +83,6 HEADERS += \
81 ../header/tc_load_dump_parameters.h \
83 ../header/tc_load_dump_parameters.h \
82 ../header/tm_lfr_tc_exe.h \
84 ../header/tm_lfr_tc_exe.h \
83 ../header/tc_acceptance.h \
85 ../header/tc_acceptance.h \
84 ../header/fsw_params_nb_bytes.h
86 ../header/fsw_params_nb_bytes.h \
87 ../../LFR_basic-parameters/basic_parameters.h
85
88
@@ -1,6 +1,6
1 <?xml version="1.0" encoding="UTF-8"?>
1 <?xml version="1.0" encoding="UTF-8"?>
2 <!DOCTYPE QtCreatorProject>
2 <!DOCTYPE QtCreatorProject>
3 <!-- Written by QtCreator 3.0.0, 2014-02-06T15:45:54. -->
3 <!-- Written by QtCreator 3.0.0, 2014-02-13T07:01:15. -->
4 <qtcreator>
4 <qtcreator>
5 <data>
5 <data>
6 <variable>ProjectExplorer.Project.ActiveTarget</variable>
6 <variable>ProjectExplorer.Project.ActiveTarget</variable>
@@ -17,6 +17,14 typedef struct ring_node
17 unsigned int status;
17 unsigned int status;
18 } ring_node;
18 } ring_node;
19
19
20 typedef struct ring_node_sm
21 {
22 struct ring_node *previous;
23 volatile int *buffer_address;
24 struct ring_node *next;
25 unsigned int status;
26 } ring_node_sm;
27
20 //************************
28 //************************
21 // flight software version
29 // flight software version
22 // this parameters is handled by the Qt project options
30 // this parameters is handled by the Qt project options
@@ -33,7 +41,7 typedef struct ring_node
33 #define NB_RING_NODES_F0 3 // AT LEAST 3
41 #define NB_RING_NODES_F0 3 // AT LEAST 3
34 #define NB_RING_NODES_F1 5 // AT LEAST 3
42 #define NB_RING_NODES_F1 5 // AT LEAST 3
35 #define NB_RING_NODES_F2 5 // AT LEAST 3
43 #define NB_RING_NODES_F2 5 // AT LEAST 3
36 #define NB_RING_NODES_ASM_F0 8 // AT LEAST 3
44 #define NB_RING_NODES_ASM_F0 12 // AT LEAST 3
37 #define NB_RING_NODES_ASM_F1 2 // AT LEAST 3
45 #define NB_RING_NODES_ASM_F1 2 // AT LEAST 3
38 #define NB_RING_NODES_ASM_F2 2 // AT LEAST 3
46 #define NB_RING_NODES_ASM_F2 2 // AT LEAST 3
39
47
@@ -10,6 +10,7
10
10
11 #include "fsw_params.h"
11 #include "fsw_params.h"
12 #include "fsw_spacewire.h"
12 #include "fsw_spacewire.h"
13 #include "basic_parameters.h"
13
14
14 extern volatile int sm_f0[ ][ SM_HEADER + TOTAL_SIZE_SM ];
15 extern volatile int sm_f0[ ][ SM_HEADER + TOTAL_SIZE_SM ];
15 extern volatile int sm_f1[ ][ SM_HEADER + TOTAL_SIZE_SM ];
16 extern volatile int sm_f1[ ][ SM_HEADER + TOTAL_SIZE_SM ];
@@ -26,7 +27,8 extern rtems_name misc_name[5];
26 extern rtems_id Task_id[20]; /* array of task ids */
27 extern rtems_id Task_id[20]; /* array of task ids */
27
28
28 //
29 //
29 void init_asm_rings( void );
30 void init_sm_rings( void );
31 void reset_current_sm_ring_nodes( void );
30
32
31 // ISR
33 // ISR
32 rtems_isr spectral_matrices_isr( rtems_vector_number vector );
34 rtems_isr spectral_matrices_isr( rtems_vector_number vector );
@@ -41,8 +43,8 rtems_task matr_task(rtems_task_argument
41
43
42 void matrix_compression(volatile float *averaged_spec_mat, unsigned char fChannel, float *compressed_spec_mat);
44 void matrix_compression(volatile float *averaged_spec_mat, unsigned char fChannel, float *compressed_spec_mat);
43 void matrix_reset(volatile float *averaged_spec_mat);
45 void matrix_reset(volatile float *averaged_spec_mat);
44 void BP1_set(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat, unsigned char * LFR_BP1);
46 void BP1_set_old(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat, unsigned char * LFR_BP1);
45 void BP2_set(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat);
47 void BP2_set_old(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat);
46 //
48 //
47 void init_header_asm( Header_TM_LFR_SCIENCE_ASM_t *header);
49 void init_header_asm( Header_TM_LFR_SCIENCE_ASM_t *header);
48 void send_spectral_matrix(Header_TM_LFR_SCIENCE_ASM_t *header, char *spectral_matrix,
50 void send_spectral_matrix(Header_TM_LFR_SCIENCE_ASM_t *header, char *spectral_matrix,
@@ -8,6 +8,7
8 #include "tc_acceptance.h"
8 #include "tc_acceptance.h"
9 #include "tm_lfr_tc_exe.h"
9 #include "tm_lfr_tc_exe.h"
10 #include "wf_handler.h"
10 #include "wf_handler.h"
11 #include "fsw_processing.h"
11
12
12 // MODE PARAMETERS
13 // MODE PARAMETERS
13 extern unsigned int maxCount;
14 extern unsigned int maxCount;
@@ -42,6 +43,7 int enter_sbm2_mode();
42 int restart_science_tasks();
43 int restart_science_tasks();
43 int suspend_science_tasks();
44 int suspend_science_tasks();
44 void launch_waveform_picker( unsigned char mode );
45 void launch_waveform_picker( unsigned char mode );
46 void launch_spectral_matrix( unsigned char mode );
45
47
46 // other functions
48 // other functions
47 void updateLFRCurrentMode();
49 void updateLFRCurrentMode();
@@ -45,6 +45,7 extern rtems_id Task_id[20];
45 extern unsigned char lfrCurrentMode;
45 extern unsigned char lfrCurrentMode;
46
46
47 rtems_isr waveforms_isr( rtems_vector_number vector );
47 rtems_isr waveforms_isr( rtems_vector_number vector );
48 rtems_isr waveforms_isr_alt( rtems_vector_number vector );
48 rtems_task wfrm_task( rtems_task_argument argument );
49 rtems_task wfrm_task( rtems_task_argument argument );
49 rtems_task cwf3_task( rtems_task_argument argument );
50 rtems_task cwf3_task( rtems_task_argument argument );
50 rtems_task cwf2_task( rtems_task_argument argument );
51 rtems_task cwf2_task( rtems_task_argument argument );
@@ -76,6 +77,9 char set_wfp_delta_snapshot();
76 void set_wfp_burst_enable_register( unsigned char mode );
77 void set_wfp_burst_enable_register( unsigned char mode );
77 void reset_wfp_burst_enable();
78 void reset_wfp_burst_enable();
78 void reset_wfp_status();
79 void reset_wfp_status();
80 void reset_waveform_picker_regs_vhdl_dev();
81 void reset_waveform_picker_regs_vhdl_dev_debug();
82 void reset_waveform_picker_regs_vhdl_dev_debug_64();
79 void reset_waveform_picker_regs();
83 void reset_waveform_picker_regs();
80 void reset_new_waveform_picker_regs();
84 void reset_new_waveform_picker_regs();
81
85
@@ -76,8 +76,8 rtems_task Init( rtems_task_argument ign
76 rtems_isr_entry old_isr_handler;
76 rtems_isr_entry old_isr_handler;
77
77
78 // UART settings
78 // UART settings
79 send_console_outputs_on_apbuart_port();
79 set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE);
80 set_apbuart_scaler_reload_register(REGS_ADDR_APBUART, APBUART_SCALER_RELOAD_VALUE);
80 send_console_outputs_on_apbuart_port();
81 enable_apbuart_transmitter();
81 enable_apbuart_transmitter();
82 PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n")
82 PRINTF("\n\n\n\n\nIn INIT *** Now the console is on port COM1\n")
83
83
@@ -92,6 +92,7 rtems_task Init( rtems_task_argument ign
92
92
93 reset_wfp_burst_enable(); // stop the waveform picker if it was running
93 reset_wfp_burst_enable(); // stop the waveform picker if it was running
94 init_waveform_rings(); // initialize the waveform rings
94 init_waveform_rings(); // initialize the waveform rings
95 init_sm_rings();
95
96
96 init_parameter_dump();
97 init_parameter_dump();
97 init_local_mode_parameters();
98 init_local_mode_parameters();
@@ -81,7 +81,7 int send_console_outputs_on_apbuart_port
81 {
81 {
82 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
82 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
83
83
84 apbuart_regs->ctrl = apbuart_regs->ctrl & APBUART_CTRL_REG_MASK_DB;
84 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
85
85
86 return 0;
86 return 0;
87 }
87 }
@@ -17,6 +17,7 ring_node sm_ring_f0[NB_RING_NODES_ASM_F
17 ring_node sm_ring_f1[NB_RING_NODES_ASM_F1];
17 ring_node sm_ring_f1[NB_RING_NODES_ASM_F1];
18 ring_node sm_ring_f2[NB_RING_NODES_ASM_F2];
18 ring_node sm_ring_f2[NB_RING_NODES_ASM_F2];
19 ring_node *current_ring_node_sm_f0;
19 ring_node *current_ring_node_sm_f0;
20 ring_node *ring_node_for_averaging_sm_f0;
20 ring_node *current_ring_node_sm_f1;
21 ring_node *current_ring_node_sm_f1;
21 ring_node *current_ring_node_sm_f2;
22 ring_node *current_ring_node_sm_f2;
22
23
@@ -25,7 +26,7 float averaged_sm_f0[ TOTAL_SIZE_SM ];
25 char averaged_sm_f0_char[ TOTAL_SIZE_SM * 2 ];
26 char averaged_sm_f0_char[ TOTAL_SIZE_SM * 2 ];
26 float compressed_sm_f0[ TOTAL_SIZE_COMPRESSED_MATRIX_f0 ];
27 float compressed_sm_f0[ TOTAL_SIZE_COMPRESSED_MATRIX_f0 ];
27
28
28 void init_asm_rings( void )
29 void init_sm_rings( void )
29 {
30 {
30 unsigned char i;
31 unsigned char i;
31
32
@@ -51,7 +52,8 void init_asm_rings( void )
51
52
52 void reset_current_sm_ring_nodes( void )
53 void reset_current_sm_ring_nodes( void )
53 {
54 {
54 current_ring_node_sm_f0 = sm_ring_f0;
55 current_ring_node_sm_f0 = sm_ring_f0;
56 ring_node_for_averaging_sm_f0 = sm_ring_f0;
55 }
57 }
56
58
57 //***********************************************************
59 //***********************************************************
@@ -60,6 +62,7 rtems_isr spectral_matrices_isr( rtems_v
60 {
62 {
61 unsigned char status;
63 unsigned char status;
62 unsigned char i;
64 unsigned char i;
65 static unsigned int nb_interrupt_f0 = 0;
63
66
64 status = spectral_matrix_regs->status; //[f2 f1 f0_1 f0_0]
67 status = spectral_matrix_regs->status; //[f2 f1 f0_1 f0_0]
65 for (i=0; i<4; i++)
68 for (i=0; i<4; i++)
@@ -72,6 +75,15 rtems_isr spectral_matrices_isr( rtems_v
72 current_ring_node_sm_f0 = current_ring_node_sm_f0->next;
75 current_ring_node_sm_f0 = current_ring_node_sm_f0->next;
73 spectral_matrix_regs->matrixF0_Address0 = current_ring_node_sm_f0->buffer_address;
76 spectral_matrix_regs->matrixF0_Address0 = current_ring_node_sm_f0->buffer_address;
74 spectral_matrix_regs->status = spectral_matrix_regs->status & 0xfffffffe;
77 spectral_matrix_regs->status = spectral_matrix_regs->status & 0xfffffffe;
78 nb_interrupt_f0 = nb_interrupt_f0 + 1;
79 if (nb_interrupt_f0 == NB_SM_TO_RECEIVE_BEFORE_AVF0 ){
80 ring_node_for_averaging_sm_f0 = current_ring_node_sm_f0;
81 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
82 {
83 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
84 }
85 nb_interrupt_f0 = 0;
86 }
75 break;
87 break;
76 case 1:
88 case 1:
77 break;
89 break;
@@ -85,16 +97,24 rtems_isr spectral_matrices_isr( rtems_v
85
97
86 // reset error codes to 0
98 // reset error codes to 0
87 spectral_matrix_regs->status = spectral_matrix_regs->status & 0xffffffcf; // [1100 1111]
99 spectral_matrix_regs->status = spectral_matrix_regs->status & 0xffffffcf; // [1100 1111]
88
89 if (rtems_event_send( Task_id[TASKID_SMIQ], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL) {
90 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_4 );
91 }
92 }
100 }
93
101
94 rtems_isr spectral_matrices_isr_simu( rtems_vector_number vector )
102 rtems_isr spectral_matrices_isr_simu( rtems_vector_number vector )
95 {
103 {
96 if (rtems_event_send( Task_id[TASKID_SMIQ], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL) {
104 static unsigned int nb_interrupt_f0 = 0;
97 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_4 );
105
106 current_ring_node_sm_f0 = current_ring_node_sm_f0->next;
107 spectral_matrix_regs->matrixF0_Address0 = current_ring_node_sm_f0->buffer_address;
108 spectral_matrix_regs->status = spectral_matrix_regs->status & 0xfffffffe;
109 nb_interrupt_f0 = nb_interrupt_f0 + 1;
110 if (nb_interrupt_f0 == NB_SM_TO_RECEIVE_BEFORE_AVF0 )
111 {
112 ring_node_for_averaging_sm_f0 = current_ring_node_sm_f0;
113 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
114 {
115 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
116 }
117 nb_interrupt_f0 = 0;
98 }
118 }
99 }
119 }
100
120
@@ -104,20 +124,11 rtems_isr spectral_matrices_isr_simu( rt
104 rtems_task smiq_task(rtems_task_argument argument) // process the Spectral Matrices IRQ
124 rtems_task smiq_task(rtems_task_argument argument) // process the Spectral Matrices IRQ
105 {
125 {
106 rtems_event_set event_out;
126 rtems_event_set event_out;
107 unsigned int nb_interrupt_f0 = 0;
108
127
109 BOOT_PRINTF("in SMIQ *** \n")
128 BOOT_PRINTF("in SMIQ *** \n")
110
129
111 while(1){
130 while(1){
112 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
131 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
113 nb_interrupt_f0 = nb_interrupt_f0 + 1;
114 if (nb_interrupt_f0 == NB_SM_TO_RECEIVE_BEFORE_AVF0 ){
115 if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL)
116 {
117 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 );
118 }
119 nb_interrupt_f0 = 0;
120 }
121 }
132 }
122 }
133 }
123
134
@@ -146,15 +157,19 rtems_task avf0_task(rtems_task_argument
146
157
147 while(1){
158 while(1){
148 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
159 rtems_event_receive(RTEMS_EVENT_0, RTEMS_WAIT, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT0
160 for (i=0; i<NB_SM_TO_RECEIVE_BEFORE_AVF0; i++)
161 {
162 ring_node_for_averaging_sm_f0 = ring_node_for_averaging_sm_f0->previous;
163 }
149 for(i=0; i<TOTAL_SIZE_SM; i++){
164 for(i=0; i<TOTAL_SIZE_SM; i++){
150 averaged_sm_f0[i] = current_ring_node_sm_f0[0].buffer_address
165 averaged_sm_f0[i] = ( (int *) (ring_node_for_averaging_sm_f0[0].buffer_address) )[i]
151 + current_ring_node_sm_f0[1].buffer_address
166 + ( (int *) (ring_node_for_averaging_sm_f0[1].buffer_address) )[i]
152 + current_ring_node_sm_f0[2].buffer_address
167 + ( (int *) (ring_node_for_averaging_sm_f0[2].buffer_address) )[i]
153 + current_ring_node_sm_f0[3].buffer_address
168 + ( (int *) (ring_node_for_averaging_sm_f0[3].buffer_address) )[i]
154 + current_ring_node_sm_f0[4].buffer_address
169 + ( (int *) (ring_node_for_averaging_sm_f0[4].buffer_address) )[i]
155 + current_ring_node_sm_f0[5].buffer_address
170 + ( (int *) (ring_node_for_averaging_sm_f0[5].buffer_address) )[i]
156 + current_ring_node_sm_f0[6].buffer_address
171 + ( (int *) (ring_node_for_averaging_sm_f0[6].buffer_address) )[i]
157 + current_ring_node_sm_f0[7].buffer_address;
172 + ( (int *) (ring_node_for_averaging_sm_f0[7].buffer_address) )[i];
158 }
173 }
159 nb_average = nb_average + NB_SM_TO_RECEIVE_BEFORE_AVF0;
174 nb_average = nb_average + NB_SM_TO_RECEIVE_BEFORE_AVF0;
160 if (nb_average == NB_AVERAGE_NORMAL_f0) {
175 if (nb_average == NB_AVERAGE_NORMAL_f0) {
@@ -250,7 +265,7 void matrix_compression(volatile float *
250 }
265 }
251 }
266 }
252
267
253 void BP1_set(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat, unsigned char * LFR_BP1){
268 void BP1_set_old(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat, unsigned char * LFR_BP1){
254 int i;
269 int i;
255 int j;
270 int j;
256 unsigned char tmp_u_char;
271 unsigned char tmp_u_char;
@@ -384,7 +399,7 void BP1_set(float * compressed_spec_mat
384
399
385 }
400 }
386
401
387 void BP2_set(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat){
402 void BP2_set_old(float * compressed_spec_mat, unsigned char nb_bins_compressed_spec_mat){
388 // BP2 autocorrelation
403 // BP2 autocorrelation
389 int i;
404 int i;
390 int aux = 0;
405 int aux = 0;
@@ -629,13 +644,10 void reset_spectral_matrix_regs()
629 *
644 *
630 */
645 */
631
646
632 #ifdef GSA
633 #else
634 spectral_matrix_regs->matrixF0_Address0 = current_ring_node_sm_f0->buffer_address;
647 spectral_matrix_regs->matrixF0_Address0 = current_ring_node_sm_f0->buffer_address;
635 spectral_matrix_regs->matrixFO_Address1 = current_ring_node_sm_f0->buffer_address;
648 spectral_matrix_regs->matrixFO_Address1 = current_ring_node_sm_f0->buffer_address;
636 spectral_matrix_regs->matrixF1_Address = current_ring_node_sm_f1->buffer_address;
649 spectral_matrix_regs->matrixF1_Address = current_ring_node_sm_f1->buffer_address;
637 spectral_matrix_regs->matrixF2_Address = current_ring_node_sm_f2->buffer_address;
650 spectral_matrix_regs->matrixF2_Address = current_ring_node_sm_f2->buffer_address;
638 #endif
639 }
651 }
640
652
641 //******************
653 //******************
@@ -495,13 +495,8 int enter_normal_mode()
495
495
496 status = restart_science_tasks();
496 status = restart_science_tasks();
497
497
498 // Spectral Matrices simulator
499 // timer_start( (gptimer_regs_t*) REGS_ADDR_GPTIMER, TIMER_SM_SIMULATOR );
500 // set_local_nb_interrupt_f0_MAX();
501 // LEON_Clear_interrupt( IRQ_SM );
502 // LEON_Unmask_interrupt( IRQ_SM );
503
504 launch_waveform_picker( LFR_MODE_NORMAL );
498 launch_waveform_picker( LFR_MODE_NORMAL );
499 // launch_spectral_matrix( LFR_MODE_NORMAL );
505
500
506 return status;
501 return status;
507 }
502 }
@@ -705,15 +700,24 void launch_waveform_picker( unsigned ch
705 int startDate;
700 int startDate;
706
701
707 reset_current_ring_nodes();
702 reset_current_ring_nodes();
708 reset_waveform_picker_regs();
703 reset_waveform_picker_regs_vhdl_dev_debug_64();
709 set_wfp_burst_enable_register( mode );
704 set_wfp_burst_enable_register( mode );
710 LEON_Clear_interrupt( IRQ_WAVEFORM_PICKER );
705 LEON_Clear_interrupt( IRQ_WAVEFORM_PICKER );
711 LEON_Unmask_interrupt( IRQ_WAVEFORM_PICKER );
706 LEON_Unmask_interrupt( IRQ_WAVEFORM_PICKER );
712 #ifdef VHDL_DEV
713 startDate = time_management_regs->coarse_time + 2;
707 startDate = time_management_regs->coarse_time + 2;
714 waveform_picker_regs->run_burst_enable = waveform_picker_regs->run_burst_enable | 0x80; // [1000 0000]
708 waveform_picker_regs->run_burst_enable = waveform_picker_regs->run_burst_enable | 0x80; // [1000 0000]
715 waveform_picker_regs->start_date = startDate;
709 waveform_picker_regs->start_date = startDate;
716 #endif
710 }
711
712 void launch_spectral_matrix( unsigned char mode )
713 {
714 reset_current_sm_ring_nodes();
715 reset_spectral_matrix_regs();
716 // Spectral Matrices simulator
717 timer_start( (gptimer_regs_t*) REGS_ADDR_GPTIMER, TIMER_SM_SIMULATOR );
718 set_local_nb_interrupt_f0_MAX();
719 LEON_Clear_interrupt( IRQ_SM );
720 LEON_Unmask_interrupt( IRQ_SM );
717 }
721 }
718
722
719 //****************
723 //****************
@@ -46,6 +46,8 rtems_isr waveforms_isr( rtems_vector_nu
46 *
46 *
47 */
47 */
48
48
49 static unsigned char nb_swf = 0;
50
49 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
51 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
50 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
52 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
51 { // in modes other than STANDBY and BURST, send the CWF_F3 data
53 { // in modes other than STANDBY and BURST, send the CWF_F3 data
@@ -94,12 +96,174 rtems_isr waveforms_isr( rtems_vector_nu
94 current_ring_node_f2 = current_ring_node_f2->next;
96 current_ring_node_f2 = current_ring_node_f2->next;
95 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
97 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
96 //
98 //
99 if (nb_swf < 2)
100 // if (true)
101 {
102 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) {
103 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
104 }
105 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffff888; // [1000 1000 1000]
106 nb_swf = nb_swf + 1;
107 }
108 else
109 {
110 reset_wfp_burst_enable();
111 nb_swf = 0;
112 }
113
114 }
115
116 break;
117
118 //******
119 // BURST
120 case(LFR_MODE_BURST):
121 if ( (waveform_picker_regs->status & 0x04) == 0x04 ){ // [0100] check the f2 full bit
122 // (1) change the receiving buffer for the waveform picker
123 ring_node_to_send_cwf_f2 = current_ring_node_f2;
124 current_ring_node_f2 = current_ring_node_f2->next;
125 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
126 // (2) send an event for the waveforms transmission
127 if (rtems_event_send( Task_id[TASKID_CWF2], RTEMS_EVENT_MODE_BURST ) != RTEMS_SUCCESSFUL) {
128 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
129 }
130 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffbbb; // [1111 1011 1011 1011] f2 bit = 0
131 }
132 break;
133
134 //*****
135 // SBM1
136 case(LFR_MODE_SBM1):
137 if ( (waveform_picker_regs->status & 0x02) == 0x02 ) { // [0010] check the f1 full bit
138 // (1) change the receiving buffer for the waveform picker
139 ring_node_to_send_cwf_f1 = current_ring_node_f1;
140 current_ring_node_f1 = current_ring_node_f1->next;
141 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address;
142 // (2) send an event for the waveforms transmission
143 if (rtems_event_send( Task_id[TASKID_CWF1], RTEMS_EVENT_MODE_SBM1 ) != RTEMS_SUCCESSFUL) {
144 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
145 }
146 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffddd; // [1111 1101 1101 1101] f1 bit = 0
147 }
148 if ( (waveform_picker_regs->status & 0x01) == 0x01 ) { // [0001] check the f0 full bit
149 ring_node_to_send_swf_f1 = current_ring_node_f1->previous;
150 }
151 if ( (waveform_picker_regs->status & 0x04) == 0x04 ) { // [0100] check the f2 full bit
152 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) {
153 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
154 }
155 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffaaa; // [1111 1010 1010 1010] f2 and f0 bits = 0
156 }
157 break;
158
159 //*****
160 // SBM2
161 case(LFR_MODE_SBM2):
162 if ( (waveform_picker_regs->status & 0x04) == 0x04 ){ // [0100] check the f2 full bit
163 // (1) change the receiving buffer for the waveform picker
164 ring_node_to_send_cwf_f2 = current_ring_node_f2;
165 current_ring_node_f2 = current_ring_node_f2->next;
166 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
167 // (2) send an event for the waveforms transmission
168 if (rtems_event_send( Task_id[TASKID_CWF2], RTEMS_EVENT_MODE_SBM2 ) != RTEMS_SUCCESSFUL) {
169 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
170 }
171 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffbbb; // [1111 1011 1011 1011] f2 bit = 0
172 }
173 if ( (waveform_picker_regs->status & 0x01) == 0x01 ) { // [0001] check the f0 full bit
174 ring_node_to_send_swf_f2 = current_ring_node_f2->previous;
175 }
176 if ( (waveform_picker_regs->status & 0x02) == 0x02 ) { // [0010] check the f1 full bit
97 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) {
177 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) {
98 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
178 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
99 }
179 }
100 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffff888; // [1000 1000 1000]
180 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffccc; // [1111 1100 1100 1100] f1, f0 bits = 0
181 }
182 break;
183
184 //********
185 // DEFAULT
186 default:
187 break;
188 }
189 }
190
191 rtems_isr waveforms_isr_alt( rtems_vector_number vector )
192 {
193 /** This is the interrupt sub routine called by the waveform picker core.
194 *
195 * This ISR launch different actions depending mainly on two pieces of information:
196 * 1. the values read in the registers of the waveform picker.
197 * 2. the current LFR mode.
198 *
199 */
200
201 if ( (lfrCurrentMode == LFR_MODE_NORMAL)
202 || (lfrCurrentMode == LFR_MODE_SBM1) || (lfrCurrentMode == LFR_MODE_SBM2) )
203 { // in modes other than STANDBY and BURST, send the CWF_F3 data
204 if ((waveform_picker_regs->status & 0x08) == 0x08){ // [1000] f3 is full
205 // (1) change the receiving buffer for the waveform picker
206 if (waveform_picker_regs->addr_data_f3 == (int) wf_cont_f3_a) {
207 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_b);
208 }
209 else {
210 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_a);
211 }
212 // (2) send an event for the waveforms transmission
213 if (rtems_event_send( Task_id[TASKID_CWF3], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL) {
214 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
215 }
216 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffff777; // reset f3 bits to 0, [1111 0111 0111 0111]
101 }
217 }
218 }
102
219
220 switch(lfrCurrentMode)
221 {
222 //********
223 // STANDBY
224 case(LFR_MODE_STANDBY):
225 break;
226
227 //******
228 // NORMAL
229 case(LFR_MODE_NORMAL):
230 if ( (waveform_picker_regs->status & 0xff8) != 0x00) // [1000] check the error bits
231 {
232 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
233 }
234 if ( (waveform_picker_regs->status & 0x01) == 0x01) // [0001] check the f0 full bit
235 {
236 // change F0 ring node
237 ring_node_to_send_swf_f0 = current_ring_node_f0;
238 current_ring_node_f0 = current_ring_node_f0->next;
239 waveform_picker_regs->addr_data_f0 = current_ring_node_f0->buffer_address;
240 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffeee; // [1110 1110 1110]
241 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL_SWF_F0 ) != RTEMS_SUCCESSFUL) {
242 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
243 }
244 }
245 if ( (waveform_picker_regs->status & 0x02) == 0x02) // [0010] check the f1 full bit
246 {
247 // change F1 ring node
248 ring_node_to_send_swf_f1 = current_ring_node_f1;
249 current_ring_node_f1 = current_ring_node_f1->next;
250 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address;
251 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffddd; // [1101 1101 1101]
252 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL_SWF_F1 ) != RTEMS_SUCCESSFUL) {
253 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
254 }
255 }
256 if ( (waveform_picker_regs->status & 0x04) == 0x04) // [0100] check the f2 full bit
257 {
258 // change F2 ring node
259 ring_node_to_send_swf_f2 = current_ring_node_f2;
260 current_ring_node_f2 = current_ring_node_f2->next;
261 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address;
262 waveform_picker_regs->status = waveform_picker_regs->status & 0xfffffbbb; // [1011 1011 1011]
263 if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL_SWF_F2 ) != RTEMS_SUCCESSFUL) {
264 rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 );
265 }
266 }
103 break;
267 break;
104
268
105 //******
269 //******
@@ -682,7 +846,7 int send_waveform_SWF( volatile int *wav
682 printf("%d-%d, ERR %d\n", sid, i, (int) status);
846 printf("%d-%d, ERR %d\n", sid, i, (int) status);
683 ret = LFR_DEFAULT;
847 ret = LFR_DEFAULT;
684 }
848 }
685 rtems_task_wake_after(TIME_BETWEEN_TWO_SWF_PACKETS); // 300 ms between each packet => 7 * 3 = 21 packets => 6.3 seconds
849 // rtems_task_wake_after(TIME_BETWEEN_TWO_SWF_PACKETS); // 300 ms between each packet => 7 * 3 = 21 packets => 6.3 seconds
686 }
850 }
687
851
688 return ret;
852 return ret;
@@ -1098,8 +1262,7 void reset_wfp_status()
1098 #endif
1262 #endif
1099 }
1263 }
1100
1264
1101 #ifdef VHDL_DEV
1265 void reset_waveform_picker_regs_vhdl_dev()
1102 void reset_waveform_picker_regs()
1103 {
1266 {
1104 /** This function resets the waveform picker module registers.
1267 /** This function resets the waveform picker module registers.
1105 *
1268 *
@@ -1154,12 +1317,105 void reset_waveform_picker_regs()
1154 // waveform_picker_regs->start_date = 0x00; // 0x38
1317 // waveform_picker_regs->start_date = 0x00; // 0x38
1155 // waveform_picker_regs->nb_word_in_buffer = 0x1802; // 0x3c *** 2048 * 3 + 2 = 6146
1318 // waveform_picker_regs->nb_word_in_buffer = 0x1802; // 0x3c *** 2048 * 3 + 2 = 6146
1156 // 2352 = 7 * 336
1319 // 2352 = 7 * 336
1157 waveform_picker_regs->nb_data_by_buffer = 0x92f; // 0x30 *** 2352 - 1 => nb samples -1
1320 // waveform_picker_regs->nb_data_by_buffer = 0x92f; // 0x30 *** 2352 - 1 => nb samples -1
1158 waveform_picker_regs->snapshot_param = 0x930; // 0x34 *** 2352 => nb samples
1321 // waveform_picker_regs->snapshot_param = 0x930; // 0x34 *** 2352 => nb samples
1322 // waveform_picker_regs->start_date = 0x00; // 0x38
1323 // waveform_picker_regs->nb_word_in_buffer = 0x1b92; // 0x3c *** 2352 * 3 + 2 = 7058
1324 // 128
1325 waveform_picker_regs->nb_data_by_buffer = 0x7f; // 0x30 *** 128 - 1 => nb samples -1
1326 waveform_picker_regs->snapshot_param = 0x80; // 0x34 *** 128 => nb samples
1159 waveform_picker_regs->start_date = 0x00; // 0x38
1327 waveform_picker_regs->start_date = 0x00; // 0x38
1160 waveform_picker_regs->nb_word_in_buffer = 0x1b92; // 0x3c *** 2352 * 3 + 2 = 7058
1328 waveform_picker_regs->nb_word_in_buffer = 0x182; // 0x3c *** 128 * 3 + 2 = 386
1329 }
1330
1331 void reset_waveform_picker_regs_vhdl_dev_debug()
1332 {
1333 /** This function resets the waveform picker module registers.
1334 *
1335 * The registers affected by this function are located at the following offset addresses:
1336 * - 0x00 data_shaping
1337 * - 0x04 run_burst_enable
1338 * - 0x08 addr_data_f0
1339 * - 0x0C addr_data_f1
1340 * - 0x10 addr_data_f2
1341 * - 0x14 addr_data_f3
1342 * - 0x18 status
1343 * - 0x1C delta_snapshot
1344 * - 0x20 delta_f0
1345 * - 0x24 delta_f0_2
1346 * - 0x28 delta_f1
1347 * - 0x2c delta_f2
1348 * - 0x30 nb_data_by_buffer
1349 * - 0x34 nb_snapshot_param
1350 * - 0x38 start_date
1351 * - 0x3c nb_word_in_buffer
1352 *
1353 */
1354 waveform_picker_regs->data_shaping = 0x01; // 0x00 *** R1 R0 SP1 SP0 BW
1355 waveform_picker_regs->run_burst_enable = 0x00; // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
1356 //waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0); // 0x08
1357 waveform_picker_regs->addr_data_f0 = current_ring_node_f0->buffer_address; // 0x08
1358 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address; // 0x0c
1359 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address; // 0x10
1360 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_a); // 0x14
1361 waveform_picker_regs->status = 0x00; // 0x18
1362 //
1363 waveform_picker_regs->delta_snapshot = 0x100; // 0x1c *** 256
1364 waveform_picker_regs->delta_f0 = 0xc1; // 0x20 *** 256 - 63
1365 waveform_picker_regs->delta_f0_2 = 0x7; // 0x24 *** 7 [7 bits]
1366 waveform_picker_regs->delta_f1 = 0xc4; // 0x28 *** 256 - 60
1367 waveform_picker_regs->delta_f2 = 0xc0; // 0x2c *** 192
1368 // 128
1369 waveform_picker_regs->nb_data_by_buffer = 0x7f; // 0x30 *** 128 - 1 => nb samples -1
1370 waveform_picker_regs->snapshot_param = 0x80; // 0x34 *** 128 => nb samples
1371 waveform_picker_regs->start_date = 0x00; // 0x38
1372 waveform_picker_regs->nb_word_in_buffer = 0x182; // 0x3c *** 128 * 3 + 2 = 386
1161 }
1373 }
1162 #else
1374
1375 void reset_waveform_picker_regs_vhdl_dev_debug_64()
1376 {
1377 /** This function resets the waveform picker module registers.
1378 *
1379 * The registers affected by this function are located at the following offset addresses:
1380 * - 0x00 data_shaping
1381 * - 0x04 run_burst_enable
1382 * - 0x08 addr_data_f0
1383 * - 0x0C addr_data_f1
1384 * - 0x10 addr_data_f2
1385 * - 0x14 addr_data_f3
1386 * - 0x18 status
1387 * - 0x1C delta_snapshot
1388 * - 0x20 delta_f0
1389 * - 0x24 delta_f0_2
1390 * - 0x28 delta_f1
1391 * - 0x2c delta_f2
1392 * - 0x30 nb_data_by_buffer
1393 * - 0x34 nb_snapshot_param
1394 * - 0x38 start_date
1395 * - 0x3c nb_word_in_buffer
1396 *
1397 */
1398 waveform_picker_regs->data_shaping = 0x01; // 0x00 *** R1 R0 SP1 SP0 BW
1399 waveform_picker_regs->run_burst_enable = 0x00; // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ]
1400 //waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0); // 0x08
1401 waveform_picker_regs->addr_data_f0 = current_ring_node_f0->buffer_address; // 0x08
1402 waveform_picker_regs->addr_data_f1 = current_ring_node_f1->buffer_address; // 0x0c
1403 waveform_picker_regs->addr_data_f2 = current_ring_node_f2->buffer_address; // 0x10
1404 waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_a); // 0x14