##// END OF EJS Templates
partial recoding of reaction wheel filtering
paul -
r300:245f3ace2b2a R3++ draft
parent child
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@@ -1,85 +1,89
1 #ifndef TC_LOAD_DUMP_PARAMETERS_H
1 #ifndef TC_LOAD_DUMP_PARAMETERS_H
2 #define TC_LOAD_DUMP_PARAMETERS_H
2 #define TC_LOAD_DUMP_PARAMETERS_H
3
3
4 #include <rtems.h>
4 #include <rtems.h>
5 #include <stdio.h>
5 #include <stdio.h>
6
6
7 #include "fsw_params.h"
7 #include "fsw_params.h"
8 #include "wf_handler.h"
8 #include "wf_handler.h"
9 #include "tm_lfr_tc_exe.h"
9 #include "tm_lfr_tc_exe.h"
10 #include "fsw_misc.h"
10 #include "fsw_misc.h"
11 #include "basic_parameters_params.h"
11 #include "basic_parameters_params.h"
12 #include "avf0_prc0.h"
12 #include "avf0_prc0.h"
13
13
14 #define FLOAT_EQUAL_ZERO 0.001
14 #define FLOAT_EQUAL_ZERO 0.001
15 #define RW1 1
16 #define RW2 2
17 #define RW3 3
18 #define RW4 4
15
19
16 extern unsigned short sequenceCounterParameterDump;
20 extern unsigned short sequenceCounterParameterDump;
17 extern unsigned short sequenceCounters_TM_DUMP[];
21 extern unsigned short sequenceCounters_TM_DUMP[];
18 extern float k_coeff_intercalib_f0_norm[ ];
22 extern float k_coeff_intercalib_f0_norm[ ];
19 extern float k_coeff_intercalib_f0_sbm[ ];
23 extern float k_coeff_intercalib_f0_sbm[ ];
20 extern float k_coeff_intercalib_f1_norm[ ];
24 extern float k_coeff_intercalib_f1_norm[ ];
21 extern float k_coeff_intercalib_f1_sbm[ ];
25 extern float k_coeff_intercalib_f1_sbm[ ];
22 extern float k_coeff_intercalib_f2[ ];
26 extern float k_coeff_intercalib_f2[ ];
23 extern fbins_masks_t fbins_masks;
27 extern fbins_masks_t fbins_masks;
24
28
25 int action_load_common_par( ccsdsTelecommandPacket_t *TC );
29 int action_load_common_par( ccsdsTelecommandPacket_t *TC );
26 int action_load_normal_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id , unsigned char *time);
30 int action_load_normal_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id , unsigned char *time);
27 int action_load_burst_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id , unsigned char *time);
31 int action_load_burst_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id , unsigned char *time);
28 int action_load_sbm1_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id , unsigned char *time);
32 int action_load_sbm1_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id , unsigned char *time);
29 int action_load_sbm2_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id , unsigned char *time);
33 int action_load_sbm2_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id , unsigned char *time);
30 int action_load_kcoefficients(ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time);
34 int action_load_kcoefficients(ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time);
31 int action_load_fbins_mask(ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time);
35 int action_load_fbins_mask(ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time);
32 int action_load_filter_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time);
36 int action_load_filter_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time);
33 int action_dump_kcoefficients(ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time);
37 int action_dump_kcoefficients(ccsdsTelecommandPacket_t *TC, rtems_id queue_id, unsigned char *time);
34 int action_dump_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id );
38 int action_dump_par(ccsdsTelecommandPacket_t *TC, rtems_id queue_id );
35
39
36 // NORMAL
40 // NORMAL
37 int check_normal_par_consistency( ccsdsTelecommandPacket_t *TC, rtems_id queue_id );
41 int check_normal_par_consistency( ccsdsTelecommandPacket_t *TC, rtems_id queue_id );
38 int set_sy_lfr_n_swf_l( ccsdsTelecommandPacket_t *TC );
42 int set_sy_lfr_n_swf_l( ccsdsTelecommandPacket_t *TC );
39 int set_sy_lfr_n_swf_p( ccsdsTelecommandPacket_t *TC );
43 int set_sy_lfr_n_swf_p( ccsdsTelecommandPacket_t *TC );
40 int set_sy_lfr_n_asm_p( ccsdsTelecommandPacket_t *TC );
44 int set_sy_lfr_n_asm_p( ccsdsTelecommandPacket_t *TC );
41 int set_sy_lfr_n_bp_p0( ccsdsTelecommandPacket_t *TC );
45 int set_sy_lfr_n_bp_p0( ccsdsTelecommandPacket_t *TC );
42 int set_sy_lfr_n_bp_p1( ccsdsTelecommandPacket_t *TC );
46 int set_sy_lfr_n_bp_p1( ccsdsTelecommandPacket_t *TC );
43 int set_sy_lfr_n_cwf_long_f3( ccsdsTelecommandPacket_t *TC );
47 int set_sy_lfr_n_cwf_long_f3( ccsdsTelecommandPacket_t *TC );
44
48
45 // BURST
49 // BURST
46 int set_sy_lfr_b_bp_p0( ccsdsTelecommandPacket_t *TC );
50 int set_sy_lfr_b_bp_p0( ccsdsTelecommandPacket_t *TC );
47 int set_sy_lfr_b_bp_p1( ccsdsTelecommandPacket_t *TC );
51 int set_sy_lfr_b_bp_p1( ccsdsTelecommandPacket_t *TC );
48
52
49 // SBM1
53 // SBM1
50 int set_sy_lfr_s1_bp_p0( ccsdsTelecommandPacket_t *TC );
54 int set_sy_lfr_s1_bp_p0( ccsdsTelecommandPacket_t *TC );
51 int set_sy_lfr_s1_bp_p1( ccsdsTelecommandPacket_t *TC );
55 int set_sy_lfr_s1_bp_p1( ccsdsTelecommandPacket_t *TC );
52
56
53 // SBM2
57 // SBM2
54 int set_sy_lfr_s2_bp_p0( ccsdsTelecommandPacket_t *TC );
58 int set_sy_lfr_s2_bp_p0( ccsdsTelecommandPacket_t *TC );
55 int set_sy_lfr_s2_bp_p1( ccsdsTelecommandPacket_t *TC );
59 int set_sy_lfr_s2_bp_p1( ccsdsTelecommandPacket_t *TC );
56
60
57 // TC_LFR_UPDATE_INFO
61 // TC_LFR_UPDATE_INFO
58 unsigned int check_update_info_hk_lfr_mode( unsigned char mode );
62 unsigned int check_update_info_hk_lfr_mode( unsigned char mode );
59 unsigned int check_update_info_hk_tds_mode( unsigned char mode );
63 unsigned int check_update_info_hk_tds_mode( unsigned char mode );
60 unsigned int check_update_info_hk_thr_mode( unsigned char mode );
64 unsigned int check_update_info_hk_thr_mode( unsigned char mode );
61 void set_hk_lfr_sc_rw_f_flag( unsigned char wheel, unsigned char freq, float value );
65 void set_hk_lfr_sc_rw_f_flag( unsigned char wheel, unsigned char freq, float value );
62 void set_hk_lfr_sc_rw_f_flags( void );
66 void set_hk_lfr_sc_rw_f_flags( void );
63 void getReactionWheelsFrequencies( ccsdsTelecommandPacket_t *TC );
67 void getReactionWheelsFrequencies( ccsdsTelecommandPacket_t *TC );
64 void setFBinMask(unsigned char *fbins_mask, float rw_f, unsigned char deltaFreq, unsigned char flag );
68 void setFBinMask(unsigned char *fbins_mask, float rw_f, unsigned char deltaFreq, float k);
65 void build_sy_lfr_rw_mask( unsigned int channel );
69 void build_sy_lfr_rw_mask( unsigned int channel );
66 void build_sy_lfr_rw_masks();
70 void build_sy_lfr_rw_masks();
67 void merge_fbins_masks( void );
71 void merge_fbins_masks( void );
68
72
69 // FBINS_MASK
73 // FBINS_MASK
70 int set_sy_lfr_fbins( ccsdsTelecommandPacket_t *TC );
74 int set_sy_lfr_fbins( ccsdsTelecommandPacket_t *TC );
71
75
72 // TC_LFR_LOAD_PARS_FILTER_PAR
76 // TC_LFR_LOAD_PARS_FILTER_PAR
73 int check_sy_lfr_filter_parameters( ccsdsTelecommandPacket_t *TC, rtems_id queue_id );
77 int check_sy_lfr_filter_parameters( ccsdsTelecommandPacket_t *TC, rtems_id queue_id );
74
78
75 // KCOEFFICIENTS
79 // KCOEFFICIENTS
76 int set_sy_lfr_kcoeff(ccsdsTelecommandPacket_t *TC , rtems_id queue_id);
80 int set_sy_lfr_kcoeff(ccsdsTelecommandPacket_t *TC , rtems_id queue_id);
77 void copyFloatByChar( unsigned char *destination, unsigned char *source );
81 void copyFloatByChar( unsigned char *destination, unsigned char *source );
78 void floatToChar( float value, unsigned char* ptr);
82 void floatToChar( float value, unsigned char* ptr);
79
83
80 void init_parameter_dump( void );
84 void init_parameter_dump( void );
81 void init_kcoefficients_dump( void );
85 void init_kcoefficients_dump( void );
82 void init_kcoefficients_dump_packet( Packet_TM_LFR_KCOEFFICIENTS_DUMP_t *kcoefficients_dump, unsigned char pkt_nr, unsigned char blk_nr );
86 void init_kcoefficients_dump_packet( Packet_TM_LFR_KCOEFFICIENTS_DUMP_t *kcoefficients_dump, unsigned char pkt_nr, unsigned char blk_nr );
83 void increment_seq_counter_destination_id_dump( unsigned char *packet_sequence_control, unsigned char destination_id );
87 void increment_seq_counter_destination_id_dump( unsigned char *packet_sequence_control, unsigned char destination_id );
84
88
85 #endif // TC_LOAD_DUMP_PARAMETERS_H
89 #endif // TC_LOAD_DUMP_PARAMETERS_H
@@ -1,913 +1,913
1 /** General usage functions and RTEMS tasks.
1 /** General usage functions and RTEMS tasks.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 */
6 */
7
7
8 #include "fsw_misc.h"
8 #include "fsw_misc.h"
9
9
10 int16_t hk_lfr_sc_v_f3_as_int16;
10 int16_t hk_lfr_sc_v_f3_as_int16;
11 int16_t hk_lfr_sc_e1_f3_as_int16;
11 int16_t hk_lfr_sc_e1_f3_as_int16;
12 int16_t hk_lfr_sc_e2_f3_as_int16;
12 int16_t hk_lfr_sc_e2_f3_as_int16;
13
13
14 void timer_configure(unsigned char timer, unsigned int clock_divider,
14 void timer_configure(unsigned char timer, unsigned int clock_divider,
15 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
15 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
16 {
16 {
17 /** This function configures a GPTIMER timer instantiated in the VHDL design.
17 /** This function configures a GPTIMER timer instantiated in the VHDL design.
18 *
18 *
19 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
19 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
20 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
20 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
21 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
21 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
22 * @param interrupt_level is the interrupt level that the timer drives.
22 * @param interrupt_level is the interrupt level that the timer drives.
23 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
23 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
24 *
24 *
25 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
25 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
26 *
26 *
27 */
27 */
28
28
29 rtems_status_code status;
29 rtems_status_code status;
30 rtems_isr_entry old_isr_handler;
30 rtems_isr_entry old_isr_handler;
31
31
32 gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register
32 gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register
33
33
34 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
34 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
35 if (status!=RTEMS_SUCCESSFUL)
35 if (status!=RTEMS_SUCCESSFUL)
36 {
36 {
37 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
37 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
38 }
38 }
39
39
40 timer_set_clock_divider( timer, clock_divider);
40 timer_set_clock_divider( timer, clock_divider);
41 }
41 }
42
42
43 void timer_start(unsigned char timer)
43 void timer_start(unsigned char timer)
44 {
44 {
45 /** This function starts a GPTIMER timer.
45 /** This function starts a GPTIMER timer.
46 *
46 *
47 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
47 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
48 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
48 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
49 *
49 *
50 */
50 */
51
51
52 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
52 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
53 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register
53 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register
54 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer
54 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer
55 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart
55 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart
56 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable
56 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable
57 }
57 }
58
58
59 void timer_stop(unsigned char timer)
59 void timer_stop(unsigned char timer)
60 {
60 {
61 /** This function stops a GPTIMER timer.
61 /** This function stops a GPTIMER timer.
62 *
62 *
63 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
63 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
64 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
64 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
65 *
65 *
66 */
66 */
67
67
68 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer
68 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer
69 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable
69 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable
70 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
70 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
71 }
71 }
72
72
73 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
73 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
74 {
74 {
75 /** This function sets the clock divider of a GPTIMER timer.
75 /** This function sets the clock divider of a GPTIMER timer.
76 *
76 *
77 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
77 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
78 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
78 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
79 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
79 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
80 *
80 *
81 */
81 */
82
82
83 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
83 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
84 }
84 }
85
85
86 // WATCHDOG
86 // WATCHDOG
87
87
88 rtems_isr watchdog_isr( rtems_vector_number vector )
88 rtems_isr watchdog_isr( rtems_vector_number vector )
89 {
89 {
90 rtems_status_code status_code;
90 rtems_status_code status_code;
91
91
92 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
92 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
93
93
94 PRINTF("watchdog_isr *** this is the end, exit(0)\n");
94 PRINTF("watchdog_isr *** this is the end, exit(0)\n");
95
95
96 exit(0);
96 exit(0);
97 }
97 }
98
98
99 void watchdog_configure(void)
99 void watchdog_configure(void)
100 {
100 {
101 /** This function configure the watchdog.
101 /** This function configure the watchdog.
102 *
102 *
103 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
103 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
104 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
104 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
105 *
105 *
106 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
106 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
107 *
107 *
108 */
108 */
109
109
110 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
110 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
111
111
112 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
112 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
113
113
114 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
114 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
115 }
115 }
116
116
117 void watchdog_stop(void)
117 void watchdog_stop(void)
118 {
118 {
119 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
119 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
120 timer_stop( TIMER_WATCHDOG );
120 timer_stop( TIMER_WATCHDOG );
121 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
121 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
122 }
122 }
123
123
124 void watchdog_reload(void)
124 void watchdog_reload(void)
125 {
125 {
126 /** This function reloads the watchdog timer counter with the timer reload value.
126 /** This function reloads the watchdog timer counter with the timer reload value.
127 *
127 *
128 * @param void
128 * @param void
129 *
129 *
130 * @return void
130 * @return void
131 *
131 *
132 */
132 */
133
133
134 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
134 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
135 }
135 }
136
136
137 void watchdog_start(void)
137 void watchdog_start(void)
138 {
138 {
139 /** This function starts the watchdog timer.
139 /** This function starts the watchdog timer.
140 *
140 *
141 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
141 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
142 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
142 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
143 *
143 *
144 */
144 */
145
145
146 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
146 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
147
147
148 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any
148 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any
149 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
149 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
150 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer
150 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer
151 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable
151 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable
152
152
153 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
153 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
154
154
155 }
155 }
156
156
157 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
157 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
158 {
158 {
159 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
159 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
160
160
161 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
161 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
162
162
163 return 0;
163 return 0;
164 }
164 }
165
165
166 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
166 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
167 {
167 {
168 /** This function sets the scaler reload register of the apbuart module
168 /** This function sets the scaler reload register of the apbuart module
169 *
169 *
170 * @param regs is the address of the apbuart registers in memory
170 * @param regs is the address of the apbuart registers in memory
171 * @param value is the value that will be stored in the scaler register
171 * @param value is the value that will be stored in the scaler register
172 *
172 *
173 * The value shall be set by the software to get data on the serial interface.
173 * The value shall be set by the software to get data on the serial interface.
174 *
174 *
175 */
175 */
176
176
177 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
177 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
178
178
179 apbuart_regs->scaler = value;
179 apbuart_regs->scaler = value;
180
180
181 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
181 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
182 }
182 }
183
183
184 //************
184 //************
185 // RTEMS TASKS
185 // RTEMS TASKS
186
186
187 rtems_task load_task(rtems_task_argument argument)
187 rtems_task load_task(rtems_task_argument argument)
188 {
188 {
189 BOOT_PRINTF("in LOAD *** \n")
189 BOOT_PRINTF("in LOAD *** \n")
190
190
191 rtems_status_code status;
191 rtems_status_code status;
192 unsigned int i;
192 unsigned int i;
193 unsigned int j;
193 unsigned int j;
194 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
194 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
195 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
195 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
196
196
197 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
197 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
198
198
199 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
199 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
200 if( status != RTEMS_SUCCESSFUL ) {
200 if( status != RTEMS_SUCCESSFUL ) {
201 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
201 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
202 }
202 }
203
203
204 i = 0;
204 i = 0;
205 j = 0;
205 j = 0;
206
206
207 watchdog_configure();
207 watchdog_configure();
208
208
209 watchdog_start();
209 watchdog_start();
210
210
211 set_sy_lfr_watchdog_enabled( true );
211 set_sy_lfr_watchdog_enabled( true );
212
212
213 while(1){
213 while(1){
214 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
214 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
215 watchdog_reload();
215 watchdog_reload();
216 i = i + 1;
216 i = i + 1;
217 if ( i == 10 )
217 if ( i == 10 )
218 {
218 {
219 i = 0;
219 i = 0;
220 j = j + 1;
220 j = j + 1;
221 PRINTF1("%d\n", j)
221 PRINTF1("%d\n", j)
222 }
222 }
223 #ifdef DEBUG_WATCHDOG
223 #ifdef DEBUG_WATCHDOG
224 if (j == 3 )
224 if (j == 3 )
225 {
225 {
226 status = rtems_task_delete(RTEMS_SELF);
226 status = rtems_task_delete(RTEMS_SELF);
227 }
227 }
228 #endif
228 #endif
229 }
229 }
230 }
230 }
231
231
232 rtems_task hous_task(rtems_task_argument argument)
232 rtems_task hous_task(rtems_task_argument argument)
233 {
233 {
234 rtems_status_code status;
234 rtems_status_code status;
235 rtems_status_code spare_status;
235 rtems_status_code spare_status;
236 rtems_id queue_id;
236 rtems_id queue_id;
237 rtems_rate_monotonic_period_status period_status;
237 rtems_rate_monotonic_period_status period_status;
238
238
239 status = get_message_queue_id_send( &queue_id );
239 status = get_message_queue_id_send( &queue_id );
240 if (status != RTEMS_SUCCESSFUL)
240 if (status != RTEMS_SUCCESSFUL)
241 {
241 {
242 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
242 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
243 }
243 }
244
244
245 BOOT_PRINTF("in HOUS ***\n");
245 BOOT_PRINTF("in HOUS ***\n");
246
246
247 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
247 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
248 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
248 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
249 if( status != RTEMS_SUCCESSFUL ) {
249 if( status != RTEMS_SUCCESSFUL ) {
250 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
250 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
251 }
251 }
252 }
252 }
253
253
254 status = rtems_rate_monotonic_cancel(HK_id);
254 status = rtems_rate_monotonic_cancel(HK_id);
255 if( status != RTEMS_SUCCESSFUL ) {
255 if( status != RTEMS_SUCCESSFUL ) {
256 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status );
256 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status );
257 }
257 }
258 else {
258 else {
259 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n");
259 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n");
260 }
260 }
261
261
262 // startup phase
262 // startup phase
263 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
263 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
264 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
264 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
265 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
265 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
266 while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
266 while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
267 {
267 {
268 if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization
268 if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization
269 {
269 {
270 break; // break if LFR is synchronized
270 break; // break if LFR is synchronized
271 }
271 }
272 else
272 else
273 {
273 {
274 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
274 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
275 // sched_yield();
275 // sched_yield();
276 status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms
276 status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms
277 }
277 }
278 }
278 }
279 status = rtems_rate_monotonic_cancel(HK_id);
279 status = rtems_rate_monotonic_cancel(HK_id);
280 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
280 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
281
281
282 set_hk_lfr_reset_cause( POWER_ON );
282 set_hk_lfr_reset_cause( POWER_ON );
283
283
284 while(1){ // launch the rate monotonic task
284 while(1){ // launch the rate monotonic task
285 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
285 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
286 if ( status != RTEMS_SUCCESSFUL ) {
286 if ( status != RTEMS_SUCCESSFUL ) {
287 PRINTF1( "in HOUS *** ERR period: %d\n", status);
287 PRINTF1( "in HOUS *** ERR period: %d\n", status);
288 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
288 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
289 }
289 }
290 else {
290 else {
291 housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8);
291 housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8);
292 housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK );
292 housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK );
293 increment_seq_counter( &sequenceCounterHK );
293 increment_seq_counter( &sequenceCounterHK );
294
294
295 housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
295 housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
296 housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
296 housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
297 housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
297 housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
298 housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
298 housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
299 housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
299 housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
300 housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
300 housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
301
301
302 spacewire_update_hk_lfr_link_state( &housekeeping_packet.lfr_status_word[0] );
302 spacewire_update_hk_lfr_link_state( &housekeeping_packet.lfr_status_word[0] );
303
303
304 spacewire_read_statistics();
304 spacewire_read_statistics();
305
305
306 update_hk_with_grspw_stats();
306 update_hk_with_grspw_stats();
307
307
308 set_hk_lfr_time_not_synchro();
308 set_hk_lfr_time_not_synchro();
309
309
310 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
310 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
311 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
311 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
312 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
312 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
313 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
313 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
314 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
314 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
315
315
316 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
316 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
317 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
317 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
318 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
318 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
319 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
319 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
320 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
320 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
321
321
322 hk_lfr_le_me_he_update();
322 hk_lfr_le_me_he_update();
323
323
324 housekeeping_packet.hk_lfr_sc_rw1_rw2_f_flags = cp_rpw_sc_rw1_rw2_f_flags;
324 housekeeping_packet.hk_lfr_sc_rw1_rw2_f_flags = cp_rpw_sc_rw1_rw2_f_flags;
325 housekeeping_packet.hk_lfr_sc_rw3_rw4_f_flags = cp_rpw_sc_rw3_rw4_f_flags;
325 housekeeping_packet.hk_lfr_sc_rw3_rw4_f_flags = cp_rpw_sc_rw3_rw4_f_flags;
326
326
327 // SEND PACKET
327 // SEND PACKET
328 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
328 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
329 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
329 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
330 if (status != RTEMS_SUCCESSFUL) {
330 if (status != RTEMS_SUCCESSFUL) {
331 PRINTF1("in HOUS *** ERR send: %d\n", status)
331 PRINTF1("in HOUS *** ERR send: %d\n", status)
332 }
332 }
333 }
333 }
334 }
334 }
335
335
336 PRINTF("in HOUS *** deleting task\n")
336 PRINTF("in HOUS *** deleting task\n")
337
337
338 status = rtems_task_delete( RTEMS_SELF ); // should not return
338 status = rtems_task_delete( RTEMS_SELF ); // should not return
339
339
340 return;
340 return;
341 }
341 }
342
342
343 rtems_task avgv_task(rtems_task_argument argument)
343 rtems_task avgv_task(rtems_task_argument argument)
344 {
344 {
345 #define MOVING_AVERAGE 16
345 #define MOVING_AVERAGE 16
346 rtems_status_code status;
346 rtems_status_code status;
347 unsigned int v[MOVING_AVERAGE];
347 unsigned int v[MOVING_AVERAGE];
348 unsigned int e1[MOVING_AVERAGE];
348 unsigned int e1[MOVING_AVERAGE];
349 unsigned int e2[MOVING_AVERAGE];
349 unsigned int e2[MOVING_AVERAGE];
350 float average_v;
350 float average_v;
351 float average_e1;
351 float average_e1;
352 float average_e2;
352 float average_e2;
353 float newValue_v;
353 float newValue_v;
354 float newValue_e1;
354 float newValue_e1;
355 float newValue_e2;
355 float newValue_e2;
356 unsigned char k;
356 unsigned char k;
357 unsigned char indexOfOldValue;
357 unsigned char indexOfOldValue;
358
358
359 BOOT_PRINTF("in AVGV ***\n");
359 BOOT_PRINTF("in AVGV ***\n");
360
360
361 if (rtems_rate_monotonic_ident( name_avgv_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
361 if (rtems_rate_monotonic_ident( name_avgv_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
362 status = rtems_rate_monotonic_create( name_avgv_rate_monotonic, &AVGV_id );
362 status = rtems_rate_monotonic_create( name_avgv_rate_monotonic, &AVGV_id );
363 if( status != RTEMS_SUCCESSFUL ) {
363 if( status != RTEMS_SUCCESSFUL ) {
364 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
364 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
365 }
365 }
366 }
366 }
367
367
368 status = rtems_rate_monotonic_cancel(AVGV_id);
368 status = rtems_rate_monotonic_cancel(AVGV_id);
369 if( status != RTEMS_SUCCESSFUL ) {
369 if( status != RTEMS_SUCCESSFUL ) {
370 PRINTF1( "ERR *** in AVGV *** rtems_rate_monotonic_cancel(AVGV_id) ***code: %d\n", status );
370 PRINTF1( "ERR *** in AVGV *** rtems_rate_monotonic_cancel(AVGV_id) ***code: %d\n", status );
371 }
371 }
372 else {
372 else {
373 DEBUG_PRINTF("OK *** in AVGV *** rtems_rate_monotonic_cancel(AVGV_id)\n");
373 DEBUG_PRINTF("OK *** in AVGV *** rtems_rate_monotonic_cancel(AVGV_id)\n");
374 }
374 }
375
375
376 // initialize values
376 // initialize values
377 k = 0;
377 k = 0;
378 indexOfOldValue = MOVING_AVERAGE - 1;
378 indexOfOldValue = MOVING_AVERAGE - 1;
379 for (k = 0; k < MOVING_AVERAGE; k++)
379 for (k = 0; k < MOVING_AVERAGE; k++)
380 {
380 {
381 v[k] = 0;
381 v[k] = 0;
382 e1[k] = 0;
382 e1[k] = 0;
383 e2[k] = 0;
383 e2[k] = 0;
384 average_v = 0.;
384 average_v = 0.;
385 average_e1 = 0.;
385 average_e1 = 0.;
386 average_e2 = 0.;
386 average_e2 = 0.;
387 newValue_v = 0.;
387 newValue_v = 0.;
388 newValue_e1 = 0.;
388 newValue_e1 = 0.;
389 newValue_e2 = 0.;
389 newValue_e2 = 0.;
390 }
390 }
391
391
392 k = 0;
392 k = 0;
393
393
394 while(1){ // launch the rate monotonic task
394 while(1){ // launch the rate monotonic task
395 status = rtems_rate_monotonic_period( AVGV_id, AVGV_PERIOD );
395 status = rtems_rate_monotonic_period( AVGV_id, AVGV_PERIOD );
396 if ( status != RTEMS_SUCCESSFUL ) {
396 if ( status != RTEMS_SUCCESSFUL ) {
397 PRINTF1( "in AVGV *** ERR period: %d\n", status);
397 PRINTF1( "in AVGV *** ERR period: %d\n", status);
398 }
398 }
399 else {
399 else {
400 // get new values
400 // get new values
401 newValue_v = waveform_picker_regs->v;
401 newValue_v = waveform_picker_regs->v;
402 newValue_e1 = waveform_picker_regs->e1;
402 newValue_e1 = waveform_picker_regs->e1;
403 newValue_e2 = waveform_picker_regs->e2;
403 newValue_e2 = waveform_picker_regs->e2;
404
404
405 // compute the moving average
405 // compute the moving average
406 average_v = average_v + newValue_v - v[k];
406 average_v = average_v + newValue_v - v[k];
407 average_e1 = average_e1 + newValue_e1 - e1[k];
407 average_e1 = average_e1 + newValue_e1 - e1[k];
408 average_e2 = average_e2 + newValue_e2 - e2[k];
408 average_e2 = average_e2 + newValue_e2 - e2[k];
409
409
410 // store new values in buffers
410 // store new values in buffers
411 v[k] = newValue_v;
411 v[k] = newValue_v;
412 e1[k] = newValue_e1;
412 e1[k] = newValue_e1;
413 e2[k] = newValue_e2;
413 e2[k] = newValue_e2;
414 }
414 }
415 if (k == (MOVING_AVERAGE-1))
415 if (k == (MOVING_AVERAGE-1))
416 {
416 {
417 k = 0;
417 k = 0;
418 printf("tick\n");
418 printf("tick\n");
419 }
419 }
420 else
420 else
421 {
421 {
422 k++;
422 k++;
423 }
423 }
424
425 //update int16 values
426 hk_lfr_sc_v_f3_as_int16 = (int16_t) (average_v / ((float) MOVING_AVERAGE) );
427 hk_lfr_sc_e1_f3_as_int16 = (int16_t) (average_e1 / ((float) MOVING_AVERAGE) );
428 hk_lfr_sc_e2_f3_as_int16 = (int16_t) (average_e2 / ((float) MOVING_AVERAGE) );
424 }
429 }
425
430
426 //update int16 values
427 hk_lfr_sc_v_f3_as_int16 = (int16_t) (average_v / ((float) MOVING_AVERAGE) );
428 hk_lfr_sc_e1_f3_as_int16 = (int16_t) (average_e1 / ((float) MOVING_AVERAGE) );
429 hk_lfr_sc_e2_f3_as_int16 = (int16_t) (average_e2 / ((float) MOVING_AVERAGE) );
430
431 PRINTF("in AVGV *** deleting task\n");
431 PRINTF("in AVGV *** deleting task\n");
432
432
433 status = rtems_task_delete( RTEMS_SELF ); // should not return
433 status = rtems_task_delete( RTEMS_SELF ); // should not return
434
434
435 return;
435 return;
436 }
436 }
437
437
438 rtems_task dumb_task( rtems_task_argument unused )
438 rtems_task dumb_task( rtems_task_argument unused )
439 {
439 {
440 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
440 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
441 *
441 *
442 * @param unused is the starting argument of the RTEMS task
442 * @param unused is the starting argument of the RTEMS task
443 *
443 *
444 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
444 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
445 *
445 *
446 */
446 */
447
447
448 unsigned int i;
448 unsigned int i;
449 unsigned int intEventOut;
449 unsigned int intEventOut;
450 unsigned int coarse_time = 0;
450 unsigned int coarse_time = 0;
451 unsigned int fine_time = 0;
451 unsigned int fine_time = 0;
452 rtems_event_set event_out;
452 rtems_event_set event_out;
453
453
454 char *DumbMessages[15] = {"in DUMB *** default", // RTEMS_EVENT_0
454 char *DumbMessages[15] = {"in DUMB *** default", // RTEMS_EVENT_0
455 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
455 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
456 "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2
456 "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2
457 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
457 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
458 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
458 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
459 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
459 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
460 "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6
460 "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6
461 "ready for dump", // RTEMS_EVENT_7
461 "ready for dump", // RTEMS_EVENT_7
462 "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8
462 "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8
463 "tick", // RTEMS_EVENT_9
463 "tick", // RTEMS_EVENT_9
464 "VHDL ERR *** waveform picker", // RTEMS_EVENT_10
464 "VHDL ERR *** waveform picker", // RTEMS_EVENT_10
465 "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11
465 "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11
466 "WATCHDOG timer", // RTEMS_EVENT_12
466 "WATCHDOG timer", // RTEMS_EVENT_12
467 "TIMECODE timer", // RTEMS_EVENT_13
467 "TIMECODE timer", // RTEMS_EVENT_13
468 "TIMECODE ISR" // RTEMS_EVENT_14
468 "TIMECODE ISR" // RTEMS_EVENT_14
469 };
469 };
470
470
471 BOOT_PRINTF("in DUMB *** \n")
471 BOOT_PRINTF("in DUMB *** \n")
472
472
473 while(1){
473 while(1){
474 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
474 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
475 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
475 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
476 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13
476 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13
477 | RTEMS_EVENT_14,
477 | RTEMS_EVENT_14,
478 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
478 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
479 intEventOut = (unsigned int) event_out;
479 intEventOut = (unsigned int) event_out;
480 for ( i=0; i<32; i++)
480 for ( i=0; i<32; i++)
481 {
481 {
482 if ( ((intEventOut >> i) & 0x0001) != 0)
482 if ( ((intEventOut >> i) & 0x0001) != 0)
483 {
483 {
484 coarse_time = time_management_regs->coarse_time;
484 coarse_time = time_management_regs->coarse_time;
485 fine_time = time_management_regs->fine_time;
485 fine_time = time_management_regs->fine_time;
486 if (i==12)
486 if (i==12)
487 {
487 {
488 PRINTF1("%s\n", DumbMessages[12])
488 PRINTF1("%s\n", DumbMessages[12])
489 }
489 }
490 if (i==13)
490 if (i==13)
491 {
491 {
492 PRINTF1("%s\n", DumbMessages[13])
492 PRINTF1("%s\n", DumbMessages[13])
493 }
493 }
494 if (i==14)
494 if (i==14)
495 {
495 {
496 PRINTF1("%s\n", DumbMessages[1])
496 PRINTF1("%s\n", DumbMessages[1])
497 }
497 }
498 }
498 }
499 }
499 }
500 }
500