##// END OF EJS Templates
spacewire statistics management modified...
paul -
r264:2120c4473911 R3a
parent child
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@@ -1,59 +1,57
1 #ifndef FSW_SPACEWIRE_H_INCLUDED
1 #ifndef FSW_SPACEWIRE_H_INCLUDED
2 #define FSW_SPACEWIRE_H_INCLUDED
2 #define FSW_SPACEWIRE_H_INCLUDED
3
3
4 #include <rtems.h>
4 #include <rtems.h>
5 #include <grspw.h>
5 #include <grspw.h>
6
6
7 #include <fcntl.h> // for O_RDWR
7 #include <fcntl.h> // for O_RDWR
8 #include <unistd.h> // for the read call
8 #include <unistd.h> // for the read call
9 #include <sys/ioctl.h> // for the ioctl call
9 #include <sys/ioctl.h> // for the ioctl call
10 #include <errno.h>
10 #include <errno.h>
11
11
12 #include "fsw_params.h"
12 #include "fsw_params.h"
13 #include "tc_handler.h"
13 #include "tc_handler.h"
14 #include "fsw_init.h"
14 #include "fsw_init.h"
15
15
16 extern spw_stats grspw_stats;
16 extern spw_stats grspw_stats;
17 extern spw_stats spw_backup;
17 extern spw_stats spw_backup;
18 extern rtems_name timecode_timer_name;
18 extern rtems_name timecode_timer_name;
19 extern rtems_id timecode_timer_id;
19 extern rtems_id timecode_timer_id;
20
20
21 // RTEMS TASK
21 // RTEMS TASK
22 rtems_task spiq_task( rtems_task_argument argument );
22 rtems_task spiq_task( rtems_task_argument argument );
23 rtems_task recv_task( rtems_task_argument unused );
23 rtems_task recv_task( rtems_task_argument unused );
24 rtems_task send_task( rtems_task_argument argument );
24 rtems_task send_task( rtems_task_argument argument );
25 rtems_task link_task( rtems_task_argument argument );
25 rtems_task link_task( rtems_task_argument argument );
26
26
27 int spacewire_open_link( void );
27 int spacewire_open_link( void );
28 int spacewire_start_link( int fd );
28 int spacewire_start_link( int fd );
29 int spacewire_stop_and_start_link( int fd );
29 int spacewire_stop_and_start_link( int fd );
30 int spacewire_configure_link(int fd );
30 int spacewire_configure_link(int fd );
31 int spacewire_several_connect_attemps( void );
31 int spacewire_several_connect_attemps( void );
32 void spacewire_set_NP( unsigned char val, unsigned int regAddr ); // No Port force
32 void spacewire_set_NP( unsigned char val, unsigned int regAddr ); // No Port force
33 void spacewire_set_RE( unsigned char val, unsigned int regAddr ); // RMAP Enable
33 void spacewire_set_RE( unsigned char val, unsigned int regAddr ); // RMAP Enable
34 void spacewire_save_stats( void );
34 void spacewire_read_statistics( void );
35 void spacewire_restore_stats( void );
36 void spacewire_update_statistics( void );
37 void update_hk_lfr_last_er_fields(unsigned int rid, unsigned char code);
35 void update_hk_lfr_last_er_fields(unsigned int rid, unsigned char code);
38 void update_hk_with_grspw_stats( spw_stats stats );
36 void update_hk_with_grspw_stats(void );
39 void increase_unsigned_char_counter( unsigned char *counter );
37 void increase_unsigned_char_counter( unsigned char *counter );
40
38
41 void init_header_cwf( Header_TM_LFR_SCIENCE_CWF_t *header );
39 void init_header_cwf( Header_TM_LFR_SCIENCE_CWF_t *header );
42 void init_header_swf( Header_TM_LFR_SCIENCE_SWF_t *header );
40 void init_header_swf( Header_TM_LFR_SCIENCE_SWF_t *header );
43 void init_header_asm( Header_TM_LFR_SCIENCE_ASM_t *header );
41 void init_header_asm( Header_TM_LFR_SCIENCE_ASM_t *header );
44 int spw_send_waveform_CWF( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_CWF_t *header );
42 int spw_send_waveform_CWF( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_CWF_t *header );
45 int spw_send_waveform_SWF( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_SWF_t *header );
43 int spw_send_waveform_SWF( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_SWF_t *header );
46 int spw_send_waveform_CWF3_light( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_CWF_t *header );
44 int spw_send_waveform_CWF3_light( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_CWF_t *header );
47 void spw_send_asm_f0( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_ASM_t *header );
45 void spw_send_asm_f0( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_ASM_t *header );
48 void spw_send_asm_f1( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_ASM_t *header );
46 void spw_send_asm_f1( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_ASM_t *header );
49 void spw_send_asm_f2( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_ASM_t *header );
47 void spw_send_asm_f2( ring_node *ring_node_to_send, Header_TM_LFR_SCIENCE_ASM_t *header );
50 void spw_send_k_dump( ring_node *ring_node_to_send );
48 void spw_send_k_dump( ring_node *ring_node_to_send );
51
49
52 rtems_timer_service_routine timecode_timer_routine( rtems_id timer_id, void *user_data );
50 rtems_timer_service_routine timecode_timer_routine( rtems_id timer_id, void *user_data );
53 unsigned int check_timecode_and_previous_timecode_coherency(unsigned char currentTimecodeCtr);
51 unsigned int check_timecode_and_previous_timecode_coherency(unsigned char currentTimecodeCtr);
54 unsigned int check_timecode_and_internal_time_coherency(unsigned char timecode, unsigned char internalTime);
52 unsigned int check_timecode_and_internal_time_coherency(unsigned char timecode, unsigned char internalTime);
55 void timecode_irq_handler( void *pDev, void *regs, int minor, unsigned int tc );
53 void timecode_irq_handler( void *pDev, void *regs, int minor, unsigned int tc );
56
54
57 void (*grspw_timecode_callback) ( void *pDev, void *regs, int minor, unsigned int tc );
55 void (*grspw_timecode_callback) ( void *pDev, void *regs, int minor, unsigned int tc );
58
56
59 #endif // FSW_SPACEWIRE_H_INCLUDED
57 #endif // FSW_SPACEWIRE_H_INCLUDED
<
@@ -1,804 +1,804
1 /** General usage functions and RTEMS tasks.
1 /** General usage functions and RTEMS tasks.
2 *
2 *
3 * @file
3 * @file
4 * @author P. LEROY
4 * @author P. LEROY
5 *
5 *
6 */
6 */
7
7
8 #include "fsw_misc.h"
8 #include "fsw_misc.h"
9
9
10 void timer_configure(unsigned char timer, unsigned int clock_divider,
10 void timer_configure(unsigned char timer, unsigned int clock_divider,
11 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
11 unsigned char interrupt_level, rtems_isr (*timer_isr)() )
12 {
12 {
13 /** This function configures a GPTIMER timer instantiated in the VHDL design.
13 /** This function configures a GPTIMER timer instantiated in the VHDL design.
14 *
14 *
15 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
15 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
16 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
16 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
17 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
17 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
18 * @param interrupt_level is the interrupt level that the timer drives.
18 * @param interrupt_level is the interrupt level that the timer drives.
19 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
19 * @param timer_isr is the interrupt subroutine that will be attached to the IRQ driven by the timer.
20 *
20 *
21 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
21 * Interrupt levels are described in the SPARC documentation sparcv8.pdf p.76
22 *
22 *
23 */
23 */
24
24
25 rtems_status_code status;
25 rtems_status_code status;
26 rtems_isr_entry old_isr_handler;
26 rtems_isr_entry old_isr_handler;
27
27
28 gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register
28 gptimer_regs->timer[timer].ctrl = 0x00; // reset the control register
29
29
30 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
30 status = rtems_interrupt_catch( timer_isr, interrupt_level, &old_isr_handler) ; // see sparcv8.pdf p.76 for interrupt levels
31 if (status!=RTEMS_SUCCESSFUL)
31 if (status!=RTEMS_SUCCESSFUL)
32 {
32 {
33 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
33 PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n")
34 }
34 }
35
35
36 timer_set_clock_divider( timer, clock_divider);
36 timer_set_clock_divider( timer, clock_divider);
37 }
37 }
38
38
39 void timer_start(unsigned char timer)
39 void timer_start(unsigned char timer)
40 {
40 {
41 /** This function starts a GPTIMER timer.
41 /** This function starts a GPTIMER timer.
42 *
42 *
43 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
43 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
44 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
44 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
45 *
45 *
46 */
46 */
47
47
48 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
48 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
49 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register
49 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000004; // LD load value from the reload register
50 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer
50 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000001; // EN enable the timer
51 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart
51 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000002; // RS restart
52 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable
52 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable
53 }
53 }
54
54
55 void timer_stop(unsigned char timer)
55 void timer_stop(unsigned char timer)
56 {
56 {
57 /** This function stops a GPTIMER timer.
57 /** This function stops a GPTIMER timer.
58 *
58 *
59 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
59 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
60 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
60 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
61 *
61 *
62 */
62 */
63
63
64 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer
64 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xfffffffe; // EN enable the timer
65 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable
65 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl & 0xffffffef; // IE interrupt enable
66 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
66 gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any
67 }
67 }
68
68
69 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
69 void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider)
70 {
70 {
71 /** This function sets the clock divider of a GPTIMER timer.
71 /** This function sets the clock divider of a GPTIMER timer.
72 *
72 *
73 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
73 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
74 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
74 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
75 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
75 * @param clock_divider is the divider of the 1 MHz clock that will be configured.
76 *
76 *
77 */
77 */
78
78
79 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
79 gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz
80 }
80 }
81
81
82 // WATCHDOG
82 // WATCHDOG
83
83
84 rtems_isr watchdog_isr( rtems_vector_number vector )
84 rtems_isr watchdog_isr( rtems_vector_number vector )
85 {
85 {
86 rtems_status_code status_code;
86 rtems_status_code status_code;
87
87
88 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
88 status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 );
89
89
90 PRINTF("watchdog_isr *** this is the end, exit(0)\n");
90 PRINTF("watchdog_isr *** this is the end, exit(0)\n");
91
91
92 exit(0);
92 exit(0);
93 }
93 }
94
94
95 void watchdog_configure(void)
95 void watchdog_configure(void)
96 {
96 {
97 /** This function configure the watchdog.
97 /** This function configure the watchdog.
98 *
98 *
99 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
99 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
100 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
100 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
101 *
101 *
102 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
102 * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB.
103 *
103 *
104 */
104 */
105
105
106 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
106 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration
107
107
108 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
108 timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr );
109
109
110 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
110 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
111 }
111 }
112
112
113 void watchdog_stop(void)
113 void watchdog_stop(void)
114 {
114 {
115 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
115 LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line
116 timer_stop( TIMER_WATCHDOG );
116 timer_stop( TIMER_WATCHDOG );
117 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
117 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt
118 }
118 }
119
119
120 void watchdog_reload(void)
120 void watchdog_reload(void)
121 {
121 {
122 /** This function reloads the watchdog timer counter with the timer reload value.
122 /** This function reloads the watchdog timer counter with the timer reload value.
123 *
123 *
124 * @param void
124 * @param void
125 *
125 *
126 * @return void
126 * @return void
127 *
127 *
128 */
128 */
129
129
130 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
130 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
131 }
131 }
132
132
133 void watchdog_start(void)
133 void watchdog_start(void)
134 {
134 {
135 /** This function starts the watchdog timer.
135 /** This function starts the watchdog timer.
136 *
136 *
137 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
137 * @param gptimer_regs points to the APB registers of the GPTIMER IP core.
138 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
138 * @param timer is the number of the timer in the IP core (several timers can be instantiated).
139 *
139 *
140 */
140 */
141
141
142 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
142 LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG );
143
143
144 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any
144 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any
145 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
145 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register
146 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer
146 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer
147 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable
147 gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable
148
148
149 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
149 LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG );
150
150
151 }
151 }
152
152
153 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
153 int enable_apbuart_transmitter( void ) // set the bit 1, TE Transmitter Enable to 1 in the APBUART control register
154 {
154 {
155 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
155 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART;
156
156
157 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
157 apbuart_regs->ctrl = APBUART_CTRL_REG_MASK_TE;
158
158
159 return 0;
159 return 0;
160 }
160 }
161
161
162 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
162 void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value)
163 {
163 {
164 /** This function sets the scaler reload register of the apbuart module
164 /** This function sets the scaler reload register of the apbuart module
165 *
165 *
166 * @param regs is the address of the apbuart registers in memory
166 * @param regs is the address of the apbuart registers in memory
167 * @param value is the value that will be stored in the scaler register
167 * @param value is the value that will be stored in the scaler register
168 *
168 *
169 * The value shall be set by the software to get data on the serial interface.
169 * The value shall be set by the software to get data on the serial interface.
170 *
170 *
171 */
171 */
172
172
173 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
173 struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) regs;
174
174
175 apbuart_regs->scaler = value;
175 apbuart_regs->scaler = value;
176
176
177 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
177 BOOT_PRINTF1("OK *** apbuart port scaler reload register set to 0x%x\n", value)
178 }
178 }
179
179
180 //************
180 //************
181 // RTEMS TASKS
181 // RTEMS TASKS
182
182
183 rtems_task load_task(rtems_task_argument argument)
183 rtems_task load_task(rtems_task_argument argument)
184 {
184 {
185 BOOT_PRINTF("in LOAD *** \n")
185 BOOT_PRINTF("in LOAD *** \n")
186
186
187 rtems_status_code status;
187 rtems_status_code status;
188 unsigned int i;
188 unsigned int i;
189 unsigned int j;
189 unsigned int j;
190 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
190 rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic
191 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
191 rtems_id watchdog_period_id; // id of the watchdog rate monotonic period
192
192
193 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
193 name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' );
194
194
195 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
195 status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id );
196 if( status != RTEMS_SUCCESSFUL ) {
196 if( status != RTEMS_SUCCESSFUL ) {
197 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
197 PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status )
198 }
198 }
199
199
200 i = 0;
200 i = 0;
201 j = 0;
201 j = 0;
202
202
203 watchdog_configure();
203 watchdog_configure();
204
204
205 watchdog_start();
205 watchdog_start();
206
206
207 set_sy_lfr_watchdog_enabled( true );
207 set_sy_lfr_watchdog_enabled( true );
208
208
209 while(1){
209 while(1){
210 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
210 status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD );
211 watchdog_reload();
211 watchdog_reload();
212 i = i + 1;
212 i = i + 1;
213 if ( i == 10 )
213 if ( i == 10 )
214 {
214 {
215 i = 0;
215 i = 0;
216 j = j + 1;
216 j = j + 1;
217 PRINTF1("%d\n", j)
217 PRINTF1("%d\n", j)
218 }
218 }
219 #ifdef DEBUG_WATCHDOG
219 #ifdef DEBUG_WATCHDOG
220 if (j == 3 )
220 if (j == 3 )
221 {
221 {
222 status = rtems_task_delete(RTEMS_SELF);
222 status = rtems_task_delete(RTEMS_SELF);
223 }
223 }
224 #endif
224 #endif
225 }
225 }
226 }
226 }
227
227
228 rtems_task hous_task(rtems_task_argument argument)
228 rtems_task hous_task(rtems_task_argument argument)
229 {
229 {
230 rtems_status_code status;
230 rtems_status_code status;
231 rtems_status_code spare_status;
231 rtems_status_code spare_status;
232 rtems_id queue_id;
232 rtems_id queue_id;
233 rtems_rate_monotonic_period_status period_status;
233 rtems_rate_monotonic_period_status period_status;
234
234
235 status = get_message_queue_id_send( &queue_id );
235 status = get_message_queue_id_send( &queue_id );
236 if (status != RTEMS_SUCCESSFUL)
236 if (status != RTEMS_SUCCESSFUL)
237 {
237 {
238 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
238 PRINTF1("in HOUS *** ERR get_message_queue_id_send %d\n", status)
239 }
239 }
240
240
241 BOOT_PRINTF("in HOUS ***\n");
241 BOOT_PRINTF("in HOUS ***\n");
242
242
243 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
243 if (rtems_rate_monotonic_ident( name_hk_rate_monotonic, &HK_id) != RTEMS_SUCCESSFUL) {
244 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
244 status = rtems_rate_monotonic_create( name_hk_rate_monotonic, &HK_id );
245 if( status != RTEMS_SUCCESSFUL ) {
245 if( status != RTEMS_SUCCESSFUL ) {
246 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
246 PRINTF1( "rtems_rate_monotonic_create failed with status of %d\n", status );
247 }
247 }
248 }
248 }
249
249
250 status = rtems_rate_monotonic_cancel(HK_id);
250 status = rtems_rate_monotonic_cancel(HK_id);
251 if( status != RTEMS_SUCCESSFUL ) {
251 if( status != RTEMS_SUCCESSFUL ) {
252 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status );
252 PRINTF1( "ERR *** in HOUS *** rtems_rate_monotonic_cancel(HK_id) ***code: %d\n", status );
253 }
253 }
254 else {
254 else {
255 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n");
255 DEBUG_PRINTF("OK *** in HOUS *** rtems_rate_monotonic_cancel(HK_id)\n");
256 }
256 }
257
257
258 // startup phase
258 // startup phase
259 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
259 status = rtems_rate_monotonic_period( HK_id, SY_LFR_TIME_SYN_TIMEOUT_in_ticks );
260 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
260 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
261 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
261 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
262 while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
262 while(period_status.state != RATE_MONOTONIC_EXPIRED ) // after SY_LFR_TIME_SYN_TIMEOUT ms, starts HK anyway
263 {
263 {
264 if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization
264 if ((time_management_regs->coarse_time & 0x80000000) == 0x00000000) // check time synchronization
265 {
265 {
266 break; // break if LFR is synchronized
266 break; // break if LFR is synchronized
267 }
267 }
268 else
268 else
269 {
269 {
270 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
270 status = rtems_rate_monotonic_get_status( HK_id, &period_status );
271 // sched_yield();
271 // sched_yield();
272 status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms
272 status = rtems_task_wake_after( 10 ); // wait SY_LFR_DPU_CONNECT_TIMEOUT 100 ms = 10 * 10 ms
273 }
273 }
274 }
274 }
275 status = rtems_rate_monotonic_cancel(HK_id);
275 status = rtems_rate_monotonic_cancel(HK_id);
276 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
276 DEBUG_PRINTF1("startup HK, HK_id status = %d\n", period_status.state)
277
277
278 set_hk_lfr_reset_cause( POWER_ON );
278 set_hk_lfr_reset_cause( POWER_ON );
279
279
280 while(1){ // launch the rate monotonic task
280 while(1){ // launch the rate monotonic task
281 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
281 status = rtems_rate_monotonic_period( HK_id, HK_PERIOD );
282 if ( status != RTEMS_SUCCESSFUL ) {
282 if ( status != RTEMS_SUCCESSFUL ) {
283 PRINTF1( "in HOUS *** ERR period: %d\n", status);
283 PRINTF1( "in HOUS *** ERR period: %d\n", status);
284 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
284 spare_status = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_6 );
285 }
285 }
286 else {
286 else {
287 housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8);
287 housekeeping_packet.packetSequenceControl[0] = (unsigned char) (sequenceCounterHK >> 8);
288 housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK );
288 housekeeping_packet.packetSequenceControl[1] = (unsigned char) (sequenceCounterHK );
289 increment_seq_counter( &sequenceCounterHK );
289 increment_seq_counter( &sequenceCounterHK );
290
290
291 housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
291 housekeeping_packet.time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
292 housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
292 housekeeping_packet.time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
293 housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
293 housekeeping_packet.time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
294 housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
294 housekeeping_packet.time[3] = (unsigned char) (time_management_regs->coarse_time);
295 housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
295 housekeeping_packet.time[4] = (unsigned char) (time_management_regs->fine_time>>8);
296 housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
296 housekeeping_packet.time[5] = (unsigned char) (time_management_regs->fine_time);
297
297
298 spacewire_update_statistics();
298 spacewire_read_statistics();
299
299
300 update_hk_with_grspw_stats( grspw_stats );
300 update_hk_with_grspw_stats();
301
301
302 set_hk_lfr_time_not_synchro();
302 set_hk_lfr_time_not_synchro();
303
303
304 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
304 housekeeping_packet.hk_lfr_q_sd_fifo_size_max = hk_lfr_q_sd_fifo_size_max;
305 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
305 housekeeping_packet.hk_lfr_q_rv_fifo_size_max = hk_lfr_q_rv_fifo_size_max;
306 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
306 housekeeping_packet.hk_lfr_q_p0_fifo_size_max = hk_lfr_q_p0_fifo_size_max;
307 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
307 housekeeping_packet.hk_lfr_q_p1_fifo_size_max = hk_lfr_q_p1_fifo_size_max;
308 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
308 housekeeping_packet.hk_lfr_q_p2_fifo_size_max = hk_lfr_q_p2_fifo_size_max;
309
309
310 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
310 housekeeping_packet.sy_lfr_common_parameters_spare = parameter_dump_packet.sy_lfr_common_parameters_spare;
311 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
311 housekeeping_packet.sy_lfr_common_parameters = parameter_dump_packet.sy_lfr_common_parameters;
312 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
312 get_temperatures( housekeeping_packet.hk_lfr_temp_scm );
313 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
313 get_v_e1_e2_f3( housekeeping_packet.hk_lfr_sc_v_f3 );
314 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
314 get_cpu_load( (unsigned char *) &housekeeping_packet.hk_lfr_cpu_load );
315
315
316 hk_lfr_le_me_he_update();
316 hk_lfr_le_me_he_update();
317
317
318 // SEND PACKET
318 // SEND PACKET
319 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
319 status = rtems_message_queue_send( queue_id, &housekeeping_packet,
320 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
320 PACKET_LENGTH_HK + CCSDS_TC_TM_PACKET_OFFSET + CCSDS_PROTOCOLE_EXTRA_BYTES);
321 if (status != RTEMS_SUCCESSFUL) {
321 if (status != RTEMS_SUCCESSFUL) {
322 PRINTF1("in HOUS *** ERR send: %d\n", status)
322 PRINTF1("in HOUS *** ERR send: %d\n", status)
323 }
323 }
324 }
324 }
325 }
325 }
326
326
327 PRINTF("in HOUS *** deleting task\n")
327 PRINTF("in HOUS *** deleting task\n")
328
328
329 status = rtems_task_delete( RTEMS_SELF ); // should not return
329 status = rtems_task_delete( RTEMS_SELF ); // should not return
330
330
331 return;
331 return;
332 }
332 }
333
333
334 rtems_task dumb_task( rtems_task_argument unused )
334 rtems_task dumb_task( rtems_task_argument unused )
335 {
335 {
336 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
336 /** This RTEMS taks is used to print messages without affecting the general behaviour of the software.
337 *
337 *
338 * @param unused is the starting argument of the RTEMS task
338 * @param unused is the starting argument of the RTEMS task
339 *
339 *
340 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
340 * The DUMB taks waits for RTEMS events and print messages depending on the incoming events.
341 *
341 *
342 */
342 */
343
343
344 unsigned int i;
344 unsigned int i;
345 unsigned int intEventOut;
345 unsigned int intEventOut;
346 unsigned int coarse_time = 0;
346 unsigned int coarse_time = 0;
347 unsigned int fine_time = 0;
347 unsigned int fine_time = 0;
348 rtems_event_set event_out;
348 rtems_event_set event_out;
349
349
350 char *DumbMessages[15] = {"in DUMB *** default", // RTEMS_EVENT_0
350 char *DumbMessages[15] = {"in DUMB *** default", // RTEMS_EVENT_0
351 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
351 "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1
352 "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2
352 "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2
353 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
353 "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3
354 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
354 "in DUMB *** spectral_matrices_isr *** Error sending event to SMIQ", // RTEMS_EVENT_4
355 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
355 "in DUMB *** waveforms_simulator_isr", // RTEMS_EVENT_5
356 "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6
356 "VHDL SM *** two buffers f0 ready", // RTEMS_EVENT_6
357 "ready for dump", // RTEMS_EVENT_7
357 "ready for dump", // RTEMS_EVENT_7
358 "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8
358 "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8
359 "tick", // RTEMS_EVENT_9
359 "tick", // RTEMS_EVENT_9
360 "VHDL ERR *** waveform picker", // RTEMS_EVENT_10
360 "VHDL ERR *** waveform picker", // RTEMS_EVENT_10
361 "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11
361 "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11
362 "WATCHDOG timer", // RTEMS_EVENT_12
362 "WATCHDOG timer", // RTEMS_EVENT_12
363 "TIMECODE timer", // RTEMS_EVENT_13
363 "TIMECODE timer", // RTEMS_EVENT_13
364 "TIMECODE ISR" // RTEMS_EVENT_14
364 "TIMECODE ISR" // RTEMS_EVENT_14
365 };
365 };
366
366
367 BOOT_PRINTF("in DUMB *** \n")
367 BOOT_PRINTF("in DUMB *** \n")
368
368
369 while(1){
369 while(1){
370 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
370 rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3
371 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
371 | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7
372 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13
372 | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12 | RTEMS_EVENT_13
373 | RTEMS_EVENT_14,
373 | RTEMS_EVENT_14,
374 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
374 RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT
375 intEventOut = (unsigned int) event_out;
375 intEventOut = (unsigned int) event_out;
376 for ( i=0; i<32; i++)
376 for ( i=0; i<32; i++)
377 {
377 {
378 if ( ((intEventOut >> i) & 0x0001) != 0)
378 if ( ((intEventOut >> i) & 0x0001) != 0)
379 {
379 {
380 coarse_time = time_management_regs->coarse_time;
380 coarse_time = time_management_regs->coarse_time;
381 fine_time = time_management_regs->fine_time;
381 fine_time = time_management_regs->fine_time;
382 if (i==12)
382 if (i==12)
383 {
383 {
384 PRINTF1("%s\n", DumbMessages[12])
384 PRINTF1("%s\n", DumbMessages[12])
385 }
385 }
386 if (i==13)
386 if (i==13)
387 {
387 {
388 PRINTF1("%s\n", DumbMessages[13])
388 PRINTF1("%s\n", DumbMessages[13])
389 }
389 }
390 if (i==14)
390 if (i==14)
391 {
391 {
392 PRINTF1("%s\n", DumbMessages[1])
392 PRINTF1("%s\n", DumbMessages[1])
393 }
393 }
394 }
394 }
395 }
395 }
396 }
396 }
397 }
397 }
398
398
399 //*****************************
399 //*****************************
400 // init housekeeping parameters
400 // init housekeeping parameters
401
401
402 void init_housekeeping_parameters( void )
402 void init_housekeeping_parameters( void )
403 {
403 {
404 /** This function initialize the housekeeping_packet global variable with default values.
404 /** This function initialize the housekeeping_packet global variable with default values.
405 *
405 *
406 */
406 */
407
407
408 unsigned int i = 0;
408 unsigned int i = 0;
409 unsigned char *parameters;
409 unsigned char *parameters;
410 unsigned char sizeOfHK;
410 unsigned char sizeOfHK;
411
411
412 sizeOfHK = sizeof( Packet_TM_LFR_HK_t );
412 sizeOfHK = sizeof( Packet_TM_LFR_HK_t );
413
413
414 parameters = (unsigned char*) &housekeeping_packet;
414 parameters = (unsigned char*) &housekeeping_packet;
415
415
416 for(i = 0; i< sizeOfHK; i++)
416 for(i = 0; i< sizeOfHK; i++)
417 {
417 {
418 parameters[i] = 0x00;
418 parameters[i] = 0x00;
419 }
419 }
420
420
421 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
421 housekeeping_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
422 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
422 housekeeping_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
423 housekeeping_packet.reserved = DEFAULT_RESERVED;
423 housekeeping_packet.reserved = DEFAULT_RESERVED;
424 housekeeping_packet.userApplication = CCSDS_USER_APP;
424 housekeeping_packet.userApplication = CCSDS_USER_APP;
425 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
425 housekeeping_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
426 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
426 housekeeping_packet.packetID[1] = (unsigned char) (APID_TM_HK);
427 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
427 housekeeping_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
428 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
428 housekeeping_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
429 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
429 housekeeping_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
430 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
430 housekeeping_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
431 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
431 housekeeping_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
432 housekeeping_packet.serviceType = TM_TYPE_HK;
432 housekeeping_packet.serviceType = TM_TYPE_HK;
433 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
433 housekeeping_packet.serviceSubType = TM_SUBTYPE_HK;
434 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
434 housekeeping_packet.destinationID = TM_DESTINATION_ID_GROUND;
435 housekeeping_packet.sid = SID_HK;
435 housekeeping_packet.sid = SID_HK;
436
436
437 // init status word
437 // init status word
438 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
438 housekeeping_packet.lfr_status_word[0] = DEFAULT_STATUS_WORD_BYTE0;
439 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
439 housekeeping_packet.lfr_status_word[1] = DEFAULT_STATUS_WORD_BYTE1;
440 // init software version
440 // init software version
441 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
441 housekeeping_packet.lfr_sw_version[0] = SW_VERSION_N1;
442 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
442 housekeeping_packet.lfr_sw_version[1] = SW_VERSION_N2;
443 housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3;
443 housekeeping_packet.lfr_sw_version[2] = SW_VERSION_N3;
444 housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4;
444 housekeeping_packet.lfr_sw_version[3] = SW_VERSION_N4;
445 // init fpga version
445 // init fpga version
446 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
446 parameters = (unsigned char *) (REGS_ADDR_VHDL_VERSION);
447 housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1
447 housekeeping_packet.lfr_fpga_version[0] = parameters[1]; // n1
448 housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2
448 housekeeping_packet.lfr_fpga_version[1] = parameters[2]; // n2
449 housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3
449 housekeeping_packet.lfr_fpga_version[2] = parameters[3]; // n3
450
450
451 housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND;
451 housekeeping_packet.hk_lfr_q_sd_fifo_size = MSG_QUEUE_COUNT_SEND;
452 housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV;
452 housekeeping_packet.hk_lfr_q_rv_fifo_size = MSG_QUEUE_COUNT_RECV;
453 housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0;
453 housekeeping_packet.hk_lfr_q_p0_fifo_size = MSG_QUEUE_COUNT_PRC0;
454 housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1;
454 housekeeping_packet.hk_lfr_q_p1_fifo_size = MSG_QUEUE_COUNT_PRC1;
455 housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2;
455 housekeeping_packet.hk_lfr_q_p2_fifo_size = MSG_QUEUE_COUNT_PRC2;
456 }
456 }
457
457
458 void increment_seq_counter( unsigned short *packetSequenceControl )
458 void increment_seq_counter( unsigned short *packetSequenceControl )
459 {
459 {
460 /** This function increment the sequence counter passes in argument.
460 /** This function increment the sequence counter passes in argument.
461 *
461 *
462 * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0.
462 * The increment does not affect the grouping flag. In case of an overflow, the counter is reset to 0.
463 *
463 *
464 */
464 */
465
465
466 unsigned short segmentation_grouping_flag;
466 unsigned short segmentation_grouping_flag;
467 unsigned short sequence_cnt;
467 unsigned short sequence_cnt;
468
468
469 segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << 8; // keep bits 7 downto 6
469 segmentation_grouping_flag = TM_PACKET_SEQ_CTRL_STANDALONE << 8; // keep bits 7 downto 6
470 sequence_cnt = (*packetSequenceControl) & 0x3fff; // [0011 1111 1111 1111]
470 sequence_cnt = (*packetSequenceControl) & 0x3fff; // [0011 1111 1111 1111]
471
471
472 if ( sequence_cnt < SEQ_CNT_MAX)
472 if ( sequence_cnt < SEQ_CNT_MAX)
473 {
473 {
474 sequence_cnt = sequence_cnt + 1;
474 sequence_cnt = sequence_cnt + 1;
475 }
475 }
476 else
476 else
477 {
477 {
478 sequence_cnt = 0;
478 sequence_cnt = 0;
479 }
479 }
480
480
481 *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ;
481 *packetSequenceControl = segmentation_grouping_flag | sequence_cnt ;
482 }
482 }
483
483
484 void getTime( unsigned char *time)
484 void getTime( unsigned char *time)
485 {
485 {
486 /** This function write the current local time in the time buffer passed in argument.
486 /** This function write the current local time in the time buffer passed in argument.
487 *
487 *
488 */
488 */
489
489
490 time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
490 time[0] = (unsigned char) (time_management_regs->coarse_time>>24);
491 time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
491 time[1] = (unsigned char) (time_management_regs->coarse_time>>16);
492 time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
492 time[2] = (unsigned char) (time_management_regs->coarse_time>>8);
493 time[3] = (unsigned char) (time_management_regs->coarse_time);
493 time[3] = (unsigned char) (time_management_regs->coarse_time);
494 time[4] = (unsigned char) (time_management_regs->fine_time>>8);
494 time[4] = (unsigned char) (time_management_regs->fine_time>>8);
495 time[5] = (unsigned char) (time_management_regs->fine_time);
495 time[5] = (unsigned char) (time_management_regs->fine_time);
496 }
496 }
497
497
498 unsigned long long int getTimeAsUnsignedLongLongInt( )
498 unsigned long long int getTimeAsUnsignedLongLongInt( )
499 {
499 {
500 /** This function write the current local time in the time buffer passed in argument.
500 /** This function write the current local time in the time buffer passed in argument.
501 *
501 *
502 */
502 */
503 unsigned long long int time;
503 unsigned long long int time;
504
504
505 time = ( (unsigned long long int) (time_management_regs->coarse_time & 0x7fffffff) << 16 )
505 time = ( (unsigned long long int) (time_management_regs->coarse_time & 0x7fffffff) << 16 )
506 + time_management_regs->fine_time;
506 + time_management_regs->fine_time;
507
507
508 return time;
508 return time;
509 }
509 }
510
510
511 void send_dumb_hk( void )
511 void send_dumb_hk( void )
512 {
512 {
513 Packet_TM_LFR_HK_t dummy_hk_packet;
513 Packet_TM_LFR_HK_t dummy_hk_packet;
514 unsigned char *parameters;
514 unsigned char *parameters;
515 unsigned int i;
515 unsigned int i;
516 rtems_id queue_id;
516 rtems_id queue_id;
517
517
518 dummy_hk_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
518 dummy_hk_packet.targetLogicalAddress = CCSDS_DESTINATION_ID;
519 dummy_hk_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
519 dummy_hk_packet.protocolIdentifier = CCSDS_PROTOCOLE_ID;
520 dummy_hk_packet.reserved = DEFAULT_RESERVED;
520 dummy_hk_packet.reserved = DEFAULT_RESERVED;
521 dummy_hk_packet.userApplication = CCSDS_USER_APP;
521 dummy_hk_packet.userApplication = CCSDS_USER_APP;
522 dummy_hk_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
522 dummy_hk_packet.packetID[0] = (unsigned char) (APID_TM_HK >> 8);
523 dummy_hk_packet.packetID[1] = (unsigned char) (APID_TM_HK);
523 dummy_hk_packet.packetID[1] = (unsigned char) (APID_TM_HK);
524 dummy_hk_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
524 dummy_hk_packet.packetSequenceControl[0] = TM_PACKET_SEQ_CTRL_STANDALONE;
525 dummy_hk_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
525 dummy_hk_packet.packetSequenceControl[1] = TM_PACKET_SEQ_CNT_DEFAULT;
526 dummy_hk_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
526 dummy_hk_packet.packetLength[0] = (unsigned char) (PACKET_LENGTH_HK >> 8);
527 dummy_hk_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
527 dummy_hk_packet.packetLength[1] = (unsigned char) (PACKET_LENGTH_HK );
528 dummy_hk_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
528 dummy_hk_packet.spare1_pusVersion_spare2 = DEFAULT_SPARE1_PUSVERSION_SPARE2;
529 dummy_hk_packet.serviceType = TM_TYPE_HK;