@@ -1,2 +1,2 | |||||
1 | 3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters |
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1 | 3081d1f9bb20b2b64a192585337a292a9804e0c5 LFR_basic-parameters | |
2 | e1bf35e31e3c8c1d1448d2e485c71f5f1259615c header/lfr_common_headers |
|
2 | 721463c11a484e6a3439e16c99f8bd27720b9265 header/lfr_common_headers |
@@ -19,16 +19,24 enum lfr_reset_cause_t{ | |||||
19 | UNEXP_RESET |
|
19 | UNEXP_RESET | |
20 | }; |
|
20 | }; | |
21 |
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21 | |||
|
22 | extern gptimer_regs_t *gptimer_regs; | |||
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23 | ||||
22 | #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0 |
|
24 | #define LFR_RESET_CAUSE_UNKNOWN_CAUSE 0 | |
23 |
|
25 | |||
24 |
rtems_name name_hk_rate_monotonic; |
|
26 | rtems_name name_hk_rate_monotonic; // name of the HK rate monotonic | |
25 | rtems_id HK_id; // id of the HK rate monotonic period |
|
27 | rtems_id HK_id; // id of the HK rate monotonic period | |
26 |
|
28 | |||
27 |
void configure |
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29 | void timer_configure( unsigned char timer, unsigned int clock_divider, | |
28 | unsigned char interrupt_level, rtems_isr (*timer_isr)() ); |
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30 | unsigned char interrupt_level, rtems_isr (*timer_isr)() ); | |
29 |
void timer_start( |
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31 | void timer_start( unsigned char timer ); | |
30 |
void timer_stop( |
|
32 | void timer_stop( unsigned char timer ); | |
31 |
void timer_set_clock_divider( |
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33 | void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider); | |
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34 | ||||
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35 | // WATCHDOG | |||
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36 | rtems_isr watchdog_isr( rtems_vector_number vector ); | |||
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37 | void watchdog_configure(void); | |||
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38 | void watchdog_stop(void); | |||
|
39 | void watchdog_start(void); | |||
32 |
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40 | |||
33 | // SERIAL LINK |
|
41 | // SERIAL LINK | |
34 | int send_console_outputs_on_apbuart_port( void ); |
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42 | int send_console_outputs_on_apbuart_port( void ); | |
@@ -36,7 +44,7 int enable_apbuart_transmitter( void ); | |||||
36 | void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value); |
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44 | void set_apbuart_scaler_reload_register(unsigned int regs, unsigned int value); | |
37 |
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45 | |||
38 | // RTEMS TASKS |
|
46 | // RTEMS TASKS | |
39 |
rtems_task |
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47 | rtems_task load_task( rtems_task_argument argument ); | |
40 | rtems_task hous_task( rtems_task_argument argument ); |
|
48 | rtems_task hous_task( rtems_task_argument argument ); | |
41 | rtems_task dumb_task( rtems_task_argument unused ); |
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49 | rtems_task dumb_task( rtems_task_argument unused ); | |
42 |
|
50 |
@@ -97,11 +97,9 extern volatile spectral_matrix_regs_t * | |||||
97 | extern rtems_name misc_name[5]; |
|
97 | extern rtems_name misc_name[5]; | |
98 | extern rtems_id Task_id[20]; /* array of task ids */ |
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98 | extern rtems_id Task_id[20]; /* array of task ids */ | |
99 |
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99 | |||
100 | // |
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|||
101 | ring_node * getRingNodeForAveraging( unsigned char frequencyChannel); |
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100 | ring_node * getRingNodeForAveraging( unsigned char frequencyChannel); | |
102 | // ISR |
|
101 | // ISR | |
103 | rtems_isr spectral_matrices_isr( rtems_vector_number vector ); |
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102 | rtems_isr spectral_matrices_isr( rtems_vector_number vector ); | |
104 | rtems_isr spectral_matrices_isr_simu( rtems_vector_number vector ); |
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|||
105 |
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103 | |||
106 | //****************** |
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104 | //****************** | |
107 | // Spectral Matrices |
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105 | // Spectral Matrices |
@@ -141,7 +141,7 rtems_task Init( rtems_task_argument ign | |||||
141 | pa_bia_status_info = 0x00; |
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141 | pa_bia_status_info = 0x00; | |
142 |
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142 | |||
143 | // waveform picker initialization |
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143 | // waveform picker initialization | |
144 | WFP_init_rings(); // initialize the waveform rings |
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144 | WFP_init_rings(); LEON_Clear_interrupt( IRQ_SPARC_GPTIMER_WATCHDOG ); // initialize the waveform rings | |
145 | WFP_reset_current_ring_nodes(); |
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145 | WFP_reset_current_ring_nodes(); | |
146 | reset_waveform_picker_regs(); |
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146 | reset_waveform_picker_regs(); | |
147 |
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147 | |||
@@ -221,14 +221,6 rtems_task Init( rtems_task_argument ign | |||||
221 | PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status) |
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221 | PRINTF1("in INIT *** in suspend_science_tasks *** ERR code: %d\n", status) | |
222 | } |
|
222 | } | |
223 |
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223 | |||
224 | //****************************** |
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|||
225 | // <SPECTRAL MATRICES SIMULATOR> |
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|||
226 | LEON_Mask_interrupt( IRQ_SM_SIMULATOR ); |
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227 | configure_timer((gptimer_regs_t*) REGS_ADDR_GPTIMER, TIMER_SM_SIMULATOR, CLKDIV_SM_SIMULATOR, |
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228 | IRQ_SPARC_SM_SIMULATOR, spectral_matrices_isr_simu ); |
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229 | // </SPECTRAL MATRICES SIMULATOR> |
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|||
230 | //******************************* |
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|||
231 |
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||||
232 | // configure IRQ handling for the waveform picker unit |
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224 | // configure IRQ handling for the waveform picker unit | |
233 | status = rtems_interrupt_catch( waveforms_isr, |
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225 | status = rtems_interrupt_catch( waveforms_isr, | |
234 | IRQ_SPARC_WAVEFORM_PICKER, |
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226 | IRQ_SPARC_WAVEFORM_PICKER, | |
@@ -299,7 +291,7 void create_names( void ) // create all | |||||
299 | Task_name[TASKID_RECV] = rtems_build_name( 'R', 'E', 'C', 'V' ); |
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291 | Task_name[TASKID_RECV] = rtems_build_name( 'R', 'E', 'C', 'V' ); | |
300 | Task_name[TASKID_ACTN] = rtems_build_name( 'A', 'C', 'T', 'N' ); |
|
292 | Task_name[TASKID_ACTN] = rtems_build_name( 'A', 'C', 'T', 'N' ); | |
301 | Task_name[TASKID_SPIQ] = rtems_build_name( 'S', 'P', 'I', 'Q' ); |
|
293 | Task_name[TASKID_SPIQ] = rtems_build_name( 'S', 'P', 'I', 'Q' ); | |
302 |
Task_name[TASKID_ |
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294 | Task_name[TASKID_LOAD] = rtems_build_name( 'L', 'O', 'A', 'D' ); | |
303 | Task_name[TASKID_AVF0] = rtems_build_name( 'A', 'V', 'F', '0' ); |
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295 | Task_name[TASKID_AVF0] = rtems_build_name( 'A', 'V', 'F', '0' ); | |
304 | Task_name[TASKID_SWBD] = rtems_build_name( 'S', 'W', 'B', 'D' ); |
|
296 | Task_name[TASKID_SWBD] = rtems_build_name( 'S', 'W', 'B', 'D' ); | |
305 | Task_name[TASKID_WFRM] = rtems_build_name( 'W', 'F', 'R', 'M' ); |
|
297 | Task_name[TASKID_WFRM] = rtems_build_name( 'W', 'F', 'R', 'M' ); | |
@@ -481,12 +473,12 int create_all_tasks( void ) // create a | |||||
481 |
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473 | |||
482 | //***** |
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474 | //***** | |
483 | // MISC |
|
475 | // MISC | |
484 |
if (status == RTEMS_SUCCESSFUL) // |
|
476 | if (status == RTEMS_SUCCESSFUL) // LOAD | |
485 | { |
|
477 | { | |
486 | status = rtems_task_create( |
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478 | status = rtems_task_create( | |
487 |
Task_name[TASKID_ |
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479 | Task_name[TASKID_LOAD], TASK_PRIORITY_LOAD, RTEMS_MINIMUM_STACK_SIZE, | |
488 | RTEMS_DEFAULT_MODES, |
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480 | RTEMS_DEFAULT_MODES, | |
489 |
RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_ |
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481 | RTEMS_DEFAULT_ATTRIBUTES, &Task_id[TASKID_LOAD] | |
490 | ); |
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482 | ); | |
491 | } |
|
483 | } | |
492 | if (status == RTEMS_SUCCESSFUL) // DUMB |
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484 | if (status == RTEMS_SUCCESSFUL) // DUMB | |
@@ -667,11 +659,11 int start_all_tasks( void ) // start all | |||||
667 | BOOT_PRINTF("in INIT *** Error starting TASK_DUMB\n") |
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659 | BOOT_PRINTF("in INIT *** Error starting TASK_DUMB\n") | |
668 | } |
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660 | } | |
669 | } |
|
661 | } | |
670 |
if (status == RTEMS_SUCCESSFUL) // |
|
662 | if (status == RTEMS_SUCCESSFUL) // LOAD | |
671 | { |
|
663 | { | |
672 |
status = rtems_task_start( Task_id[TASKID_ |
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664 | status = rtems_task_start( Task_id[TASKID_LOAD], load_task, 1 ); | |
673 | if (status!=RTEMS_SUCCESSFUL) { |
|
665 | if (status!=RTEMS_SUCCESSFUL) { | |
674 |
BOOT_PRINTF("in INIT *** Error starting TASK_ |
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666 | BOOT_PRINTF("in INIT *** Error starting TASK_LOAD\n") | |
675 | } |
|
667 | } | |
676 | } |
|
668 | } | |
677 |
|
669 |
@@ -7,7 +7,7 | |||||
7 |
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7 | |||
8 | #include "fsw_misc.h" |
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8 | #include "fsw_misc.h" | |
9 |
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9 | |||
10 |
void configure |
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10 | void timer_configure(unsigned char timer, unsigned int clock_divider, | |
11 | unsigned char interrupt_level, rtems_isr (*timer_isr)() ) |
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11 | unsigned char interrupt_level, rtems_isr (*timer_isr)() ) | |
12 | { |
|
12 | { | |
13 | /** This function configures a GPTIMER timer instantiated in the VHDL design. |
|
13 | /** This function configures a GPTIMER timer instantiated in the VHDL design. | |
@@ -33,10 +33,10 void configure_timer(gptimer_regs_t *gpt | |||||
33 | PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n") |
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33 | PRINTF("in configure_timer *** ERR rtems_interrupt_catch\n") | |
34 | } |
|
34 | } | |
35 |
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35 | |||
36 |
timer_set_clock_divider( |
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36 | timer_set_clock_divider( timer, clock_divider); | |
37 | } |
|
37 | } | |
38 |
|
38 | |||
39 |
void timer_start( |
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39 | void timer_start(unsigned char timer) | |
40 | { |
|
40 | { | |
41 | /** This function starts a GPTIMER timer. |
|
41 | /** This function starts a GPTIMER timer. | |
42 | * |
|
42 | * | |
@@ -52,7 +52,7 void timer_start(gptimer_regs_t *gptimer | |||||
52 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable |
|
52 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000008; // IE interrupt enable | |
53 | } |
|
53 | } | |
54 |
|
54 | |||
55 |
void timer_stop( |
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55 | void timer_stop(unsigned char timer) | |
56 | { |
|
56 | { | |
57 | /** This function stops a GPTIMER timer. |
|
57 | /** This function stops a GPTIMER timer. | |
58 | * |
|
58 | * | |
@@ -66,7 +66,7 void timer_stop(gptimer_regs_t *gptimer_ | |||||
66 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any |
|
66 | gptimer_regs->timer[timer].ctrl = gptimer_regs->timer[timer].ctrl | 0x00000010; // clear pending IRQ if any | |
67 | } |
|
67 | } | |
68 |
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68 | |||
69 |
void timer_set_clock_divider( |
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69 | void timer_set_clock_divider(unsigned char timer, unsigned int clock_divider) | |
70 | { |
|
70 | { | |
71 | /** This function sets the clock divider of a GPTIMER timer. |
|
71 | /** This function sets the clock divider of a GPTIMER timer. | |
72 | * |
|
72 | * | |
@@ -79,6 +79,70 void timer_set_clock_divider(gptimer_reg | |||||
79 | gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz |
|
79 | gptimer_regs->timer[timer].reload = clock_divider; // base clock frequency is 1 MHz | |
80 | } |
|
80 | } | |
81 |
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81 | |||
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82 | // WATCHDOG | |||
|
83 | ||||
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84 | rtems_isr watchdog_isr( rtems_vector_number vector ) | |||
|
85 | { | |||
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86 | rtems_status_code status_code; | |||
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87 | ||||
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88 | status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_12 ); | |||
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89 | } | |||
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90 | ||||
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91 | void watchdog_configure(void) | |||
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92 | { | |||
|
93 | /** This function configure the watchdog. | |||
|
94 | * | |||
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95 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. | |||
|
96 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). | |||
|
97 | * | |||
|
98 | * The watchdog is a timer provided by the GPTIMER IP core of the GRLIB. | |||
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99 | * | |||
|
100 | */ | |||
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101 | ||||
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102 | LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt during configuration | |||
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103 | ||||
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104 | timer_configure( TIMER_WATCHDOG, CLKDIV_WATCHDOG, IRQ_SPARC_GPTIMER_WATCHDOG, watchdog_isr ); | |||
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105 | ||||
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106 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt | |||
|
107 | } | |||
|
108 | ||||
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109 | void watchdog_stop(void) | |||
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110 | { | |||
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111 | LEON_Mask_interrupt( IRQ_GPTIMER_WATCHDOG ); // mask gptimer/watchdog interrupt line | |||
|
112 | timer_stop( TIMER_WATCHDOG ); | |||
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113 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); // clear gptimer/watchdog interrupt | |||
|
114 | } | |||
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115 | ||||
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116 | void watchdog_reload(void) | |||
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117 | { | |||
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118 | /** This function reloads the watchdog timer counter with the timer reload value. | |||
|
119 | * | |||
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120 | * | |||
|
121 | */ | |||
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122 | ||||
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123 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register | |||
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124 | } | |||
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125 | ||||
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126 | void watchdog_start(void) | |||
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127 | { | |||
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128 | /** This function starts the watchdog timer. | |||
|
129 | * | |||
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130 | * @param gptimer_regs points to the APB registers of the GPTIMER IP core. | |||
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131 | * @param timer is the number of the timer in the IP core (several timers can be instantiated). | |||
|
132 | * | |||
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133 | */ | |||
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134 | ||||
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135 | LEON_Clear_interrupt( IRQ_GPTIMER_WATCHDOG ); | |||
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136 | ||||
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137 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000010; // clear pending IRQ if any | |||
|
138 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000004; // LD load value from the reload register | |||
|
139 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000001; // EN enable the timer | |||
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140 | gptimer_regs->timer[TIMER_WATCHDOG].ctrl = gptimer_regs->timer[TIMER_WATCHDOG].ctrl | 0x00000008; // IE interrupt enable | |||
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141 | ||||
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142 | LEON_Unmask_interrupt( IRQ_GPTIMER_WATCHDOG ); | |||
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143 | ||||
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144 | } | |||
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145 | ||||
82 | int send_console_outputs_on_apbuart_port( void ) // Send the console outputs on the apbuart port |
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146 | int send_console_outputs_on_apbuart_port( void ) // Send the console outputs on the apbuart port | |
83 | { |
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147 | { | |
84 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART; |
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148 | struct apbuart_regs_str *apbuart_regs = (struct apbuart_regs_str *) REGS_ADDR_APBUART; | |
@@ -117,25 +181,44 void set_apbuart_scaler_reload_register( | |||||
117 | //************ |
|
181 | //************ | |
118 | // RTEMS TASKS |
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182 | // RTEMS TASKS | |
119 |
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183 | |||
120 |
rtems_task |
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184 | rtems_task load_task(rtems_task_argument argument) | |
121 | { |
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185 | { | |
122 | int i; |
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186 | BOOT_PRINTF("in LOAD *** \n") | |
123 | int j; |
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187 | ||
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188 | rtems_status_code status; | |||
|
189 | unsigned int i; | |||
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190 | unsigned int j; | |||
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191 | rtems_name name_watchdog_rate_monotonic; // name of the watchdog rate monotonic | |||
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192 | rtems_id watchdog_period_id; // id of the watchdog rate monotonic period | |||
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193 | ||||
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194 | name_watchdog_rate_monotonic = rtems_build_name( 'L', 'O', 'A', 'D' ); | |||
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195 | ||||
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196 | status = rtems_rate_monotonic_create( name_watchdog_rate_monotonic, &watchdog_period_id ); | |||
|
197 | if( status != RTEMS_SUCCESSFUL ) { | |||
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198 | PRINTF1( "in LOAD *** rtems_rate_monotonic_create failed with status of %d\n", status ) | |||
|
199 | } | |||
|
200 | ||||
124 | i = 0; |
|
201 | i = 0; | |
125 | j = 0; |
|
202 | j = 0; | |
126 | BOOT_PRINTF("in STAT *** \n") |
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203 | ||
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204 | watchdog_configure(); | |||
|
205 | ||||
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206 | watchdog_start(); | |||
|
207 | ||||
127 | while(1){ |
|
208 | while(1){ | |
128 | rtems_task_wake_after(1000); |
|
209 | status = rtems_rate_monotonic_period( watchdog_period_id, WATCHDOG_PERIOD ); | |
129 | PRINTF1("%d\n", j) |
|
210 | watchdog_reload(); | |
130 | if (i == CPU_USAGE_REPORT_PERIOD) { |
|
211 | i = i + 1; | |
131 | // #ifdef PRINT_TASK_STATISTICS |
|
212 | if ( i == 10 ) | |
132 | // rtems_cpu_usage_report(); |
|
213 | { | |
133 | // rtems_cpu_usage_reset(); |
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|||
134 | // #endif |
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|||
135 | i = 0; |
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214 | i = 0; | |
|
215 | j = j + 1; | |||
|
216 | PRINTF1("%d\n", j) | |||
136 | } |
|
217 | } | |
137 | else i++; |
|
218 | if (j == 3 ) | |
138 |
|
|
219 | { | |
|
220 | status = rtems_task_delete(RTEMS_SELF); | |||
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221 | } | |||
139 | } |
|
222 | } | |
140 | } |
|
223 | } | |
141 |
|
224 | |||
@@ -255,7 +338,7 rtems_task dumb_task( rtems_task_argumen | |||||
255 | unsigned int fine_time = 0; |
|
338 | unsigned int fine_time = 0; | |
256 | rtems_event_set event_out; |
|
339 | rtems_event_set event_out; | |
257 |
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340 | |||
258 |
char *DumbMessages[1 |
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341 | char *DumbMessages[13] = {"in DUMB *** default", // RTEMS_EVENT_0 | |
259 | "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1 |
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342 | "in DUMB *** timecode_irq_handler", // RTEMS_EVENT_1 | |
260 | "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2 |
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343 | "in DUMB *** f3 buffer changed", // RTEMS_EVENT_2 | |
261 | "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3 |
|
344 | "in DUMB *** in SMIQ *** Error sending event to AVF0", // RTEMS_EVENT_3 | |
@@ -266,7 +349,8 rtems_task dumb_task( rtems_task_argumen | |||||
266 | "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8 |
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349 | "VHDL ERR *** spectral matrix", // RTEMS_EVENT_8 | |
267 | "tick", // RTEMS_EVENT_9 |
|
350 | "tick", // RTEMS_EVENT_9 | |
268 | "VHDL ERR *** waveform picker", // RTEMS_EVENT_10 |
|
351 | "VHDL ERR *** waveform picker", // RTEMS_EVENT_10 | |
269 |
"VHDL ERR *** unexpected ready matrix values" |
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352 | "VHDL ERR *** unexpected ready matrix values", // RTEMS_EVENT_11 | |
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353 | "WATCHDOG timer" // RTEMS_EVENT_12 | |||
270 | }; |
|
354 | }; | |
271 |
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355 | |||
272 | BOOT_PRINTF("in DUMB *** \n") |
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356 | BOOT_PRINTF("in DUMB *** \n") | |
@@ -274,7 +358,7 rtems_task dumb_task( rtems_task_argumen | |||||
274 | while(1){ |
|
358 | while(1){ | |
275 | rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3 |
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359 | rtems_event_receive(RTEMS_EVENT_0 | RTEMS_EVENT_1 | RTEMS_EVENT_2 | RTEMS_EVENT_3 | |
276 | | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7 |
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360 | | RTEMS_EVENT_4 | RTEMS_EVENT_5 | RTEMS_EVENT_6 | RTEMS_EVENT_7 | |
277 | | RTEMS_EVENT_8 | RTEMS_EVENT_9, |
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361 | | RTEMS_EVENT_8 | RTEMS_EVENT_9 | RTEMS_EVENT_12, | |
278 | RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT |
|
362 | RTEMS_WAIT | RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &event_out); // wait for an RTEMS_EVENT | |
279 | intEventOut = (unsigned int) event_out; |
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363 | intEventOut = (unsigned int) event_out; | |
280 | for ( i=0; i<32; i++) |
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364 | for ( i=0; i<32; i++) | |
@@ -283,11 +367,9 rtems_task dumb_task( rtems_task_argumen | |||||
283 | { |
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367 | { | |
284 | coarse_time = time_management_regs->coarse_time; |
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368 | coarse_time = time_management_regs->coarse_time; | |
285 | fine_time = time_management_regs->fine_time; |
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369 | fine_time = time_management_regs->fine_time; | |
286 |
if (i== |
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370 | if (i==12) | |
287 | { |
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371 | { | |
288 | } |
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372 | PRINTF1("%s\n", DumbMessages[12]) | |
289 | if (i==10) |
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290 | { |
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291 | } |
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373 | } | |
292 | } |
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374 | } | |
293 | } |
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375 | } |
@@ -246,55 +246,6 rtems_isr spectral_matrices_isr( rtems_v | |||||
246 | spectral_matrix_isr_error_handler( statusReg ); |
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246 | spectral_matrix_isr_error_handler( statusReg ); | |
247 | } |
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247 | } | |
248 |
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248 | |||
249 | rtems_isr spectral_matrices_isr_simu( rtems_vector_number vector ) |
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250 | { |
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251 | rtems_status_code status_code; |
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252 |
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253 | //*** |
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254 | // F0 |
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255 | nb_sm_f0 = nb_sm_f0 + 1; |
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256 | if (nb_sm_f0 == NB_SM_BEFORE_AVF0 ) |
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257 | { |
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258 | ring_node_for_averaging_sm_f0 = current_ring_node_sm_f0; |
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259 | if (rtems_event_send( Task_id[TASKID_AVF0], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL) |
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260 | { |
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261 | status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 ); |
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262 | } |
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263 | nb_sm_f0 = 0; |
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264 | } |
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265 |
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266 | //*** |
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267 | // F1 |
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268 | nb_sm_f0_aux_f1 = nb_sm_f0_aux_f1 + 1; |
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269 | if (nb_sm_f0_aux_f1 == 6) |
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270 | { |
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271 | nb_sm_f0_aux_f1 = 0; |
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272 | nb_sm_f1 = nb_sm_f1 + 1; |
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273 | } |
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274 | if (nb_sm_f1 == NB_SM_BEFORE_AVF1 ) |
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275 | { |
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276 | ring_node_for_averaging_sm_f1 = current_ring_node_sm_f1; |
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277 | if (rtems_event_send( Task_id[TASKID_AVF1], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL) |
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278 | { |
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279 | status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 ); |
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280 | } |
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281 | nb_sm_f1 = 0; |
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282 | } |
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283 |
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284 | //*** |
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285 | // F2 |
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286 | nb_sm_f0_aux_f2 = nb_sm_f0_aux_f2 + 1; |
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287 | if (nb_sm_f0_aux_f2 == 96) |
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288 | { |
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289 | nb_sm_f0_aux_f2 = 0; |
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290 | ring_node_for_averaging_sm_f2 = current_ring_node_sm_f2; |
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291 | if (rtems_event_send( Task_id[TASKID_AVF2], RTEMS_EVENT_0 ) != RTEMS_SUCCESSFUL) |
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292 | { |
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293 | status_code = rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_3 ); |
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294 | } |
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295 | } |
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296 | } |
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297 |
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298 | //****************** |
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249 | //****************** | |
299 | // Spectral Matrices |
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250 | // Spectral Matrices | |
300 |
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251 |
@@ -566,12 +566,6 int stop_current_mode( void ) | |||||
566 | LEON_Clear_interrupt( IRQ_WAVEFORM_PICKER ); // clear waveform picker interrupt |
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566 | LEON_Clear_interrupt( IRQ_WAVEFORM_PICKER ); // clear waveform picker interrupt | |
567 | LEON_Clear_interrupt( IRQ_SPECTRAL_MATRIX ); // clear spectral matrix interrupt |
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567 | LEON_Clear_interrupt( IRQ_SPECTRAL_MATRIX ); // clear spectral matrix interrupt | |
568 |
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568 | |||
569 | // <Spectral Matrices simulator> |
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570 | LEON_Mask_interrupt( IRQ_SM_SIMULATOR ); // mask spectral matrix interrupt simulator |
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571 | timer_stop( (gptimer_regs_t*) REGS_ADDR_GPTIMER, TIMER_SM_SIMULATOR ); |
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572 | LEON_Clear_interrupt( IRQ_SM_SIMULATOR ); // clear spectral matrix interrupt simulator |
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573 | // </Spectral Matrices simulator> |
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574 |
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575 | // suspend several tasks |
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569 | // suspend several tasks | |
576 | if (lfrCurrentMode != LFR_MODE_STANDBY) { |
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570 | if (lfrCurrentMode != LFR_MODE_STANDBY) { | |
577 | status = suspend_science_tasks(); |
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571 | status = suspend_science_tasks(); |
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