@@ -1,6 +1,6 | |||
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1 | 1 | ############################################################################# |
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2 | 2 | # Makefile for building: bin/fsw |
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3 |
# Generated by qmake (2.01a) (Qt 4.8.5) on: |
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3 | # Generated by qmake (2.01a) (Qt 4.8.5) on: Thu Dec 12 07:45:06 2013 | |
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4 | 4 | # Project: fsw-qt.pro |
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5 | 5 | # Template: app |
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6 | 6 | # Command: /usr/bin/qmake-qt4 -spec /usr/lib64/qt4/mkspecs/linux-g++ -o Makefile fsw-qt.pro |
@@ -1,6 +1,6 | |||
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1 | 1 | <?xml version="1.0" encoding="UTF-8"?> |
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2 | 2 | <!DOCTYPE QtCreatorProject> |
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3 |
<!-- Written by QtCreator 2.8.1, 2013-1 |
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3 | <!-- Written by QtCreator 2.8.1, 2013-12-12T15:59:05. --> | |
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4 | 4 | <qtcreator> |
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5 | 5 | <data> |
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6 | 6 | <variable>ProjectExplorer.Project.ActiveTarget</variable> |
@@ -72,7 +72,6 void set_wfp_burst_enable_register( unsi | |||
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72 | 72 | void reset_wfp_run_burst_enable(); |
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73 | 73 | void reset_wfp_status(); |
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74 | 74 | void reset_new_waveform_picker_regs(); |
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75 | unsigned int address_alignment( volatile int *address); | |
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76 | 75 | |
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77 | 76 | //***************** |
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78 | 77 | // local parameters |
@@ -41,19 +41,19 gptimer_regs_t *gptimer_regs | |||
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41 | 41 | spectral_matrix_regs_t *spectral_matrix_regs = (spectral_matrix_regs_t*) REGS_ADDR_SPECTRAL_MATRIX; |
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42 | 42 | |
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43 | 43 | // WAVEFORMS GLOBAL VARIABLES // 2048 * 3 * 4 + 2 * 4 = 24576 + 8 bytes |
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44 |
volatile int wf_snap_f0[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET |
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44 | volatile int wf_snap_f0[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ] __attribute__((aligned(0x100))); | |
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45 | 45 | // |
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46 |
volatile int wf_snap_f1[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET |
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47 |
volatile int wf_snap_f1_bis[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET |
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48 |
volatile int wf_snap_f1_norm[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET |
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46 | volatile int wf_snap_f1[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ] __attribute__((aligned(0x100))); | |
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47 | volatile int wf_snap_f1_bis[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ] __attribute__((aligned(0x100))); | |
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48 | volatile int wf_snap_f1_norm[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ] __attribute__((aligned(0x100))); | |
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49 | 49 | // |
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50 |
volatile int wf_snap_f2[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET |
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51 |
volatile int wf_snap_f2_bis[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET |
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52 |
volatile int wf_snap_f2_norm[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET |
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50 | volatile int wf_snap_f2[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ] __attribute__((aligned(0x100))); | |
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51 | volatile int wf_snap_f2_bis[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ] __attribute__((aligned(0x100))); | |
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52 | volatile int wf_snap_f2_norm[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ] __attribute__((aligned(0x100))); | |
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53 | 53 | // |
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54 |
volatile int wf_cont_f3[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET |
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55 |
volatile int wf_cont_f3_bis[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET |
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56 |
char wf_cont_f3_light[ NB_SAMPLES_PER_SNAPSHOT * NB_BYTES_CWF3_LIGHT_BLK |
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54 | volatile int wf_cont_f3[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ] __attribute__((aligned(0x100))); | |
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55 | volatile int wf_cont_f3_bis[ NB_SAMPLES_PER_SNAPSHOT * NB_WORDS_SWF_BLK + TIME_OFFSET ] __attribute__((aligned(0x100))); | |
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56 | char wf_cont_f3_light[ NB_SAMPLES_PER_SNAPSHOT * NB_BYTES_CWF3_LIGHT_BLK ] __attribute__((aligned(0x100))); | |
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57 | 57 | |
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58 | 58 | // SPECTRAL MATRICES GLOBAL VARIABLES |
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59 | 59 | volatile int spec_mat_f0_0[ SM_HEADER + TOTAL_SIZE_SM ]; |
@@ -515,6 +515,7 int enter_burst_mode() | |||
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515 | 515 | int enter_sbm1_mode() |
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516 | 516 | { |
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517 | 517 | rtems_status_code status; |
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518 | int startDate; | |
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518 | 519 | |
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519 | 520 | status = restart_science_tasks(); |
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520 | 521 | |
@@ -525,14 +526,17 int enter_sbm1_mode() | |||
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525 | 526 | #ifdef GSA |
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526 | 527 | LEON_Unmask_interrupt( IRQ_SM ); |
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527 | 528 | #else |
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529 | //**************** | |
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530 | // waveform picker | |
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528 | 531 | reset_new_waveform_picker_regs(); |
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529 | set_wfp_burst_enable_register(LFR_MODE_SBM1); | |
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532 | set_wfp_burst_enable_register( LFR_MODE_SBM1 ); | |
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530 | 533 | LEON_Clear_interrupt( IRQ_WAVEFORM_PICKER ); |
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531 | 534 | LEON_Unmask_interrupt( IRQ_WAVEFORM_PICKER ); |
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532 | // SM simulation | |
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533 | // timer_start( (gptimer_regs_t*) REGS_ADDR_GPTIMER, TIMER_SM_SIMULATOR ); | |
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534 | // LEON_Clear_interrupt( IRQ_SM ); // the IRQ_SM seems to be incompatible with the IRQ_WF on the xilinx board | |
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535 | // LEON_Unmask_interrupt( IRQ_SM ); | |
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535 | startDate = time_management_regs->coarse_time + 2; | |
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536 | new_waveform_picker_regs->run_burst_enable = new_waveform_picker_regs->run_burst_enable | 0x80; // [1000 0000] | |
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537 | new_waveform_picker_regs->start_date = startDate; | |
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538 | //**************** | |
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539 | // spectral matrix | |
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536 | 540 | #endif |
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537 | 541 | |
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538 | 542 | return status; |
@@ -75,28 +75,12 rtems_isr waveforms_isr( rtems_vector_nu | |||
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75 | 75 | #else |
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76 | 76 | statusReg = new_waveform_picker_regs->status; |
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77 | 77 | fullRecord = fullRecord | ( statusReg & 0x7 ); |
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78 |
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79 | // if ( (new_waveform_picker_regs->status & 0x1) == 0x1 ) // f0 is full | |
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80 | if ( (new_waveform_picker_regs->status & 0x4) == 0x4 ) // f2 is full | |
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78 | if ( (new_waveform_picker_regs->status & 0x7) == 0x7 ) // f2 f1 and f0 are full | |
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81 | 79 | { |
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82 | 80 | if (rtems_event_send( Task_id[TASKID_WFRM], RTEMS_EVENT_MODE_NORMAL ) != RTEMS_SUCCESSFUL) { |
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83 | 81 | rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_2 ); |
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84 | 82 | } |
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85 | 83 | new_waveform_picker_regs->status = new_waveform_picker_regs->status & 0xfffff888; |
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86 | new_waveform_picker_regs->status = new_waveform_picker_regs->status & 0xfffff888; | |
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87 | new_waveform_picker_regs->status = new_waveform_picker_regs->status & 0xfffff888; | |
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88 | new_waveform_picker_regs->status = new_waveform_picker_regs->status & 0xfffff888; | |
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89 | new_waveform_picker_regs->status = new_waveform_picker_regs->status & 0xfffff888; | |
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90 | // if ( (new_waveform_picker_regs->status & 0x1) == 0x1 ) | |
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91 | if ( (new_waveform_picker_regs->status & 0x4) == 0x4 ) // f2 is full | |
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92 | { | |
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93 | rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_8 ); | |
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94 | } | |
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95 | // if ( (new_waveform_picker_regs->status & 0x1) == 0x0 ) | |
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96 | if ( (new_waveform_picker_regs->status & 0x4) == 0x0 ) | |
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97 | { | |
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98 | rtems_event_send( Task_id[TASKID_DUMB], RTEMS_EVENT_7 ); | |
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99 | } | |
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100 | 84 | } |
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101 | 85 | #endif |
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102 | 86 | break; |
@@ -274,8 +258,8 rtems_task wfrm_task(rtems_task_argument | |||
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274 | 258 | |
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275 | 259 | if (event_out == RTEMS_EVENT_MODE_NORMAL) |
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276 | 260 | { |
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277 |
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278 |
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261 | send_waveform_SWF(wf_snap_f0, SID_NORM_SWF_F0, headerSWF_F0, queue_id); | |
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262 | send_waveform_SWF(wf_snap_f1, SID_NORM_SWF_F1, headerSWF_F1, queue_id); | |
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279 | 263 | send_waveform_SWF(wf_snap_f2, SID_NORM_SWF_F2, headerSWF_F2, queue_id); |
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280 | 264 | #ifdef GSA |
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281 | 265 | new_waveform_picker_regs->status = new_waveform_picker_regs->status & 0xf888; // [1111 1000 1000 1000] f2, f1, f0 bits =0 |
@@ -1038,11 +1022,8 void set_wfp_burst_enable_register( unsi | |||
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1038 | 1022 | // the burst bits shall be set first, before the enable bits |
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1039 | 1023 | switch(mode) { |
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1040 | 1024 | case(LFR_MODE_NORMAL): |
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1041 |
new_waveform_picker_regs->run_burst_enable = 0x |
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1042 |
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1043 | // new_waveform_picker_regs->run_burst_enable = 0x07; // [0000 0111] enable f2 f1 f0 | |
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1044 | // new_waveform_picker_regs->run_burst_enable = 0x01; // [0000 0001] enable f0 | |
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1045 | new_waveform_picker_regs->run_burst_enable = 0x04; // [0000 0100] enable f0 | |
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1025 | new_waveform_picker_regs->run_burst_enable = 0x80; // [1000 0000] f3 burst enable | |
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1026 | new_waveform_picker_regs->run_burst_enable = 0x0f; // [0000 1111] enable f3 f2 f1 f0 | |
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1046 | 1027 | break; |
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1047 | 1028 | case(LFR_MODE_BURST): |
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1048 | 1029 | new_waveform_picker_regs->run_burst_enable = 0x40; // [0100 0000] f2 burst enabled |
@@ -1115,21 +1096,12 void reset_new_waveform_picker_regs() | |||
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1115 | 1096 | * |
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1116 | 1097 | */ |
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1117 | 1098 | |
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1118 | unsigned int wf_snap_f0_aligned; | |
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1119 | unsigned int wf_snap_f1_aligned; | |
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1120 | unsigned int wf_snap_f2_aligned; | |
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1121 | unsigned int wf_cont_f3_aligned; | |
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1122 | ||
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1123 | 1099 | new_waveform_picker_regs->data_shaping = 0x01; // 0x00 *** R1 R0 SP1 SP0 BW |
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1124 | 1100 | new_waveform_picker_regs->run_burst_enable = 0x00; // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ] |
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1125 | wf_snap_f0_aligned = address_alignment( wf_snap_f0 ); | |
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1126 | wf_snap_f1_aligned = address_alignment( wf_snap_f1 ); | |
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1127 | wf_snap_f2_aligned = address_alignment( wf_snap_f2 ); | |
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1128 | wf_cont_f3_aligned = address_alignment( wf_cont_f3 ); | |
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1129 | new_waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0_aligned); // 0x08 | |
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1130 | new_waveform_picker_regs->addr_data_f1 = (int) (wf_snap_f1_aligned); // 0x0c | |
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1131 | new_waveform_picker_regs->addr_data_f2 = (int) (wf_snap_f2_aligned); // 0x10 | |
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1132 | new_waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_aligned); // 0x14 | |
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1101 | new_waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0); // 0x08 | |
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1102 | new_waveform_picker_regs->addr_data_f1 = (int) (wf_snap_f1); // 0x0c | |
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1103 | new_waveform_picker_regs->addr_data_f2 = (int) (wf_snap_f2); // 0x10 | |
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1104 | new_waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3); // 0x14 | |
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1133 | 1105 | new_waveform_picker_regs->status = 0x00; // 0x18 |
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1134 | 1106 | // new_waveform_picker_regs->delta_snapshot = 0x12800; // 0x1c 296 * 256 = 75776 |
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1135 | 1107 | // new_waveform_picker_regs->delta_snapshot = 0x1000; // 0x1c 16 * 256 = 4096 |
@@ -1145,59 +1117,6 void reset_new_waveform_picker_regs() | |||
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1145 | 1117 | new_waveform_picker_regs->nb_word_in_buffer = 0x1802; // 0x3c *** 2048 * 3 + 2 = 6146 |
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1146 | 1118 | } |
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1147 | 1119 | |
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1148 | void reset_new_waveform_picker_regs_alt() | |
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1149 | { | |
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1150 | /** This function resets the waveform picker module registers. | |
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1151 | * | |
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1152 | * The registers affected by this function are located at the following offset addresses: | |
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1153 | * - 0x00 data_shaping | |
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1154 | * - 0x04 run_burst_enable | |
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1155 | * - 0x08 addr_data_f0 | |
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1156 | * - 0x0C addr_data_f1 | |
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1157 | * - 0x10 addr_data_f2 | |
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1158 | * - 0x14 addr_data_f3 | |
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1159 | * - 0x18 status | |
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1160 | * - 0x1C delta_snapshot | |
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1161 | * - 0x20 delta_f0 | |
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1162 | * - 0x24 delta_f0_2 | |
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1163 | * - 0x28 delta_f1 | |
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1164 | * - 0x2c delta_f2 | |
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1165 | * - 0x30 nb_data_by_buffer | |
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1166 | * - 0x34 nb_snapshot_param | |
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1167 | * - 0x38 start_date | |
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1168 | * - 0x3c nb_word_in_buffer | |
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1169 | * | |
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1170 | */ | |
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1171 | ||
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1172 | unsigned int wf_snap_f0_aligned; | |
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1173 | unsigned int wf_snap_f1_aligned; | |
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1174 | unsigned int wf_snap_f2_aligned; | |
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1175 | unsigned int wf_cont_f3_aligned; | |
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1176 | ||
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1177 | new_waveform_picker_regs->data_shaping = 0x01; // 0x00 *** R1 R0 SP1 SP0 BW | |
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1178 | new_waveform_picker_regs->run_burst_enable = 0x00; // 0x04 *** [run *** burst f2, f1, f0 *** enable f3, f2, f1, f0 ] | |
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1179 | wf_snap_f0_aligned = address_alignment( wf_snap_f0 ); | |
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1180 | wf_snap_f1_aligned = address_alignment( wf_snap_f1 ); | |
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1181 | wf_snap_f2_aligned = address_alignment( wf_snap_f2 ); | |
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1182 | wf_cont_f3_aligned = address_alignment( wf_cont_f3 ); | |
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1183 | new_waveform_picker_regs->addr_data_f0 = (int) (wf_snap_f0_aligned); // 0x08 | |
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1184 | new_waveform_picker_regs->addr_data_f1 = (int) (wf_snap_f1_aligned); // 0x0c | |
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1185 | new_waveform_picker_regs->addr_data_f2 = (int) (wf_snap_f2_aligned); // 0x10 | |
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1186 | new_waveform_picker_regs->addr_data_f3 = (int) (wf_cont_f3_aligned); // 0x14 | |
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1187 | new_waveform_picker_regs->status = 0x00; // 0x18 | |
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1188 | // new_waveform_picker_regs->delta_snapshot = 0x12800; // 0x1c 296 * 256 = 75776 | |
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1189 | new_waveform_picker_regs->delta_snapshot = 0x1000; // 0x1c 16 * 256 = 4096 | |
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1190 | new_waveform_picker_regs->delta_f0 = 0xbf5; // 0x20 *** 1013 | |
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1191 | new_waveform_picker_regs->delta_f0_2 = 0x7; // 0x24 *** 7 [7 bits] | |
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1192 | new_waveform_picker_regs->delta_f1 = 0xbc0; // 0x28 *** 960 | |
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1193 | // new_waveform_picker_regs->delta_f2 = 0x12200; // 0x2c *** 74240 | |
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1194 | new_waveform_picker_regs->delta_f2 = 0xc00; // 0x2c *** 12 * 256 = 3072 | |
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1195 | new_waveform_picker_regs->nb_data_by_buffer = 0x07; // 0x30 *** 7 | |
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1196 | new_waveform_picker_regs->snapshot_param = 0x10; // 0x34 *** 16 | |
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1197 | new_waveform_picker_regs->start_date = 0x00; // 0x38 | |
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1198 | new_waveform_picker_regs->nb_word_in_buffer = 0x34; // 0x3c *** (3 * 8 + 2) * 2 | |
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1199 | } | |
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1200 | ||
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1201 | 1120 | //***************** |
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1202 | 1121 | // local parameters |
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1203 | 1122 | void set_local_sbm1_nb_cwf_max() |
@@ -1321,31 +1240,3 void increment_seq_counter_source_id( un | |||
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1321 | 1240 | *sequence_cnt = 0; |
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1322 | 1241 | } |
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1323 | 1242 | } |
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1324 | ||
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1325 | unsigned int address_alignment( volatile int *address) | |
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1326 | { | |
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1327 | unsigned char i; | |
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1328 | unsigned char lastByte; | |
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1329 | unsigned int addressAligned; | |
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1330 | ||
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1331 | addressAligned = (unsigned int) address; | |
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1332 | ||
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1333 | PRINTF1("address %x\n", addressAligned ); | |
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1334 | ||
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1335 | for (i=0; i<256; i++) | |
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1336 | { | |
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1337 | lastByte = (unsigned char) ( addressAligned & 0x000000ff ) ; | |
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1338 | if (lastByte == 0x00) | |
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1339 | { | |
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1340 | break; | |
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1341 | } | |
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1342 | else | |
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1343 | { | |
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1344 | addressAligned = addressAligned + 1; | |
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1345 | } | |
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1346 | } | |
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1347 | ||
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1348 | PRINTF2("i = %d, address %x\n", i, (int) addressAligned); | |
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1349 | ||
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1350 | return addressAligned; | |
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1351 | } |
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