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Bug #939

Updated by Veronique bouzid over 4 years ago


J ai classé en Bug ce test mais je ne suis pas sure !!!

Ce test envoie une frequence negative (-1.0) dans le champ CP_RPW_SC_RW1_F1 de la TC_LFR_UPDATE_INFO

14:45:59.204015, TC_LFR_UPDATE_INFO, CCSDS_VERSION_NUMBER = 0, PACKET_TYPE: TC_PACKET = 1, DATA_FIELD_HEADER_FLAG: WITH_HEADER = 1, PROCESS_ID: RPW_PID_2 = 76, PACKET_CATEGORY: PRIVATE_SCIENCE_OR_TELECOMMAND = 12, (PACKET_ID=0x1ccc), SEGMENTATION_GROUPING_FLAG: STANDALONE_PACKET = 3, SEQUENCE_CNT=0, (PACKET_SEQUENCE_CONTROL=0xc000), PACKET_LENGTH=103, CCSDS_SECONDARY_HEADER_FLAG=0, PUS_VERSION = 1, ACK_EXECUTION_COMPLETION=1, ACK_EXECUTION_PROGRESS=0, ACK_EXECUTION_START=0, ACK_ACCEPTANCE=1, SERVICE_TYPE: EQ_CONFIGURATION = 181, SERVICE_SUBTYPE: UPDATE_INFO = 51, SOURCE_ID: MISSION_TIMELINE = 110, CP_PDU_SCM_ON_OFF: OFF = 0, CP_PDU_ANT3_ON_OFF: OFF = 0, CP_PDU_ANT2_ON_OFF: OFF = 0, CP_PDU_ANT1_ON_OFF: OFF = 0, CP_PDU_THR_ON_OFF: OFF = 0, CP_PDU_TDS_ON_OFF: OFF = 0, CP_PDU_LFR_ON_OFF: OFF = 0, CP_PDU_BIAS_ON_OFF: OFF = 0, CP_BIA_MODE_MUX_SET: SET_0 = 0, CP_BIA_MODE_HV_ENABLED: DISABLED = 0, CP_BIA_MODE_BIAS1_ENABLED: DISABLED = 0, CP_BIA_MODE_BIAS2_ENABLED: DISABLED = 0, CP_BIA_MODE_BIAS3_ENABLED: DISABLED = 0, SPARE: 0x0, CP_BIA_BIAS1=614.578487(uA), CP_BIA_BIAS2=614.56492241(uA), CP_BIA_BIAS3=614.55125782(uA), CP_BIA_M1=26.223070035(V), CP_BIA_M2=-27.673988037(V), CP_BIA_M3=28.973391609(V), CP_BIA_PHV=-3.282354, CP_BIA_NHV=18.600006, CP_BIA_TEMP_ANT1_LF_PA=-1756.0849565, CP_BIA_TEMP_ANT2_LF_PA=-6703.2503965, CP_BIA_TEMP_ANT3_LF_PA=-6703.2503965, CP_BIA_TEMP_PCB=-6703.2503965, SPARE=0x0, CP_LFR_MODE_COPY: STANDBY = 0, CP_LFR_CALIB_ENABLED: DISABLED = 0, CP_TDS_MODE_COPY: STANDBY = 0, CP_THR_MODE_COPY: STANDBY = 0, CP_LFR_TEMP_SCM=256degC, CP_THR_TEMP_ANT1_HF_PA=7531, CP_THR_TEMP_ANT2_HF_PA=14725, CP_THR_TEMP_ANT3_HF_PA=25836, CP_RPW_SC_RW1_F1=3212836864,

La TC_LFR_UPDATE_INFO est prise en compte, le compteur HK_LFR_UPDATE_INFO_TC_CNT est incrementé dans TM_LFR_HK . La valeur négative n est donc pas interdite.
On va verifier les masques dans TM_LFR_PARAMETER_DUMP.
A_LFR_RW_MASK_F0_WORD1=0xffffffff, PA_LFR_RW_MASK_F0_WORD2=0xffffffff, PA_LFR_RW_MASK_F0_WORD3=0xffffffff, *PA_LFR_RW_MASK_F0_WORD4=0xfffffffe*, PA_LFR_RW_MASK_F1_WORD1=0xffffffff, PA_LFR_RW_MASK_F1_WORD2=0xffffffff, PA_LFR_RW_MASK_F1_WORD3=0xffffffff, *PA_LFR_RW_MASK_F1_WORD4=0xfffffffe,* PA_LFR_RW_MASK_F1_WORD4=0xfffffffe, PA_LFR_RW_MASK_F2_WORD1=0xffffffff, PA_LFR_RW_MASK_F2_WORD2=0xffffffff, PA_LFR_RW_MASK_F2_WORD3=0xffffffff, PA_LFR_RW_MASK_F2_WORD4=0xffffffff

On voit qu il a été mis à jour pour F0 et que ce masque positionne les 2 bits de poids faibles à 0, idem un envoi de frequence à 96.0 et également dans PA_LFR_RW_MASK_F1_WORD4. 96.0.
EST CE UN BUG OU PAS?
Quel est notre comportement dans ce cas?

Le script est /home/validation/SCRIPT/R3++/test_rw_one_neg_freq.py et les fichiers (2017_02_15-14_46_09*) sont rangés dans le répertoire
/home/validation/data/R3++/3.2.0.1/1.1.91/TESTS-UNITAIRES/one_neg_freq.

Contexte du test
----------------
FSW 3.2.0.1
VHDL 1.1.91
EM1 sans Timegen
SocExplorerEngine.getSocExplorer: Version = 0.7.0, Branch = 0.6, Changeset = c459540a6dbd+
StarDundee

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