/*------------------------------------------------------------------------------ -- This file is a part of the libuc, microcontroler library -- Copyright (C) 2011, Alexis Jeandet -- -- This program is free software; you can redistribute it and/or modify -- it under the terms of the GNU General Public License as published by -- the Free Software Foundation; either version 3 of the License, or -- (at your option) any later version. -- -- This program is distributed in the hope that it will be useful, -- but WITHOUT ANY WARRANTY; without even the implied warranty of -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- GNU General Public License for more details. -- -- You should have received a copy of the GNU General Public License -- along with this program; if not, write to the Free Software -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ------------------------------------------------------------------------------- -- Author : Alexis Jeandet -- Mail : alexis.jeandet@gmail.com -------------------------------------------------------------------------------*/ #include #include #include #include #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA)) #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8) int spiopen(int count,spi_t* spidev) { switch(count) { case 0: spidev->_dev = (void*)SPI1; RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE); break; case 1: spidev->_dev = (void*)SPI2; RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE); RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE); break; case 2: spidev->_dev = (void*)SPI3; RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE); RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI3, ENABLE); break; default: break; } spienable(spidev); return 1; } int spiopenandconfig(int count,spi_t* spidev,uint32_t cfg,uint32_t speed,uint32_t MOSIpin,uint32_t MISOpin,uint32_t SCKpin,uint32_t SCSpin) { spiopen(count ,spidev); spidev->cfg = cfg; spidev->speed = speed; spidisable(spidev); spisetpins(spidev,MOSIpin, MISOpin, SCKpin, SCSpin); spienable(spidev); spisetconfig(spidev); return 1; } int spiclose(spi_t* spidev) { switch((int)spidev->_dev) { case (int)(void*)SPI1: spidev->_dev = (void*)SPI1; RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE); break; case (int)(void*)SPI2: spidev->_dev = (void*)SPI2; RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE); break; case (int)(void*)SPI3: spidev->_dev = (void*)SPI3; RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE); break; default: break; } return 1; } int spisetpins(spi_t* spidev,uint32_t MOSIpin,uint32_t MISOpin,uint32_t SCKpin,uint32_t SCSpin) { gpio_t MISO,MOSI,SCK,SCS; uint8_t gpioAFspix = GPIO_AF_SPI1; switch((int)spidev->_dev) { case (int)(void*)SPI1: gpioAFspix = GPIO_AF_SPI1; break; case (int)(void*)SPI2: gpioAFspix = GPIO_AF_SPI2; break; case (int)(void*)SPI3: gpioAFspix = GPIO_AF_SPI3; break; default: break; } if(MISOpin!=-1) { MISO = gpioopen(MISOpin); MISO |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; gpiosetconfig(&MISO); GPIO_PinAFConfig(GPIOGETPORT(MISO), (uint8_t)(MISO & 0xF), gpioAFspix); } if(MOSIpin!=-1) { MOSI = gpioopen(MOSIpin); MOSI |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; gpiosetconfig(&MOSI); GPIO_PinAFConfig(GPIOGETPORT(MOSI), (uint8_t)(MOSI & 0xF), gpioAFspix); } if(SCKpin!=-1) { SCK = gpioopen(SCKpin); SCK |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; gpiosetconfig(&SCK); GPIO_PinAFConfig(GPIOGETPORT(SCK), (uint8_t)(SCK & 0xF), gpioAFspix); } if(SCSpin!=-1) { SCS = gpioopen(SCSpin); SCS |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; gpiosetconfig(&SCS); GPIO_PinAFConfig(GPIOGETPORT(SCS), (uint8_t)(SCS & 0xF), gpioAFspix); ((SPI_TypeDef *)(spidev->_dev))->CR2 |= (1<<2); } else { ((SPI_TypeDef *)(spidev->_dev))->CR2 &= ~(1<<2); } return 1; } int spienable(spi_t* spidev) { ((SPI_TypeDef *)(spidev->_dev))->CR1 |= (1<<6); return 1; } int spidisable(spi_t* spidev) { ((SPI_TypeDef *)(spidev->_dev))->CR1 &= ~(1<<6); return 1; } int spisetconfig(spi_t* spidev) { ((SPI_TypeDef *)(spidev->_dev))->CR2 |= (1<<2); ((SPI_TypeDef *)(spidev->_dev))->CR1 |= (1<<2); spisetspeed(spidev,spidev->speed); spisetdatabits(spidev,spidev->cfg & SPIBITSMASK); spisetbitorder(spidev,spidev->cfg & SPIBITORDERMASK); spisetclkinhlevel(spidev,spidev->cfg & SPICLKINHLVLMASK); spisetclkphase(spidev,spidev->cfg & SPICLKPHASEMASK); return 1; } int spisetspeed(spi_t* spidev, uint32_t speed) { spidev->speed = speed; uint32_t apbclock = 0x00; /*uint32_t tmpreg = 0x00; uint32_t integerdivider = 0x00; uint32_t fractionaldivider = 0x00;*/ RCC_ClocksTypeDef RCC_ClocksStatus; RCC_GetClocksFreq(&RCC_ClocksStatus); if ((SPI_TypeDef *)(spidev->_dev) == SPI1) { apbclock = RCC_ClocksStatus.PCLK2_Frequency; } else { apbclock = RCC_ClocksStatus.PCLK1_Frequency; } int32_t speederror = 0x7FFFFFFF; //max error int32_t prev_speederror = 0x7FFFFFFF; int32_t realspeed = 0; unsigned char divider = 0; do { divider ++; prev_speederror = speederror; realspeed = apbclock>>(divider); speederror = realspeed - speed; if(speederror<0)speederror=-speederror; if(divider>8)break; }while(speederrorspeed = apbclock>>(divider-1); divider-=2; ((SPI_TypeDef *)(spidev->_dev))->CR1 &= 0xFFD7; // clear prescaler bits 3:5 ((SPI_TypeDef *)(spidev->_dev))->CR1 |= ((0x7 & divider)<<3); //((SPI_TypeDef *)(spidev->_dev))->CR1 |= ((0x7 & 7)<<3); return 1; } int spisetdatabits(spi_t* spidev,spibits_t bitscnt) { int result = 0; switch(bitscnt) { case spi8bits: ((SPI_TypeDef *)(spidev->_dev))->CR1 &= ~(1<<11); result = 1; break; case spi16bits: ((SPI_TypeDef *)(spidev->_dev))->CR1 |= (1<<11); result = 1; break; default: break; } return result; } int spisetbitorder(spi_t* spidev,spibitorder_t order) { if(order==spimsbfirst) { ((SPI_TypeDef *)(spidev->_dev))->CR1 &= ~(1<<7); return 1; } else { if(order==spilsbfirst) { ((SPI_TypeDef *)(spidev->_dev))->CR1 |= (1<<7); return 1; } else return 0; } } int spisetclkinhlevel(spi_t* spidev,spiclkinhlvl_t level) { if(level==spiclkinhlow) { ((SPI_TypeDef *)(spidev->_dev))->CR1 &= ~(1<<1); return 1; } else { if(level==spiclkinhhigh) { ((SPI_TypeDef *)(spidev->_dev))->CR1 |= (1<<1); return 1; } else return 0; } } int spisetclkphase(spi_t* spidev,spiclkphase_t phase) { if(phase==spiclkfirstedge) { ((SPI_TypeDef *)(spidev->_dev))->CR1 &= ~1; return 1; } else { if(phase==spiclksecondedge) { ((SPI_TypeDef *)(spidev->_dev))->CR1 |= 1; return 1; } else return 0; } } int spiputw(spi_t* spidev,uint16_t data) { ((SPI_TypeDef *)(spidev->_dev))->DR = data; while((((SPI_TypeDef *)(spidev->_dev))->SR & (1<<7)) == (1<<7)); return 1; } uint16_t spigetw(spi_t* spidev) { while((((SPI_TypeDef *)(spidev->_dev))->SR & (1<<7)) == (1<<7)); ((SPI_TypeDef *)(spidev->_dev))->DR = 0xFFFF; while((((SPI_TypeDef *)(spidev->_dev))->SR & (1<<0)) == 0); return ((SPI_TypeDef *)(spidev->_dev))->DR; } int spiputs(spi_t* spidev,char* s) { while (*s) spiputw(spidev,*s++); return 1; } int spigets(spi_t* spidev,char* s) { do { (*s) = spigetw(spidev); } while(*s++); return 1; } int spiputnw(spi_t* spidev,uint16_t* w,int n) { while(n!=0) { spiputw(spidev,*w++); n--; } return 1; } int spigetnw(spi_t* spidev,uint16_t* w,int n) { while(n!=0) { *w++=spigetw(spidev); n--; } return 1; } int spiputnc(spi_t* spidev,char* c,int n) { while(n!=0) { spiputw(spidev,*c++); n--; } return 1; } int spigetnc(spi_t* spidev,char* c,int n) { while(n!=0) { *c++=spigetw(spidev); n--; } return 1; } int spiavailiabledata(spi_t*spidev) { return 0; }