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/**
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* @file : lpc17xx_nvic.c
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* @brief : Contains all expansion functions support for
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* NVIC firmware library on LPC17xx. The main
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* NVIC functions are defined in core_cm3.h
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* @version : 1.0
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* @date : 18. Mar. 2009
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* @author : HieuNguyen
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**************************************************************************
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* products. This software is supplied "AS IS" without any warranties.
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* NXP Semiconductors assumes no responsibility or liability for the
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* use of the software, conveys no license or title under any patent,
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* copyright, or mask work right to the product. NXP Semiconductors
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* reserves the right to make changes in the software without
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* notification. NXP Semiconductors also make no representation or
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* warranty that such application will be suitable for the specified
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* use without further testing or modification.
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**********************************************************************/
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/* Peripheral group ----------------------------------------------------------- */
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/** @addtogroup NVIC
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* @{
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*/
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/* Includes ------------------------------------------------------------------- */
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#include "lpc17xx_nvic.h"
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/* Private Macros ------------------------------------------------------------- */
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/** @addtogroup NVIC_Private_Macros
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* @{
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*/
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/* Vector table offset bit mask */
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#define NVIC_VTOR_MASK 0x3FFFFF80
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/**
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* @}
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*/
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/* Public Functions ----------------------------------------------------------- */
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/** @addtogroup NVIC_Public_Functions
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* @{
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*/
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/*****************************************************************************//**
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* @brief De-initializes the NVIC peripheral registers to their default
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* reset values.
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* @param None
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* @return None
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*
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* These following NVIC peripheral registers will be de-initialized:
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* - Disable Interrupt (32 IRQ interrupt sources that matched with LPC17xx)
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* - Clear all Pending Interrupts (32 IRQ interrupt source that matched with LPC17xx)
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* - Clear all Interrupt Priorities (32 IRQ interrupt source that matched with LPC17xx)
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*******************************************************************************/
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void NVIC_DeInit(void)
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{
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uint8_t tmp;
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/* Disable all interrupts */
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NVIC->ICER[0] = 0xFFFFFFFF;
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NVIC->ICER[1] = 0x00000001;
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/* Clear all pending interrupts */
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NVIC->ICPR[0] = 0xFFFFFFFF;
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NVIC->ICPR[1] = 0x00000001;
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/* Clear all interrupt priority */
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for (tmp = 0; tmp < 32; tmp++) {
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NVIC->IP[tmp] = 0x00;
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}
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}
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/*****************************************************************************//**
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* @brief De-initializes the SCB peripheral registers to their default
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* reset values.
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* @param none
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* @return none
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*
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* These following SCB NVIC peripheral registers will be de-initialized:
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* - Interrupt Control State register
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* - Interrupt Vector Table Offset register
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* - Application Interrupt/Reset Control register
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* - System Control register
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* - Configuration Control register
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* - System Handlers Priority Registers
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* - System Handler Control and State Register
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* - Configurable Fault Status Register
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* - Hard Fault Status Register
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* - Debug Fault Status Register
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*******************************************************************************/
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void NVIC_SCBDeInit(void)
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{
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uint8_t tmp;
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SCB->ICSR = 0x0A000000;
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SCB->VTOR = 0x00000000;
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SCB->AIRCR = 0x05FA0000;
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SCB->SCR = 0x00000000;
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SCB->CCR = 0x00000000;
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for (tmp = 0; tmp < 32; tmp++) {
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SCB->SHP[tmp] = 0x00;
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}
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SCB->SHCSR = 0x00000000;
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SCB->CFSR = 0xFFFFFFFF;
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SCB->HFSR = 0xFFFFFFFF;
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SCB->DFSR = 0xFFFFFFFF;
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}
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/*****************************************************************************//**
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* @brief Set Vector Table Offset value
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* @param offset Offset value
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* @return None
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*******************************************************************************/
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void NVIC_SetVTOR(uint32_t offset)
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{
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SCB->VTOR = (offset & NVIC_VTOR_MASK);
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* --------------------------------- End Of File ------------------------------ */
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