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/***********************************************************************//**
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* @file : lpc17xx_gpio.h
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* @brief : Contains all macro definitions and function prototypes
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* support for GPIO firmware library on LPC17xx
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* @version : 1.0
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* @date : 23. Apr. 2009
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* @author : HieuNguyen
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**************************************************************************
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* products. This software is supplied "AS IS" without any warranties.
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* NXP Semiconductors assumes no responsibility or liability for the
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* use of the software, conveys no license or title under any patent,
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* copyright, or mask work right to the product. NXP Semiconductors
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* reserves the right to make changes in the software without
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* notification. NXP Semiconductors also make no representation or
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* warranty that such application will be suitable for the specified
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* use without further testing or modification.
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**************************************************************************/
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/* Peripheral group ----------------------------------------------------------- */
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/** @defgroup GPIO
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* @ingroup LPC1700CMSIS_FwLib_Drivers
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* @{
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*/
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#ifndef LPC17XX_GPIO_H_
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#define LPC17XX_GPIO_H_
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/* Includes ------------------------------------------------------------------- */
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#include "LPC17xx.h"
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#include "lpc_types.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/* Public Types --------------------------------------------------------------- */
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/** @defgroup GPIO_Public_Types
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* @{
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*/
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/**
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* @brief Fast GPIO port byte type definition
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*/
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typedef struct {
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__IO uint8_t FIODIR[4]; /**< FIO direction register in byte-align */
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uint32_t RESERVED0[3]; /**< Reserved */
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__IO uint8_t FIOMASK[4]; /**< FIO mask register in byte-align */
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__IO uint8_t FIOPIN[4]; /**< FIO pin register in byte align */
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__IO uint8_t FIOSET[4]; /**< FIO set register in byte-align */
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__O uint8_t FIOCLR[4]; /**< FIO clear register in byte-align */
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} GPIO_Byte_TypeDef;
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/**
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* @brief Fast GPIO port half-word type definition
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*/
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typedef struct {
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__IO uint16_t FIODIRL; /**< FIO direction register lower halfword part */
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__IO uint16_t FIODIRU; /**< FIO direction register upper halfword part */
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uint32_t RESERVED0[3]; /**< Reserved */
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__IO uint16_t FIOMASKL; /**< FIO mask register lower halfword part */
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__IO uint16_t FIOMASKU; /**< FIO mask register upper halfword part */
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__IO uint16_t FIOPINL; /**< FIO pin register lower halfword part */
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__IO uint16_t FIOPINU; /**< FIO pin register upper halfword part */
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__IO uint16_t FIOSETL; /**< FIO set register lower halfword part */
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__IO uint16_t FIOSETU; /**< FIO set register upper halfword part */
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__O uint16_t FIOCLRL; /**< FIO clear register lower halfword part */
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__O uint16_t FIOCLRU; /**< FIO clear register upper halfword part */
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} GPIO_HalfWord_TypeDef;
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/**
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* @}
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*/
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/* Public Macros -------------------------------------------------------------- */
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/** @defgroup GPIO_Public_Macros
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* @{
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*/
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/** Fast GPIO port 0 byte accessible definition */
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#define GPIO0_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO0_BASE))
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/** Fast GPIO port 1 byte accessible definition */
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#define GPIO1_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO1_BASE))
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/** Fast GPIO port 2 byte accessible definition */
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#define GPIO2_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO2_BASE))
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/** Fast GPIO port 3 byte accessible definition */
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#define GPIO3_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO3_BASE))
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/** Fast GPIO port 4 byte accessible definition */
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#define GPIO4_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO4_BASE))
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/** Fast GPIO port 0 half-word accessible definition */
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#define GPIO0_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO0_BASE))
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/** Fast GPIO port 1 half-word accessible definition */
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#define GPIO1_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO1_BASE))
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/** Fast GPIO port 2 half-word accessible definition */
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#define GPIO2_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO2_BASE))
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/** Fast GPIO port 3 half-word accessible definition */
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#define GPIO3_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO3_BASE))
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/** Fast GPIO port 4 half-word accessible definition */
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#define GPIO4_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO4_BASE))
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/**
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* @}
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*/
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/* Public Functions ----------------------------------------------------------- */
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/** @defgroup GPIO_Public_Functions
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* @{
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*/
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/* GPIO style ------------------------------- */
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void GPIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir);
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void GPIO_SetValue(uint8_t portNum, uint32_t bitValue);
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void GPIO_ClearValue(uint8_t portNum, uint32_t bitValue);
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uint32_t GPIO_ReadValue(uint8_t portNum);
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/* FIO (word-accessible) style ------------------------------- */
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void FIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir);
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void FIO_SetValue(uint8_t portNum, uint32_t bitValue);
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void FIO_ClearValue(uint8_t portNum, uint32_t bitValue);
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uint32_t FIO_ReadValue(uint8_t portNum);
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void FIO_SetMask(uint8_t portNum, uint32_t bitValue, uint8_t maskValue);
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/* FIO (halfword-accessible) style ------------------------------- */
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void FIO_HalfWordSetDir(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir);
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void FIO_HalfWordSetMask(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue);
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void FIO_HalfWordSetValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue);
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void FIO_HalfWordClearValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue);
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uint16_t FIO_HalfWordReadValue(uint8_t portNum, uint8_t halfwordNum);
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/* FIO (byte-accessible) style ------------------------------- */
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void FIO_ByteSetDir(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir);
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void FIO_ByteSetMask(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue);
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void FIO_ByteSetValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue);
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void FIO_ByteClearValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue);
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uint8_t FIO_ByteReadValue(uint8_t portNum, uint8_t byteNum);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* LPC17XX_GPIO_H_ */
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/**
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* @}
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*/
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/* --------------------------------- End Of File ------------------------------ */
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