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/***********************************************************************//**
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* @file : lpc17xx_adc.h
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* @brief : Contains all macro definitions and function prototypes
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* support for ADC firmware library on LPC17xx
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* @version : 1.0
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* @date : 3. April. 2009
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* @author : NgaDinh
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**************************************************************************
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* products. This software is supplied "AS IS" without any warranties.
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* NXP Semiconductors assumes no responsibility or liability for the
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* use of the software, conveys no license or title under any patent,
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* copyright, or mask work right to the product. NXP Semiconductors
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* reserves the right to make changes in the software without
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* notification. NXP Semiconductors also make no representation or
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* warranty that such application will be suitable for the specified
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* use without further testing or modification.
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**************************************************************************/
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/* Peripheral group ----------------------------------------------------------- */
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/** @defgroup ADC
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* @ingroup LPC1700CMSIS_FwLib_Drivers
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* @{
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*/
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#ifndef LPC17XX_ADC_H_
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#define LPC17XX_ADC_H_
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/* Includes ------------------------------------------------------------------- */
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#include "LPC17xx.h"
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#include "lpc_types.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/* Private Macros ------------------------------------------------------------- */
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/** @defgroup ADC_Private_Macros ADC_Private_Macros
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* @{
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*/
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/** @defgroup group3 ADC_REGISTER_BIT_DEFINITIONS
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* @{
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*/
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/*********************************************************************//**
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* Macro defines for ADC control register
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**********************************************************************/
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/** Selects which of the AD0.0:7 pins is (are) to be sampled and converted */
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#define ADC_CR_CH_SEL(n) ((1UL << n))
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/** The APB clock (PCLK) is divided by (this value plus one)
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* to produce the clock for the A/D */
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#define ADC_CR_CLKDIV(n) ((n<<8))
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/** Repeated conversions A/D enable bit */
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#define ADC_CR_BURST ((1UL<<16))
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/** ADC convert in power down mode */
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#define ADC_CR_PDN ((1UL<<21))
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/** Start mask bits */
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#define ADC_CR_START_MASK ((7UL<<24))
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/** Select Start Mode */
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#define ADC_CR_START_MODE_SEL(SEL) ((SEL<<24))
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/** Start conversion now */
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#define ADC_CR_START_NOW ((1UL<<24))
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/** Start conversion when the edge selected by bit 27 occurs on P2.10/EINT0 */
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#define ADC_CR_START_EINT0 ((2UL<<24))
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/** Start conversion when the edge selected by bit 27 occurs on P1.27/CAP0.1 */
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#define ADC_CR_START_CAP01 ((3UL<<24))
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/** Start conversion when the edge selected by bit 27 occurs on MAT0.1 */
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#define ADC_CR_START_MAT01 ((4UL<<24))
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/** Start conversion when the edge selected by bit 27 occurs on MAT0.3 */
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#define ADC_CR_START_MAT03 ((5UL<<24))
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/** Start conversion when the edge selected by bit 27 occurs on MAT1.0 */
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#define ADC_CR_START_MAT10 ((6UL<<24))
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/** Start conversion when the edge selected by bit 27 occurs on MAT1.1 */
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#define ADC_CR_START_MAT11 ((7UL<<24))
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/** Start conversion on a falling edge on the selected CAP/MAT signal */
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#define ADC_CR_EDGE ((1UL<<27))
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/*********************************************************************//**
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* Macro defines for ADC Global Data register
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**********************************************************************/
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/** When DONE is 1, this field contains result value of ADC conversion */
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#define ADC_GDR_RESULT(n) (((n>>4)&0xFFF))
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/** These bits contain the channel from which the LS bits were converted */
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#define ADC_GDR_CH(n) (((n>>24)&0x7))
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/** This bit is 1 in burst mode if the results of one or
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* more conversions was (were) lost */
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#define ADC_GDR_OVERRUN_FLAG ((1UL<<30))
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/** This bit is set to 1 when an A/D conversion completes */
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#define ADC_GDR_DONE_FLAG ((1UL<<31))
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/** This bits is used to mask for Channel */
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#define ADC_GDR_CH_MASK ((7UL<<24))
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/*********************************************************************//**
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* Macro defines for ADC Interrupt register
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**********************************************************************/
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/** These bits allow control over which A/D channels generate
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* interrupts for conversion completion */
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#define ADC_INTEN_CH(n) ((1UL<<n))
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/** When 1, enables the global DONE flag in ADDR to generate an interrupt */
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#define ADC_INTEN_GLOBAL ((1UL<<8))
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/*********************************************************************//**
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* Macro defines for ADC Data register
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**********************************************************************/
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/** When DONE is 1, this field contains result value of ADC conversion */
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#define ADC_DR_RESULT(n) (((n>>4)&0xFFF))
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/** These bits mirror the OVERRRUN status flags that appear in the
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* result register for each A/D channel */
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#define ADC_DR_OVERRUN_FLAG ((1UL<<30))
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/** This bit is set to 1 when an A/D conversion completes. It is cleared
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* when this register is read */
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#define ADC_DR_DONE_FLAG ((1UL<<31))
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/*********************************************************************//**
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* Macro defines for ADC Status register
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**********************************************************************/
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/** These bits mirror the DONE status flags that appear in the result
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* register for each A/D channel */
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#define ADC_STAT_CH_DONE_FLAG(n) ((n&0xFF))
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/** These bits mirror the OVERRRUN status flags that appear in the
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* result register for each A/D channel */
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#define ADC_STAT_CH_OVERRUN_FLAG(n) (((n>>8)&0xFF))
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/** This bit is the A/D interrupt flag */
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#define ADC_STAT_INT_FLAG ((1UL<<16))
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/*********************************************************************//**
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* Macro defines for ADC Trim register
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**********************************************************************/
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/** Offset trim bits for ADC operation */
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#define ADC_ADCOFFS(n) (((n&0xF)<<4))
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/** Written to boot code*/
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#define ADC_TRIM(n) (((n&0xF)<<8))
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Public Types --------------------------------------------------------------- */
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/** @defgroup ADC_Public_Types
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* @{
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*/
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/*********************************************************************//**
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* @brief ADC enumeration
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**********************************************************************/
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/** @brief Channel Selection */
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typedef enum
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{
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ADC_CHANNEL_0 = 0, /*!< Channel 0 */
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ADC_CHANNEL_1, /*!< Channel 1 */
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ADC_CHANNEL_2, /*!< Channel 2 */
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ADC_CHANNEL_3, /*!< Channel 3 */
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ADC_CHANNEL_4, /*!< Channel 4 */
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ADC_CHANNEL_5, /*!< Channel 5 */
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ADC_CHANNEL_6, /*!< Channel 6 */
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ADC_CHANNEL_7 /*!< Channel 7 */
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}ADC_CHANNEL_SELECTION;
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/** @brief Type of start option */
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/** @brief Type of start option */
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typedef enum
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{
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ADC_START_CONTINUOUS =0, /*!< Continuous mode */
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ADC_START_NOW, /*!< Start conversion now */
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ADC_START_ON_EINT0, /*!< Start conversion when the edge selected
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* by bit 27 occurs on P2.10/EINT0 */
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ADC_START_ON_CAP01, /*!< Start conversion when the edge selected
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* by bit 27 occurs on P1.27/CAP0.1 */
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ADC_START_ON_MAT01, /*!< Start conversion when the edge selected
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* by bit 27 occurs on MAT0.1 */
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ADC_START_ON_MAT03, /*!< Start conversion when the edge selected
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* by bit 27 occurs on MAT0.3 */
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ADC_START_ON_MAT10, /*!< Start conversion when the edge selected
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* by bit 27 occurs on MAT1.0 */
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ADC_START_ON_MAT11 /*!< Start conversion when the edge selected
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* by bit 27 occurs on MAT1.1 */
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} ADC_START_OPT;
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/** @brief Type of edge when start conversion on the selected CAP/MAT signal */
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typedef enum
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{
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ADC_START_ON_RISING = 0, /*!< Start conversion on a rising edge
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*on the selected CAP/MAT signal */
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ADC_START_ON_FALLING /*!< Start conversion on a falling edge
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*on the selected CAP/MAT signal */
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} ADC_START_ON_EDGE_OPT;
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/** @brief* ADC type interrupt enum */
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typedef enum
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{
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ADC_ADINTEN0 = 0, /*!< Interrupt channel 0 */
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ADC_ADINTEN1, /*!< Interrupt channel 1 */
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ADC_ADINTEN2, /*!< Interrupt channel 2 */
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ADC_ADINTEN3, /*!< Interrupt channel 3 */
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ADC_ADINTEN4, /*!< Interrupt channel 4 */
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ADC_ADINTEN5, /*!< Interrupt channel 5 */
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ADC_ADINTEN6, /*!< Interrupt channel 6 */
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ADC_ADINTEN7, /*!< Interrupt channel 7 */
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ADC_ADGINTEN /*!< Individual channel/global flag done generate an interrupt */
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}ADC_TYPE_INT_OPT;
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/** Macro to determine if it is valid interrupt type */
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#define PARAM_ADC_TYPE_INT_OPT(OPT) ((OPT == ADC_ADINTEN0)||(OPT == ADC_ADINTEN1)\
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||(OPT == ADC_ADINTEN2)||(OPT == ADC_ADINTEN3)\
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||(OPT == ADC_ADINTEN4)||(OPT == ADC_ADINTEN5)\
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||(OPT == ADC_ADINTEN6)||(OPT == ADC_ADINTEN7)\
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||(OPT == ADC_ADGINTEN))
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/** @brief ADC Data status */
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typedef enum
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{
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ADC_DATA_BURST = 0, /*Burst bit*/
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ADC_DATA_DONE /*Done bit*/
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}ADC_DATA_STATUS;
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#define PARAM_ADC_START_ON_EDGE_OPT(OPT) ((OPT == ADC_START_ON_RISING)||(OPT == ADC_START_ON_FALLING))
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#define PARAM_ADC_DATA_STATUS(OPT) ((OPT== ADC_DATA_BURST)||(OPT== ADC_DATA_DONE))
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#define PARAM_ADC_FREQUENCY(FRE) (FRE <= 13000000 )
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#define PARAM_ADC_CHANNEL_SELECTION(SEL) ((SEL == ADC_CHANNEL_0)||(ADC_CHANNEL_1)\
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||(SEL == ADC_CHANNEL_2)|(ADC_CHANNEL_3)\
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||(SEL == ADC_CHANNEL_4)||(ADC_CHANNEL_5)\
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||(SEL == ADC_CHANNEL_6)||(ADC_CHANNEL_7))
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#define PARAM_ADC_START_OPT(OPT) ((OPT == ADC_START_CONTINUOUS)||(OPT == ADC_START_NOW)\
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||(OPT == ADC_START_ON_EINT0)||(OPT == ADC_START_ON_CAP01)\
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||(OPT == ADC_START_ON_MAT01)||(OPT == ADC_START_ON_MAT03)\
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||(OPT == ADC_START_ON_MAT10)||(OPT == ADC_START_ON_MAT11))
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#define PARAM_ADC_TYPE_INT_OPT(OPT) ((OPT == ADC_ADINTEN0)||(OPT == ADC_ADINTEN1)\
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||(OPT == ADC_ADINTEN2)||(OPT == ADC_ADINTEN3)\
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||(OPT == ADC_ADINTEN4)||(OPT == ADC_ADINTEN5)\
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||(OPT == ADC_ADINTEN6)||(OPT == ADC_ADINTEN7)\
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||(OPT == ADC_ADGINTEN))
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#define PARAM_ADCx(n) (((uint32_t *)n)==((uint32_t *)LPC_ADC))
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/**
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* @}
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*/
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/* Public Functions ----------------------------------------------------------- */
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/** @defgroup ADC_Public_Functions
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* @{
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*/
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void ADC_Init(LPC_ADC_TypeDef *ADCx, uint32_t ConvFreq);
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void ADC_DeInit(LPC_ADC_TypeDef *ADCx);
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void ADC_BurstCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState);
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void ADC_PowerdownCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState);
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void ADC_StartCmd(LPC_ADC_TypeDef *ADCx, uint8_t start_mode);
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void ADC_EdgeStartConfig(LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption);
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void ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState);
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void ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState);
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uint16_t ADC_ChannelGetData(LPC_ADC_TypeDef *ADCx, uint8_t channel);
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FlagStatus ADC_ChannelGetStatus(LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType);
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uint16_t ADC_GlobalGetData(LPC_ADC_TypeDef *ADCx, uint8_t channel);
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FlagStatus ADC_GlobalGetStatus(LPC_ADC_TypeDef *ADCx, uint32_t StatusType);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* LPC17XX_ADC_H_ */
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/**
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* @}
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*/
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/* --------------------------------- End Of File ------------------------------ */
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