|
|
#include <stdio.h>
|
|
|
//#include <bsp.h>
|
|
|
#include <stm32f4xx_rcc.h>
|
|
|
#include <stm32f4xx_tim.h>
|
|
|
#include <stm32f4xx_dac.h>
|
|
|
#include <stm32f4xx_gpio.h>
|
|
|
#include <stm32f4xx_dma.h>
|
|
|
#include <stm32f4xx.h>
|
|
|
#include <gpio.h>
|
|
|
#include <stm32f4xx.h>
|
|
|
|
|
|
|
|
|
#define DAC_DHR12R2_ADDRESS 0x40007414
|
|
|
#define DAC_DHR8R1_ADDRESS 0x40007410
|
|
|
|
|
|
#define DAC1_12bit_right_align 0x40007408
|
|
|
#define DAC1_12bit_left_align 0x4000740C
|
|
|
#define DAC1_8bit_right_align 0x40007410
|
|
|
#define DAC2_12bit_right_align 0x40007414
|
|
|
#define DAC2_12bit_left_align 0x40007418
|
|
|
#define DAC2_8bit_right_align 0x4000741C
|
|
|
#define DAC_Dual_12bit_right_align 0x40007420
|
|
|
#define DAC_Dual_12bit_left_align 0x40007424
|
|
|
#define DAC_Dual_8bit_right_align 0x40007428
|
|
|
#define DAC_Dual_8bit_left_align 0x4000742C
|
|
|
|
|
|
|
|
|
|
|
|
const TIM_TypeDef* _timer_dev_table[14]={TIM1,TIM2,TIM3,TIM4,TIM5,TIM6,TIM7,
|
|
|
TIM8,TIM9,TIM10,TIM11,TIM12,TIM13,TIM14};
|
|
|
#define DAC1 0
|
|
|
#define DAC2 1
|
|
|
|
|
|
#define timer2 1
|
|
|
#define timer3 2
|
|
|
#define timer4 3
|
|
|
#define timer5 4
|
|
|
#define timer6 5
|
|
|
#define timer7 6
|
|
|
#define timer8 7
|
|
|
|
|
|
DAC_InitTypeDef DAC_InitStructure;
|
|
|
|
|
|
int dacopen(uint32_t pin)
|
|
|
{
|
|
|
#define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA))
|
|
|
#define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8)
|
|
|
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1 , ENABLE);
|
|
|
RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE);
|
|
|
gpio_t DACOUT;
|
|
|
DACOUT = gpioopen(pin);
|
|
|
DACOUT |= gpioan | gpionopulltype;
|
|
|
gpiosetconfig(&DACOUT);
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
int dacsetconfig(int timer, int buffer_size, int dac,uint32_t dac_type, uint32_t freq,uint32_t data)
|
|
|
{
|
|
|
TIM_TypeDef* tim = _timer_dev_table[timer];
|
|
|
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
|
|
|
if(timer>=timer2 && timer <= timer7)RCC_APB1PeriphClockCmd((1<<(timer-1)), ENABLE);
|
|
|
if(timer==timer8)RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM8, ENABLE);
|
|
|
uint32_t timfreq = (81300)*buffer_size/(freq);
|
|
|
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
|
|
|
TIM_TimeBaseStructure.TIM_Period = timfreq;
|
|
|
TIM_TimeBaseStructure.TIM_Prescaler = 0;
|
|
|
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
|
|
|
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
|
|
|
TIM_TimeBaseInit(tim, &TIM_TimeBaseStructure);
|
|
|
TIM_SelectOutputTrigger(tim, TIM_TRGOSource_Update);
|
|
|
TIM_Cmd(tim, ENABLE);
|
|
|
|
|
|
DMA_InitTypeDef DMA_InitStructure;
|
|
|
if (timer == timer2)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T2_TRGO;
|
|
|
if (timer == timer4)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T4_TRGO;
|
|
|
if (timer == timer5)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T5_TRGO;
|
|
|
if (timer == timer6)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T6_TRGO;
|
|
|
if (timer == timer7)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T7_TRGO;
|
|
|
if (timer == timer8)DAC_InitStructure.DAC_Trigger = DAC_Trigger_T8_TRGO;
|
|
|
DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
|
|
|
DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
|
|
|
if (dac == DAC1){
|
|
|
DAC_Init(DAC_Channel_1, &DAC_InitStructure);
|
|
|
DMA_DeInit(DMA1_Stream5);
|
|
|
}
|
|
|
|
|
|
if (dac == DAC2){
|
|
|
DAC_Init(DAC_Channel_2, &DAC_InitStructure);
|
|
|
DMA_DeInit(DMA1_Stream6);
|
|
|
}
|
|
|
|
|
|
DMA_InitStructure.DMA_Channel = DMA_Channel_7;
|
|
|
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)dac_type;
|
|
|
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)data;
|
|
|
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
|
|
|
DMA_InitStructure.DMA_BufferSize = buffer_size;
|
|
|
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
|
|
|
DMA_InitStructure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
|
|
|
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
|
|
|
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
|
|
|
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
|
|
|
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
|
|
|
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
|
|
|
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
|
|
|
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
|
|
|
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
|
|
|
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
|
|
|
|
|
|
if (dac == DAC1){
|
|
|
DMA_Init(DMA1_Stream5, &DMA_InitStructure);
|
|
|
DMA_Cmd(DMA1_Stream5, ENABLE);
|
|
|
DAC_DMACmd(DAC_Channel_1, ENABLE);
|
|
|
DAC_Cmd(DAC_Channel_1, ENABLE);
|
|
|
|
|
|
}
|
|
|
if (dac == DAC2){
|
|
|
DMA_Init(DMA1_Stream6, &DMA_InitStructure);
|
|
|
DMA_Cmd(DMA1_Stream6, ENABLE);
|
|
|
DAC_DMACmd(DAC_Channel_2, ENABLE);
|
|
|
DAC_Cmd(DAC_Channel_2, ENABLE);
|
|
|
|
|
|
}
|
|
|
return 0;
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
