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/**
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******************************************************************************
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* @file stm32f4_discovery_lis302dl.h
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* @author MCD Application Team
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* @version V1.0.0
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* @date 19-September-2011
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* @brief This file contains all the functions prototypes for the stm32f4_discovery_lis302dl.c
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* firmware driver.
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******************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F4_DISCOVERY_LIS302DL_H
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#define __STM32F4_DISCOVERY_LIS302DL_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx.h"
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/** @addtogroup Utilities
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* @{
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*/
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/** @addtogroup STM32F4_DISCOVERY
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* @{
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*/
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/** @addtogroup STM32F4_DISCOVERY_LIS302DL
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* @{
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*/
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/** @defgroup STM32F4_DISCOVERY_LIS302DL_Exported_Types
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* @{
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*/
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/* LIS302DL struct */
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typedef struct
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{
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uint8_t Power_Mode; /* Power-down/Active Mode */
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uint8_t Output_DataRate; /* OUT data rate 100 Hz / 400 Hz */
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uint8_t Axes_Enable; /* Axes enable */
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uint8_t Full_Scale; /* Full scale */
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uint8_t Self_Test; /* Self test */
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}LIS302DL_InitTypeDef;
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/* LIS302DL High Pass Filter struct */
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typedef struct
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{
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uint8_t HighPassFilter_Data_Selection; /* Internal filter bypassed or data from internal filter send to output register*/
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uint8_t HighPassFilter_CutOff_Frequency; /* High pass filter cut-off frequency */
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uint8_t HighPassFilter_Interrupt; /* High pass filter enabled for Freefall/WakeUp #1 or #2 */
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}LIS302DL_FilterConfigTypeDef;
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/* LIS302DL Interrupt struct */
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typedef struct
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{
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uint8_t Latch_Request; /* Latch interrupt request into CLICK_SRC register*/
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uint8_t SingleClick_Axes; /* Single Click Axes Interrupts */
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uint8_t DoubleClick_Axes; /* Double Click Axes Interrupts */
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}LIS302DL_InterruptConfigTypeDef;
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/**
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* @}
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*/
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/** @defgroup STM32F4_DISCOVERY_LIS302DL_Exported_Constants
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* @{
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*/
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/* Uncomment the following line to use the default LIS302DL_TIMEOUT_UserCallback()
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function implemented in stm32f4_discovery_lis302dl.c file.
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LIS302DL_TIMEOUT_UserCallback() function is called whenever a timeout condition
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occure during communication (waiting transmit data register empty flag(TXE)
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or waiting receive data register is not empty flag (RXNE)). */
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/* #define USE_DEFAULT_TIMEOUT_CALLBACK */
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/* Maximum Timeout values for flags waiting loops. These timeouts are not based
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on accurate values, they just guarantee that the application will not remain
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stuck if the SPI communication is corrupted.
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You may modify these timeout values depending on CPU frequency and application
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conditions (interrupts routines ...). */
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#define LIS302DL_FLAG_TIMEOUT ((uint32_t)0x1000)
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/**
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* @brief LIS302DL SPI Interface pins
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*/
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#define LIS302DL_SPI SPI1
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#define LIS302DL_SPI_CLK RCC_APB2Periph_SPI1
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#define LIS302DL_SPI_SCK_PIN GPIO_Pin_5 /* PA.05 */
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#define LIS302DL_SPI_SCK_GPIO_PORT GPIOA /* GPIOA */
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#define LIS302DL_SPI_SCK_GPIO_CLK RCC_AHB1Periph_GPIOA
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#define LIS302DL_SPI_SCK_SOURCE GPIO_PinSource5
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#define LIS302DL_SPI_SCK_AF GPIO_AF_SPI1
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#define LIS302DL_SPI_MISO_PIN GPIO_Pin_6 /* PA.6 */
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#define LIS302DL_SPI_MISO_GPIO_PORT GPIOA /* GPIOA */
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#define LIS302DL_SPI_MISO_GPIO_CLK RCC_AHB1Periph_GPIOA
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#define LIS302DL_SPI_MISO_SOURCE GPIO_PinSource6
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#define LIS302DL_SPI_MISO_AF GPIO_AF_SPI1
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#define LIS302DL_SPI_MOSI_PIN GPIO_Pin_7 /* PA.7 */
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#define LIS302DL_SPI_MOSI_GPIO_PORT GPIOA /* GPIOA */
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#define LIS302DL_SPI_MOSI_GPIO_CLK RCC_AHB1Periph_GPIOA
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#define LIS302DL_SPI_MOSI_SOURCE GPIO_PinSource7
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#define LIS302DL_SPI_MOSI_AF GPIO_AF_SPI1
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#define LIS302DL_SPI_CS_PIN GPIO_Pin_3 /* PE.03 */
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#define LIS302DL_SPI_CS_GPIO_PORT GPIOE /* GPIOE */
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#define LIS302DL_SPI_CS_GPIO_CLK RCC_AHB1Periph_GPIOE
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#define LIS302DL_SPI_INT1_PIN GPIO_Pin_0 /* PE.00 */
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#define LIS302DL_SPI_INT1_GPIO_PORT GPIOE /* GPIOE */
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#define LIS302DL_SPI_INT1_GPIO_CLK RCC_AHB1Periph_GPIOE
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#define LIS302DL_SPI_INT1_EXTI_LINE EXTI_Line0
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#define LIS302DL_SPI_INT1_EXTI_PORT_SOURCE EXTI_PortSourceGPIOE
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#define LIS302DL_SPI_INT1_EXTI_PIN_SOURCE EXTI_PinSource0
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#define LIS302DL_SPI_INT1_EXTI_IRQn EXTI0_IRQn
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#define LIS302DL_SPI_INT2_PIN GPIO_Pin_1 /* PE.01 */
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#define LIS302DL_SPI_INT2_GPIO_PORT GPIOE /* GPIOE */
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#define LIS302DL_SPI_INT2_GPIO_CLK RCC_AHB1Periph_GPIOE
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#define LIS302DL_SPI_INT2_EXTI_LINE EXTI_Line1
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#define LIS302DL_SPI_INT2_EXTI_PORT_SOURCE EXTI_PortSourceGPIOE
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#define LIS302DL_SPI_INT2_EXTI_PIN_SOURCE EXTI_PinSource1
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#define LIS302DL_SPI_INT2_EXTI_IRQn EXTI1_IRQn
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/******************************************************************************/
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/*************************** START REGISTER MAPPING **************************/
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/******************************************************************************/
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/*******************************************************************************
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* WHO_AM_I Register: Device Identification Register
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* Read only register
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* Default value: 0x3B
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*******************************************************************************/
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#define LIS302DL_WHO_AM_I_ADDR 0x0F
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/*******************************************************************************
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* CTRL_REG1 Register: Control Register 1
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* Read Write register
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* Default value: 0x07
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* 7 DR: Data Rate selection.
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* 0 - 100 Hz output data rate
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* 1 - 400 Hz output data rate
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* 6 PD: Power Down control.
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* 0 - power down mode
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* 1 - active mode
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* 5 FS: Full Scale selection.
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* 0 - Typical measurement range 2.3
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* 1 - Typical measurement range 9.2
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* 4:3 STP-STM Self Test Enable:
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* STP | STM | mode
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* ----------------------------
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* 0 | 0 | Normal mode
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* 0 | 1 | Self Test M
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* 1 | 0 | Self Test P
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* 2 Zen: Z axis enable.
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* 0 - Z axis disabled
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* 1- Z axis enabled
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* 1 Yen: Y axis enable.
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* 0 - Y axis disabled
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* 1- Y axis enabled
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* 0 Xen: X axis enable.
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* 0 - X axis disabled
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* 1- X axis enabled
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********************************************************************************/
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#define LIS302DL_CTRL_REG1_ADDR 0x20
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/*******************************************************************************
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* CTRL_REG2 Regsiter: Control Register 2
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* Read Write register
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* Default value: 0x00
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* 7 SIM: SPI Serial Interface Mode Selection.
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* 0 - 4 wire interface
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* 1 - 3 wire interface
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* 6 BOOT: Reboot memory content
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* 0 - normal mode
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* 1 - reboot memory content
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* 5 Reserved
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* 4 FDS: Filtered data selection.
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* 0 - internal filter bypassed
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* 1 - data from internal filter sent to output register
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* 3 HP FF_WU2: High pass filter enabled for FreeFall/WakeUp#2.
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* 0 - filter bypassed
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* 1 - filter enabled
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* 2 HP FF_WU1: High pass filter enabled for FreeFall/WakeUp#1.
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* 0 - filter bypassed
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* 1 - filter enabled
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* 1:0 HP coeff2-HP coeff1 High pass filter cut-off frequency (ft) configuration.
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* ft= ODR[hz]/6*HP coeff
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* HP coeff2 | HP coeff1 | HP coeff
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* -------------------------------------------
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* 0 | 0 | 8
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* 0 | 1 | 16
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* 1 | 0 | 32
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* 1 | 1 | 64
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* HP coeff | ft[hz] | ft[hz] |
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* |ODR 100Hz | ODR 400Hz |
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* --------------------------------------------
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* 00 | 2 | 8 |
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* 01 | 1 | 4 |
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* 10 | 0.5 | 2 |
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* 11 | 0.25 | 1 |
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*******************************************************************************/
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#define LIS302DL_CTRL_REG2_ADDR 0x21
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/*******************************************************************************
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* CTRL_REG3 Register: Interrupt Control Register
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* Read Write register
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* Default value: 0x00
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* 7 IHL active: Interrupt active high/low.
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* 0 - active high
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* 1 - active low
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* 6 PP_OD: push-pull/open-drain.
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* 0 - push-pull
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* 1 - open-drain
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* 5:3 I2_CFG2 - I2_CFG0 Data signal on INT2 pad control bits
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* 2:0 I1_CFG2 - I1_CFG0 Data signal on INT1 pad control bits
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* I1(2)_CFG2 | I1(2)_CFG1 | I1(2)_CFG0 | INT1(2) Pad
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* ----------------------------------------------------------
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* 0 | 0 | 0 | GND
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* 0 | 0 | 1 | FreeFall/WakeUp#1
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* 0 | 1 | 0 | FreeFall/WakeUp#2
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* 0 | 1 | 1 | FreeFall/WakeUp#1 or FreeFall/WakeUp#2
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* 1 | 0 | 0 | Data ready
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* 1 | 1 | 1 | Click interrupt
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*******************************************************************************/
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#define LIS302DL_CTRL_REG3_ADDR 0x22
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/*******************************************************************************
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* HP_FILTER_RESET Register: Dummy register. Reading at this address zeroes
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* instantaneously the content of the internal high pass filter. If the high pass
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* filter is enabled all three axes are instantaneously set to 0g.
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* This allows to overcome the settling time of the high pass filter.
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* Read only register
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* Default value: Dummy
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*******************************************************************************/
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#define LIS302DL_HP_FILTER_RESET_REG_ADDR 0x23
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/*******************************************************************************
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* STATUS_REG Register: Status Register
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* Default value: 0x00
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* 7 ZYXOR: X, Y and Z axis data overrun.
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* 0: no overrun has occurred
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* 1: new data has overwritten the previous one before it was read
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* 6 ZOR: Z axis data overrun.
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* 0: no overrun has occurred
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* 1: new data for Z-axis has overwritten the previous one before it was read
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* 5 yOR: y axis data overrun.
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* 0: no overrun has occurred
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* 1: new data for y-axis has overwritten the previous one before it was read
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* 4 XOR: X axis data overrun.
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* 0: no overrun has occurred
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* 1: new data for X-axis has overwritten the previous one before it was read
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* 3 ZYXDA: X, Y and Z axis new data available
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* 0: a new set of data is not yet available
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* 1: a new set of data is available
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* 2 ZDA: Z axis new data available.
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* 0: a new set of data is not yet available
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* 1: a new data for Z axis is available
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* 1 YDA: Y axis new data available
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* 0: a new set of data is not yet available
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* 1: a new data for Y axis is available
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* 0 XDA: X axis new data available
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* 0: a new set of data is not yet available
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* 1: a new data for X axis is available
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*******************************************************************************/
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#define LIS302DL_STATUS_REG_ADDR 0x27
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/*******************************************************************************
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* OUT_X Register: X-axis output Data
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* Read only register
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* Default value: output
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* 7:0 XD7-XD0: X-axis output Data
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*******************************************************************************/
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#define LIS302DL_OUT_X_ADDR 0x29
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/*******************************************************************************
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* OUT_Y Register: Y-axis output Data
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* Read only register
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* Default value: output
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* 7:0 YD7-YD0: Y-axis output Data
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*******************************************************************************/
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#define LIS302DL_OUT_Y_ADDR 0x2B
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/*******************************************************************************
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* OUT_Z Register: Z-axis output Data
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* Read only register
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* Default value: output
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* 7:0 ZD7-ZD0: Z-axis output Data
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*******************************************************************************/
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#define LIS302DL_OUT_Z_ADDR 0x2D
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/*******************************************************************************
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* FF_WW_CFG_1 Register: Configuration register for Interrupt 1 source.
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* Read write register
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* Default value: 0x00
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* 7 AOI: AND/OR combination of Interrupt events.
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* 0: OR combination of interrupt events
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* 1: AND combination of interrupt events
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* 6 LIR: Latch/not latch interrupt request
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* 0: interrupt request not latched
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* 1: interrupt request latched
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* 5 ZHIE: Enable interrupt generation on Z high event.
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* 0: disable interrupt request
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* 1: enable interrupt request on measured accel. value higher than preset threshold
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* 4 ZLIE: Enable interrupt generation on Z low event.
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* 0: disable interrupt request
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* 1: enable interrupt request on measured accel. value lower than preset threshold
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* 3 YHIE: Enable interrupt generation on Y high event.
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* 0: disable interrupt request
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* 1: enable interrupt request on measured accel. value higher than preset threshold
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* 2 YLIE: Enable interrupt generation on Y low event.
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* 0: disable interrupt request
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* 1: enable interrupt request on measured accel. value lower than preset threshold
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* 1 XHIE: Enable interrupt generation on X high event.
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* 0: disable interrupt request
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* 1: enable interrupt request on measured accel. value higher than preset threshold
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* 0 XLIE: Enable interrupt generation on X low event.
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* 0: disable interrupt request
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* 1: enable interrupt request on measured accel. value lower than preset threshold
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*******************************************************************************/
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#define LIS302DL_FF_WU_CFG1_REG_ADDR 0x30
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/*******************************************************************************
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* FF_WU_SRC_1 Register: Interrupt 1 source register.
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* Reading at this address clears FF_WU_SRC_1 register and the FF, WU 1 interrupt
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* and allow the refreshment of data in the FF_WU_SRC_1 register if the latched option
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* was chosen.
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* Read only register
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* Default value: 0x00
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* 7 Reserved
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* 6 IA: Interrupt active.
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* 0: no interrupt has been generated
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* 1: one or more interrupts have been generated
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* 5 ZH: Z high.
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* 0: no interrupt
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* 1: ZH event has occurred
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* 4 ZL: Z low.
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* 0: no interrupt
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* 1: ZL event has occurred
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* 3 YH: Y high.
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* 0: no interrupt
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* 1: YH event has occurred
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* 2 YL: Y low.
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* 0: no interrupt
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* 1: YL event has occurred
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* 1 YH: X high.
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* 0: no interrupt
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* 1: XH event has occurred
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* 0 YL: X low.
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* 0: no interrupt
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* 1: XL event has occurred
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*******************************************************************************/
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#define LIS302DL_FF_WU_SRC1_REG_ADDR 0x31
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/*******************************************************************************
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* FF_WU_THS_1 Register: Threshold register
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* Read Write register
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* Default value: 0x00
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* 7 DCRM: Reset mode selection.
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* 0 - counter resetted
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* 1 - counter decremented
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* 6 THS6-THS0: Free-fall/wake-up threshold value.
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*******************************************************************************/
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#define LIS302DL_FF_WU_THS1_REG_ADDR 0x32
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/*******************************************************************************
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* FF_WU_DURATION_1 Register: duration Register
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* Read Write register
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* Default value: 0x00
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* 7:0 D7-D0 Duration value. (Duration steps and maximum values depend on the ODR chosen)
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******************************************************************************/
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#define LIS302DL_FF_WU_DURATION1_REG_ADDR 0x33
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/*******************************************************************************
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* FF_WW_CFG_2 Register: Configuration register for Interrupt 2 source.
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* Read write register
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* Default value: 0x00
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* 7 AOI: AND/OR combination of Interrupt events.
|
|
|
* 0: OR combination of interrupt events
|
|
|
* 1: AND combination of interrupt events
|
|
|
* 6 LIR: Latch/not latch interrupt request
|
|
|
* 0: interrupt request not latched
|
|
|
* 1: interrupt request latched
|
|
|
* 5 ZHIE: Enable interrupt generation on Z high event.
|
|
|
* 0: disable interrupt request
|
|
|
* 1: enable interrupt request on measured accel. value higher than preset threshold
|
|
|
* 4 ZLIE: Enable interrupt generation on Z low event.
|
|
|
* 0: disable interrupt request
|
|
|
* 1: enable interrupt request on measured accel. value lower than preset threshold
|
|
|
* 3 YHIE: Enable interrupt generation on Y high event.
|
|
|
* 0: disable interrupt request
|
|
|
* 1: enable interrupt request on measured accel. value higher than preset threshold
|
|
|
* 2 YLIE: Enable interrupt generation on Y low event.
|
|
|
* 0: disable interrupt request
|
|
|
* 1: enable interrupt request on measured accel. value lower than preset threshold
|
|
|
* 1 XHIE: Enable interrupt generation on X high event.
|
|
|
* 0: disable interrupt request
|
|
|
* 1: enable interrupt request on measured accel. value higher than preset threshold
|
|
|
* 0 XLIE: Enable interrupt generation on X low event.
|
|
|
* 0: disable interrupt request
|
|
|
* 1: enable interrupt request on measured accel. value lower than preset threshold
|
|
|
*******************************************************************************/
|
|
|
#define LIS302DL_FF_WU_CFG2_REG_ADDR 0x34
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* FF_WU_SRC_2 Register: Interrupt 2 source register.
|
|
|
* Reading at this address clears FF_WU_SRC_2 register and the FF, WU 2 interrupt
|
|
|
* and allow the refreshment of data in the FF_WU_SRC_2 register if the latched option
|
|
|
* was chosen.
|
|
|
* Read only register
|
|
|
* Default value: 0x00
|
|
|
* 7 Reserved
|
|
|
* 6 IA: Interrupt active.
|
|
|
* 0: no interrupt has been generated
|
|
|
* 1: one or more interrupts have been generated
|
|
|
* 5 ZH: Z high.
|
|
|
* 0: no interrupt
|
|
|
* 1: ZH event has occurred
|
|
|
* 4 ZL: Z low.
|
|
|
* 0: no interrupt
|
|
|
* 1: ZL event has occurred
|
|
|
* 3 YH: Y high.
|
|
|
* 0: no interrupt
|
|
|
* 1: YH event has occurred
|
|
|
* 2 YL: Y low.
|
|
|
* 0: no interrupt
|
|
|
* 1: YL event has occurred
|
|
|
* 1 YH: X high.
|
|
|
* 0: no interrupt
|
|
|
* 1: XH event has occurred
|
|
|
* 0 YL: X low.
|
|
|
* 0: no interrupt
|
|
|
* 1: XL event has occurred
|
|
|
*******************************************************************************/
|
|
|
#define LIS302DL_FF_WU_SRC2_REG_ADDR 0x35
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* FF_WU_THS_2 Register: Threshold register
|
|
|
* Read Write register
|
|
|
* Default value: 0x00
|
|
|
* 7 DCRM: Reset mode selection.
|
|
|
* 0 - counter resetted
|
|
|
* 1 - counter decremented
|
|
|
* 6 THS6-THS0: Free-fall/wake-up threshold value.
|
|
|
*******************************************************************************/
|
|
|
#define LIS302DL_FF_WU_THS2_REG_ADDR 0x36
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* FF_WU_DURATION_2 Register: duration Register
|
|
|
* Read Write register
|
|
|
* Default value: 0x00
|
|
|
* 7:0 D7-D0 Duration value. (Duration steps and maximum values depend on the ODR chosen)
|
|
|
******************************************************************************/
|
|
|
#define LIS302DL_FF_WU_DURATION2_REG_ADDR 0x37
|
|
|
|
|
|
/******************************************************************************
|
|
|
* CLICK_CFG Register: click Register
|
|
|
* Read Write register
|
|
|
* Default value: 0x00
|
|
|
* 7 Reserved
|
|
|
* 6 LIR: Latch Interrupt request.
|
|
|
* 0: interrupt request not latched
|
|
|
* 1: interrupt request latched
|
|
|
* 5 Double_Z: Enable interrupt generation on double click event on Z axis.
|
|
|
* 0: disable interrupt request
|
|
|
* 1: enable interrupt request
|
|
|
* 4 Single_Z: Enable interrupt generation on single click event on Z axis.
|
|
|
* 0: disable interrupt request
|
|
|
* 1: enable interrupt request
|
|
|
* 3 Double_Y: Enable interrupt generation on double click event on Y axis.
|
|
|
* 0: disable interrupt request
|
|
|
* 1: enable interrupt request
|
|
|
* 2 Single_Y: Enable interrupt generation on single click event on Y axis.
|
|
|
* 0: disable interrupt request
|
|
|
* 1: enable interrupt request
|
|
|
* 1 Double_X: Enable interrupt generation on double click event on X axis.
|
|
|
* 0: disable interrupt request
|
|
|
* 1: enable interrupt request
|
|
|
* 0 Single_y: Enable interrupt generation on single click event on X axis.
|
|
|
* 0: disable interrupt request
|
|
|
* 1: enable interrupt request
|
|
|
******************************************************************************/
|
|
|
#define LIS302DL_CLICK_CFG_REG_ADDR 0x38
|
|
|
|
|
|
/******************************************************************************
|
|
|
* CLICK_SRC Register: click status Register
|
|
|
* Read only register
|
|
|
* Default value: 0x00
|
|
|
* 7 Reserved
|
|
|
* 6 IA: Interrupt active.
|
|
|
* 0: no interrupt has been generated
|
|
|
* 1: one or more interrupts have been generated
|
|
|
* 5 Double_Z: Double click on Z axis event.
|
|
|
* 0: no interrupt
|
|
|
* 1: Double Z event has occurred
|
|
|
* 4 Single_Z: Z low.
|
|
|
* 0: no interrupt
|
|
|
* 1: Single Z event has occurred
|
|
|
* 3 Double_Y: Y high.
|
|
|
* 0: no interrupt
|
|
|
* 1: Double Y event has occurred
|
|
|
* 2 Single_Y: Y low.
|
|
|
* 0: no interrupt
|
|
|
* 1: Single Y event has occurred
|
|
|
* 1 Double_X: X high.
|
|
|
* 0: no interrupt
|
|
|
* 1: Double X event has occurred
|
|
|
* 0 Single_X: X low.
|
|
|
* 0: no interrupt
|
|
|
* 1: Single X event has occurred
|
|
|
*******************************************************************************/
|
|
|
#define LIS302DL_CLICK_SRC_REG_ADDR 0x39
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* CLICK_THSY_X Register: Click threshold Y and X register
|
|
|
* Read Write register
|
|
|
* Default value: 0x00
|
|
|
* 7:4 THSy3-THSy0: Click threshold on Y axis, step 0.5g
|
|
|
* 3:0 THSx3-THSx0: Click threshold on X axis, step 0.5g
|
|
|
*******************************************************************************/
|
|
|
#define LIS302DL_CLICK_THSY_X_REG_ADDR 0x3B
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* CLICK_THSZ Register: Click threshold Z register
|
|
|
* Read Write register
|
|
|
* Default value: 0x00
|
|
|
* 7:4 Reserved
|
|
|
* 3:0 THSz3-THSz0: Click threshold on Z axis, step 0.5g
|
|
|
*******************************************************************************/
|
|
|
#define LIS302DL_CLICK_THSZ_REG_ADDR 0x3C
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* CLICK_TimeLimit Register: Time Limit register
|
|
|
* Read Write register
|
|
|
* Default value: 0x00
|
|
|
* 7:0 Dur7-Dur0: Time Limit value, step 0.5g
|
|
|
*******************************************************************************/
|
|
|
#define LIS302DL_CLICK_TIMELIMIT_REG_ADDR 0x3D
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* CLICK_Latency Register: Latency register
|
|
|
* Read Write register
|
|
|
* Default value: 0x00
|
|
|
* 7:0 Lat7-Lat0: Latency value, step 1msec
|
|
|
*******************************************************************************/
|
|
|
#define LIS302DL_CLICK_LATENCY_REG_ADDR 0x3E
|
|
|
|
|
|
/*******************************************************************************
|
|
|
* CLICK_Window Register: Window register
|
|
|
* Read Write register
|
|
|
* Default value: 0x00
|
|
|
* 7:0 Win7-Win0: Window value, step 1msec
|
|
|
*******************************************************************************/
|
|
|
#define LIS302DL_CLICK_WINDOW_REG_ADDR 0x3F
|
|
|
|
|
|
/******************************************************************************/
|
|
|
/**************************** END REGISTER MAPPING ***************************/
|
|
|
/******************************************************************************/
|
|
|
|
|
|
#define LIS302DL_SENSITIVITY_2_3G 18 /* 18 mg/digit*/
|
|
|
#define LIS302DL_SENSITIVITY_9_2G 72 /* 72 mg/digit*/
|
|
|
|
|
|
/** @defgroup Data_Rate_selection
|
|
|
* @{
|
|
|
*/
|
|
|
#define LIS302DL_DATARATE_100 ((uint8_t)0x00)
|
|
|
#define LIS302DL_DATARATE_400 ((uint8_t)0x80)
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/** @defgroup Power_Mode_selection
|
|
|
* @{
|
|
|
*/
|
|
|
#define LIS302DL_LOWPOWERMODE_POWERDOWN ((uint8_t)0x00)
|
|
|
#define LIS302DL_LOWPOWERMODE_ACTIVE ((uint8_t)0x40)
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/** @defgroup Full_Scale_selection
|
|
|
* @{
|
|
|
*/
|
|
|
#define LIS302DL_FULLSCALE_2_3 ((uint8_t)0x00)
|
|
|
#define LIS302DL_FULLSCALE_9_2 ((uint8_t)0x20)
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/** @defgroup Self_Test_selection
|
|
|
* @{
|
|
|
*/
|
|
|
#define LIS302DL_SELFTEST_NORMAL ((uint8_t)0x00)
|
|
|
#define LIS302DL_SELFTEST_P ((uint8_t)0x10)
|
|
|
#define LIS302DL_SELFTEST_M ((uint8_t)0x08)
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/** @defgroup Direction_XYZ_selection
|
|
|
* @{
|
|
|
*/
|
|
|
#define LIS302DL_X_ENABLE ((uint8_t)0x01)
|
|
|
#define LIS302DL_Y_ENABLE ((uint8_t)0x02)
|
|
|
#define LIS302DL_Z_ENABLE ((uint8_t)0x04)
|
|
|
#define LIS302DL_XYZ_ENABLE ((uint8_t)0x07)
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/** @defgroup SPI_Serial_Interface_Mode_selection
|
|
|
* @{
|
|
|
*/
|
|
|
#define LIS302DL_SERIALINTERFACE_4WIRE ((uint8_t)0x00)
|
|
|
#define LIS302DL_SERIALINTERFACE_3WIRE ((uint8_t)0x80)
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/** @defgroup Boot_Mode_selection
|
|
|
* @{
|
|
|
*/
|
|
|
#define LIS302DL_BOOT_NORMALMODE ((uint8_t)0x00)
|
|
|
#define LIS302DL_BOOT_REBOOTMEMORY ((uint8_t)0x40)
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/** @defgroup Filtered_Data_Selection_Mode_selection
|
|
|
* @{
|
|
|
*/
|
|
|
#define LIS302DL_FILTEREDDATASELECTION_BYPASSED ((uint8_t)0x00)
|
|
|
#define LIS302DL_FILTEREDDATASELECTION_OUTPUTREGISTER ((uint8_t)0x20)
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/** @defgroup High_Pass_Filter_Interrupt_selection
|
|
|
* @{
|
|
|
*/
|
|
|
#define LIS302DL_HIGHPASSFILTERINTERRUPT_OFF ((uint8_t)0x00)
|
|
|
#define LIS302DL_HIGHPASSFILTERINTERRUPT_1 ((uint8_t)0x04)
|
|
|
#define LIS302DL_HIGHPASSFILTERINTERRUPT_2 ((uint8_t)0x08)
|
|
|
#define LIS302DL_HIGHPASSFILTERINTERRUPT_1_2 ((uint8_t)0x0C)
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/** @defgroup High_Pass_Filter_selection
|
|
|
* @{
|
|
|
*/
|
|
|
#define LIS302DL_HIGHPASSFILTER_LEVEL_0 ((uint8_t)0x00)
|
|
|
#define LIS302DL_HIGHPASSFILTER_LEVEL_1 ((uint8_t)0x01)
|
|
|
#define LIS302DL_HIGHPASSFILTER_LEVEL_2 ((uint8_t)0x02)
|
|
|
#define LIS302DL_HIGHPASSFILTER_LEVEL_3 ((uint8_t)0x03)
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
|
|
|
/** @defgroup latch_Interrupt_Request_selection
|
|
|
* @{
|
|
|
*/
|
|
|
#define LIS302DL_INTERRUPTREQUEST_NOTLATCHED ((uint8_t)0x00)
|
|
|
#define LIS302DL_INTERRUPTREQUEST_LATCHED ((uint8_t)0x40)
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/** @defgroup Click_Interrupt_XYZ_selection
|
|
|
* @{
|
|
|
*/
|
|
|
#define LIS302DL_CLICKINTERRUPT_XYZ_DISABLE ((uint8_t)0x00)
|
|
|
#define LIS302DL_CLICKINTERRUPT_X_ENABLE ((uint8_t)0x01)
|
|
|
#define LIS302DL_CLICKINTERRUPT_Y_ENABLE ((uint8_t)0x04)
|
|
|
#define LIS302DL_CLICKINTERRUPT_Z_ENABLE ((uint8_t)0x10)
|
|
|
#define LIS302DL_CLICKINTERRUPT_XYZ_ENABLE ((uint8_t)0x15)
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/** @defgroup Double_Click_Interrupt_XYZ_selection
|
|
|
* @{
|
|
|
*/
|
|
|
#define LIS302DL_DOUBLECLICKINTERRUPT_XYZ_DISABLE ((uint8_t)0x00)
|
|
|
#define LIS302DL_DOUBLECLICKINTERRUPT_X_ENABLE ((uint8_t)0x02)
|
|
|
#define LIS302DL_DOUBLECLICKINTERRUPT_Y_ENABLE ((uint8_t)0x08)
|
|
|
#define LIS302DL_DOUBLECLICKINTERRUPT_Z_ENABLE ((uint8_t)0x20)
|
|
|
#define LIS302DL_DOUBLECLICKINTERRUPT_XYZ_ENABLE ((uint8_t)0x2A)
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/** @defgroup STM32F4_DISCOVERY_LIS302DL_Exported_Macros
|
|
|
* @{
|
|
|
*/
|
|
|
#define LIS302DL_CS_LOW() GPIO_ResetBits(LIS302DL_SPI_CS_GPIO_PORT, LIS302DL_SPI_CS_PIN)
|
|
|
#define LIS302DL_CS_HIGH() GPIO_SetBits(LIS302DL_SPI_CS_GPIO_PORT, LIS302DL_SPI_CS_PIN)
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/** @defgroup STM32F4_DISCOVERY_LIS302DL_Exported_Functions
|
|
|
* @{
|
|
|
*/
|
|
|
void LIS302DL_Init(LIS302DL_InitTypeDef *LIS302DL_InitStruct);
|
|
|
void LIS302DL_InterruptConfig(LIS302DL_InterruptConfigTypeDef *LIS302DL_InterruptConfigStruct);
|
|
|
void LIS302DL_FilterConfig(LIS302DL_FilterConfigTypeDef *LIS302DL_FilterConfigStruct);
|
|
|
void LIS302DL_LowpowerCmd(uint8_t LowPowerMode);
|
|
|
void LIS302DL_FullScaleCmd(uint8_t FS_value);
|
|
|
void LIS302DL_DataRateCmd(uint8_t DataRateValue);
|
|
|
void LIS302DL_RebootCmd(void);
|
|
|
void LIS302DL_ReadACC(int32_t* out);
|
|
|
void LIS302DL_Write(uint8_t* pBuffer, uint8_t WriteAddr, uint16_t NumByteToWrite);
|
|
|
void LIS302DL_Read(uint8_t* pBuffer, uint8_t ReadAddr, uint16_t NumByteToRead);
|
|
|
|
|
|
/* USER Callbacks: This is function for which prototype only is declared in
|
|
|
MEMS accelerometre driver and that should be implemented into user applicaiton. */
|
|
|
/* LIS302DL_TIMEOUT_UserCallback() function is called whenever a timeout condition
|
|
|
occure during communication (waiting transmit data register empty flag(TXE)
|
|
|
or waiting receive data register is not empty flag (RXNE)).
|
|
|
You can use the default timeout callback implementation by uncommenting the
|
|
|
define USE_DEFAULT_TIMEOUT_CALLBACK in stm32f4_discovery_lis302dl.h file.
|
|
|
Typically the user implementation of this callback should reset MEMS peripheral
|
|
|
and re-initialize communication or in worst case reset all the application. */
|
|
|
uint32_t LIS302DL_TIMEOUT_UserCallback(void);
|
|
|
|
|
|
#ifdef __cplusplus
|
|
|
}
|
|
|
#endif
|
|
|
|
|
|
#endif /* __STM32F4_DISCOVERY_LIS302DL_H */
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
/**
|
|
|
* @}
|
|
|
*/
|
|
|
|
|
|
|
|
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
|
|
|
