##// END OF EJS Templates
Added OpenOCD target for olimex-arm-usb-tiny....
Added OpenOCD target for olimex-arm-usb-tiny. Working D51E5TA7601 driver. Added Framebuffer interface. Added generic memory to memory DMA api, mmainly used by framebuffer API. ADS7843 work in progress. Added SOSmartPSU bsp.

File last commit:

r74:0f2d8fe5497f dev_alexis
r103:3311a844031e dev_alexis
Show More
bsp_lcd.c
266 lines | 7.5 KiB | text/x-c | CLexer
/*------------------------------------------------------------------------------
-- This file is a part of the libuc, microcontroler library
-- Copyright (C) 2013, Alexis Jeandet
--
-- This program is free software; you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation; either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program; if not, write to the Free Software
-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-------------------------------------------------------------------------------
-- Author : Alexis Jeandet
-- Mail : alexis.jeandet@member.fsf.org
-------------------------------------------------------------------------------*/
#include "bsp.h"
#include <streamdevices.h>
#include <malloc.h>
#include <gpio.h>
#include <uart.h>
#include <stdio.h>
#include <stm32f4xx_gpio.h>
#include <stm32f4xx_fsmc.h>
#include <i2c.h>
#include <core.h>
#include <terminal.h>
#define clr_RS gpioclr(LCD_RS)
#define set_RS gpioset(LCD_RS)
#define clr_CS gpioclr(LCD_CS)
#define set_CS gpioset(LCD_CS)
volatile int8_t* lcd0_CMD=(volatile int8_t*)0x60000000;
volatile int16_t* lcd0_CMD16=(volatile int16_t*)0x60000000;
volatile int8_t* lcd0_DATA=(volatile int8_t*)0x61FFFFF0;
volatile int16_t* lcd0_DATA16=(volatile int16_t*)0x61FFFFF0;
/*
D0 PD14 D1 PD15 D2 PD0 D3 PD1 D4 PE7
D5 PE8 D6 PE9 D7 PE10
A20 PE4 = RS FSMC_NE1 PD7 CS FSMC_NWE PD5 W/S
FSMC_NOE PD4 RD
*/
int bsp_FSMC_init()
{
gpio_t LCD_DBxList[]={PD14,PD15,PD0,PD1,PE7,PE8,PE9,PE10\
,PD4,PD5};
// gpio_t LCD_DBxList[]={PD14,PD15,PD0,PD1,PE7,PE8,PE9,PE10\
// ,PD4,PD5,PD7,PE4};
for(int i=0;i<10;i++)
{
gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]);
LCD_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype;
gpiosetconfig(&LCD_DBx);
GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC);
}
FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
FSMC_NORSRAMTimingInitTypeDef p;
/* Enable FSMC clock */
RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);
/*-- FSMC Configuration ------------------------------------------------------*/
/*----------------------- SRAM Bank 3 ----------------------------------------*/
/* FSMC_Bank1_NORSRAM4 configuration */
p.FSMC_AddressSetupTime = 1;//3
p.FSMC_AddressHoldTime = 1;//3
//ili9328 -> data setup time > 10ns
p.FSMC_DataSetupTime = 6;
p.FSMC_CLKDivision = 3;
if(getCpuFreq()>=100*1000*1000)
{
p.FSMC_CLKDivision = 3;
p.FSMC_DataSetupTime = 6;// 11;
}
p.FSMC_BusTurnAroundDuration = 0;
p.FSMC_DataLatency = 3;
//ili9328 -> data hold time > 15ns
if(getCpuFreq()>66*1000*1000)
p.FSMC_DataLatency = 3;
p.FSMC_AccessMode = FSMC_AccessMode_D;
FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;
FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR;
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b;
FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Enable; //Dis
FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
gpioset(LCD_RESET);
gpioclr(LCD_RESET);
delay_100us(500);
gpioset(LCD_RESET);
delay_100us(500);
lcd0.init(&lcd0);
gpioset(LCD_BACKL);
return 1;
}
void bsp_lcd0_write_reg(uint32_t reg,uint32_t data)
{
uint8_t* pt8 = (uint8_t*)(void*)(&reg);
#if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
*lcd0_CMD=pt8[3];
*lcd0_CMD=pt8[2];
pt8 = (uint8_t*)(void*)&data;
*lcd0_DATA=pt8[3];
*lcd0_DATA=pt8[2];
#else
clr_CS;
clr_RS;
*lcd0_CMD=pt8[1];
*lcd0_CMD=pt8[0];
set_RS;
pt8 = (uint8_t*)(void*)&data;
*lcd0_DATA=pt8[1];
*lcd0_DATA=pt8[0];
set_CS;
#endif
}
uint32_t bsp_lcd0_read_reg(uint32_t reg)
{
uint8_t* pt8 = (uint8_t*)(void*)(&reg);
uint32_t DATA=0;
#if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
*lcd0_CMD=pt8[3];
*lcd0_CMD=pt8[2];
pt8 = (uint8_t*)(void*)&DATA;
pt8[3]=*lcd0_DATA;
pt8[2]=*lcd0_DATA;
#else
clr_CS;
clr_RS;
*lcd0_CMD=pt8[1];
*lcd0_CMD=pt8[0];
set_RS;
pt8 = (uint8_t*)(void*)&DATA;
pt8[1]=*lcd0_DATA;
pt8[0]=*lcd0_DATA;
set_CS;
#endif
return DATA;
}
void bsp_lcd0_writeGRAM(void* buffer,uint32_t count)
{
uint32_t reg =ILI9328_REGISTER_WRITEDATATOGRAM;
uint8_t* pt8 = (uint8_t*)(void*)(&reg);
#if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
*lcd0_CMD=pt8[3];
*lcd0_CMD=pt8[2];
pt8 = (uint8_t*)(void*)buffer;
for(int i=0;i<(int)count;i++)
{
*lcd0_DATA=pt8[(2*i) +1];
*lcd0_DATA=pt8[2*i];
}
#else
clr_CS;
clr_RS;
*lcd0_CMD=pt8[1];
*lcd0_CMD=pt8[0];
set_RS;
pt8 = (uint8_t*)(void*)buffer;
for(int i=0;i<(int)count;i++)
{
*lcd0_DATA=pt8[(2*i) +1];
*lcd0_DATA=pt8[2*i];
}
set_CS;
#endif
}
void bsp_lcd0_readGRAM(void* buffer,uint32_t count)
{
//uint32_t reg =ILI9328_REGISTER_WRITEDATATOGRAM;
volatile uint8_t* pt8;// = (uint8_t*)(void*)&reg;
/* #if __BYTE_ORDER__==__ORDER_BIG_ENDIAN__
*lcd0_CMD=pt8[3];
*lcd0_CMD=pt8[2];
pt8 = (uint8_t*)(void*)buffer;
for(int i=0;i<(int)count;i++)
{
pt8[(2*i) +1]=*lcd0_DATA;
pt8[2*i]=*lcd0_DATA;
}
#else
*lcd0_CMD=(uint8_t)0;
*lcd0_CMD=(uint8_t)0;
*lcd0_CMD=(uint8_t)0;
*lcd0_CMD=(uint8_t)0;
*lcd0_CMD=pt8[1];
*lcd0_CMD=pt8[0];
pt8 = (uint8_t*)buffer;*/
/*
* x dummy reads Cf ili9328 datasheet p79!
*/
/* pt8[0]=*lcd0_DATA;
pt8[1]=*lcd0_DATA;
for(int i=0;i<(int)count;i++)
{
pt8[(2*i) +1]=*lcd0_DATA;
pt8[2*i]=*lcd0_DATA;
pt8[(2*i) +1]=*lcd0_DATA;
pt8[2*i]=*lcd0_DATA;
}
#endif*/
//clr_CS;
//clr_RS;
//*lcd0_CMD=(int8_t)0;
//*lcd0_CMD=(int8_t)0x22;
// *lcd0_CMD=(int8_t)0x00;
//set_RS;
pt8 = (uint8_t*)buffer;
//pt8[1]=*lcd0_DATA;
//pt8[0]=*lcd0_DATA;
pt8[0]=0xFF;
pt8[1]=0xFF;
/* for(int i=0;i<(int)count;i++)
{
pt8[(2*i)+1]= *lcd0_DATA;
pt8[2*i]= *lcd0_DATA;
}*/
set_CS;
}