@@ -1,308 +1,312 | |||
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1 | 1 | /*------------------------------------------------------------------------------ |
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2 | 2 | -- This file is a part of the libuc, microcontroler library |
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3 | 3 | -- Copyright (C) 2011, Alexis Jeandet |
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4 | 4 | -- |
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5 | 5 | -- This program is free software; you can redistribute it and/or modify |
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6 | 6 | -- it under the terms of the GNU General Public License as published by |
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7 | 7 | -- the Free Software Foundation; either version 3 of the License, or |
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8 | 8 | -- (at your option) any later version. |
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9 | 9 | -- |
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10 | 10 | -- This program is distributed in the hope that it will be useful, |
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11 | 11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
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12 | 12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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13 | 13 | -- GNU General Public License for more details. |
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14 | 14 | -- |
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15 | 15 | -- You should have received a copy of the GNU General Public License |
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16 | 16 | -- along with this program; if not, write to the Free Software |
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17 | 17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
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18 | 18 | ------------------------------------------------------------------------------- |
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19 | 19 | -- Author : Alexis Jeandet |
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20 | 20 | -- Mail : alexis.jeandet@gmail.com |
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21 | 21 | -------------------------------------------------------------------------------*/ |
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22 | 22 | #include "bsp.h" |
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23 | 23 | #include <streamdevices.h> |
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24 | 24 | #include <malloc.h> |
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25 | 25 | #include <gpio.h> |
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26 | 26 | #include <uart.h> |
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27 | 27 | #include <stdio.h> |
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28 | 28 | #include <stm32f4xx_gpio.h> |
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29 | 29 | #include <stm32f4xx_fsmc.h> |
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30 | 30 | #include <i2c.h> |
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31 | 31 | #include <core.h> |
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32 | 32 | #include <terminal.h> |
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33 | 33 | |
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34 | 34 | uint32_t OSC0 =8000000; |
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35 | 35 | uint32_t INTOSC =16000000; |
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36 | 36 | uint32_t RTCOSC =32768; |
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37 | 37 | uint32_t currentCpuFreq=0; |
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38 | 38 | extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__]; |
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39 | 39 | |
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40 | 40 | LCD_IF_t lcdIF0={ |
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41 | 41 | .init = &bsp_FSMC_init, |
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42 | 42 | .writereg = &bsp_lcd0_write_reg, |
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43 | 43 | .readreg = &bsp_lcd0_read_reg, |
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44 | 44 | .writeGRAM = &bsp_lcd0_writeGRAM, |
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45 | 45 | .readGRAM = &bsp_lcd0_readGRAM |
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46 | 46 | }; |
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47 | 47 | |
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48 | 48 | LCD_t lcd0={ |
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49 | 49 | .interface = &lcdIF0, |
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50 | 50 | .init = &ili9328init, |
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51 | 51 | .paint = &ili9328paint, |
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52 | 52 | .paintText = &ili9328paintText, |
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53 | 53 | .paintFilRect = &ili9328paintFilRect, |
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54 | 54 | .refreshenable = &ili9328refreshenable, |
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55 | 55 | .width= 240, |
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56 | 56 | .height = 320 |
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57 | 57 | }; |
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58 | 58 | |
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59 | 59 | terminal_t terminal0; |
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60 | 60 | |
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61 | 61 | volatile int16_t* lcd0_CMD=(volatile int16_t*) 0x60000000; |
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62 | 62 | volatile int16_t* lcd0_DATA=(volatile int16_t*)(0x61FFFFF0); |
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63 | 63 | |
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64 | 64 | float VREF0 =(float)3.3; |
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65 | 65 | |
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66 | 66 | int bsp_init() |
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67 | 67 | { |
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68 | 68 | int i=0; |
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69 | 69 | for(i=0;i<32;i++) |
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70 | 70 | { |
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71 | 71 | __opnfiles__[i] = NULL; |
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72 | 72 | } |
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73 | 73 | bsp_GPIO_init(); |
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74 | 74 | bsp_uart_init(); |
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75 | 75 | bsp_iic_init(); |
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76 | 76 | bsp_FSMC_init(); |
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77 | 77 | bsp_GTerm_init(); |
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78 | 78 | printf("\r=====================\n\r"); |
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79 | 79 | printf( "=====================\n\r"); |
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80 | 80 | printf(BSP); |
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81 | 81 | printf(" initialised\n\r"); |
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82 | 82 | printf( "=====================\n\r"); |
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83 | 83 | return 1; |
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84 | 84 | } |
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85 | 85 | |
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86 | 86 | void bsp_GPIO_init() |
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87 | 87 | { |
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88 | 88 | gpio_t gpio1 = gpioopen(LED1); |
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89 | 89 | gpio_t gpio2 = gpioopen(LED2); |
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90 | 90 | gpio_t gpio3 = gpioopen(LED3); |
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91 | 91 | gpio_t gpio4 = gpioopen(PSU_DISABLE); |
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92 | 92 | gpio_t gpio5 = gpioopen(PSU_ALERT_5V); |
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93 | 93 | gpio_t gpio6 = gpioopen(PSU_ALERT_1_5V); |
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94 | 94 | gpio_t gpio7 = gpioopen(PSU_ALERT_3_3V); |
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95 | 95 | gpiosetspeed(&gpio1,gpiohighspeed); |
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96 | 96 | gpiosetspeed(&gpio2,gpiohighspeed); |
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97 | 97 | gpiosetspeed(&gpio3,gpiohighspeed); |
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98 | 98 | gpiosetspeed(&gpio4,gpiohighspeed); |
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99 | 99 | gpiosetspeed(&gpio5,gpiohighspeed); |
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100 | 100 | gpiosetspeed(&gpio6,gpiohighspeed); |
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101 | 101 | gpiosetspeed(&gpio7,gpiohighspeed); |
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102 | 102 | gpioclr(PSU_DISABLE); |
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103 | 103 | gpiosetdir(&gpio1,gpiooutdir); |
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104 | 104 | gpiosetdir(&gpio3,gpiooutdir); |
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105 | 105 | gpiosetdir(&gpio2,gpiooutdir); |
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106 | 106 | gpiosetdir(&gpio4,gpiooutdir); |
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107 | 107 | gpiosetdir(&gpio5,gpioindir); |
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108 | 108 | gpiosetdir(&gpio6,gpioindir); |
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109 | 109 | gpiosetdir(&gpio7,gpioindir); |
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110 | 110 | gpioclr(PSU_DISABLE); |
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111 | 111 | } |
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112 | 112 | |
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113 | 113 | void bsp_uart_init() |
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114 | 114 | { |
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115 | 115 | //if(__opnfiles__[1]==NULL) |
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116 | 116 | //{ |
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117 | 117 | //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t)); |
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118 | 118 | // streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice)); |
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119 | 119 | // uart_t uart = uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1); |
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120 | 120 | //uartmkstreamdev(uart,fd1); |
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121 | 121 | //__opnfiles__[1] = fd1; |
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122 | 122 | //} |
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123 | 123 | //else |
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124 | 124 | //{ |
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125 | 125 | uartopenandconfig(0,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1); |
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126 | 126 | //} |
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127 | 127 | } |
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128 | 128 | |
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129 | 129 | |
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130 | 130 | |
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131 | 131 | int bsp_FSMC_init() |
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132 | 132 | { |
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133 | 133 | #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA)) |
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134 | 134 | #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8) |
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135 | 135 | |
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136 | 136 | gpio_t gpio1 = gpioopen(LCD_RESET); |
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137 | 137 | gpiosetspeed(&gpio1,gpiohighspeed); |
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138 | 138 | gpiosetdir(&gpio1,gpiooutdir); |
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139 | 139 | gpioclr(LCD_RESET); |
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140 | 140 | |
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141 | 141 | gpio_t LCD_DBxList[]={PD14,PD15,PD0,PD1,PE7,PE8,PE9,PE10,PE11,PE12,PE13,PE14,PE15\ |
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142 | 142 | ,PD8,PD9,PD10,PD4,PD5,PD7,PE4}; |
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143 | 143 | for(int i=0;i<20;i++) |
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144 | 144 | { |
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145 | 145 | gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]); |
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146 | 146 | LCD_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; |
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147 | 147 | gpiosetconfig(&LCD_DBx); |
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148 | 148 | GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC); |
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149 | 149 | } |
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150 | 150 | |
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151 | 151 | FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; |
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152 | 152 | FSMC_NORSRAMTimingInitTypeDef p; |
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153 | 153 | |
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154 | 154 | /* Enable FSMC clock */ |
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155 | 155 | RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE); |
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156 | 156 | |
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157 | 157 | /*-- FSMC Configuration ------------------------------------------------------*/ |
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158 | 158 | /*----------------------- SRAM Bank 3 ----------------------------------------*/ |
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159 | 159 | /* FSMC_Bank1_NORSRAM4 configuration */ |
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160 | 160 | //p.FSMC_AddressSetupTime = 5; |
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161 | 161 | p.FSMC_AddressSetupTime = 1; |
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162 | 162 | p.FSMC_AddressHoldTime = 0; |
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163 | 163 | //p.FSMC_DataSetupTime = 9; |
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164 | 164 | p.FSMC_DataSetupTime = getCpuFreq()/14545450 ;// 11; |
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165 | 165 | p.FSMC_BusTurnAroundDuration = 0; |
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166 | 166 | p.FSMC_CLKDivision = 0; |
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167 | 167 | p.FSMC_DataLatency = 0; |
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168 | 168 | p.FSMC_AccessMode = FSMC_AccessMode_A; |
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169 | 169 | /* Color LCD configuration ------------------------------------ |
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170 | 170 | LCD configured as follow: |
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171 | 171 | - Data/Address MUX = Disable |
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172 | 172 | - Memory Type = SRAM |
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173 | 173 | - Data Width = 16bit |
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174 | 174 | - Write Operation = Enable |
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175 | 175 | - Extended Mode = Enable |
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176 | 176 | - Asynchronous Wait = Disable */ |
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177 | 177 | |
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178 | 178 | FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1; |
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179 | 179 | FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; |
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180 | 180 | FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; |
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181 | 181 | FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; |
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182 | 182 | FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; |
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183 | 183 | FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; |
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184 | 184 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; |
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185 | 185 | FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; |
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186 | 186 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; |
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187 | 187 | FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; |
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188 | 188 | FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; |
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189 | 189 | FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; |
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190 | 190 | FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; |
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191 | 191 | FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; |
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192 | 192 | FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; |
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193 | 193 | |
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194 | 194 | FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); |
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195 | 195 | |
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196 | 196 | /* Enable FSMC NOR/SRAM Bank1 */ |
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197 | 197 | FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE); |
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198 | 198 | gpioset(LCD_RESET); |
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199 | 199 | lcd0.init(&lcd0); |
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200 | 200 | return 1; |
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201 | 201 | } |
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202 | 202 | |
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203 | 203 | void bsp_spi_init() |
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204 | 204 | { |
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205 | 205 | |
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206 | 206 | } |
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207 | 207 | |
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208 | 208 | |
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209 | 209 | void bsp_iic_init() |
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210 | 210 | { |
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211 |
i2copenandconfig(i2c2,0, |
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211 | i2copenandconfig(i2c2,0,10000,PF0,PF1); | |
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212 | 212 | } |
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213 | 213 | |
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214 | 214 | void bsp_SD_init() |
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215 | 215 | { |
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216 | 216 | |
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217 | 217 | } |
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218 | 218 | |
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219 | 219 | void vs10XXclearXCS(){} |
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220 | 220 | void vs10XXsetXCS(){} |
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221 | 221 | int vs10XXDREQ() |
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222 | 222 | { |
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223 | 223 | return 1; |
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224 | 224 | } |
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225 | 225 | |
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226 | 226 | |
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227 | 227 | void bsppowersdcard(char onoff) //always ON |
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228 | 228 | { |
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229 | 229 | |
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230 | 230 | } |
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231 | 231 | |
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232 | 232 | char bspsdcardpresent() |
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233 | 233 | { |
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234 | 234 | return 0; |
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235 | 235 | } |
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236 | 236 | |
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237 | 237 | char bspsdcardwriteprotected() |
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238 | 238 | { |
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239 | 239 | return 0; |
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240 | 240 | } |
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241 | 241 | |
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242 | 242 | void bspsdcardselect(char YESNO) |
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243 | 243 | { |
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244 | 244 | |
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245 | 245 | } |
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246 | 246 | |
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247 | 247 | |
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248 | 248 | void bsp_lcd0_write_reg(uint32_t reg,uint32_t data) |
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249 | 249 | { |
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250 | 250 | *lcd0_CMD=(uint16_t)reg; |
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251 | 251 | *lcd0_DATA=(uint16_t)data; |
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252 | 252 | } |
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253 | 253 | |
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254 | 254 | uint32_t bsp_lcd0_read_reg(uint32_t reg) |
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255 | 255 | { |
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256 | 256 | *lcd0_CMD=(uint16_t)reg; |
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257 | 257 | return (uint16_t)*lcd0_DATA; |
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258 | 258 | } |
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259 | 259 | |
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260 | 260 | void bsp_lcd0_writeGRAM(void* buffer,uint32_t count) |
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261 | 261 | { |
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262 | 262 | *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM; |
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263 | 263 | uint16_t* castedBuff=(uint16_t*)buffer; |
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264 | 264 | for(int i=0;i<(int)count;i++) |
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265 | 265 | { |
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266 | 266 | *lcd0_DATA=castedBuff[i]; |
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267 | 267 | } |
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268 | 268 | } |
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269 | 269 | |
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270 | 270 | void bsp_lcd0_readGRAM(void* buffer,uint32_t count) |
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271 | 271 | { |
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272 | 272 | *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM; |
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273 | 273 | uint16_t* castedBuff=(uint16_t*)buffer; |
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274 | 274 | castedBuff[0]=*lcd0_DATA; |
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275 | 275 | for(int i=0;i<(int)count;i++) |
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276 | 276 | { |
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277 | 277 | castedBuff[i]=*lcd0_DATA; |
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278 | 278 | } |
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279 | 279 | } |
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280 | 280 | |
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281 | 281 | |
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282 | 282 | void bsp_GTerm_init() |
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283 | 283 | { |
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284 | 284 | if(__opnfiles__[1]==NULL) |
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285 | 285 | { |
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286 | 286 | //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t)); |
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287 | 287 | streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice)); |
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288 | 288 | terminal_init(&terminal0 ,&lcd0,&ComicSansMS_8,fd1); |
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289 | 289 | __opnfiles__[1] = fd1; |
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290 | 290 | } |
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291 | 291 | else |
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292 | 292 | { |
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293 | 293 | |
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294 | 294 | } |
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295 | 295 | } |
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296 | 296 | |
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297 | 297 | |
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298 | 298 | |
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299 | 299 | |
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300 | 300 | |
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301 | 301 | |
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302 | 302 | |
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303 | 303 | |
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304 | 304 | |
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305 | 305 | |
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306 | 306 | |
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307 | 307 | |
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308 | 308 | |
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309 | ||
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310 | ||
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311 | ||
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312 |
@@ -1,6 +1,9 | |||
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1 | 1 | CPU=stm32f4xxxG |
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2 | 2 | DEFINES+=BSP=\\\"BEAGLESYNTH\\\" |
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3 | 3 | beagleCp.target = beagleCp |
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4 |
beagleCp.commands = scp |
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5 | QMAKE_EXTRA_TARGETS += beagleCp | |
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4 | beagleCp.commands = cd bin && scp $(QMAKE_TARGET).bin root@192.168.7.2://opt/stm32flashAje/hello.bin | |
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5 | beagleCp131.target = beagleCp131 | |
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6 | beagleCp131.commands = cd bin && scp $(QMAKE_TARGET).bin root@129.104.27.131://opt/stm32flashAje/hello.bin | |
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7 | QMAKE_EXTRA_TARGETS += beagleCp beagleCp131 | |
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8 | ||
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6 | 9 | UCMODEL=stm32f4 |
@@ -1,345 +1,345 | |||
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1 | 1 | /*------------------------------------------------------------------------------ |
|
2 | 2 | -- This file is a part of the libuc, microcontroler library |
|
3 | 3 | -- Copyright (C) 2011, Alexis Jeandet |
|
4 | 4 | -- |
|
5 | 5 | -- This program is free software; you can redistribute it and/or modify |
|
6 | 6 | -- it under the terms of the GNU General Public License as published by |
|
7 | 7 | -- the Free Software Foundation; either version 3 of the License, or |
|
8 | 8 | -- (at your option) any later version. |
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9 | 9 | -- |
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10 | 10 | -- This program is distributed in the hope that it will be useful, |
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11 | 11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
12 | 12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
13 | 13 | -- GNU General Public License for more details. |
|
14 | 14 | -- |
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15 | 15 | -- You should have received a copy of the GNU General Public License |
|
16 | 16 | -- along with this program; if not, write to the Free Software |
|
17 | 17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
18 | 18 | ------------------------------------------------------------------------------- |
|
19 | 19 | -- Author : Alexis Jeandet |
|
20 | 20 | -- Mail : alexis.jeandet@gmail.com |
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21 | 21 | -------------------------------------------------------------------------------*/ |
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22 | 22 | #include "bsp.h" |
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23 | 23 | #include <streamdevices.h> |
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24 | 24 | #include <malloc.h> |
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25 | 25 | #include <gpio.h> |
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26 | 26 | #include <uart.h> |
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27 | 27 | #include <stdio.h> |
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28 | 28 | #include <stm32f4xx_gpio.h> |
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29 | 29 | #include <stm32f4xx_fsmc.h> |
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30 | 30 | #include <i2c.h> |
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31 | 31 | #include <core.h> |
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32 | 32 | #include <terminal.h> |
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33 | 33 | uint32_t OSC0 =8000000; |
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34 | 34 | uint32_t INTOSC =16000000; |
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35 | 35 | uint32_t RTCOSC =32768; |
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36 | 36 | uint32_t currentCpuFreq=0; |
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37 | 37 | extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__]; |
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38 | 38 | |
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39 | 39 | LCD_IF_t lcdIF0={ |
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40 | 40 | .init = &bsp_FSMC_init, |
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41 | 41 | .writereg = &bsp_lcd0_write_reg, |
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42 | 42 | .readreg = &bsp_lcd0_read_reg, |
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43 | 43 | .writeGRAM = &bsp_lcd0_writeGRAM, |
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44 | 44 | .readGRAM = &bsp_lcd0_readGRAM |
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45 | 45 | }; |
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46 | 46 | |
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47 | 47 | LCD_t lcd0={ |
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48 | 48 | .interface = &lcdIF0, |
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49 | 49 | .init = &ili9328init, |
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50 | 50 | .paint = &ili9328paint, |
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51 | 51 | .paintText = &ili9328paintText, |
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52 | 52 | .paintFilRect = &ili9328paintFilRect, |
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53 | 53 | .refreshenable = &ili9328refreshenable, |
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54 | 54 | .width= 240, |
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55 | 55 | .height = 320 |
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56 | 56 | }; |
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57 | 57 | |
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58 | 58 | terminal_t terminal0; |
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59 | 59 | |
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60 | 60 | |
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61 | 61 | volatile int16_t* lcd0_CMD=(volatile int16_t*) (0x60000000 | 0x08000000); |
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62 | 62 | volatile int16_t* lcd0_DATA=((volatile int16_t*)(0x60000000 | 0x08000002)); |
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63 | 63 | |
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64 | 64 | float VREF0 =(float)3.3; |
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65 | 65 | |
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66 | 66 | int bsp_init() |
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67 | 67 | { |
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68 | 68 | int i=0; |
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69 | 69 | for(i=0;i<32;i++) |
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70 | 70 | { |
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71 | 71 | __opnfiles__[i] = NULL; |
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72 | 72 | } |
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73 | 73 | bsp_GPIO_init(); |
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74 | 74 | bsp_uart_init(); |
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75 | 75 | bsp_iic_init(); |
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76 | 76 | bsp_FSMC_init(); |
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77 | 77 | bsp_GTerm_init(); |
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78 | 78 | printf("\r=====================\n\r"); |
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79 | 79 | printf( "=====================\n\r"); |
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80 | 80 | printf(BSP); |
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81 | 81 | printf(" initialised\n\r"); |
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82 | 82 | printf( "=====================\n\r"); |
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83 | 83 | return 1; |
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84 | 84 | } |
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85 | 85 | |
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86 | 86 | void bsp_GPIO_init() |
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87 | 87 | { |
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88 | 88 | gpio_t gpio1 = gpioopen(LED1); |
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89 | 89 | gpio_t gpio2 = gpioopen(LED2); |
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90 | 90 | gpio_t gpio3 = gpioopen(LED3); |
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91 | 91 | gpiosetspeed(&gpio1,gpiohighspeed); |
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92 | 92 | gpiosetspeed(&gpio2,gpiohighspeed); |
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93 | 93 | gpiosetspeed(&gpio3,gpiohighspeed); |
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94 | 94 | gpiosetdir(&gpio1,gpiooutdir); |
|
95 | 95 | gpiosetdir(&gpio2,gpiooutdir); |
|
96 | 96 | gpiosetdir(&gpio3,gpiooutdir); |
|
97 | 97 | } |
|
98 | 98 | |
|
99 | 99 | void bsp_uart_init() |
|
100 | 100 | { |
|
101 | 101 | //if(__opnfiles__[1]==NULL) |
|
102 | 102 | //{ |
|
103 | 103 | //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t)); |
|
104 | 104 | // streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice)); |
|
105 | 105 | // uart_t uart = uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1); |
|
106 | 106 | //uartmkstreamdev(uart,fd1); |
|
107 | 107 | //__opnfiles__[1] = fd1; |
|
108 | 108 | //} |
|
109 | 109 | //else |
|
110 | 110 | //{ |
|
111 | 111 | uartopenandconfig(0,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1); |
|
112 | 112 | //} |
|
113 | 113 | } |
|
114 | 114 | |
|
115 | 115 | /* |
|
116 | 116 | D0 PD14 D1 PD15 D2 PD0 D3 PD1 D4 PE7 |
|
117 | 117 | D5 PE8 D6 PE9 D7 PE10 D8 PE11 D9 PE12 |
|
118 | 118 | D10 PE13 D11 PE14 D12 PE15 D13 PD8 D14 PD9 |
|
119 | 119 | D15 PD10 |
|
120 | 120 | A0 PF0 = RS FSMC_NE3 PG10 CS FSMC_NWE PD5 W/S |
|
121 | 121 | FSMC_NOE PD4 RD |
|
122 | 122 | */ |
|
123 | 123 | /*-- GPIOs Configuration -----------------------------------------------------*/ |
|
124 | 124 | /* |
|
125 | 125 | +-------------------+--------------------+------------------+------------------+ |
|
126 | 126 | + SRAM pins assignment + |
|
127 | 127 | +-------------------+--------------------+------------------+------------------+ |
|
128 | 128 | | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 | |
|
129 | 129 | | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 | |
|
130 | 130 | | PD4 <-> FSMC_NOE | PE3 <-> FSMC_A19 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 | |
|
131 | 131 | | PD5 <-> FSMC_NWE | PE4 <-> FSMC_A20 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 | |
|
132 | 132 | | PD8 <-> FSMC_D13 | PE7 <-> FSMC_D4 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 | |
|
133 | 133 | | PD9 <-> FSMC_D14 | PE8 <-> FSMC_D5 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 | |
|
134 | 134 | | PD10 <-> FSMC_D15 | PE9 <-> FSMC_D6 | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 | |
|
135 | 135 | | PD11 <-> FSMC_A16 | PE10 <-> FSMC_D7 | PF13 <-> FSMC_A7 |------------------+ |
|
136 | 136 | | PD12 <-> FSMC_A17 | PE11 <-> FSMC_D8 | PF14 <-> FSMC_A8 | |
|
137 | 137 | | PD13 <-> FSMC_A18 | PE12 <-> FSMC_D9 | PF15 <-> FSMC_A9 | |
|
138 | 138 | | PD14 <-> FSMC_D0 | PE13 <-> FSMC_D10 |------------------+ |
|
139 | 139 | | PD15 <-> FSMC_D1 | PE14 <-> FSMC_D11 | |
|
140 | 140 | | | PE15 <-> FSMC_D12 | |
|
141 | 141 | +-------------------+--------------------+ |
|
142 | 142 | */ |
|
143 | 143 | int bsp_FSMC_init() |
|
144 | 144 | { |
|
145 | 145 | #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA)) |
|
146 | 146 | #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8) |
|
147 | 147 | |
|
148 | 148 | gpio_t LCD_DBxList[]={ |
|
149 | 149 | PD0 ,PD1 ,PD4 ,PD5 ,PD8 ,PD9 ,PD10,PD11,PD12,PD13,PD14,PD15, |
|
150 | 150 | PE0 ,PE1 ,PE3 ,PE4 ,PE7 ,PE8 ,PE9 ,PE10,PE11,PE12,PE13,PE14, |
|
151 | 151 | PE15,PF0 ,PF1 ,PF2 ,PF3 ,PF4 ,PF5 ,PF12,PF13,PF14,PF15,PG0 , |
|
152 | 152 | PG1 ,PG2 ,PG3 ,PG4 ,PG5 ,PG9 ,PG10 |
|
153 | 153 | }; |
|
154 | 154 | |
|
155 | 155 | for(int i=0;i<43;i++) |
|
156 | 156 | { |
|
157 | 157 | gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]); |
|
158 | 158 | LCD_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; |
|
159 | 159 | gpiosetconfig(&LCD_DBx); |
|
160 | 160 | GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC); |
|
161 | 161 | } |
|
162 | 162 | |
|
163 | 163 | FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; |
|
164 | 164 | FSMC_NORSRAMTimingInitTypeDef p; |
|
165 | 165 | |
|
166 | 166 | /* Enable FSMC clock */ |
|
167 | 167 | RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE); |
|
168 | 168 | |
|
169 | 169 | /*-- FSMC Configuration ------------------------------------------------------*/ |
|
170 | 170 | /*----------------------- SRAM Bank 3 ----------------------------------------*/ |
|
171 | 171 | /* FSMC_Bank1_NORSRAM3 configuration */ |
|
172 | 172 | p.FSMC_AddressSetupTime = 1; |
|
173 | 173 | p.FSMC_AddressHoldTime = 0; |
|
174 | 174 | p.FSMC_DataSetupTime = getCpuFreq()/14545450 ;// 11; |
|
175 | 175 | p.FSMC_BusTurnAroundDuration = 0; |
|
176 | 176 | p.FSMC_CLKDivision = 0; |
|
177 | 177 | p.FSMC_DataLatency = 0; |
|
178 | 178 | p.FSMC_AccessMode = FSMC_AccessMode_A; |
|
179 | 179 | /* Color LCD configuration ------------------------------------ |
|
180 | 180 | LCD configured as follow: |
|
181 | 181 | - Data/Address MUX = Disable |
|
182 | 182 | - Memory Type = SRAM |
|
183 | 183 | - Data Width = 16bit |
|
184 | 184 | - Write Operation = Enable |
|
185 | 185 | - Extended Mode = Enable |
|
186 | 186 | - Asynchronous Wait = Disable */ |
|
187 | 187 | |
|
188 | 188 | FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; |
|
189 | 189 | FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; |
|
190 | 190 | FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; |
|
191 | 191 | FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; |
|
192 | 192 | FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; |
|
193 | 193 | FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; |
|
194 | 194 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; |
|
195 | 195 | FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; |
|
196 | 196 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; |
|
197 | 197 | FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; |
|
198 | 198 | FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; |
|
199 | 199 | FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; |
|
200 | 200 | FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; |
|
201 | 201 | FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; |
|
202 | 202 | FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; |
|
203 | 203 | |
|
204 | 204 | FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); |
|
205 | 205 | |
|
206 | 206 | /* Enable FSMC NOR/SRAM Bank1 */ |
|
207 | 207 | FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); |
|
208 | 208 | |
|
209 | 209 | |
|
210 | 210 | p.FSMC_AddressSetupTime = getCpuFreq()/50000000; |
|
211 | 211 | p.FSMC_AddressHoldTime = 0; |
|
212 | 212 | p.FSMC_DataSetupTime = getCpuFreq()/25000000; |
|
213 | 213 | p.FSMC_BusTurnAroundDuration = 1; |
|
214 | 214 | p.FSMC_CLKDivision = 0; |
|
215 | 215 | p.FSMC_DataLatency = 0; |
|
216 | 216 | p.FSMC_AccessMode = FSMC_AccessMode_A; |
|
217 | 217 | |
|
218 | 218 | FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2; |
|
219 | 219 | FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; |
|
220 | 220 | FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM; |
|
221 | 221 | FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; |
|
222 | 222 | FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; |
|
223 | 223 | FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; |
|
224 | 224 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; |
|
225 | 225 | FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; |
|
226 | 226 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; |
|
227 | 227 | FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; |
|
228 | 228 | FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; |
|
229 | 229 | FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; |
|
230 | 230 | FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; |
|
231 | 231 | FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; |
|
232 | 232 | FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; |
|
233 | 233 | |
|
234 | 234 | FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); |
|
235 | 235 | |
|
236 | 236 | /*!< Enable FSMC Bank1_SRAM2 Bank */ |
|
237 | 237 | FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE); |
|
238 | 238 | lcd0.init(&lcd0); |
|
239 | 239 | return 1; |
|
240 | 240 | } |
|
241 | 241 | |
|
242 | 242 | void bsp_spi_init() |
|
243 | 243 | { |
|
244 | 244 | |
|
245 | 245 | } |
|
246 | 246 | |
|
247 | 247 | |
|
248 | 248 | void bsp_iic_init() |
|
249 | 249 | { |
|
250 |
|
|
|
250 | i2copenandconfig(i2c1,0,100000,PB9,PB6); | |
|
251 | 251 | } |
|
252 | 252 | |
|
253 | 253 | void bsp_SD_init() |
|
254 | 254 | { |
|
255 | 255 | gpio_t SDIO_DBxList[]={PC8 ,PC9 ,PC10 ,PC11 ,PC12,PD2}; |
|
256 | 256 | for(int i=0;i<6;i++) |
|
257 | 257 | { |
|
258 | 258 | gpio_t SDIO_DBx = gpioopen(SDIO_DBxList[i]); |
|
259 | 259 | SDIO_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; |
|
260 | 260 | gpiosetconfig(&SDIO_DBx); |
|
261 | 261 | GPIO_PinAFConfig(GPIOGETPORT(SDIO_DBx), (uint8_t)(SDIO_DBx & 0xF), GPIO_AF_SDIO); |
|
262 | 262 | } |
|
263 | 263 | } |
|
264 | 264 | |
|
265 | 265 | void vs10XXclearXCS(){} |
|
266 | 266 | void vs10XXsetXCS(){} |
|
267 | 267 | int vs10XXDREQ() |
|
268 | 268 | { |
|
269 | 269 | return 1; |
|
270 | 270 | } |
|
271 | 271 | |
|
272 | 272 | |
|
273 | 273 | void bsppowersdcard(char onoff) //always ON |
|
274 | 274 | { |
|
275 | 275 | |
|
276 | 276 | } |
|
277 | 277 | |
|
278 | 278 | char bspsdcardpresent() |
|
279 | 279 | { |
|
280 | 280 | return 0; |
|
281 | 281 | } |
|
282 | 282 | |
|
283 | 283 | char bspsdcardwriteprotected() |
|
284 | 284 | { |
|
285 | 285 | return 0; |
|
286 | 286 | } |
|
287 | 287 | |
|
288 | 288 | void bspsdcardselect(char YESNO) |
|
289 | 289 | { |
|
290 | 290 | |
|
291 | 291 | } |
|
292 | 292 | |
|
293 | 293 | |
|
294 | 294 | void bsp_lcd0_write_reg(uint32_t reg,uint32_t data) |
|
295 | 295 | { |
|
296 | 296 | *lcd0_CMD=(uint16_t)reg; |
|
297 | 297 | *lcd0_DATA=(uint16_t)data; |
|
298 | 298 | } |
|
299 | 299 | |
|
300 | 300 | uint32_t bsp_lcd0_read_reg(uint32_t reg) |
|
301 | 301 | { |
|
302 | 302 | *lcd0_CMD=(uint16_t)reg; |
|
303 | 303 | return (uint16_t)*lcd0_DATA; |
|
304 | 304 | } |
|
305 | 305 | |
|
306 | 306 | void bsp_lcd0_writeGRAM(void* buffer,uint32_t count) |
|
307 | 307 | { |
|
308 | 308 | *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM; |
|
309 | 309 | uint16_t* castedBuff=(uint16_t*)buffer; |
|
310 | 310 | for(int i=0;i<(int)count;i++) |
|
311 | 311 | { |
|
312 | 312 | *lcd0_DATA=castedBuff[i]; |
|
313 | 313 | } |
|
314 | 314 | } |
|
315 | 315 | |
|
316 | 316 | void bsp_lcd0_readGRAM(void* buffer,uint32_t count) |
|
317 | 317 | { |
|
318 | 318 | *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM; |
|
319 | 319 | uint16_t* castedBuff=(uint16_t*)buffer; |
|
320 | 320 | castedBuff[0]=*lcd0_DATA; |
|
321 | 321 | for(int i=0;i<(int)count;i++) |
|
322 | 322 | { |
|
323 | 323 | castedBuff[i]=*lcd0_DATA; |
|
324 | 324 | } |
|
325 | 325 | } |
|
326 | 326 | |
|
327 | 327 | void bsp_GTerm_init() |
|
328 | 328 | { |
|
329 | 329 | if(__opnfiles__[1]==NULL) |
|
330 | 330 | { |
|
331 | 331 | //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t)); |
|
332 | 332 | streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice)); |
|
333 | 333 | |
|
334 | 334 | ili9328paintFilRect(&lcd0,0,0,240,320,0x7FFF,5,0); |
|
335 | 335 | terminal_init(&terminal0,&lcd0,&ComicSansMS_8,fd1); |
|
336 | 336 | __opnfiles__[1] = fd1; |
|
337 | 337 | } |
|
338 | 338 | else |
|
339 | 339 | { |
|
340 | 340 | |
|
341 | 341 | } |
|
342 | 342 | } |
|
343 | 343 | |
|
344 | 344 | |
|
345 | 345 |
@@ -1,14 +1,23 | |||
|
1 | 1 | TEMPLATE = app |
|
2 | 2 | CONFIG += cpu |
|
3 | 3 | |
|
4 | 4 | |
|
5 | 5 | UCMODEL=stm32f4 |
|
6 |
DEFINES += CPUFREQ= |
|
|
6 | DEFINES += CPUFREQ=40000000 | |
|
7 | 7 | |
|
8 |
|
|
|
8 | BSP = BEAGLESYNTH | |
|
9 | 9 | #BSP = SOLAR_LFR_PSU |
|
10 | BSP = STM32F4Eval | |
|
10 | #BSP = STM32F4Eval | |
|
11 | 11 | |
|
12 | 12 | SOURCES += \ |
|
13 | 13 | main.c |
|
14 | 14 | |
|
15 | ||
|
16 | ||
|
17 | ||
|
18 | ||
|
19 | #beagleCp.target = beagleCp | |
|
20 | #beagleCp.commands = cd bin && scp $(QMAKE_TARGET).bin root@192.168.7.2://opt/stm32flashAje/hello.bin | |
|
21 | #beagleCp131.target = beagleCp131 | |
|
22 | #beagleCp131.commands = cd bin && scp $(QMAKE_TARGET).bin root@129.104.27.131://opt/stm32flashAje/hello.bin | |
|
23 | #QMAKE_EXTRA_TARGETS += beagleCp beagleCp131 |
@@ -1,73 +1,83 | |||
|
1 | 1 | #include <stdio.h> |
|
2 | 2 | #include <fat32.h> |
|
3 | 3 | #include <gpio.h> |
|
4 | 4 | #include <uart.h> |
|
5 | 5 | #include <stm32f4xx.h> |
|
6 | 6 | #include <math.h> |
|
7 | 7 | #include <bsp.h> |
|
8 | 8 | #include <i2c.h> |
|
9 | 9 | #include <CS43L22.h> |
|
10 | 10 | #include <ina226.h> |
|
11 | 11 | #include <fonts.h> |
|
12 | 12 | #include <stdlib.h> |
|
13 | 13 | #include <core.h> |
|
14 | #include <malloc.h> | |
|
14 | 15 | |
|
15 | 16 | |
|
16 | 17 | extern streamdevice* __opnfiles__[]; |
|
17 | 18 | |
|
18 | 19 | #define LCD_COLOR_WHITE 0xFFFF |
|
19 | 20 | #define LCD_COLOR_BLACK 0x0000 |
|
20 | 21 | #define LCD_COLOR_GREY 0xF7DE |
|
21 | 22 | #define LCD_COLOR_BLUE 0x001F |
|
22 | 23 | #define LCD_COLOR_BLUE2 0x051F |
|
23 | 24 | #define LCD_COLOR_RED 0xF800 |
|
24 | 25 | #define LCD_COLOR_MAGENTA 0xF81F |
|
25 | 26 | #define LCD_COLOR_GREEN 0x07E0 |
|
26 | 27 | #define LCD_COLOR_CYAN 0x7FFF |
|
27 | 28 | #define LCD_COLOR_YELLOW 0xFFE0 |
|
28 | 29 | |
|
29 | 30 | #ifndef PSU_DISABLE |
|
30 | 31 | #define PSU_DISABLE LED1 |
|
31 | 32 | #endif |
|
32 | 33 | |
|
34 | void setUartAsStdout() | |
|
35 | { | |
|
36 | streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice)); | |
|
37 | uart_t uart = uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1); | |
|
38 | uartmkstreamdev(uart,fd1); | |
|
39 | __opnfiles__[1] = fd1; | |
|
40 | } | |
|
33 | 41 | |
|
34 | 42 | int main() |
|
35 | 43 | { |
|
36 | 44 | delay_100us(20000); |
|
37 | 45 | INA226_t ina5VSens,ina33VSens,ina15VSens; |
|
38 | 46 | gpioset(PSU_DISABLE);//enable psu! |
|
39 | ili9328paintFilRect(&lcd0,0,0,240,320,LCD_COLOR_BLACK,1,LCD_COLOR_BLACK); | |
|
47 | setUartAsStdout(); | |
|
48 | //ili9328paintFilRect(&lcd0,0,0,240,320,LCD_COLOR_BLACK,1,LCD_COLOR_BLACK); | |
|
40 | 49 | if(-1==ina226open(&ina33VSens,i2c2,INA226_MODE_SHUNT_VOLTAGE_CONTINUOUS|INA226_AVERAGES_16|INA226_BUS_CONV_8244us|INA226_SHUNT_CONV_8244us,0,0,15,1000000)) |
|
41 | 50 | { |
|
42 | 51 | printf("Can't open 3.3V monitor\n\r"); |
|
43 | 52 | } |
|
44 | 53 | if(-1==ina226open(&ina5VSens,i2c2,INA226_MODE_SHUNT_VOLTAGE_CONTINUOUS|INA226_AVERAGES_16|INA226_BUS_CONV_8244us|INA226_SHUNT_CONV_8244us,0,1,15,1000000)) |
|
45 | 54 | { |
|
46 | 55 | printf("Can't open 5V monitor\n\r"); |
|
47 | 56 | } |
|
48 | 57 | if(-1==ina226open(&ina15VSens,i2c2,INA226_MODE_SHUNT_VOLTAGE_CONTINUOUS|INA226_AVERAGES_16|INA226_BUS_CONV_8244us|INA226_SHUNT_CONV_8244us,1,0,15,1000000)) |
|
49 | 58 | { |
|
50 | 59 | printf("Can't open 1.5V monitor\n\r"); |
|
51 | 60 | } |
|
52 | 61 | int current5V,current33V,current15V; |
|
53 | 62 | while(1) |
|
54 | 63 | { |
|
55 | 64 | current5V = ina226getCurrent(&ina5VSens); |
|
56 | 65 | current33V = ina226getCurrent(&ina33VSens); |
|
57 | 66 | current15V = ina226getCurrent(&ina15VSens); |
|
58 | printf("%dmA\n",current15V/1000); | |
|
59 | printf("%dmA\n",current33V/1000); | |
|
60 | printf("%dmA\n",current5V/1000); | |
|
67 | printf("%dmA\n\r",current15V/1000); | |
|
68 | printf("%dmA\n\r",current33V/1000); | |
|
69 | printf("%dmA\n\r",current5V/1000); | |
|
70 | delay_100us(10000); | |
|
61 | 71 | } |
|
62 | 72 | printf("Exit\n\r"); |
|
63 | 73 | return 0; |
|
64 | 74 | } |
|
65 | 75 | |
|
66 | 76 | |
|
67 | 77 | |
|
68 | 78 | |
|
69 | 79 | |
|
70 | 80 | |
|
71 | 81 | |
|
72 | 82 | |
|
73 | 83 |
@@ -1,13 +1,13 | |||
|
1 | 1 | TEMPLATE = app |
|
2 | 2 | CONFIG += cpu |
|
3 | 3 | |
|
4 | 4 | |
|
5 | 5 | UCMODEL=stm32f4 |
|
6 | 6 | |
|
7 | 7 | BSP = STM32F4Eval |
|
8 | 8 | |
|
9 |
DEFINES += CPUFREQ= |
|
|
9 | DEFINES += CPUFREQ=40000000 | |
|
10 | 10 | |
|
11 | 11 | SOURCES += \ |
|
12 | 12 | main.c |
|
13 | 13 |
@@ -1,71 +1,81 | |||
|
1 | 1 | #include <stdio.h> |
|
2 | 2 | #include <fat32.h> |
|
3 | 3 | #include <gpio.h> |
|
4 | 4 | #include <uart.h> |
|
5 | 5 | #include <stm32f4xx.h> |
|
6 | 6 | #include <math.h> |
|
7 | 7 | #include <bsp.h> |
|
8 | 8 | #include <i2c.h> |
|
9 | 9 | #include <CS43L22.h> |
|
10 | 10 | #include <ina226.h> |
|
11 | 11 | #include <fonts.h> |
|
12 | 12 | #include <stdlib.h> |
|
13 | 13 | #include <core.h> |
|
14 | 14 | #include <terminal.h> |
|
15 | 15 | |
|
16 | 16 | extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__]; |
|
17 | 17 | |
|
18 | 18 | #define LCD_COLOR_WHITE 0xFFFF |
|
19 | 19 | #define LCD_COLOR_BLACK 0x0000 |
|
20 | 20 | #define LCD_COLOR_GREY 0xF7DE |
|
21 | 21 | #define LCD_COLOR_BLUE 0x001F |
|
22 | 22 | #define LCD_COLOR_BLUE2 0x051F |
|
23 | 23 | #define LCD_COLOR_RED 0xF800 |
|
24 | 24 | #define LCD_COLOR_MAGENTA 0xF81F |
|
25 | 25 | #define LCD_COLOR_GREEN 0x07E0 |
|
26 | 26 | #define LCD_COLOR_CYAN 0x7FFF |
|
27 | 27 | #define LCD_COLOR_YELLOW 0xFFE0 |
|
28 | 28 | |
|
29 | void testAudioDAC() | |
|
30 | { | |
|
31 | CS43L22_t dac; | |
|
32 | cs43l22open(&dac,i2c1,0); | |
|
33 | uint8_t ID= cs43l22getID(&dac); | |
|
34 | printf("dac ID = %d\n\r",ID); | |
|
35 | } | |
|
29 | 36 | |
|
30 | 37 | int main() |
|
31 | 38 | { |
|
39 | delay_100us(10000); | |
|
32 | 40 | uint16_t innerbuffer[16]; |
|
33 | 41 | uint16_t outterbuffer[16]; |
|
34 | 42 | for(int i=0;i<16;i++)innerbuffer[i]=LCD_COLOR_BLUE; |
|
35 | 43 | for(int i=0;i<16;i++)outterbuffer[i]=LCD_COLOR_RED; |
|
36 | 44 | ili9328paintFilRect(&lcd0,0,0,240,320,LCD_COLOR_CYAN,5,LCD_COLOR_BLACK); |
|
37 | 45 | |
|
38 | 46 | streamdevice* fd1=__opnfiles__[1]; |
|
39 | 47 | streamdevice fd2; |
|
40 | 48 | int i=0; |
|
41 | 49 | terminal_t terminal0,terminal1; |
|
42 | 50 | terminal_init(&terminal0,&lcd0,&ComicSansMS_18,fd1); |
|
43 | 51 | terminal_init(&terminal1,&lcd0,&ComicSansMS_18,&fd2); |
|
44 | 52 | terminal_setgeometry(&terminal0,5,5,terminal0.LCD->width-10,(terminal0.LCD->height/2)-10); |
|
45 | 53 | terminal_setbackgroundColor(&terminal1,0xFFFF); |
|
46 | 54 | terminal_settextColor(&terminal1,0x0000); |
|
47 | 55 | terminal_setgeometry(&terminal1,5,(terminal0.LCD->height/2)+5,terminal0.LCD->width-10,(terminal0.LCD->height/2)-10); |
|
48 | 56 | printf("Line cnt :\n \t%d\n",terminal0.lineCount); |
|
49 | 57 | printf("Column cnt :\n \t%d\n",terminal0.columnCount); |
|
50 | 58 | printf("CPU Freq :\n \t%dMHz\n",getCpuFreq()/1000000); |
|
59 | //testAudioDAC(); | |
|
60 | i2cwrite(i2c1,0x4a," ",1); | |
|
51 | 61 | while(1) |
|
52 | 62 | { |
|
53 | 63 | i%=1000; |
|
54 | 64 | //terminal->write(&terminal," Hi",1, 2); |
|
55 | 65 | //delay_100us(1000); |
|
56 | 66 | gpioset(LED1); |
|
57 | 67 | //delay_100us(1000); |
|
58 | 68 | gpioclr(LED1); |
|
59 | 69 | } |
|
60 | 70 | printf("hello world\n\r"); |
|
61 | 71 | return 0; |
|
62 | 72 | } |
|
63 | 73 | |
|
64 | 74 | |
|
65 | 75 | |
|
66 | 76 | |
|
67 | 77 | |
|
68 | 78 | |
|
69 | 79 | |
|
70 | 80 | |
|
71 | 81 |
@@ -1,114 +1,114 | |||
|
1 | 1 | /*------------------------------------------------------------------------------ |
|
2 | 2 | -- This file is a part of the libuc, microcontroler library |
|
3 | 3 | -- Copyright (C) 2012, Alexis Jeandet |
|
4 | 4 | -- |
|
5 | 5 | -- This program is free software; you can redistribute it and/or modify |
|
6 | 6 | -- it under the terms of the GNU General Public License as published by |
|
7 | 7 | -- the Free Software Foundation; either version 3 of the License, or |
|
8 | 8 | -- (at your option) any later version. |
|
9 | 9 | -- |
|
10 | 10 | -- This program is distributed in the hope that it will be useful, |
|
11 | 11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
12 | 12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
13 | 13 | -- GNU General Public License for more details. |
|
14 | 14 | -- |
|
15 | 15 | -- You should have received a copy of the GNU General Public License |
|
16 | 16 | -- along with this program; if not, write to the Free Software |
|
17 | 17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
18 | 18 | ------------------------------------------------------------------------------- |
|
19 | 19 | -- Author : Alexis Jeandet |
|
20 | 20 | -- Mail : alexis.jeandet@gmail.com |
|
21 | 21 | -------------------------------------------------------------------------------*/ |
|
22 | 22 | #include <ina226.h> |
|
23 | 23 | #include <stdio.h> |
|
24 | 24 | #include <stddef.h> |
|
25 | 25 | |
|
26 | 26 | |
|
27 | 27 | int ina226open(INA226_t *dev, i2c_t i2cdev, uint16_t config, uint8_t A0, uint8_t A1, uint32_t shuntmOhm, uint32_t CurrentRangeuAmp) |
|
28 | 28 | { |
|
29 | 29 | if(dev != NULL) |
|
30 | 30 | { |
|
31 | 31 | dev->i2cdev=i2cdev; |
|
32 |
dev->devAddress = INA226_I2C_ADDRESS | (A0 & 1) | ((A1<< |
|
|
32 | dev->devAddress = INA226_I2C_ADDRESS | (A0 & 1) | ((A1<<2) & 5); | |
|
33 | 33 | printf("dev->devAddress = %x\n\r",dev->devAddress); |
|
34 | 34 | dev->shuntmOhm = shuntmOhm; |
|
35 | 35 | dev->CurrentRangeuAmp = CurrentRangeuAmp; |
|
36 | 36 | ina226setReg(dev,INA226_Configuration_Reg,0x8000); |
|
37 | 37 | ina226setReg(dev,INA226_Configuration_Reg,config); |
|
38 | 38 | return ina226calibrate(dev,shuntmOhm,CurrentRangeuAmp); |
|
39 | 39 | } |
|
40 | 40 | return -1; |
|
41 | 41 | } |
|
42 | 42 | |
|
43 | 43 | uint16_t ina226getID(INA226_t* dev) |
|
44 | 44 | { |
|
45 | 45 | if(dev != NULL) |
|
46 | 46 | { |
|
47 | 47 | uint16_t id=ina226getReg(dev,INA226_Die_ID_Reg); |
|
48 | 48 | return id; |
|
49 | 49 | } |
|
50 | 50 | return -1; |
|
51 | 51 | } |
|
52 | 52 | |
|
53 | 53 | |
|
54 | 54 | int ina226calibrate(INA226_t* dev,uint32_t shuntmOhm, uint32_t CurrentRangeuAmp) |
|
55 | 55 | { |
|
56 | 56 | dev->shuntmOhm = shuntmOhm; |
|
57 | 57 | dev->CurrentRangeuAmp = CurrentRangeuAmp; |
|
58 | 58 | uint32_t CAL= (uint32_t)(5210000/(shuntmOhm*(CurrentRangeuAmp>>15))); |
|
59 | 59 | return ina226setReg(dev,INA226_Calibration_Reg,(uint16_t)CAL); |
|
60 | 60 | } |
|
61 | 61 | |
|
62 | 62 | uint32_t ina226getBusVoltage(INA226_t *dev) |
|
63 | 63 | { |
|
64 | 64 | uint32_t busVoltage= ina226getReg(dev,INA226_Bus_Voltage_Reg); |
|
65 | 65 | busVoltage*= 1250; |
|
66 | 66 | return busVoltage; |
|
67 | 67 | } |
|
68 | 68 | |
|
69 | 69 | uint32_t ina226getPower(INA226_t *dev) |
|
70 | 70 | { |
|
71 | 71 | uint32_t power= ina226getReg(dev,INA226_Power_Reg); |
|
72 | 72 | power*= ((dev->CurrentRangeuAmp>>15)*25); |
|
73 | 73 | return power; |
|
74 | 74 | } |
|
75 | 75 | |
|
76 | 76 | int32_t ina226getCurrent(INA226_t *dev) |
|
77 | 77 | { |
|
78 | 78 | int32_t current= ina226getReg(dev,INA226_Current_Reg); |
|
79 | 79 | current<<=16; |
|
80 | 80 | current>>=16; |
|
81 | 81 | current = current*(dev->CurrentRangeuAmp>>15); |
|
82 | 82 | return current; |
|
83 | 83 | } |
|
84 | 84 | |
|
85 | 85 | uint16_t ina226getReg(INA226_t* dev,char reg) |
|
86 | 86 | { |
|
87 | 87 | if(dev != NULL) |
|
88 | 88 | { |
|
89 | 89 | char DATA[2]; |
|
90 | 90 | DATA[0]=reg; |
|
91 | 91 | i2cwrite(dev->i2cdev,dev->devAddress,DATA,1); |
|
92 | 92 | i2cread(dev->i2cdev,dev->devAddress,DATA,2); |
|
93 | 93 | uint16_t val=DATA[0]; |
|
94 | 94 | val=(val<<8)+DATA[1]; |
|
95 | 95 | return val; |
|
96 | 96 | } |
|
97 | 97 | return -1; |
|
98 | 98 | } |
|
99 | 99 | |
|
100 | 100 | |
|
101 | 101 | int ina226setReg(INA226_t* dev,char reg,int16_t value) |
|
102 | 102 | { |
|
103 | 103 | if(dev != NULL) |
|
104 | 104 | { |
|
105 | 105 | char DATA[3]; |
|
106 | 106 | DATA[0]=INA226_Calibration_Reg; |
|
107 | 107 | DATA[1]=(char)(0xff & (value>>8)); |
|
108 | 108 | DATA[2]=(char)(0xff & value); |
|
109 | 109 | if(3==i2cwrite(dev->i2cdev,dev->devAddress,DATA,3))return 1; |
|
110 | 110 | } |
|
111 | 111 | return -1; |
|
112 | 112 | } |
|
113 | 113 | |
|
114 | 114 |
@@ -1,341 +1,388 | |||
|
1 | 1 | /*------------------------------------------------------------------------------ |
|
2 | 2 | -- This file is a part of the libuc, microcontroler library |
|
3 | 3 | -- Copyright (C) 2012, Alexis Jeandet |
|
4 | 4 | -- |
|
5 | 5 | -- This program is free software; you can redistribute it and/or modify |
|
6 | 6 | -- it under the terms of the GNU General Public License as published by |
|
7 | 7 | -- the Free Software Foundation; either version 3 of the License, or |
|
8 | 8 | -- (at your option) any later version. |
|
9 | 9 | -- |
|
10 | 10 | -- This program is distributed in the hope that it will be useful, |
|
11 | 11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
12 | 12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
13 | 13 | -- GNU General Public License for more details. |
|
14 | 14 | -- |
|
15 | 15 | -- You should have received a copy of the GNU General Public License |
|
16 | 16 | -- along with this program; if not, write to the Free Software |
|
17 | 17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
18 | 18 | ------------------------------------------------------------------------------- |
|
19 | 19 | -- Author : Alexis Jeandet |
|
20 | 20 | -- Mail : alexis.jeandet@gmail.com |
|
21 | 21 | -------------------------------------------------------------------------------*/ |
|
22 | 22 | |
|
23 | 23 | #include <i2c.h> |
|
24 | 24 | #include <stm32f4xx_usart.h> |
|
25 | 25 | #include <stm32f4xx_rcc.h> |
|
26 | 26 | #include <stm32f4xx_gpio.h> |
|
27 | 27 | #include <gpio.h> |
|
28 | 28 | #include <core.h> |
|
29 | 29 | |
|
30 | 30 | #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA)) |
|
31 | 31 | #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8) |
|
32 | 32 | |
|
33 | 33 | int i2ctimeout=1000*1000; |
|
34 | 34 | |
|
35 | 35 | I2C_TypeDef* _i2c_dev_table[3]={I2C1,I2C2,I2C3}; |
|
36 | 36 | |
|
37 | 37 | i2c_t i2copen(int count) |
|
38 | 38 | { |
|
39 | 39 | #define _INIT_DEV(_RCC_) \ |
|
40 | 40 | RCC_APB1PeriphClockCmd(_RCC_, ENABLE); \ |
|
41 | 41 | RCC_APB1PeriphResetCmd(_RCC_, ENABLE); \ |
|
42 |
RCC_APB1PeriphResetCmd(_RCC_, DISABLE); |
|
|
43 | RCC_APB1PeriphClockCmd(_RCC_, ENABLE); | |
|
42 | RCC_APB1PeriphResetCmd(_RCC_, DISABLE); | |
|
44 | 43 | |
|
45 | 44 | switch(count) |
|
46 | 45 | { |
|
47 | 46 | case i2c1: |
|
48 | 47 | _INIT_DEV(RCC_APB1Periph_I2C1); |
|
49 | 48 | return i2c1; |
|
50 | 49 | break; |
|
51 | 50 | case i2c2: |
|
52 | 51 | _INIT_DEV(RCC_APB1Periph_I2C2); |
|
53 | 52 | return i2c2; |
|
54 | 53 | break; |
|
55 | 54 | case i2c3: |
|
56 | 55 | _INIT_DEV(RCC_APB1Periph_I2C3); |
|
57 | 56 | return i2c3; |
|
58 | 57 | break; |
|
59 | 58 | default: |
|
60 | 59 | break; |
|
61 | 60 | } |
|
62 | 61 | return -1; |
|
63 | 62 | } |
|
64 | 63 | |
|
65 | 64 | i2c_t i2copenandconfig(int count,uint32_t cfg,uint32_t speed,uint32_t SDA,uint32_t SCL) |
|
66 | 65 | { |
|
67 | 66 | i2c_t dev = i2copen(count); |
|
68 | 67 | if(dev!=-1) |
|
69 | 68 | { |
|
70 | 69 | i2cclose(dev); |
|
71 | 70 | i2csetpins(dev,SDA,SCL); |
|
72 | 71 | i2copen(count); |
|
73 | i2cenable(count); | |
|
72 | //i2cenable(count); | |
|
74 | 73 | //I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
75 | 74 | i2csetspeed(dev,speed); |
|
76 | 75 | i2cenable(count); |
|
77 | 76 | } |
|
78 | 77 | return dev; |
|
79 | 78 | } |
|
80 | 79 | |
|
81 | 80 | int i2cclose(i2c_t dev) |
|
82 | 81 | { |
|
83 | 82 | switch(dev) |
|
84 | 83 | { |
|
85 | 84 | case i2c1: |
|
86 | 85 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE); |
|
87 | 86 | break; |
|
88 | 87 | case i2c2: |
|
89 | 88 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE); |
|
90 | 89 | break; |
|
91 | 90 | case i2c3: |
|
92 | 91 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C3, ENABLE); |
|
93 | 92 | break; |
|
94 | 93 | default: |
|
95 | 94 | break; |
|
96 | 95 | } |
|
97 | 96 | return 1; |
|
98 | 97 | } |
|
99 | 98 | |
|
100 | 99 | int i2csetpins(i2c_t dev, uint32_t SDA, uint32_t SCL) |
|
101 | 100 | { |
|
102 |
if((dev< |
|
|
101 | if((dev<i2c4)&&(dev>=i2c1)) | |
|
103 | 102 | { |
|
104 | 103 | gpio_t SDApin,SCLpin; |
|
105 | 104 | SDApin = gpioopen(SDA); |
|
106 | 105 | SCLpin = gpioopen(SCL); |
|
107 | 106 | SDApin |= gpiolowspeed | gpioaf | gpioopendraintype | gpionopulltype; |
|
108 | 107 | SCLpin |= gpiolowspeed | gpiooutdir | gpioopendraintype | gpionopulltype; |
|
109 | 108 | gpiosetconfig(&SCLpin); |
|
110 | 109 | for(int i=0;i<32;i++) |
|
111 | 110 | { |
|
112 | 111 | gpioclr(SCLpin); |
|
113 | 112 | for(int l=0;l<200;l++) |
|
114 | 113 | {__asm__("nop");} |
|
115 | 114 | gpioset(SCLpin); |
|
116 | 115 | for(int l=0;l<200;l++) |
|
117 | 116 | {__asm__("nop");} |
|
118 | 117 | } |
|
119 | 118 | SCLpin = gpioopen(SCL); |
|
120 | 119 | SCLpin |= gpiolowspeed | gpioaf | gpioopendraintype | gpionopulltype; |
|
121 | 120 | gpiosetconfig(&SDApin); |
|
122 | 121 | gpiosetconfig(&SCLpin); |
|
123 | 122 | uint8_t gpioAFi2cx = GPIO_AF_I2C1; |
|
124 | 123 | switch(dev) |
|
125 | 124 | { |
|
126 | 125 | case i2c1: |
|
127 | 126 | gpioAFi2cx = GPIO_AF_I2C1; |
|
128 | 127 | break; |
|
129 | 128 | case i2c2: |
|
130 | 129 | gpioAFi2cx = GPIO_AF_I2C2; |
|
131 | 130 | break; |
|
132 | 131 | case i2c3: |
|
133 | 132 | gpioAFi2cx = GPIO_AF_I2C3; |
|
134 | 133 | break; |
|
135 | 134 | default: |
|
136 | 135 | break; |
|
137 | 136 | } |
|
138 | 137 | GPIO_PinAFConfig(GPIOGETPORT(SDApin), (uint8_t)(SDApin & 0xF), gpioAFi2cx); |
|
139 | 138 | GPIO_PinAFConfig(GPIOGETPORT(SCLpin), (uint8_t)(SCLpin & 0xF), gpioAFi2cx); |
|
140 | 139 | return 0; |
|
141 | 140 | } |
|
142 | 141 | return -1; |
|
143 | 142 | } |
|
144 | 143 | |
|
145 | 144 | int i2cenable(i2c_t dev) |
|
146 | 145 | { |
|
147 |
if((dev< |
|
|
146 | if((dev<i2c4)&&(dev>=i2c1)) | |
|
148 | 147 | { |
|
149 | 148 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
150 | 149 | _dev_->CR1 |=1 ; |
|
151 | 150 | return 0; |
|
152 | 151 | } |
|
153 | 152 | return -1; |
|
154 | 153 | } |
|
155 | 154 | |
|
156 | 155 | int i2cdisable(i2c_t dev) |
|
157 | 156 | { |
|
158 |
if((dev< |
|
|
157 | if((dev<i2c4)&&(dev>=i2c1)) | |
|
159 | 158 | { |
|
160 | 159 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
161 | 160 | _dev_->CR1 &= ~1; |
|
162 | 161 | return 0; |
|
163 | 162 | } |
|
164 | 163 | return -1; |
|
165 | 164 | } |
|
166 | 165 | |
|
167 | 166 | |
|
168 | 167 | int i2csetspeed(i2c_t dev,uint32_t speed) |
|
169 | 168 | { |
|
170 |
if((dev< |
|
|
169 | if((dev<i2c4)&&(dev>=i2c1)) | |
|
171 | 170 | { |
|
172 | 171 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
173 | 172 | int32_t APB1Freq=getAPB1Freq()/1000000; |
|
174 | 173 | if((APB1Freq>1)&&(APB1Freq<43)) |
|
175 | 174 | { |
|
176 | 175 | |
|
177 | 176 | uint16_t tmpreg=_dev_->CR2; |
|
178 | 177 | tmpreg &= ~(0x1f); |
|
179 | 178 | tmpreg |= APB1Freq; |
|
180 | 179 | _dev_->CR2=tmpreg; |
|
181 | 180 | i2cdisable(dev); |
|
182 | 181 | tmpreg=_dev_->CCR; |
|
183 | 182 | APB1Freq=getAPB1Freq(); |
|
184 | 183 | if(speed>100000) //100kHz= standard mode, 400kHz= fast mode |
|
185 | 184 | { |
|
186 | 185 | if(speed<=400000) |
|
187 | 186 | { |
|
188 | 187 | tmpreg |= 1<<15; |
|
189 | 188 | tmpreg &= ~(1<<14); |
|
190 | 189 | tmpreg &= ~(0xfff); |
|
191 | 190 | tmpreg |= 0xfff & (APB1Freq/(3*speed)); |
|
192 | 191 | } |
|
193 | 192 | } |
|
194 | 193 | else |
|
195 | 194 | { |
|
196 |
|
|
|
197 |
|
|
|
198 |
|
|
|
195 | tmpreg &= ~(1<<15); | |
|
196 | tmpreg &= ~(0xfff); | |
|
197 | tmpreg |= 0xfff & (APB1Freq/(2*speed)); | |
|
199 | 198 | } |
|
200 | 199 | _dev_->CCR=tmpreg; |
|
201 | 200 | tmpreg=_dev_->TRISE; |
|
202 | 201 | tmpreg &= ~(0x3f); |
|
203 | 202 | tmpreg |= (APB1Freq/1000000)+1; |
|
204 | 203 | _dev_->TRISE = tmpreg; |
|
205 | 204 | i2cenable(dev); |
|
206 | 205 | return 0; |
|
207 | 206 | } |
|
208 | 207 | } |
|
209 | 208 | return -1; |
|
210 | 209 | } |
|
211 | 210 | |
|
212 | 211 | int i2cbusy(i2c_t dev) |
|
213 | 212 | { |
|
214 |
if((dev< |
|
|
213 | if((dev<i2c4)&&(dev>=i2c1)) | |
|
215 | 214 | { |
|
216 | 215 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
217 | 216 | if((_dev_->SR2 & 2) ==2) return 1; /* Dev is busy */ |
|
218 | 217 | return 0; /* Dev isn't busy */ |
|
219 | 218 | } |
|
220 | 219 | return -1; /* Error, dev is out of range */ |
|
221 | 220 | } |
|
222 | 221 | |
|
223 | 222 | int i2cwrite(i2c_t dev,char address,char* data,int count) |
|
224 | 223 | { |
|
225 |
if((dev< |
|
|
224 | if((dev<i2c4)&&(dev>=i2c1)) | |
|
226 | 225 | { |
|
227 | 226 | int timeout=i2ctimeout; |
|
228 | 227 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
229 | 228 | while(i2cbusy(dev)) |
|
230 | 229 | { |
|
231 |
if(0==(timeout--)) |
|
|
230 | if(0==(timeout--)) | |
|
231 | { | |
|
232 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |
|
233 | return -1; | |
|
234 | } | |
|
232 | 235 | } |
|
233 | 236 | _dev_->CR1 |= 1<<8; |
|
234 | 237 | timeout=i2ctimeout; |
|
235 | 238 | while(!i2cStatusCheck(dev,((uint32_t)0x00030001))) |
|
236 | 239 | { |
|
237 |
if(0==(timeout--)) |
|
|
240 | if(0==(timeout--)) | |
|
241 | { | |
|
242 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |
|
243 | return -1; | |
|
244 | } | |
|
238 | 245 | } |
|
239 | 246 | _dev_->DR= address<<1; |
|
240 | 247 | timeout=i2ctimeout; |
|
241 | 248 | while(!i2cStatusCheck(dev, ((uint32_t)0x00070082))) |
|
242 | 249 | { |
|
243 |
if(0==(timeout--)) |
|
|
250 | if(0==(timeout--)) | |
|
251 | { | |
|
252 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |
|
253 | return -1; | |
|
254 | } | |
|
244 | 255 | } |
|
245 | 256 | address=_dev_->SR2; |
|
246 | 257 | for(int i=0;i<count;i++) |
|
247 | 258 | { |
|
248 | 259 | timeout=i2ctimeout; |
|
249 | 260 | while(!i2cStatusCheck(dev,((uint32_t)0x00070080))) |
|
250 | 261 | { |
|
251 |
if(0==(timeout--)) |
|
|
262 | if(0==(timeout--)) | |
|
263 | { | |
|
264 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |
|
265 | return -1; | |
|
266 | } | |
|
252 | 267 | } |
|
253 | 268 | _dev_->DR= data[i]; |
|
254 | 269 | } |
|
255 | 270 | timeout=i2ctimeout; |
|
256 | 271 | while(!i2cStatusCheck(dev,1<<7)) |
|
257 | 272 | { |
|
258 |
if(0==(timeout--)) |
|
|
273 | if(0==(timeout--)) | |
|
274 | { | |
|
275 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |
|
276 | return -1; | |
|
277 | } | |
|
259 | 278 | } |
|
260 | 279 | timeout=i2ctimeout; |
|
261 | 280 | while(!i2cStatusCheck(dev,1<<2)) |
|
262 | 281 | { |
|
263 |
if(0==(timeout--)) |
|
|
282 | if(0==(timeout--)) | |
|
283 | { | |
|
284 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |
|
285 | return -1; | |
|
286 | } | |
|
264 | 287 | } |
|
265 | 288 | _dev_->CR1 |= 1<<9; |
|
266 | 289 | return count; |
|
267 | 290 | } |
|
268 | 291 | return -1; |
|
269 | 292 | } |
|
270 | 293 | |
|
271 | 294 | int i2cread(i2c_t dev,char address,char* data,int count) |
|
272 | 295 | { |
|
273 |
if((dev< |
|
|
296 | if((dev<i2c4)&&(dev>=i2c1)) | |
|
274 | 297 | { |
|
275 | 298 | int i=0; |
|
276 | 299 | int timeout=i2ctimeout; |
|
277 | 300 | while(i2cbusy(dev)) |
|
278 | 301 | { |
|
279 |
if(0==(timeout--)) |
|
|
302 | if(0==(timeout--)) | |
|
303 | { | |
|
304 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |
|
305 | return -1; | |
|
306 | } | |
|
280 | 307 | } |
|
281 | 308 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
282 | 309 | _dev_->CR1 |= (1<<8) + (1<<10); |
|
283 | 310 | timeout=i2ctimeout; |
|
284 | 311 | while(!i2cStatusCheck(dev,0x00030001)) |
|
285 | 312 | { |
|
286 |
if(0==(timeout--)) |
|
|
313 | if(0==(timeout--)) | |
|
314 | { | |
|
315 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |
|
316 | return -1; | |
|
317 | } | |
|
287 | 318 | } |
|
288 | 319 | _dev_->DR= (address<<1) + 1; |
|
289 | 320 | while(!i2cStatusCheck(dev,0x000002)) |
|
290 | 321 | { |
|
291 |
if(0==(timeout--)) |
|
|
322 | if(0==(timeout--)) | |
|
323 | { | |
|
324 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |
|
325 | return -1; | |
|
326 | } | |
|
292 | 327 | } |
|
293 | 328 | if(count==1) |
|
294 | 329 | { |
|
295 | 330 | _dev_->CR1 &= ~(1<<10); |
|
296 | 331 | } |
|
297 | 332 | address=_dev_->SR2; |
|
298 | 333 | for(i=0;i<(count-1);i++) |
|
299 | 334 | { |
|
300 | 335 | timeout=i2ctimeout; |
|
301 | 336 | while(!i2cStatusCheck(dev,0x0000040)) |
|
302 | 337 | { |
|
303 |
if(0==(timeout--)) |
|
|
338 | if(0==(timeout--)) | |
|
339 | { | |
|
340 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |
|
341 | return -1; | |
|
342 | } | |
|
304 | 343 | } |
|
305 | 344 | data[i]=_dev_->DR; |
|
306 | 345 | } |
|
307 | 346 | _dev_->CR1 &= ~(1<<10); |
|
308 | 347 | _dev_->CR1 |= 1<<9; |
|
309 | 348 | timeout=i2ctimeout; |
|
310 | 349 | while(!i2cStatusCheck(dev,0x0000040)) |
|
311 | 350 | { |
|
312 |
if(0==(timeout--)) |
|
|
351 | if(0==(timeout--)) | |
|
352 | { | |
|
353 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |
|
354 | return -1; | |
|
355 | } | |
|
313 | 356 | } |
|
314 | 357 | data[i]=_dev_->DR; |
|
315 | 358 | timeout=i2ctimeout; |
|
316 | 359 | while(_dev_->CR1 & ((uint16_t)0x0200)) |
|
317 | 360 | { |
|
318 |
if(0==(timeout--)) |
|
|
361 | if(0==(timeout--)) | |
|
362 | { | |
|
363 | printf("Exited on timeout @ line %d\n\r",__LINE__); | |
|
364 | return -1; | |
|
365 | } | |
|
319 | 366 | } |
|
320 | 367 | _dev_->CR1 |= 1<<10; |
|
321 | 368 | return count; |
|
322 | 369 | } |
|
323 | 370 | return -1; |
|
324 | 371 | } |
|
325 | 372 | |
|
326 | 373 | |
|
327 | 374 | int i2cStatusCheck(i2c_t dev,int32_t flagMask) |
|
328 | 375 | { |
|
329 | 376 | int32_t flag; |
|
330 |
if((dev< |
|
|
377 | if((dev<i2c4)&&(dev>=i2c1)) | |
|
331 | 378 | { |
|
332 | 379 | I2C_TypeDef* _dev_ = _i2c_dev_table[(int)dev]; |
|
333 | 380 | flag= _dev_->SR1 + (_dev_->SR2<<16); |
|
334 | 381 | if(flagMask==(flag & flagMask)) |
|
335 | 382 | return 1; |
|
336 | 383 | return 0; |
|
337 | 384 | } |
|
338 | 385 | return -1; |
|
339 | 386 | } |
|
340 | 387 | |
|
341 | 388 |
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