@@ -0,0 +1,12 | |||
|
1 | TEMPLATE = app | |
|
2 | CONFIG += cpu | |
|
3 | ||
|
4 | ||
|
5 | UCMODEL=stm32f4 | |
|
6 | BSP = SOLAR_LFR_PSU | |
|
7 | ||
|
8 | LIBS += -lN25Q128 | |
|
9 | ||
|
10 | SOURCES += \ | |
|
11 | main.c | |
|
12 |
@@ -0,0 +1,93 | |||
|
1 | #include <stdio.h> | |
|
2 | #include <fat32.h> | |
|
3 | #include <gpio.h> | |
|
4 | #include <uart.h> | |
|
5 | #include <stm32f4xx.h> | |
|
6 | #include <bsp.h> | |
|
7 | #include <core.h> | |
|
8 | #include <N25Q128.h> | |
|
9 | #include <spi.h> | |
|
10 | ||
|
11 | extern streamdevice* __opnfiles__[]; | |
|
12 | ||
|
13 | /* | |
|
14 | N25Q128 pinout: | |
|
15 | MISO => PB14 | |
|
16 | MOSI => PB15 | |
|
17 | SCK => PB13 | |
|
18 | CS => PB12 | |
|
19 | WP => PC1 | |
|
20 | RESET/HOLD => PC2 | |
|
21 | */ | |
|
22 | void cs(int csstate) | |
|
23 | { | |
|
24 | gpiosetval(PB12,csstate); | |
|
25 | } | |
|
26 | ||
|
27 | void wp(int wpstate) | |
|
28 | { | |
|
29 | gpiosetval(PC1,wpstate); | |
|
30 | } | |
|
31 | ||
|
32 | void resetHold(int rhstate) | |
|
33 | { | |
|
34 | gpiosetval(PC2,rhstate); | |
|
35 | } | |
|
36 | ||
|
37 | int main() | |
|
38 | { | |
|
39 | spiopenandconfig(spi2,spiclkfirstedge|spimaster|spimsbfirst|spi8bits,10000,PB15,PB14,PB13,(uint32_t)NULL); | |
|
40 | //spiopenandconfig(spi2,spiclkfirstedge|spimaster|spimsbfirst|spi8bits,10000,PB15,PB14,PB13,PB12); | |
|
41 | gpio_t PC1pin= gpioopen(PC1); | |
|
42 | gpiosetdir(&PC1pin,gpiooutdir); | |
|
43 | gpio_t PC2pin= gpioopen(PC2); | |
|
44 | gpiosetdir(&PC2pin,gpiooutdir); | |
|
45 | gpio_t PB12pin= gpioopen(PB12); | |
|
46 | gpiosetdir(&PB12pin,gpiooutdir); | |
|
47 | gpioset(PC1); | |
|
48 | gpioset(PB12); | |
|
49 | gpioclr(PC2); | |
|
50 | eepromN25Q128Dev eeprom; | |
|
51 | eepromN25Q128open(&eeprom,spi2,&cs,&wp,&resetHold); | |
|
52 | //eepromN25Q128open(&eeprom,spi2,NULL,&wp,&resetHold); | |
|
53 | delay_100us(10); | |
|
54 | gpioset(PC2); | |
|
55 | gpioclr(PB12); | |
|
56 | spiputw(spi2,0x9E); | |
|
57 | char res[22]; | |
|
58 | spigetnc(spi2,res,22); | |
|
59 | gpioset(PB12); | |
|
60 | for(int i=0;i<22;i++) | |
|
61 | { | |
|
62 | printf("res[%d] = 0x%x\n\r",i,(int)res[i]); | |
|
63 | } | |
|
64 | eepromN25Q128enablewrite(&eeprom); | |
|
65 | delay_100us(10); | |
|
66 | eepromN25Q128writen(&eeprom,0,"hello World",11); | |
|
67 | delay_100us(10); | |
|
68 | eepromN25Q128readn(&eeprom,0,res,11); | |
|
69 | res[11]='\n'; | |
|
70 | res[12]='\r'; | |
|
71 | res[13]=0; | |
|
72 | //printf("read: %s",res); | |
|
73 | //printf("\n"); | |
|
74 | for(int i=0;i<11;i++) | |
|
75 | { | |
|
76 | printf("res[%d] = 0x%x\n\r",i,(int)res[i]); | |
|
77 | } | |
|
78 | while(1) | |
|
79 | { | |
|
80 | gpioset(LED3); | |
|
81 | delay_100us(10000); | |
|
82 | gpioclr(LED3); | |
|
83 | delay_100us(10000); | |
|
84 | } | |
|
85 | printf("hello world\n\r"); | |
|
86 | return 0; | |
|
87 | } | |
|
88 | ||
|
89 | ||
|
90 | ||
|
91 | ||
|
92 | ||
|
93 |
@@ -0,0 +1,15 | |||
|
1 | TEMPLATE = app | |
|
2 | CONFIG += cpu | |
|
3 | ||
|
4 | ||
|
5 | UCMODEL=stm32f4 | |
|
6 | DEFINES += CPUFREQ=160000000 | |
|
7 | ||
|
8 | #BSP = BEAGLESYNTH | |
|
9 | #BSP = SOLAR_LFR_PSU | |
|
10 | ||
|
11 | BSP = STM32F4Eval | |
|
12 | ||
|
13 | SOURCES += \ | |
|
14 | main.c | |
|
15 |
@@ -0,0 +1,106 | |||
|
1 | /* ---------------------------------------------------------------------- | |
|
2 | * Copyright (C) 2010 ARM Limited. All rights reserved. | |
|
3 | * | |
|
4 | * $Date: 29. November 2010 | |
|
5 | * $Revision: V1.0.3 | |
|
6 | * | |
|
7 | * Project: CMSIS DSP Library | |
|
8 | * Title: arm_convolution_example_f32.c | |
|
9 | * | |
|
10 | * Description: Example code demonstrating Convolution of two input signals using fft. | |
|
11 | * | |
|
12 | * Target Processor: Cortex-M4/Cortex-M3 | |
|
13 | * | |
|
14 | * | |
|
15 | * Version 1.0.3 2010/11/29 | |
|
16 | * Re-organized the CMSIS folders and updated documentation. | |
|
17 | * | |
|
18 | * Version 1.0.1 2010/10/05 KK | |
|
19 | * Production release and review comments incorporated. | |
|
20 | * | |
|
21 | * Version 1.0.0 2010/09/20 KK | |
|
22 | * Production release and review comments incorporated. | |
|
23 | * ------------------------------------------------------------------- */ | |
|
24 | ||
|
25 | #include <arm_math.h> | |
|
26 | #include <math.h> | |
|
27 | #include <stdio.h> | |
|
28 | #include <gpio.h> | |
|
29 | #include <bsp.h> | |
|
30 | //#include "math_helper.h" | |
|
31 | #include <terminal.h> | |
|
32 | ||
|
33 | /* ---------------------------------------------------------------------- | |
|
34 | * Defines each of the tests performed | |
|
35 | * ------------------------------------------------------------------- */ | |
|
36 | //#define MAX_BLOCKSIZE 1024 | |
|
37 | #define MAX_BLOCKSIZE 16 | |
|
38 | ||
|
39 | /* ---------------------------------------------------------------------- | |
|
40 | * Declare I/O buffers | |
|
41 | * ------------------------------------------------------------------- */ | |
|
42 | float32_t Ak[MAX_BLOCKSIZE*2]; /* Input A */ | |
|
43 | ||
|
44 | #define LCD_COLOR_WHITE 0xFFFF | |
|
45 | #define LCD_COLOR_BLACK 0x0000 | |
|
46 | #define LCD_COLOR_GREY 0xF7DE | |
|
47 | #define LCD_COLOR_BLUE 0x001F | |
|
48 | #define LCD_COLOR_BLUE2 0x051F | |
|
49 | #define LCD_COLOR_RED 0xF800 | |
|
50 | #define LCD_COLOR_MAGENTA 0xF81F | |
|
51 | #define LCD_COLOR_GREEN 0x07E0 | |
|
52 | #define LCD_COLOR_CYAN 0x7FFF | |
|
53 | #define LCD_COLOR_YELLOW 0xFFE0 | |
|
54 | extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__]; | |
|
55 | ||
|
56 | ||
|
57 | int main() | |
|
58 | { | |
|
59 | ||
|
60 | arm_status status; /* Status of the example */ | |
|
61 | arm_cfft_radix4_instance_f32 cfft_instance; /* CFFT Structure instance */ | |
|
62 | ||
|
63 | /* CFFT Structure instance pointer */ | |
|
64 | arm_cfft_radix4_instance_f32 *cfft_instance_ptr = | |
|
65 | (arm_cfft_radix4_instance_f32*) &cfft_instance; | |
|
66 | ||
|
67 | /* Initialise the fft input buffers with all zeros */ | |
|
68 | arm_fill_f32(0.0, Ak, MAX_BLOCKSIZE); | |
|
69 | for(int i =0;i<(MAX_BLOCKSIZE);i++) | |
|
70 | { | |
|
71 | Ak[2*i] = sin(4.0*PI*(float32_t)i/MAX_BLOCKSIZE); | |
|
72 | printf("%f\n\r",Ak[i]); | |
|
73 | } | |
|
74 | ||
|
75 | //gpioclr(LED1); | |
|
76 | ||
|
77 | /* Initialize the CFFT function to compute 64 point fft */ | |
|
78 | status = arm_cfft_radix4_init_f32(cfft_instance_ptr, MAX_BLOCKSIZE, 0, 1); | |
|
79 | ||
|
80 | /* Transform input a[n] from time domain to frequency domain A[k] */ | |
|
81 | arm_cfft_radix4_f32(cfft_instance_ptr, Ak); | |
|
82 | ||
|
83 | //gpioset(LED1); | |
|
84 | ||
|
85 | /* Initialize the CIFFT function to compute 64 point ifft */ | |
|
86 | //status = arm_cfft_radix4_init_f32(cfft_instance_ptr, 16, 1, 1); | |
|
87 | ||
|
88 | /* Transform the multiplication output from frequency domain to time domain, | |
|
89 | that gives the convolved output */ | |
|
90 | //arm_cfft_radix4_f32(cfft_instance_ptr, AxB); | |
|
91 | ||
|
92 | /* SNR Calculation */ | |
|
93 | //snr = arm_snr_f32((float32_t *)testRefOutput_f32, AxB, srcALen + srcBLen - 1); | |
|
94 | ||
|
95 | /* Compare the SNR with threshold to test whether the | |
|
96 | computed output is matched with the reference output values. */ | |
|
97 | printf("FFT Done!\n\r"); | |
|
98 | for(int i =0;i<(MAX_BLOCKSIZE*2);i++) | |
|
99 | { | |
|
100 | printf("%f %f\n\r",Ak[2*i],Ak[(2*i)+1]); | |
|
101 | } | |
|
102 | ||
|
103 | ||
|
104 | while(1); /* main function does not return */ | |
|
105 | } | |
|
106 |
@@ -0,0 +1,56 | |||
|
1 | /*------------------------------------------------------------------------------ | |
|
2 | #-- This file is a part of the libuc, microcontroler library | |
|
3 | #-- Copyright (C) 2011, Alexis Jeandet | |
|
4 | #-- | |
|
5 | #-- This program is free software; you can redistribute it and/or modify | |
|
6 | #-- it under the terms of the GNU General Public License as published by | |
|
7 | #-- the Free Software Foundation; either version 3 of the License, or | |
|
8 | #-- (at your option) any later version. | |
|
9 | #-- | |
|
10 | #-- This program is distributed in the hope that it will be useful, | |
|
11 | #-- but WITHOUT ANY WARRANTY; without even the implied warranty of | |
|
12 | #-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
|
13 | #-- GNU General Public License for more details. | |
|
14 | #-- | |
|
15 | #-- You should have received a copy of the GNU General Public License | |
|
16 | #-- along with this program; if not, write to the Free Software | |
|
17 | #-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
|
18 | #------------------------------------------------------------------------------- | |
|
19 | #-- Author : Alexis Jeandet | |
|
20 | #-- Mail : alexis.jeandet@gmail.com | |
|
21 | #-------------------------------------------------------------------------------*/ | |
|
22 | #include "spi.h" | |
|
23 | #include "VS10XX.h" | |
|
24 | //#include <bsp.h> | |
|
25 | ||
|
26 | void vs10XXopen(vs10XXDev* codec,spi_t dev){ | |
|
27 | codec->SPIdev = dev; | |
|
28 | ||
|
29 | } | |
|
30 | ||
|
31 | void vs10XXsoftreset(vs10XXDev* dev) | |
|
32 | { | |
|
33 | vs10XXcmdwrite(dev,VSMODE,(1<<2)); | |
|
34 | } | |
|
35 | ||
|
36 | int vs10XXcmdread(vs10XXDev* dev,char address) | |
|
37 | { | |
|
38 | int result; | |
|
39 | while(!vs10XXDREQ()); | |
|
40 | vs10XXclearXCS(); | |
|
41 | spiputw(dev->SPIdev,(3<<8)+address); | |
|
42 | result = spigetw(dev->SPIdev); | |
|
43 | vs10XXsetXCS(); | |
|
44 | return result; | |
|
45 | } | |
|
46 | ||
|
47 | ||
|
48 | void vs10XXcmdwrite(vs10XXDev* dev,char address,int value) | |
|
49 | { | |
|
50 | while(!vs10XXDREQ()); | |
|
51 | vs10XXclearXCS(); | |
|
52 | spiputw(dev->SPIdev,(2<<8)+address); | |
|
53 | spiputw(dev->SPIdev,value); | |
|
54 | vs10XXsetXCS(); | |
|
55 | } | |
|
56 |
@@ -0,0 +1,14 | |||
|
1 | TEMPLATE = lib | |
|
2 | OBJECTS_DIR = obj | |
|
3 | TARGET = vs10XX | |
|
4 | ||
|
5 | SOURCES += VS10XX.c | |
|
6 | ||
|
7 | ||
|
8 | HEADERS += ../../../includes/VS10XX.h | |
|
9 | ||
|
10 | UCMODEL=stm32f4 | |
|
11 | ||
|
12 | target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL | |
|
13 | INSTALLS += target | |
|
14 |
@@ -0,0 +1,103 | |||
|
1 | /*------------------------------------------------------------------------------ | |
|
2 | -- This file is a part of the libuc, microcontroler library | |
|
3 | -- Copyright (C) 2011, Alexis Jeandet | |
|
4 | -- | |
|
5 | -- This program is free software; you can redistribute it and/or modify | |
|
6 | -- it under the terms of the GNU General Public License as published by | |
|
7 | -- the Free Software Foundation; either version 3 of the License, or | |
|
8 | -- (at your option) any later version. | |
|
9 | -- | |
|
10 | -- This program is distributed in the hope that it will be useful, | |
|
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
|
13 | -- GNU General Public License for more details. | |
|
14 | -- | |
|
15 | -- You should have received a copy of the GNU General Public License | |
|
16 | -- along with this program; if not, write to the Free Software | |
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
|
18 | ------------------------------------------------------------------------------- | |
|
19 | -- Author : Alexis Jeandet | |
|
20 | -- Mail : alexis.jeandet@gmail.com | |
|
21 | -------------------------------------------------------------------------------*/ | |
|
22 | #include <24LC0X.h> | |
|
23 | #include <i2c.h> | |
|
24 | #include <core.h> | |
|
25 | /* | |
|
26 | struct 24LC0X_str | |
|
27 | { | |
|
28 | i2cDev iicdev; | |
|
29 | unsigned char devAddress; | |
|
30 | unsigned char size; | |
|
31 | }; | |
|
32 | */ | |
|
33 | ||
|
34 | ||
|
35 | void eeprom24lc0xopen(eeprom24lc0xDev* dev, i2c_t iicdev, unsigned char A0_A1_A2_val, unsigned int size) | |
|
36 | { | |
|
37 | dev->iicdev = iicdev; | |
|
38 | dev->devAddress = 0x50 | (A0_A1_A2_val & 0x7); | |
|
39 | if(size == 2048) dev->size = 2; | |
|
40 | if(size == 1024) dev->size = 1; | |
|
41 | } | |
|
42 | ||
|
43 | void eeprom24lc0xpagewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char* page) | |
|
44 | { | |
|
45 | int cmdcnt=1,datacnt=8; | |
|
46 | //i2cwrite(dev.iicdev,address,page) | |
|
47 | //i2cwrite2(dev.iicdev,dev.devAddress,&address,&cmdcnt,page,&datacnt); | |
|
48 | } | |
|
49 | ||
|
50 | ||
|
51 | void eeprom24lc0xpageread(eeprom24lc0xDev dev,unsigned char address,unsigned char* page) | |
|
52 | { | |
|
53 | int cmdcnt=1,datacnt=8; | |
|
54 | /*i2cwrite(dev.iicdev,dev.devAddress,&address,&cmdcnt); | |
|
55 | i2cread(dev.iicdev,dev.devAddress,page,&datacnt);*/ | |
|
56 | } | |
|
57 | ||
|
58 | void eeprom24lc0xbytewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char data) | |
|
59 | { | |
|
60 | int cmdcnt=1,datacnt=1; | |
|
61 | //i2cwrite2(dev.iicdev,dev.devAddress,&address,&cmdcnt,&data,&datacnt); | |
|
62 | } | |
|
63 | ||
|
64 | ||
|
65 | unsigned char eeprom24lc0xbyteread(eeprom24lc0xDev dev,unsigned char address) | |
|
66 | { | |
|
67 | int cmdcnt=1,datacnt=1; | |
|
68 | unsigned char data = 0; | |
|
69 | /* i2cwrite(dev.iicdev,dev.devAddress,&address,&cmdcnt); | |
|
70 | i2cread(dev.iicdev,dev.devAddress,&data,&datacnt);*/ | |
|
71 | return data; | |
|
72 | } | |
|
73 | ||
|
74 | ||
|
75 | void eeprom24lc0xreadn(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count) | |
|
76 | { | |
|
77 | int cmdcnt=1,datacnt=count; | |
|
78 | /* i2cwrite(dev.iicdev,dev.devAddress,&address,&cmdcnt); | |
|
79 | i2cread(dev.iicdev,dev.devAddress,data,&datacnt);*/ | |
|
80 | ||
|
81 | } | |
|
82 | ||
|
83 | void eeprom24lc0xwriten(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count) | |
|
84 | { | |
|
85 | int cmdcnt=1,datacnt=8; | |
|
86 | while(count >8) | |
|
87 | { | |
|
88 | cmdcnt=1;datacnt=8; | |
|
89 | // while(i2noerr!=i2cwrite2(dev.iicdev,dev.devAddress,&address,&cmdcnt,data,&datacnt)){cmdcnt=1;datacnt=8;} | |
|
90 | count-=8; | |
|
91 | address+=8; | |
|
92 | data+=8; | |
|
93 | } | |
|
94 | cmdcnt=1;datacnt=count; | |
|
95 | // while(i2noerr!=i2cwrite2(dev.iicdev,dev.devAddress,&address,&cmdcnt,data,&datacnt)){cmdcnt=1;datacnt=count;} | |
|
96 | } | |
|
97 | ||
|
98 | ||
|
99 | ||
|
100 | ||
|
101 | ||
|
102 | ||
|
103 |
@@ -0,0 +1,15 | |||
|
1 | TEMPLATE = lib | |
|
2 | OBJECTS_DIR = obj | |
|
3 | ||
|
4 | SOURCES += 24LC0X.c | |
|
5 | HEADERS += ../../../includes/24LC0X.h | |
|
6 | ||
|
7 | INCLUDEPATH += ../../../includes \ | |
|
8 | ../../CPU/STM32F4xx_StdPeriph_Driver/inc \ | |
|
9 | ../../CPU/CMSIS/Include | |
|
10 | ||
|
11 | ||
|
12 | UCMODEL=stm32f4 | |
|
13 | ||
|
14 | target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL | |
|
15 | INSTALLS += target |
@@ -0,0 +1,136 | |||
|
1 | /*------------------------------------------------------------------------------ | |
|
2 | -- This file is a part of the libuc, microcontroler library | |
|
3 | -- Copyright (C) 2013, Alexis Jeandet | |
|
4 | -- | |
|
5 | -- This program is free software; you can redistribute it and/or modify | |
|
6 | -- it under the terms of the GNU General Public License as published by | |
|
7 | -- the Free Software Foundation; either version 3 of the License, or | |
|
8 | -- (at your option) any later version. | |
|
9 | -- | |
|
10 | -- This program is distributed in the hope that it will be useful, | |
|
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
|
13 | -- GNU General Public License for more details. | |
|
14 | -- | |
|
15 | -- You should have received a copy of the GNU General Public License | |
|
16 | -- along with this program; if not, write to the Free Software | |
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
|
18 | ------------------------------------------------------------------------------- | |
|
19 | -- Author : Alexis Jeandet | |
|
20 | -- Mail : alexis.jeandet@gmail.com | |
|
21 | -------------------------------------------------------------------------------*/ | |
|
22 | #include <N25Q128.h> | |
|
23 | #include <core.h> | |
|
24 | #include <stdio.h> | |
|
25 | ||
|
26 | ||
|
27 | ||
|
28 | void eepromN25Q128open(eepromN25Q128Dev *dev, spi_t spidev, void (*select)(int), void (*writeprotect)(int), void (*holdreset)(int)) | |
|
29 | { | |
|
30 | dev->spidev = spidev; | |
|
31 | dev->holdreset = holdreset; | |
|
32 | dev->select = select; | |
|
33 | dev->writeprotect = writeprotect; | |
|
34 | } | |
|
35 | ||
|
36 | void eepromN25Q128pagewrite(eepromN25Q128Dev* dev,uint32_t address,unsigned char* page) | |
|
37 | { | |
|
38 | int cmdcnt=1,datacnt=8; | |
|
39 | } | |
|
40 | ||
|
41 | ||
|
42 | void eepromN25Q128pageread(eepromN25Q128Dev* dev,uint32_t address,unsigned char* page) | |
|
43 | { | |
|
44 | int cmdcnt=1,datacnt=8; | |
|
45 | } | |
|
46 | ||
|
47 | void eepromN25Q128bytewrite(eepromN25Q128Dev* dev,uint32_t address,unsigned char data) | |
|
48 | { | |
|
49 | int cmdcnt=1,datacnt=1; | |
|
50 | } | |
|
51 | ||
|
52 | ||
|
53 | unsigned char eepromN25Q128byteread(eepromN25Q128Dev* dev,uint32_t address) | |
|
54 | { | |
|
55 | int cmdcnt=1,datacnt=1; | |
|
56 | unsigned char data = 0; | |
|
57 | return data; | |
|
58 | } | |
|
59 | ||
|
60 | ||
|
61 | void eepromN25Q128readn(eepromN25Q128Dev* dev,uint32_t address,unsigned char* data, unsigned int count) | |
|
62 | { | |
|
63 | ||
|
64 | char baddress[3]; | |
|
65 | baddress[0]=(char)0xFF&((address)>>16); | |
|
66 | baddress[1]=(char)0xFF&((address)>>8); | |
|
67 | baddress[2]=(char)0xFF&((address)); | |
|
68 | printf("about to read %d bytes\n\r",count); | |
|
69 | if(dev->select!=NULL)dev->select(0); | |
|
70 | spiputw(dev->spidev,N25Q128_READ); | |
|
71 | spiputnc(dev->spidev,baddress,3); | |
|
72 | spigetnc(dev->spidev,data,count); | |
|
73 | if(dev->select!=NULL)dev->select(1); | |
|
74 | ||
|
75 | } | |
|
76 | ||
|
77 | void eepromN25Q128writen(eepromN25Q128Dev* dev,uint32_t address,unsigned char* data, unsigned int count) | |
|
78 | { | |
|
79 | char baddress[3]; | |
|
80 | if(dev->select!=NULL)dev->select(0); | |
|
81 | for(int i=0;i<(count/N25Q128_PAGE_SZ);i++) | |
|
82 | { | |
|
83 | printf("about to send %d bytes\n\r",N25Q128_PAGE_SZ); | |
|
84 | int index =i*N25Q128_PAGE_SZ; | |
|
85 | baddress[0]=(char)0xFF&((address+index)>>16); | |
|
86 | baddress[1]=(char)0xFF&((address+index)>>8); | |
|
87 | baddress[2]=(char)0xFF&((address+index)); | |
|
88 | if(dev->select!=NULL)dev->select(0); | |
|
89 | spiputw(dev->spidev,N25Q128_PP); | |
|
90 | spiputnc(dev->spidev,baddress,3); | |
|
91 | spiputnc(dev->spidev,data+(index),count); | |
|
92 | if(dev->select!=NULL) | |
|
93 | { | |
|
94 | dev->select(1); | |
|
95 | } | |
|
96 | else { | |
|
97 | while (!spitransactionfinished(dev->spidev)); | |
|
98 | } | |
|
99 | } | |
|
100 | int mod = count%N25Q128_PAGE_SZ; | |
|
101 | if(mod) | |
|
102 | { | |
|
103 | baddress[0]=(char)0xFF&((address+(count-mod))>>16); | |
|
104 | baddress[1]=(char)0xFF&((address+(count-mod))>>8); | |
|
105 | baddress[2]=(char)0xFF&((address+(count-mod))); | |
|
106 | printf("about to send %d bytes\n\r",mod); | |
|
107 | if(dev->select!=NULL)dev->select(0); | |
|
108 | spiputw(dev->spidev,N25Q128_PP); | |
|
109 | spiputnc(dev->spidev,baddress,3); | |
|
110 | spiputnc(dev->spidev,data+(count-mod),mod); | |
|
111 | if(dev->select!=NULL) | |
|
112 | { | |
|
113 | dev->select(1); | |
|
114 | } | |
|
115 | else { | |
|
116 | while (!spitransactionfinished(dev->spidev)); | |
|
117 | } | |
|
118 | ||
|
119 | } | |
|
120 | ||
|
121 | } | |
|
122 | ||
|
123 | ||
|
124 | void eepromN25Q128enablewrite(eepromN25Q128Dev *dev) | |
|
125 | { | |
|
126 | if(dev->select!=NULL)dev->select(0); | |
|
127 | spiputw(dev->spidev,N25Q128_WREN); | |
|
128 | if(dev->select!=NULL)dev->select(1); | |
|
129 | ||
|
130 | } | |
|
131 | ||
|
132 | ||
|
133 | ||
|
134 | ||
|
135 | ||
|
136 |
@@ -0,0 +1,15 | |||
|
1 | TEMPLATE = lib | |
|
2 | OBJECTS_DIR = obj | |
|
3 | ||
|
4 | SOURCES += N25Q128.c | |
|
5 | HEADERS += ../../../includes/N25Q128.h | |
|
6 | ||
|
7 | INCLUDEPATH += ../../../includes \ | |
|
8 | ../../CPU/STM32F4xx_StdPeriph_Driver/inc \ | |
|
9 | ../../CPU/CMSIS/Include | |
|
10 | ||
|
11 | ||
|
12 | UCMODEL=stm32f4 | |
|
13 | ||
|
14 | target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL | |
|
15 | INSTALLS += target |
@@ -0,0 +1,74 | |||
|
1 | /*------------------------------------------------------------------------------ | |
|
2 | -- This file is a part of the libuc, microcontroler library | |
|
3 | -- Copyright (C) 2013, Alexis Jeandet | |
|
4 | -- | |
|
5 | -- This program is free software; you can redistribute it and/or modify | |
|
6 | -- it under the terms of the GNU General Public License as published by | |
|
7 | -- the Free Software Foundation; either version 3 of the License, or | |
|
8 | -- (at your option) any later version. | |
|
9 | -- | |
|
10 | -- This program is distributed in the hope that it will be useful, | |
|
11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of | |
|
12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
|
13 | -- GNU General Public License for more details. | |
|
14 | -- | |
|
15 | -- You should have received a copy of the GNU General Public License | |
|
16 | -- along with this program; if not, write to the Free Software | |
|
17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
|
18 | ------------------------------------------------------------------------------- | |
|
19 | -- Author : Alexis Jeandet | |
|
20 | -- Mail : alexis.jeandet@gmail.com | |
|
21 | -------------------------------------------------------------------------------*/ | |
|
22 | #ifndef N25Q128_H | |
|
23 | #define N25Q128_H | |
|
24 | ||
|
25 | #include <spi.h> | |
|
26 | #include <uhandle.h> | |
|
27 | #include <stdint.h> | |
|
28 | ||
|
29 | typedef struct eepromN25Q128Dev | |
|
30 | { | |
|
31 | spi_t spidev; | |
|
32 | void (*select)(int sel); | |
|
33 | void (*writeprotect)(int wp); | |
|
34 | void (*holdreset)(int hr); | |
|
35 | }eepromN25Q128Dev; | |
|
36 | ||
|
37 | #define N25Q128_PAGE_SZ 256 | |
|
38 | ||
|
39 | #define N25Q128_READID 0x9E | |
|
40 | #define N25Q128_READ 0x03 | |
|
41 | #define N25Q128_FASTREAD 0x0B | |
|
42 | #define N25Q128_DOFR 0x3B | |
|
43 | #define N25Q128_DIOFR 0xBB | |
|
44 | #define N25Q128_QOFR 0x6B | |
|
45 | #define N25Q128_QIOFR 0xEB | |
|
46 | #define N25Q128_ROTP 0x4B | |
|
47 | #define N25Q128_WREN 0x06 | |
|
48 | #define N25Q128_WRDI 0x04 | |
|
49 | #define N25Q128_PP 0x02 | |
|
50 | ||
|
51 | ||
|
52 | ||
|
53 | ||
|
54 | ||
|
55 | extern void eepromN25Q128open(eepromN25Q128Dev* dev,spi_t spidev,void (*select)(int sel),void (*writeprotect)(int wp),void (*holdreset)(int hr)); | |
|
56 | extern void eepromN25Q128pagewrite(eepromN25Q128Dev* dev,uint32_t address,unsigned char* page); | |
|
57 | extern void eepromN25Q128pageread(eepromN25Q128Dev* dev,uint32_t address,unsigned char* page); | |
|
58 | extern void eepromN25Q128bytewrite(eepromN25Q128Dev* dev,uint32_t address,unsigned char data); | |
|
59 | extern unsigned char eepromN25Q128byteread(eepromN25Q128Dev* dev,uint32_t address); | |
|
60 | extern void eepromN25Q128readn(eepromN25Q128Dev* dev,uint32_t address,unsigned char* data, unsigned int count); | |
|
61 | extern void eepromN25Q128writen(eepromN25Q128Dev* dev,uint32_t address,unsigned char* data, unsigned int count); | |
|
62 | extern void eepromN25Q128enablewrite(eepromN25Q128Dev* dev); | |
|
63 | ||
|
64 | ||
|
65 | ||
|
66 | ||
|
67 | #endif | |
|
68 | ||
|
69 | ||
|
70 | ||
|
71 | ||
|
72 | ||
|
73 | ||
|
74 |
@@ -0,0 +1,78 | |||
|
1 | /*------------------------------------------------------------------------------ | |
|
2 | #-- This file is a part of the libuc, microcontroler library | |
|
3 | #-- Copyright (C) 2011, Alexis Jeandet | |
|
4 | #-- | |
|
5 | #-- This program is free software; you can redistribute it and/or modify | |
|
6 | #-- it under the terms of the GNU General Public License as published by | |
|
7 | #-- the Free Software Foundation; either version 3 of the License, or | |
|
8 | #-- (at your option) any later version. | |
|
9 | #-- | |
|
10 | #-- This program is distributed in the hope that it will be useful, | |
|
11 | #-- but WITHOUT ANY WARRANTY; without even the implied warranty of | |
|
12 | #-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
|
13 | #-- GNU General Public License for more details. | |
|
14 | #-- | |
|
15 | #-- You should have received a copy of the GNU General Public License | |
|
16 | #-- along with this program; if not, write to the Free Software | |
|
17 | #-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
|
18 | #------------------------------------------------------------------------------- | |
|
19 | #-- Author : Alexis Jeandet | |
|
20 | #-- Mail : alexis.jeandet@gmail.com | |
|
21 | #-------------------------------------------------------------------------------*/ | |
|
22 | #ifndef VS10XX_H | |
|
23 | #define VS10XX_H | |
|
24 | #include <uhandle.h> | |
|
25 | #include <spi.h> | |
|
26 | ||
|
27 | #define VSMODE 0 | |
|
28 | #define VSSTATUS 1 | |
|
29 | #define VSBASS 2 | |
|
30 | #define VSCLOCKF 3 | |
|
31 | #define VSDECODE_TIME 4 | |
|
32 | #define VSAUDATA 5 | |
|
33 | #define VSWRAM 6 | |
|
34 | #define VSWRAMADDR 7 | |
|
35 | #define VSHDAT0 8 | |
|
36 | #define VSHDAT1 9 | |
|
37 | #define VSAIADDR 0xA | |
|
38 | #define VSVOL 0xB | |
|
39 | #define VSAICTRL0 0xC | |
|
40 | #define VSAICTRL1 0xD | |
|
41 | #define VSAICTRL2 0xE | |
|
42 | #define VSAICTRL3 0xF | |
|
43 | ||
|
44 | typedef struct vs10XXDev | |
|
45 | { | |
|
46 | spi_t SPIdev; | |
|
47 | int a; | |
|
48 | }vs10XXDev; | |
|
49 | ||
|
50 | ||
|
51 | void vs10XXopen(vs10XXDev* codec,spi_t dev); | |
|
52 | void vs10XXsoftreset(vs10XXDev* dev); | |
|
53 | int vs10XXcmdread(vs10XXDev* dev,char address); | |
|
54 | void vs10XXcmdwrite(vs10XXDev* dev,char address,int value); | |
|
55 | ||
|
56 | extern void vs10XXclearXCS(); | |
|
57 | extern void vs10XXsetXCS(); | |
|
58 | extern int vs10XXDREQ(); | |
|
59 | ||
|
60 | #endif //VS10XX_H | |
|
61 | ||
|
62 | ||
|
63 | ||
|
64 | ||
|
65 | ||
|
66 | ||
|
67 | ||
|
68 | ||
|
69 | ||
|
70 | ||
|
71 | ||
|
72 | ||
|
73 | ||
|
74 | ||
|
75 | ||
|
76 | ||
|
77 | ||
|
78 |
@@ -1,96 +1,87 | |||
|
1 | 1 | /*------------------------------------------------------------------------------ |
|
2 | 2 | -- This file is a part of the libuc, microcontroler library |
|
3 | 3 | -- Copyright (C) 2011, Alexis Jeandet |
|
4 | 4 | -- |
|
5 | 5 | -- This program is free software; you can redistribute it and/or modify |
|
6 | 6 | -- it under the terms of the GNU General Public License as published by |
|
7 | 7 | -- the Free Software Foundation; either version 3 of the License, or |
|
8 | 8 | -- (at your option) any later version. |
|
9 | 9 | -- |
|
10 | 10 | -- This program is distributed in the hope that it will be useful, |
|
11 | 11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
12 | 12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
13 | 13 | -- GNU General Public License for more details. |
|
14 | 14 | -- |
|
15 | 15 | -- You should have received a copy of the GNU General Public License |
|
16 | 16 | -- along with this program; if not, write to the Free Software |
|
17 | 17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
18 | 18 | ------------------------------------------------------------------------------- |
|
19 | 19 | -- Author : Alexis Jeandet |
|
20 | 20 | -- Mail : alexis.jeandet@gmail.com |
|
21 | 21 | -------------------------------------------------------------------------------*/ |
|
22 | 22 | #ifndef BSP_H |
|
23 | 23 | #define BSP_H |
|
24 | 24 | #include <stm32f4xx.h> |
|
25 | 25 | #include <stm32f4xx_gpio.h> |
|
26 | 26 | #include <stm32f4xx_rcc.h> |
|
27 | 27 | #include <gpio.h> |
|
28 | 28 | |
|
29 |
#define __MAX_OPENED_FILES__ |
|
|
30 |
#define __FS_ROOT_SIZE__ |
|
|
29 | #define __MAX_OPENED_FILES__ 32 | |
|
30 | #define __FS_ROOT_SIZE__ 32 | |
|
31 | 31 | /* |
|
32 | 32 | #ifndef PD8 |
|
33 | 33 | #define PD8 |
|
34 | 34 | #endif |
|
35 | 35 | #ifndef PD9 |
|
36 | 36 | #define PD9 |
|
37 | 37 | #endif |
|
38 | 38 | */ |
|
39 | 39 | |
|
40 | 40 | #define LED1 PD12 |
|
41 | 41 | #define LED2 PD13 |
|
42 | 42 | #define LED3 PD14 |
|
43 | 43 | #define LED4 PD15 |
|
44 | 44 | |
|
45 | ||
|
46 | #define LED3ON GPIOB->BSRRH = GPIO_Pin_15 | |
|
47 | #define LED2ON GPIOD->BSRRH = GPIO_Pin_8 | |
|
48 | #define LED1ON GPIOD->BSRRH = GPIO_Pin_9 | |
|
49 | ||
|
50 | #define LED3OFF GPIOB->BSRRL = GPIO_Pin_15 | |
|
51 | #define LED2OFF GPIOD->BSRRL = GPIO_Pin_8 | |
|
52 | #define LED1OFF GPIOD->BSRRL = GPIO_Pin_9 | |
|
53 | ||
|
54 | 45 | extern float VREF0; |
|
55 | 46 | |
|
56 | 47 | extern uint32_t currentCpuFreq; |
|
57 | 48 | |
|
58 | 49 | extern int bsp_init(); |
|
59 | 50 | |
|
60 | 51 | extern void bsp_GPIO_init(); |
|
61 | 52 | extern void bsp_uart_init(); |
|
62 | 53 | extern void bsp_iic_init(); |
|
63 | 54 | extern void bsp_spi_init(); |
|
64 | 55 | extern void bsp_SD_init(); |
|
65 | 56 | |
|
66 | 57 | /* VS1053 */ |
|
67 | 58 | extern void clearXCS(); |
|
68 | 59 | extern void setXCS(); |
|
69 | 60 | extern int vs10XXDREQ(); |
|
70 | 61 | |
|
71 | 62 | /* SD CARD */ |
|
72 | 63 | void bsppowersdcard(char onoff); |
|
73 | 64 | char bspsdcardpresent(); |
|
74 | 65 | void bspsdcardselect(char YESNO); |
|
75 | 66 | char bspsdcardwriteprotected(); |
|
76 | 67 | |
|
77 | 68 | #endif |
|
78 | 69 | |
|
79 | 70 | |
|
80 | 71 | |
|
81 | 72 | |
|
82 | 73 | |
|
83 | 74 | |
|
84 | 75 | |
|
85 | 76 | |
|
86 | 77 | |
|
87 | 78 | |
|
88 | 79 | |
|
89 | 80 | |
|
90 | 81 | |
|
91 | 82 | |
|
92 | 83 | |
|
93 | 84 | |
|
94 | 85 | |
|
95 | 86 | |
|
96 | 87 |
@@ -1,19 +1,20 | |||
|
1 | 1 | TEMPLATE = subdirs |
|
2 | 2 | CONFIG += ordered |
|
3 | 3 | SUBDIRS += QtTest/test.pro \ |
|
4 | 4 | SOLAR_PSU_HELLO/hello.pro \ |
|
5 | 5 | SDCARD \ |
|
6 | 6 | STM32F4IT \ |
|
7 | 7 | M4StickV2 \ |
|
8 | 8 | lcdHello \ |
|
9 | 9 | BeagleSynthHello \ |
|
10 | 10 | lcdTerminal \ |
|
11 | 11 | BeagleSynthHelloSupMon \ |
|
12 | TEST_CMSIS_FFT | |
|
12 | TEST_CMSIS_FFT \ | |
|
13 | N25Q128_test | |
|
13 | 14 | |
|
14 | 15 | |
|
15 | 16 | |
|
16 | 17 | |
|
17 | 18 | |
|
18 | 19 | |
|
19 | 20 |
@@ -1,5 +1,5 | |||
|
1 | 1 | TEMPLATE = subdirs |
|
2 | 2 | CONFIG += ordered |
|
3 | 3 | |
|
4 |
SUBDIRS += CS43L22 |
|
|
5 |
|
|
|
4 | SUBDIRS += CS43L22 \ | |
|
5 | VS10XX |
@@ -1,14 +1,16 | |||
|
1 | 1 | TEMPLATE = subdirs |
|
2 | 2 | |
|
3 | 3 | SUBDIRS += FILE_SYSTEM \ |
|
4 | 4 | AUDIO \ |
|
5 | 5 | POWER \ |
|
6 | 6 | GRAPHIC \ |
|
7 |
|
|
|
7 | Threading \ | |
|
8 | EEPROMS | |
|
8 | 9 | |
|
9 | 10 | |
|
10 | 11 | |
|
11 | 12 | |
|
12 | 13 | |
|
13 | 14 | |
|
14 | 15 | |
|
16 |
@@ -1,57 +1,56 | |||
|
1 | 1 | /*------------------------------------------------------------------------------ |
|
2 | 2 | -- This file is a part of the libuc, microcontroler library |
|
3 | 3 | -- Copyright (C) 2011, Alexis Jeandet |
|
4 | 4 | -- |
|
5 | 5 | -- This program is free software; you can redistribute it and/or modify |
|
6 | 6 | -- it under the terms of the GNU General Public License as published by |
|
7 | 7 | -- the Free Software Foundation; either version 3 of the License, or |
|
8 | 8 | -- (at your option) any later version. |
|
9 | 9 | -- |
|
10 | 10 | -- This program is distributed in the hope that it will be useful, |
|
11 | 11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
12 | 12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
13 | 13 | -- GNU General Public License for more details. |
|
14 | 14 | -- |
|
15 | 15 | -- You should have received a copy of the GNU General Public License |
|
16 | 16 | -- along with this program; if not, write to the Free Software |
|
17 | 17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
18 | 18 | ------------------------------------------------------------------------------- |
|
19 | 19 | -- Author : Alexis Jeandet |
|
20 | 20 | -- Mail : alexis.jeandet@gmail.com |
|
21 | 21 | -------------------------------------------------------------------------------*/ |
|
22 | 22 | #ifndef B24LC0X_H |
|
23 | 23 | #define B24LC0X_H |
|
24 | 24 | |
|
25 |
#include |
|
|
25 | #include <i2c.h> | |
|
26 | 26 | #include <uhandle.h> |
|
27 | 27 | |
|
28 |
struct eeprom24 |
|
|
28 | typedef struct eeprom24lc0xDev | |
|
29 | 29 | { |
|
30 |
i2c |
|
|
30 | i2c_t iicdev; | |
|
31 | 31 | unsigned char devAddress; |
|
32 | 32 | unsigned char size; |
|
33 | }; | |
|
34 | ||
|
35 | typedef struct eeprom24LC0X_str eeprom24lc0xDev; | |
|
33 | }eeprom24lc0xDev; | |
|
36 | 34 | |
|
37 | 35 | |
|
38 | extern void eeprom24lc0xopen(eeprom24lc0xDev* dev,i2cDev iicdev,unsigned char A0_A1_A2_val,unsigned int size); | |
|
36 | ||
|
37 | extern void eeprom24lc0xopen(eeprom24lc0xDev* dev,i2c_t iicdev,unsigned char A0_A1_A2_val,unsigned int size); | |
|
39 | 38 | |
|
40 | 39 | extern void eeprom24lc0xpagewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char* page); |
|
41 | 40 | extern void eeprom24lc0xpageread(eeprom24lc0xDev dev,unsigned char address,unsigned char* page); |
|
42 | 41 | extern void eeprom24lc0xbytewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char data); |
|
43 | 42 | extern unsigned char eeprom24lc0xbyteread(eeprom24lc0xDev dev,unsigned char address); |
|
44 | 43 | extern void eeprom24lc0xreadn(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count); |
|
45 | 44 | extern void eeprom24lc0xwriten(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count); |
|
46 | 45 | |
|
47 | 46 | |
|
48 | 47 | |
|
49 | 48 | |
|
50 | 49 | #endif |
|
51 | 50 | |
|
52 | 51 | |
|
53 | 52 | |
|
54 | 53 | |
|
55 | 54 | |
|
56 | 55 | |
|
57 | 56 |
@@ -1,148 +1,149 | |||
|
1 | 1 | /*------------------------------------------------------------------------------ |
|
2 | 2 | -- This file is a part of the libuc, microcontroler library |
|
3 | 3 | -- Copyright (C) 2012, Alexis Jeandet |
|
4 | 4 | -- |
|
5 | 5 | -- This program is free software; you can redistribute it and/or modify |
|
6 | 6 | -- it under the terms of the GNU General Public License as published by |
|
7 | 7 | -- the Free Software Foundation; either version 3 of the License, or |
|
8 | 8 | -- (at your option) any later version. |
|
9 | 9 | -- |
|
10 | 10 | -- This program is distributed in the hope that it will be useful, |
|
11 | 11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
12 | 12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
13 | 13 | -- GNU General Public License for more details. |
|
14 | 14 | -- |
|
15 | 15 | -- You should have received a copy of the GNU General Public License |
|
16 | 16 | -- along with this program; if not, write to the Free Software |
|
17 | 17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
18 | 18 | ------------------------------------------------------------------------------- |
|
19 | 19 | -- Author : Alexis Jeandet |
|
20 | 20 | -- Mail : alexis.jeandet@gmail.com |
|
21 | 21 | -------------------------------------------------------------------------------*/ |
|
22 | 22 | /* |
|
23 | 23 | TODO: |
|
24 | 24 | Add SPI slave mode |
|
25 | 25 | Add interrupt interface |
|
26 | 26 | */ |
|
27 | 27 | |
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28 | 28 | #ifndef SPI_H |
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29 | 29 | #define SPI_H |
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30 | 30 | #include <stdint.h> |
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31 | 31 | #include <uhandle.h> |
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32 | 32 | |
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33 | 33 | #ifdef __cplusplus |
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34 | 34 | extern "C" { |
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35 | 35 | #endif |
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36 | 36 | |
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37 | 37 | /* |
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38 | 38 | typedef struct spi_t |
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39 | 39 | { |
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40 | 40 | void* _dev; |
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41 | 41 | int cfg; |
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42 | 42 | int speed; |
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43 | 43 | }spi_t;*/ |
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44 | 44 | |
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45 | 45 | typedef int spi_t; |
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46 | 46 | |
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47 | #define spi1 0 | |
|
48 | #define spi2 1 | |
|
49 | #define spi3 2 | |
|
50 | #define spi4 3 | |
|
51 | #define spi5 4 | |
|
52 | #define spi6 5 | |
|
53 | #define spi7 6 | |
|
54 | #define spi8 7 | |
|
55 | #define spi9 8 | |
|
47 | #define spi1 ((spi_t)0) | |
|
48 | #define spi2 ((spi_t)1) | |
|
49 | #define spi3 ((spi_t)2) | |
|
50 | #define spi4 ((spi_t)3) | |
|
51 | #define spi5 ((spi_t)4) | |
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52 | #define spi6 ((spi_t)5) | |
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53 | #define spi7 ((spi_t)6) | |
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54 | #define spi8 ((spi_t)7) | |
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55 | #define spi9 ((spi_t)8) | |
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56 | 56 | |
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57 | 57 | |
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58 | 58 | typedef enum |
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59 | 59 | { |
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60 | 60 | spi4bits = 0x3, |
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61 | 61 | spi5bits = 0x4, |
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62 | 62 | spi6bits = 0x5, |
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63 | 63 | spi7bits = 0x6, |
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64 | 64 | spi8bits = 0x7, |
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65 | 65 | spi9bits = 0x8, |
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66 | 66 | spi10bits = 0x9, |
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67 | 67 | spi11bits = 0xA, |
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68 | 68 | spi12bits = 0xB, |
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69 | 69 | spi13bits = 0xC, |
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70 | 70 | spi14bits = 0xD, |
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71 | 71 | spi15bits = 0xE, |
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72 | 72 | spi16bits = 0xF |
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73 | 73 | }spibits_t; |
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74 | 74 | |
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75 | 75 | #define SPIBITSMASK 0xF |
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76 | 76 | |
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77 | 77 | typedef enum |
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78 | 78 | { |
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79 | 79 | spislave = 0x00, |
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80 | 80 | spimaster = 0x10 |
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81 | 81 | }spimode_t; |
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82 | 82 | |
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83 | 83 | #define SPIMODEMASK 0x10 |
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84 | 84 | |
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85 | 85 | typedef enum |
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86 | 86 | { |
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87 | 87 | spiclkinhlow = 0x00, |
|
88 | 88 | spiclkinhhigh = 0x20 |
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89 | 89 | }spiclkinhlvl_t; |
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90 | 90 | |
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91 | 91 | #define SPICLKINHLVLMASK 0x20 |
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92 | 92 | |
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93 | 93 | |
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94 | 94 | typedef enum |
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95 | 95 | { |
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96 | 96 | spiclkfirstedge = 0x00, |
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97 | 97 | spiclksecondedge = 0x40 |
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98 | 98 | }spiclkphase_t; |
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99 | 99 | |
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100 | 100 | #define SPICLKPHASEMASK 0x40 |
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101 | 101 | |
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102 | 102 | typedef enum |
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103 | 103 | { |
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104 | 104 | spimsbfirst = 0x00, |
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105 | 105 | spilsbfirst = 0x80 |
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106 | 106 | }spibitorder_t; |
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107 | 107 | |
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108 | 108 | #define SPIBITORDERMASK 0x80 |
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109 | 109 | |
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110 | 110 | |
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111 | 111 | extern spi_t spiopen(int count); |
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112 | 112 | extern spi_t spiopenandconfig(int count,uint32_t cfg,uint32_t speed,uint32_t MOSIpin,uint32_t MISOpin,uint32_t SCKpin,uint32_t SCSpin); |
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113 | 113 | extern int spiclose(spi_t spidev); |
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114 | 114 | extern int spisetpins(spi_t spidev,uint32_t MOSIpin,uint32_t MISOpin,uint32_t SCKpin,uint32_t SCSpin); |
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115 | 115 | extern int spienable(spi_t spidev); |
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116 | 116 | extern int spidisable(spi_t spidev); |
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117 | extern int spitransactionfinished(spi_t spidev); | |
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117 | 118 | extern int spisetconfig(spi_t spidev,uint32_t config,uint32_t speed); |
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118 | 119 | extern int spisetspeed(spi_t spidev, uint32_t speed); |
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119 | 120 | extern int spisetbitorder(spi_t spidev,spibitorder_t order); |
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120 | 121 | extern int spisetdatabits(spi_t spidev,spibits_t bitscnt); |
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121 | 122 | extern int spisetclkinhlevel(spi_t spidev,spiclkinhlvl_t level); |
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122 | 123 | extern int spisetclkphase(spi_t spidev,spiclkphase_t phase); |
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123 | 124 | extern int spiputw(spi_t spidev,uint16_t data); |
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124 | 125 | extern uint16_t spigetw(spi_t spidev); |
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125 | 126 | extern int spiputs(spi_t spidev,char* s); |
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126 | 127 | extern int spigets(spi_t spidev,char* s); |
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127 | 128 | extern int spiputnw(spi_t spidev,uint16_t* w,int n); |
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128 | 129 | extern int spigetnw(spi_t spidev,uint16_t* w,int n); |
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129 | 130 | extern int spiputnc(spi_t spidev,char* c,int n); |
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130 | 131 | extern int spigetnc(spi_t spidev,char* c,int n); |
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131 | 132 | extern int spiavailiabledata(spi_t spidev); |
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132 | 133 | |
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133 | 134 | #ifdef __cplusplus |
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134 | 135 | } |
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135 | 136 | #endif |
|
136 | 137 | #endif //SPI_H |
|
137 | 138 | |
|
138 | 139 | |
|
139 | 140 | |
|
140 | 141 | |
|
141 | 142 | |
|
142 | 143 | |
|
143 | 144 | |
|
144 | 145 | |
|
145 | 146 | |
|
146 | 147 | |
|
147 | 148 | |
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148 | 149 |
@@ -1,437 +1,448 | |||
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1 | 1 | /*------------------------------------------------------------------------------ |
|
2 | 2 | -- This file is a part of the libuc, microcontroler library |
|
3 | 3 | -- Copyright (C) 2011, Alexis Jeandet |
|
4 | 4 | -- |
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5 | 5 | -- This program is free software; you can redistribute it and/or modify |
|
6 | 6 | -- it under the terms of the GNU General Public License as published by |
|
7 | 7 | -- the Free Software Foundation; either version 3 of the License, or |
|
8 | 8 | -- (at your option) any later version. |
|
9 | 9 | -- |
|
10 | 10 | -- This program is distributed in the hope that it will be useful, |
|
11 | 11 | -- but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
12 | 12 | -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
13 | 13 | -- GNU General Public License for more details. |
|
14 | 14 | -- |
|
15 | 15 | -- You should have received a copy of the GNU General Public License |
|
16 | 16 | -- along with this program; if not, write to the Free Software |
|
17 | 17 | -- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
|
18 | 18 | ------------------------------------------------------------------------------- |
|
19 | 19 | -- Author : Alexis Jeandet |
|
20 | 20 | -- Mail : alexis.jeandet@gmail.com |
|
21 | 21 | -------------------------------------------------------------------------------*/ |
|
22 | 22 | |
|
23 | 23 | #include <spi.h> |
|
24 | 24 | #include <stm32f4xx_rcc.h> |
|
25 | 25 | #include <stm32f4xx_gpio.h> |
|
26 | 26 | #include <gpio.h> |
|
27 | 27 | #define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA)) |
|
28 | 28 | #define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8) |
|
29 | 29 | |
|
30 | 30 | |
|
31 | 31 | SPI_TypeDef* _spi_dev_table[3]={SPI1,SPI2,SPI3}; |
|
32 | 32 | |
|
33 | 33 | spi_t spiopen(int count) |
|
34 | 34 | { |
|
35 | 35 | #define _INIT_DEV(_RCC_) \ |
|
36 | 36 | RCC_APB1PeriphClockCmd(_RCC_, ENABLE); \ |
|
37 | 37 | RCC_APB1PeriphResetCmd(_RCC_, ENABLE); \ |
|
38 | 38 | RCC_APB1PeriphResetCmd(_RCC_, DISABLE); \ |
|
39 | 39 | RCC_APB1PeriphClockCmd(_RCC_, ENABLE); |
|
40 | 40 | |
|
41 | 41 | switch(count) |
|
42 | 42 | { |
|
43 | 43 | case spi1: |
|
44 | 44 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE); |
|
45 | 45 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE); |
|
46 | 46 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE); |
|
47 | 47 | RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE); |
|
48 | 48 | return spi1; |
|
49 | 49 | break; |
|
50 | 50 | case spi2: |
|
51 | 51 | _INIT_DEV(RCC_APB1Periph_SPI2); |
|
52 | 52 | return spi2; |
|
53 | 53 | break; |
|
54 | 54 | case spi3: |
|
55 | 55 | _INIT_DEV(RCC_APB1Periph_SPI3); |
|
56 | 56 | return spi3; |
|
57 | 57 | break; |
|
58 | 58 | default: |
|
59 | 59 | break; |
|
60 | 60 | } |
|
61 | 61 | return -1; |
|
62 | 62 | } |
|
63 | 63 | |
|
64 | 64 | spi_t spiopenandconfig(int count, uint32_t cfg, uint32_t speed, uint32_t MOSIpin, uint32_t MISOpin, uint32_t SCKpin, uint32_t SCSpin) |
|
65 | 65 | { |
|
66 | 66 | spi_t dev = spiopen(count); |
|
67 | 67 | if(dev!=-1) |
|
68 | 68 | { |
|
69 | 69 | spidisable(dev); |
|
70 | 70 | spisetpins(dev,MOSIpin, MISOpin, SCKpin, SCSpin); |
|
71 | 71 | spienable(dev); |
|
72 | 72 | spisetconfig(dev,cfg,speed); |
|
73 | 73 | } |
|
74 | 74 | return dev; |
|
75 | 75 | } |
|
76 | 76 | |
|
77 | 77 | |
|
78 | 78 | int spiclose(spi_t spidev) |
|
79 | 79 | { |
|
80 | 80 | if((spidev<3)&&(spidev>=0)) |
|
81 | 81 | { |
|
82 | 82 | switch(spidev) |
|
83 | 83 | { |
|
84 | 84 | case spi1: |
|
85 | 85 | RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE); |
|
86 | 86 | break; |
|
87 | 87 | case spi2: |
|
88 | 88 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE); |
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89 | 89 | break; |
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90 | 90 | case spi3: |
|
91 | 91 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE); |
|
92 | 92 | break; |
|
93 | 93 | default: |
|
94 | 94 | return -1; |
|
95 | 95 | break; |
|
96 | 96 | } |
|
97 | 97 | return 1; |
|
98 | 98 | } |
|
99 | 99 | return -1; |
|
100 | 100 | } |
|
101 | 101 | |
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102 | 102 | int spisetpins(spi_t spidev,uint32_t MOSIpin,uint32_t MISOpin,uint32_t SCKpin,uint32_t SCSpin) |
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103 | 103 | { |
|
104 | 104 | if((spidev<3)&&(spidev>=0)) |
|
105 | 105 | { |
|
106 | 106 | SPI_TypeDef* _dev_ = _spi_dev_table[(int)spidev]; |
|
107 | 107 | gpio_t MISO,MOSI,SCK,SCS; |
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108 | 108 | uint8_t gpioAFspix = GPIO_AF_SPI1; |
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109 | 109 | switch(spidev) |
|
110 | 110 | { |
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111 | 111 | case spi1: |
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112 | 112 | gpioAFspix = GPIO_AF_SPI1; |
|
113 | 113 | break; |
|
114 | 114 | case spi2: |
|
115 | 115 | gpioAFspix = GPIO_AF_SPI2; |
|
116 | 116 | break; |
|
117 | 117 | case spi3: |
|
118 | 118 | gpioAFspix = GPIO_AF_SPI3; |
|
119 | 119 | break; |
|
120 | 120 | default: |
|
121 | 121 | break; |
|
122 | 122 | } |
|
123 | 123 | if(MISOpin!=-1) |
|
124 | 124 | { |
|
125 | 125 | MISO = gpioopen(MISOpin); |
|
126 | 126 | MISO |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; |
|
127 | 127 | gpiosetconfig(&MISO); |
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128 | 128 | GPIO_PinAFConfig(GPIOGETPORT(MISO), (uint8_t)(MISO & 0xF), gpioAFspix); |
|
129 | 129 | } |
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130 | 130 | if(MOSIpin!=-1) |
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131 | 131 | { |
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132 | 132 | MOSI = gpioopen(MOSIpin); |
|
133 | 133 | MOSI |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; |
|
134 | 134 | gpiosetconfig(&MOSI); |
|
135 | 135 | GPIO_PinAFConfig(GPIOGETPORT(MOSI), (uint8_t)(MOSI & 0xF), gpioAFspix); |
|
136 | 136 | } |
|
137 | 137 | |
|
138 | 138 | if(SCKpin!=-1) |
|
139 | 139 | { |
|
140 | 140 | SCK = gpioopen(SCKpin); |
|
141 | 141 | SCK |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; |
|
142 | 142 | gpiosetconfig(&SCK); |
|
143 | 143 | GPIO_PinAFConfig(GPIOGETPORT(SCK), (uint8_t)(SCK & 0xF), gpioAFspix); |
|
144 | 144 | } |
|
145 | 145 | |
|
146 | 146 | if(SCSpin!=-1) |
|
147 | 147 | { |
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148 | 148 | SCS = gpioopen(SCSpin); |
|
149 | 149 | SCS |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; |
|
150 | 150 | gpiosetconfig(&SCS); |
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151 | 151 | GPIO_PinAFConfig(GPIOGETPORT(SCS), (uint8_t)(SCS & 0xF), gpioAFspix); |
|
152 | 152 | _dev_->CR2 |= (1<<2); |
|
153 | 153 | } |
|
154 | 154 | else |
|
155 | 155 | { |
|
156 | 156 | _dev_->CR2 &= ~(1<<2); |
|
157 | 157 | } |
|
158 | 158 | return 1; |
|
159 | 159 | } |
|
160 | 160 | return -1; |
|
161 | 161 | } |
|
162 | 162 | |
|
163 | 163 | |
|
164 | 164 | int spienable(spi_t spidev) |
|
165 | 165 | { |
|
166 | 166 | if((spidev<3)&&(spidev>=0)) |
|
167 | 167 | { |
|
168 | 168 | SPI_TypeDef* _dev_ = _spi_dev_table[(int)spidev]; |
|
169 | 169 | _dev_->CR1 |= (1<<6); |
|
170 | 170 | return 1; |
|
171 | 171 | } |
|
172 | 172 | return -1; |
|
173 | 173 | } |
|
174 | 174 | |
|
175 | 175 | |
|
176 | 176 | int spidisable(spi_t spidev) |
|
177 | 177 | { |
|
178 | 178 | if((spidev<3)&&(spidev>=0)) |
|
179 | 179 | { |
|
180 | 180 | SPI_TypeDef* _dev_ = _spi_dev_table[(int)spidev]; |
|
181 | 181 | _dev_->CR1 &= ~(1<<6); |
|
182 | 182 | return 1; |
|
183 | 183 | } |
|
184 | 184 | return -1; |
|
185 | 185 | } |
|
186 | 186 | |
|
187 | 187 | int spisetconfig(spi_t spidev, uint32_t config, uint32_t speed) |
|
188 | 188 | { |
|
189 | 189 | if((spidev<3)&&(spidev>=0)) |
|
190 | 190 | { |
|
191 | 191 | SPI_TypeDef* _dev_ = _spi_dev_table[(int)spidev]; |
|
192 | 192 | _dev_->CR2 |= (1<<2); |
|
193 | 193 | _dev_->CR1 |= (1<<2); |
|
194 | 194 | spisetspeed(spidev,speed); |
|
195 | 195 | spisetdatabits(spidev,config & SPIBITSMASK); |
|
196 | 196 | spisetbitorder(spidev,config & SPIBITORDERMASK); |
|
197 | 197 | spisetclkinhlevel(spidev,config & SPICLKINHLVLMASK); |
|
198 | 198 | spisetclkphase(spidev,config & SPICLKPHASEMASK); |
|
199 | 199 | return 0; |
|
200 | 200 | } |
|
201 | 201 | return 1; |
|
202 | 202 | } |
|
203 | 203 | |
|
204 | 204 | int spisetspeed(spi_t spidev, uint32_t speed) |
|
205 | 205 | { |
|
206 | 206 | if((spidev<3)&&(spidev>=0)) |
|
207 | 207 | { |
|
208 | 208 | SPI_TypeDef* _dev_ = _spi_dev_table[(int)spidev]; |
|
209 | 209 | uint32_t apbclock = 0x00; |
|
210 | 210 | RCC_ClocksTypeDef RCC_ClocksStatus; |
|
211 | 211 | RCC_GetClocksFreq(&RCC_ClocksStatus); |
|
212 | 212 | if (_dev_ == SPI1) |
|
213 | 213 | { |
|
214 | 214 | apbclock = RCC_ClocksStatus.PCLK2_Frequency; |
|
215 | 215 | } |
|
216 | 216 | else |
|
217 | 217 | { |
|
218 | 218 | apbclock = RCC_ClocksStatus.PCLK1_Frequency; |
|
219 | 219 | } |
|
220 | 220 | int32_t speederror = 0x7FFFFFFF; //max error |
|
221 | 221 | int32_t prev_speederror = 0x7FFFFFFF; |
|
222 | 222 | int32_t realspeed = 0; |
|
223 | 223 | unsigned char divider = 0; |
|
224 | 224 | do |
|
225 | 225 | { |
|
226 | 226 | divider ++; |
|
227 | 227 | prev_speederror = speederror; |
|
228 | 228 | realspeed = apbclock>>(divider); |
|
229 | 229 | speederror = realspeed - speed; |
|
230 | 230 | if(speederror<0)speederror=-speederror; |
|
231 | 231 | if(divider>8)break; |
|
232 | 232 | }while(speederror<prev_speederror); |
|
233 | 233 | speed = apbclock>>(divider-1); |
|
234 | 234 | divider-=2; |
|
235 | 235 | _dev_->CR1 &= 0xFFD7; // clear prescaler bits 3:5 |
|
236 | 236 | _dev_->CR1 |= ((0x7 & divider)<<3); |
|
237 | 237 | return 1; |
|
238 | 238 | } |
|
239 | 239 | return -1; |
|
240 | 240 | } |
|
241 | 241 | |
|
242 | 242 | |
|
243 | 243 | int spisetdatabits(spi_t spidev,spibits_t bitscnt) |
|
244 | 244 | { |
|
245 | 245 | if((spidev<3)&&(spidev>=0)) |
|
246 | 246 | { |
|
247 | 247 | SPI_TypeDef* _dev_ = _spi_dev_table[(int)spidev]; |
|
248 | 248 | int result = 0; |
|
249 | 249 | switch(bitscnt) |
|
250 | 250 | { |
|
251 | 251 | case spi8bits: |
|
252 | 252 | _dev_->CR1 &= ~(1<<11); |
|
253 | 253 | result = 1; |
|
254 | 254 | break; |
|
255 | 255 | case spi16bits: |
|
256 | 256 | _dev_->CR1 |= (1<<11); |
|
257 | 257 | result = 1; |
|
258 | 258 | break; |
|
259 | 259 | default: |
|
260 | 260 | result =-1; |
|
261 | 261 | break; |
|
262 | 262 | } |
|
263 | 263 | return result; |
|
264 | 264 | } |
|
265 | 265 | return -1; |
|
266 | 266 | } |
|
267 | 267 | |
|
268 | 268 | int spisetbitorder(spi_t spidev,spibitorder_t order) |
|
269 | 269 | { |
|
270 | 270 | if((spidev<3)&&(spidev>=0)) |
|
271 | 271 | { |
|
272 | 272 | SPI_TypeDef* _dev_ = _spi_dev_table[(int)spidev]; |
|
273 | 273 | if(order==spimsbfirst) |
|
274 | 274 | { |
|
275 | 275 | _dev_->CR1 &= ~(1<<7); |
|
276 | 276 | return 1; |
|
277 | 277 | } |
|
278 | 278 | else |
|
279 | 279 | { |
|
280 | 280 | if(order==spilsbfirst) |
|
281 | 281 | { |
|
282 | 282 | _dev_->CR1 |= (1<<7); |
|
283 | 283 | return 1; |
|
284 | 284 | } |
|
285 | 285 | else return -1; |
|
286 | 286 | } |
|
287 | 287 | } |
|
288 | 288 | return -1; |
|
289 | 289 | } |
|
290 | 290 | |
|
291 | 291 | int spisetclkinhlevel(spi_t spidev,spiclkinhlvl_t level) |
|
292 | 292 | { |
|
293 | 293 | if((spidev<3)&&(spidev>=0)) |
|
294 | 294 | { |
|
295 | 295 | SPI_TypeDef* _dev_ = _spi_dev_table[(int)spidev]; |
|
296 | 296 | if(level==spiclkinhlow) |
|
297 | 297 | { |
|
298 | 298 | _dev_->CR1 &= ~(1<<1); |
|
299 | 299 | return 1; |
|
300 | 300 | } |
|
301 | 301 | else |
|
302 | 302 | { |
|
303 | 303 | if(level==spiclkinhhigh) |
|
304 | 304 | { |
|
305 | 305 | _dev_->CR1 |= (1<<1); |
|
306 | 306 | return 1; |
|
307 | 307 | } |
|
308 | 308 | else return -1; |
|
309 | 309 | } |
|
310 | 310 | } |
|
311 | 311 | return -1; |
|
312 | 312 | } |
|
313 | 313 | |
|
314 | 314 | int spisetclkphase(spi_t spidev,spiclkphase_t phase) |
|
315 | 315 | { |
|
316 | 316 | if((spidev<3)&&(spidev>=0)) |
|
317 | 317 | { |
|
318 | 318 | SPI_TypeDef* _dev_ = _spi_dev_table[(int)spidev]; |
|
319 | 319 | if(phase==spiclkfirstedge) |
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320 | 320 | { |
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321 | 321 | _dev_->CR1 &= ~1; |
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322 | 322 | return 1; |
|
323 | 323 | } |
|
324 | 324 | else |
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325 | 325 | { |
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326 | 326 | if(phase==spiclksecondedge) |
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327 | 327 | { |
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328 | 328 | _dev_->CR1 |= 1; |
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329 | 329 | return 1; |
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330 | 330 | } |
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331 | 331 | else return -1; |
|
332 | 332 | } |
|
333 | 333 | } |
|
334 | 334 | return -1; |
|
335 | 335 | } |
|
336 | 336 | |
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337 | 337 | int spiputw(spi_t spidev,uint16_t data) |
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338 | 338 | { |
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339 | 339 | if((spidev<3)&&(spidev>=0)) |
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340 | 340 | { |
|
341 | 341 | SPI_TypeDef* _dev_ = _spi_dev_table[(int)spidev]; |
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342 | 342 | _dev_->DR = data; |
|
343 | 343 | while((_dev_->SR & (1<<7)) == (1<<7)); |
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344 | 344 | return 1; |
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345 | 345 | } |
|
346 | 346 | return -1; |
|
347 | 347 | } |
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348 | 348 | uint16_t spigetw(spi_t spidev) |
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349 | 349 | { |
|
350 | 350 | if((spidev<3)&&(spidev>=0)) |
|
351 | 351 | { |
|
352 | 352 | SPI_TypeDef* _dev_ = _spi_dev_table[(int)spidev]; |
|
353 | 353 | while((_dev_->SR & (1<<7)) == (1<<7)); |
|
354 | 354 | _dev_->DR = 0xFFFF; |
|
355 | while((_dev_->SR & (1<<0)) == 0); | |
|
355 | while(((_dev_->SR & (1<<0)) == 0) || (_dev_->SR & (1<<7)) == (1<<7)); | |
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356 | 356 | return _dev_->DR; |
|
357 | 357 | } |
|
358 | 358 | return -1; |
|
359 | 359 | } |
|
360 | 360 | |
|
361 | 361 | int spiputs(spi_t spidev,char* s) |
|
362 | 362 | { |
|
363 | 363 | while (*s) spiputw(spidev,*s++); |
|
364 | 364 | return 1; |
|
365 | 365 | } |
|
366 | 366 | |
|
367 | 367 | int spigets(spi_t spidev,char* s) |
|
368 | 368 | { |
|
369 | 369 | do |
|
370 | 370 | { |
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371 | 371 | (*s) = spigetw(spidev); |
|
372 | 372 | } |
|
373 | 373 | while(*s++); |
|
374 | 374 | return 1; |
|
375 | 375 | } |
|
376 | 376 | |
|
377 | 377 | int spiputnw(spi_t spidev,uint16_t* w,int n) |
|
378 | 378 | { |
|
379 | 379 | while(n!=0) |
|
380 | 380 | { |
|
381 | 381 | spiputw(spidev,*w++); |
|
382 | 382 | n--; |
|
383 | 383 | } |
|
384 | 384 | return 1; |
|
385 | 385 | } |
|
386 | 386 | |
|
387 | 387 | int spigetnw(spi_t spidev,uint16_t* w,int n) |
|
388 | 388 | { |
|
389 | 389 | while(n!=0) |
|
390 | 390 | { |
|
391 | 391 | *w++=spigetw(spidev); |
|
392 | 392 | n--; |
|
393 | 393 | } |
|
394 | 394 | return 1; |
|
395 | 395 | } |
|
396 | 396 | |
|
397 | 397 | int spiputnc(spi_t spidev,char* c,int n) |
|
398 | 398 | { |
|
399 | 399 | while(n!=0) |
|
400 | 400 | { |
|
401 | 401 | spiputw(spidev,*c++); |
|
402 | 402 | n--; |
|
403 | 403 | } |
|
404 | 404 | return 1; |
|
405 | 405 | } |
|
406 | 406 | |
|
407 | 407 | int spigetnc(spi_t spidev,char* c,int n) |
|
408 | 408 | { |
|
409 | 409 | while(n!=0) |
|
410 | 410 | { |
|
411 | 411 | *c++=spigetw(spidev); |
|
412 | 412 | n--; |
|
413 | 413 | } |
|
414 | 414 | return 1; |
|
415 | 415 | } |
|
416 | 416 | |
|
417 | 417 | int spiavailiabledata(spi_t spidev) |
|
418 | 418 | { |
|
419 | 419 | return 0; |
|
420 | 420 | } |
|
421 | 421 | |
|
422 | 422 | |
|
423 | int spitransactionfinished(spi_t spidev) | |
|
424 | { | |
|
425 | SPI_TypeDef* _dev_ = _spi_dev_table[(int)spidev]; | |
|
426 | if((spidev<3)&&(spidev>=0)) | |
|
427 | { | |
|
428 | if((_dev_->SR & (1<<7)) == (1<<7))return 1; | |
|
429 | } | |
|
430 | return 0; | |
|
431 | } | |
|
423 | 432 | |
|
424 | 433 | |
|
425 | 434 | |
|
426 | 435 | |
|
427 | 436 | |
|
428 | 437 | |
|
429 | 438 | |
|
430 | 439 | |
|
431 | 440 | |
|
432 | 441 | |
|
433 | 442 | |
|
434 | 443 | |
|
435 | 444 | |
|
436 | 445 | |
|
437 | 446 | |
|
447 | ||
|
448 |
@@ -1,16 +1,18 | |||
|
1 | 1 | TEMPLATE = lib |
|
2 | 2 | OBJECTS_DIR = obj |
|
3 | 3 | |
|
4 | 4 | SOURCES += spi.c |
|
5 | 5 | |
|
6 | HEADERS += ../../includes/spi.h | |
|
7 | ||
|
6 | 8 | INCLUDEPATH += ../../includes \ |
|
7 | 9 | ../CPU/STM32F4xx_StdPeriph_Driver/inc \ |
|
8 | 10 | ../CPU/CMSIS/Include |
|
9 | 11 | |
|
10 | 12 | |
|
11 | 13 | UCMODEL=stm32f4 |
|
12 | 14 | |
|
13 | 15 | target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL |
|
14 | 16 | INSTALLS += target |
|
15 | 17 | |
|
16 | 18 |
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