# HG changeset patch # User jeandet # Date 2013-02-15 00:21:15 # Node ID 7126c4937e8d4e9f32dcd72c7f3fc60e671d9245 # Parent 7d306b65e7c9bb3048189b84e02479092e5e735f New version totaly integrated to Qt through custom sdk build! /!\ not cleaned yet! diff --git a/COPYING b/COPYING old mode 100755 new mode 100644 diff --git a/bin/functions b/bin/functions deleted file mode 100755 --- a/bin/functions +++ /dev/null @@ -1,320 +0,0 @@ -#!/bin/bash -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - -function readFile { - more $1 | sed 's/#.*//' | grep -i $2' ' -} - -function getFilesList { - sed ':a;N;$!ba;s/\\\n/ /g' $1 | sed ':a;N;$!ba;s/\\ \n/ /g' | grep -i $2 | sed 's/\t//g' -} - -function getObjFilesList { - SRCFILES=`getFilesList $PROJECTFILE SOURCES | sed 's/SOURCES//' | sed 's/+=//' | sed 's/\.c/\.o/g' | sed 's/\.s/\.o/g'` - echo $SRCFILES -} - -function Template { - TEMPLATE=`readFile $1 "TEMPLATE" | sed s/TEMPLATE// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` -} - -function Arch { - if [ -z "$2" ] ; then - ARCH=`readFile $1 "ARCH" | sed s/ARCH// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - else - TEMP=`readFile $1 "$2.ARCH"` - if [ -z "$TEMP" ] ; then - ARCH=`readFile $1 "*.ARCH" | sed 's/*\.'ARCH// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - else - ARCH=`readFile $1 "$2.ARCH" | sed s/$2'\.'ARCH// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - fi - fi -} - -function Cpumodel { - if [ -z "$2" ] ; then - CPUMODEL=`readFile $1 "CPUMODEL" | sed s"/CPUMODEL//" | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - else - TEMP=`readFile $1 "$2.CPU"` - if [ -z "$TEMP" ] ; then - CPUMODEL=`readFile $1 "*.CPUMODEL" | sed 's/*\.CPUMODEL//' | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - else - CPUMODEL=`readFile $1 "$2.CPUMODEL" | sed s/$2'\.CPUMODEL//' | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - fi - fi -} - - -function Target { - if [ -z "$2" ] ; then - TARGET=`readFile $1 "TARGET" | sed s/TARGET// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - else - TARGET=`readFile $1 "$2.TARGET" | sed s/$2'\.'TARGET// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - fi -} - -function Bspname { - if [ -z "$2" ] ; then - BSPNAME=`readFile $1 "BSPNAME" | sed s/BSPNAME// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - else - BSPNAME=`readFile $1 "$2.BSPNAME" | sed s/$2'\.'BSPNAME// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - fi -} - -function Objdir { - if [ -z "$2" ] ; then - OBJDIR=`readFile $1 "OBJDIR" | sed s/OBJDIR// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - if [ -z "$OBJDIR" ] ; then - OBJDIR="obj" - fi - else - TEMP=`readFile $1 "$2.OBJDIR"` - if [ -z "$TEMP" ] ; then - OBJDIR=`readFile $1 "*.OBJDIR" | sed 's/*\.'OBJDIR// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - if [ -z "$OBJDIR" ] ; then - OBJDIR="obj" - fi - else - OBJDIR=`readFile $1 "$2.OBJDIR" | sed s/$2'\.'OBJDIR// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - if [ -z "$OBJDIR" ] ; then - OBJDIR="obj" - fi - fi - fi -} - - -function Bindir { - if [ -z "$2" ] ; then - BINDIR=`readFile $1 "BINDIR" | sed s/BINDIR// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - if [ -z "$BINDIR" ] ; then - BINDIR="bin" - fi - else - TEMP=`readFile $1 "$2.BINDIR"` - if [ -z "$TEMP" ] ; then - BINDIR=`readFile $1 "*.BINDIR" | sed 's/*\.'BINDIR// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - if [ -z "$BINDIR" ] ; then - BINDIR="bin" - fi - else - BINDIR=`readFile $1 "$2.BINDIR" | sed s/$2'\.'BINDIR// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - if [ -z "$BINDIR" ] ; then - BINDIR="bin" - fi - fi - fi -} - - -function Targets { - TARGETS=`readFile $1 ".TARGET" | sed 's/\.TARGET.*//'` -} - -function Libs_Inc { - if [ -z "$2" ] ; then - INCLUDEStmp=`readFile $1 "LIBS" | sed s/LIBS// |sed s/+//|sed s/=//| sed 's/^[ \t]*//;s/[ \t]*$//'` - for FILES in $INCLUDEStmp - do - INCLUDES+='$('"LIBUC_INC_DIR_""$FILES""_CMD) " - INC_LIBS_DEPS+='$('"LIBUC_INC_DIR_""$FILES"") " - done - else - TEMP=`readFile $1 "$2.LIBS"` - if [ -z "$TEMP" ] ; then - INCLUDEStmp=`readFile $1 "*.LIBS" | sed 's/*\.'LIBS// |sed s/+//|sed s/=//| sed 's/^[ \t]*//;s/[ \t]*$//'` - for FILES in $INCLUDEStmp - do - INCLUDES+='$('"LIBUC_INC_DIR_""$FILES""_CMD) " - INC_LIBS_DEPS+='$('"LIBUC_INC_DIR_""$FILES"") " - done - else - INCLUDEStmp=`readFile $1 "$2.LIBS" | sed s/$2'\.'LIBS// |sed s/+//|sed s/=//| sed 's/^[ \t]*//;s/[ \t]*$//'` - for FILES in $INCLUDEStmp - do - INCLUDES+='$('"LIBUC_INC_DIR_""$FILES""_CMD) " - INC_LIBS_DEPS+='$('"LIBUC_INC_DIR_""$FILES"") " - done - fi - fi - if [ -z "$2" ] ; then - INCLUDEStmp=`readFile $1 "INCLUDES" | sed s/INCLUDES// |sed s/+//|sed s/=//| sed 's/^[ \t]*//;s/[ \t]*$//'` - for FILES in $INCLUDEStmp - do - INCLUDES+="-I "$FILES" " - done - else - TEMP=`readFile $1 "$2.INCLUDES"` - if [ -z "$TEMP" ] ; then - INCLUDEStmp=`readFile $1 "*.INCLUDES" | sed 's/*\.'INCLUDES// |sed s/+//|sed s/=//| sed 's/^[ \t]*//;s/[ \t]*$//'` - for FILES in $INCLUDEStmp - do - INCLUDES+="-I "$FILES" " - done - else - INCLUDEStmp=`readFile $1 "$2.INCLUDES" | sed s/$2'\.'INCLUDES// |sed s/+//|sed s/=//| sed 's/^[ \t]*//;s/[ \t]*$//'` - for FILES in $INCLUDEStmp - do - INCLUDES+="-I "$FILES" " - done - fi - fi - -} - -function Libs_Link { - if [ -z "$2" ] ; then - LIBRARIEStmp=`readFile $1 "LIBS" | sed s/LIBS// |sed s/+//|sed s/=//| sed 's/^[ \t]*//;s/[ \t]*$//'` - for FILES in $LIBRARIEStmp - do - LIBRARIES+='$('"LIBUC_LIBS_DIR_""$FILES""_CMD) "'$('"LIBUC_LIBS_$FILES) " - BIN_LIBS_DEPS='$('"LIBUC_LIBS_DIR_""$FILES"")" - done - else - TEMP=`readFile $1 "$2.LIBS"` - if [ -z "$TEMP" ] ; then - LIBRARIEStmp=`readFile $1 "*.LIBS" | sed 's/*\.'LIBS// |sed s/+//|sed s/=//| sed 's/^[ \t]*//;s/[ \t]*$//'` - for FILES in $LIBRARIEStmp - do - LIBRARIES+='$('"LIBUC_LIBS_DIR_""$FILES""_CMD) "'$('"LIBUC_LIBS_$FILES) " - BIN_LIBS_DEPS='$('"LIBUC_LIBS_DIR_""$FILES"")" - done - else - LIBRARIEStmp=`readFile $1 "$2.LIBS" | sed s/$2'\.'LIBS// |sed s/+//|sed s/=//| sed 's/^[ \t]*//;s/[ \t]*$//'` - for FILES in $LIBRARIEStmp - do - LIBRARIES+='$('"LIBUC_LIBS_DIR_""$FILES""_CMD) "'$('"LIBUC_LIBS_$FILES) " - BIN_LIBS_DEPS='$('"LIBUC_LIBS_DIR_""$FILES"")" - done - fi - - fi - -} - -function HeadersInstallPath { - if [ -z "$2" ] ; then - HEADERSINSTALLPATH=`readFile $1 "HEADERSINSTALLPATH" | sed s/HEADERSINSTALLPATH// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - else - - TEMP=`readFile $1 "$2.HEADERSINSTALLPATH"` - if [ -z "$TEMP" ] ; then - HEADERSINSTALLPATH=`readFile $1 "*.HEADERSINSTALLPATH" | sed 's/*\.'HEADERSINSTALLPATH// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - else - HEADERSINSTALLPATH=`readFile $1 "$2.HEADERSINSTALLPATH" | sed s/$2'\.'HEADERSINSTALLPATH// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - fi - fi - if [ -z "$HEADERSINSTALLPATH" ] ; then - echo "$0 error on file $1 you forget to give the headers install path" - echo " solution: set the varriable HEADERSINSTALLPATH in $1" - fi -} - - -function ExtractCFLAGS { - if [ -z "$2" ] ; then - CFLAGS=`readFile $1 "CFLAGS" | sed s/CFLAGS/LIBUC_CFLAGS/ ` - else - TEMP=`readFile $1 "$2.CFLAGS"` - if [ -z "$TEMP" ] ; then - CFLAGS=`readFile $1 "*.CFLAGS" | sed 's/*\.'CFLAGS/LIBUC_CFLAGS/ ` - else - CFLAGS=`readFile $1 "$2.CFLAGS" | sed s/$2'\.'CFLAGS/LIBUC_CFLAGS/ ` - fi - fi -} - - -function ExtractLDFLAGS { - if [ -z "$2" ] ; then - LDFLAGS=`readFile $1 "LDFLAGS" | sed s/LDFLAGS/LIBUC_LDFLAGS/ ` - else - TEMP=`readFile $1 "$2.LDFLAGS"` - if [ -z "$TEMP" ] ; then - LDFLAGS=`readFile $1 "*.LDFLAGS" | sed 's/*\.'LDFLAGS/LIBUC_LDFLAGS/ ` - else - LDFLAGS=`readFile $1 "$2.LDFLAGS" | sed s/$2'\.'LDFLAGS/LIBUC_LDFLAGS/ ` - fi - fi -} - - -function ExtractODFLAGS { - if [ -z "$2" ] ; then - ODFLAGS=`readFile $1 "ODFLAGS" | sed s/ODFLAGS/LIBUC_ODFLAGS/ ` - else - TEMP=`readFile $1 "$2.ODFLAGS"` - if [ -z "$TEMP" ] ; then - ODFLAGS=`readFile $1 "*.ODFLAGS" | sed 's/*\.'ODFLAGS/LIBUC_ODFLAGS/ ` - else - ODFLAGS=`readFile $1 "$2.ODFLAGS" | sed s/$2'\.'ODFLAGS/LIBUC_ODFLAGS/ ` - fi - fi -} - - -function TargetInstallPath { - if [ -z "$2" ] ; then - TARGETINSTALLPATH=`readFile $1 "TARGETINSTALLPATH" | sed s/TARGETINSTALLPATH// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - else - TEMP=`readFile $1 "$2.TARGETINSTALLPATH"` - if [ -z "$TEMP" ] ; then - TARGETINSTALLPATH=`readFile $1 '*.TARGETINSTALLPATH' | sed 's/*\.'TARGETINSTALLPATH// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - - else - TARGETINSTALLPATH=`readFile $1 "$2.TARGETINSTALLPATH" | sed s/$2'\.'TARGETINSTALLPATH// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - fi - fi - if [ -z "$TARGETINSTALLPATH" ] ; then - echo "$0 error on file $1 you forget to give the target install path" - echo " solution: set the varriable TARGETINSTALLPATH in $1" - fi -} - -function getBSP { - if [ -z "$2" ] ; then - if(more $1 | sed 's/#.*//' | grep -i "BSP ="); then - BSP=`readFile $1 "BSP" | sed s/BSP// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - fi - else - TEMP=`readFile $1 "$2.BSP"` - if [ -z "$TEMP" ] ; then - if(more $1 | sed 's/#.*//' | grep -i "*.BSP ="); then - BSP=`readFile $1 "*.BSP" | sed 's/*\.'BSP// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - fi - else - if(more $1 | sed 's/#.*//' | grep -i "$2.BSP ="); then - BSP=`readFile $1 "$2.BSP" | sed s/$2'\.'BSP// | sed s/=// | sed 's/^[ \t]*//;s/[ \t]*$//'` - fi - fi - fi - if [ -z "$BSP" ] ; then - echo "$0 error on file $1 you forget to give the board support package" - echo " solution: set the varriable BSP in $1" - fi - -} - - - - diff --git a/bin/libuclistheaders b/bin/libuclistheaders deleted file mode 100755 --- a/bin/libuclistheaders +++ /dev/null @@ -1,25 +0,0 @@ -#!/bin/bash -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - -ls ./ | grep "\.h" | sed 's/$/ \\/g' - diff --git a/bin/libuclistsources b/bin/libuclistsources deleted file mode 100755 --- a/bin/libuclistsources +++ /dev/null @@ -1,25 +0,0 @@ -#!/bin/bash -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - -ls ./ | grep "\.c" | sed 's/$/ \\/g' - diff --git a/bin/libucmake b/bin/libucmake deleted file mode 100755 --- a/bin/libucmake +++ /dev/null @@ -1,95 +0,0 @@ -#!/bin/bash -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ -TEMPLATE="" -ARCH="" -TARGET="" -SRCFILES="" -INCLUDES="" -LIBRARIES="" -HEADERSINSTALLPATH="" -TARGETINSTALLPATH="" -CFLAGS="" -LDFLAGS="" -ODFLAGS="" -BSP="generic" - - - -scriptPath=${0%/*} -source $scriptPath/functions - -if [ -z "$1" ] ; then - echo "try to find a project file ..." - TMP=`ls *.pro` - - i=1 - for Files in $TMP - do - echo "found $Files" - PROJECTFILES[i]=$Files - i=$((i + 1)) - done - if [ -z "${PROJECTFILES[1]}" ]; then - exit - else - PROJECTFILE=${PROJECTFILES[1]} - fi - -else - PROJECTFILE=$1 -fi - -CURRENTDIR=`pwd` -Template $PROJECTFILE -echo '' > Makefile -echo 'PROJECTDIR = `pwd`'>> Makefile -echo "LIBUC = $libuc2" >> Makefile -echo "PROJECTFILE = $PROJECTFILE" >> Makefile - - -source $scriptPath/templates/libucmake-$TEMPLATE -template-run - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/bin/templates/libucmake-app b/bin/templates/libucmake-app deleted file mode 100644 --- a/bin/templates/libucmake-app +++ /dev/null @@ -1,28 +0,0 @@ -#!/bin/bash -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - - -function template-run { - source $scriptPath/templates/libucmake-app_lib - applib-run "app" -} diff --git a/bin/templates/libucmake-app_lib b/bin/templates/libucmake-app_lib deleted file mode 100644 --- a/bin/templates/libucmake-app_lib +++ /dev/null @@ -1,276 +0,0 @@ -#!/bin/bash -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ -OBJDIR="obj" -BINDIR="bin" -INC_LIBS_DEPS="" -BIN_LIBS_DEPS="" - -function generateObjrules { - SRCS=`getFilesList $PROJECTFILE SOURCES | sed 's/SOURCES//' | sed 's/+=//'` - if [ "$1" == "Makefile" ] ; then - SRCS=`getFilesList $PROJECTFILE SOURCES | sed 's/SOURCES//' | sed 's/+=//'` - else - TEMP=`getFilesList $PROJECTFILE $1.SOURCES` - if [ -z "$TEMP" ] ; then - SRCS=`getFilesList $PROJECTFILE '*'.SOURCES | sed 's/*\.SOURCES//' | sed 's/+=//'` - else - SRCS=`getFilesList $PROJECTFILE $1.SOURCES | sed "s/$1"'\.SOURCES//' | sed 's/+=//'` - fi - fi - for src in $SRCS - do - obj=`echo $src| sed 's/\.c/\.o/g' | sed 's/\.s/\.o/g'` - echo "$OBJDIR/$obj: $src "'$(OBJDIR) - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ -' - done -} - -function generateObjlist { - if [ "$1" == "Makefile" ] ; then - OBJS=`getFilesList $PROJECTFILE SOURCES | sed 's/SOURCES//' | sed 's/+=//'| sed 's/\.c/\.o/g' | sed 's/\.s/\.o/g'` - else - TEMP=`getFilesList $PROJECTFILE $1.SOURCES` - if [ -z "$TEMP" ] ; then - OBJS=`getFilesList $PROJECTFILE '*'.SOURCES | sed 's/*\.SOURCES//' | sed 's/+=//'| sed 's/\.c/\.o/g' | sed 's/\.s/\.o/g'` - else - OBJS=`getFilesList $PROJECTFILE $1.SOURCES | sed "s/$1"'\.SOURCES//' | sed 's/+=//'| sed 's/\.c/\.o/g' | sed 's/\.s/\.o/g'` - fi - fi - for obj in $OBJS - do - echo "$OBJDIR/$obj \\" - done -} - - -function applib-run { - if [ $1 == "lib" ] ; then - tmplt="lib" - else - tmplt="bin" - fi - Targets $PROJECTFILE - - if [ -z "$TARGETS" ] ; then - TARGETS="Makefile" - else - echo "Multi target" - fi - for ITEMS in $TARGETS - do - if [ "$ITEMS" == "Makefile" ] ; then - MAKEFILE="Makefile" - ITEMS="" - else - MAKEFILE="$ITEMS.mk" - fi - echo 'PROJECTDIR = `pwd`'> $MAKEFILE - echo "LIBUC = $libuc2" >> $MAKEFILE - Target $PROJECTFILE $ITEMS - Arch $PROJECTFILE $ITEMS - Cpumodel $PROJECTFILE $ITEMS - Bspname $PROJECTFILE $ITEMS - Objdir $PROJECTFILE - Bindir $PROJECTFILE - Libs_Inc $PROJECTFILE $ITEMS - Libs_Link $PROJECTFILE $ITEMS - HeadersInstallPath $PROJECTFILE $ITEMS - TargetInstallPath $PROJECTFILE $ITEMS - getBSP $PROJECTFILE $ITEMS - ExtractCFLAGS $PROJECTFILE $ITEMS - ExtractLDFLAGS $PROJECTFILE $ITEMS - ExtractODFLAGS $PROJECTFILE $ITEMS - echo "Current BSP is $BSP" - echo $SRCFILES >> $MAKEFILE - if [ "$MAKEFILE" == "Makefile" ] ; then - getFilesList $PROJECTFILE HEADERS >> Makefile - getFilesList $PROJECTFILE SOURCES | sed 's/SOURCES/SOURCES/' >> Makefile - else - TEMP=`getFilesList $PROJECTFILE $ITEMS.HEADERS` - if [ -z "$TEMP" ] ; then - getFilesList $PROJECTFILE '*'.HEADERS | sed 's/*\.'// >> $MAKEFILE - else - getFilesList $PROJECTFILE $ITEMS.HEADERS | sed s/$ITEMS'\.'// >> $MAKEFILE - fi - TEMP=`getFilesList $PROJECTFILE $ITEMS.SOURCES` - if [ -z "$TEMP" ] ; then - getFilesList $PROJECTFILE '*'.SOURCES | sed 's/*\.'SOURCES/SOURCES/ >> $MAKEFILE - else - getFilesList $PROJECTFILE $ITEMS.SOURCES | sed s/$ITEMS'\.'SOURCES/SOURCES/ >> $MAKEFILE - fi - fi - if [ "$TARGET" == "libbsp" ] ; then - mkdir -p $libuc2/bsp/cfg/$BSPNAME - echo "CPUMODEL = $CPUMODEL" > $libuc2/bsp/cfg/$BSPNAME/bsp.mk - echo "ARCH = $ARCH" >> $libuc2/bsp/cfg/$BSPNAME/bsp.mk - fi - - echo "=========================================================================" - echo " M A K E F I L E G E N E R A T I O N " - echo "-------------------------------------------------------------------------" - echo " Template = library " - echo " Architecture = $ARCH " - echo " Output file = $TARGET " - echo "=========================================================================" - echo "" - echo " Start Writing Makefile ..." - echo "OBJDIR = $OBJDIR" >> $MAKEFILE - echo "BINDIR = $BINDIR" >> $MAKEFILE - echo "OBJECTFILES = `generateObjlist $MAKEFILE`">> $MAKEFILE - echo " " >> $MAKEFILE - echo "ARCH = $ARCH" >> $MAKEFILE - echo "CPUMODEL = $CPUMODEL" >> $MAKEFILE - echo "ARCHFOLDER = "'$(LIBUC)'"/rules/$ARCH" >> $MAKEFILE - echo "TARGET=$TARGET">> $MAKEFILE - echo "LIBUC_INCLUDES=$INCLUDES">> $MAKEFILE - echo "LIBUC_LIBRARIES=$LIBRARIES">> $MAKEFILE - echo "TARGETINSTALLPATH=$TARGETINSTALLPATH">> $MAKEFILE - echo "HEADERSINSTALLPATH=$HEADERSINSTALLPATH">> $MAKEFILE - echo "BSP=$BSP">> $MAKEFILE - echo ' -#--------------------------------------------------------------------------------- -# LIBRARY DEFINITIONS -#--------------------------------------------------------------------------------- - -LIBUC_LIBS_DIR = $(LIBUC)/lib/bin/$(ARCH) -LIBUC_INC_DIR = $(LIBUC)/lib/includes -LIBUC_CFG_DIR = $(LIBUC)/lib/cfg -include $(LIBUC)/rules/common/libsrules.mk - -#--------------------------------------------------------------------------------- -# BOARD SUPORT PACKAGES -#--------------------------------------------------------------------------------- -LIBUC_BSP_DIR=$(LIBUC)/bsp -LIBUC_BSP_BIN_DIR= $(LIBUC_BSP_DIR)/bin -LIBUC_BSP_INC_DIR= $(LIBUC_BSP_DIR)/includes -LIBUC_BSP_CFG_DIR= $(LIBUC_BSP_DIR)/cfg -LIBUC_BSP = -L $(LIBUC_BSP_BIN_DIR)/$(BSP) -static -lbsp -LIBUC_BSP_INC = -I $(LIBUC_BSP_INC_DIR)/$(BSP) - ' >> $MAKEFILE - if [ "$tmplt" == "bin" ] ; then - echo 'include $(LIBUC_BSP_CFG_DIR)/$(BSP)/bsp.mk' >> $MAKEFILE - fi - echo 'include $(ARCHFOLDER)/rules.mk' >> $MAKEFILE - echo 'INCLUDES += -I ./ -I $(LIBUC_INC_DIR) $(LIBUC_INCLUDES) $(LIBUC_BSP_INC)' >> $MAKEFILE - echo "$CFLAGS" >> $MAKEFILE - echo "$LDFLAGS" >> $MAKEFILE - echo "$ODFLAGS" >> $MAKEFILE - echo '' >> $MAKEFILE - echo "all:$tmplt" >> $MAKEFILE - echo " @echo Code compiled" >> $MAKEFILE - echo '' >> $MAKEFILE - echo '.SUFFIXES: .o .c .s - -.c.o: - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - -.s.o: - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - -bin: $(BINDIR)/$(TARGET).elf $(BINDIR)/$(TARGET).bin $(BINDIR)/$(TARGET).hex - @echo "compile bin" - -lib: $(BINDIR)/$(TARGET).a - @echo "compile lib" - - -$(BINDIR)/$(TARGET).a: $(OBJECTFILES) - mkdir -p $(BINDIR) - $(LIBUC_AR) rcs $@ $(OBJECTFILES) - -$(OBJDIR): - mkdir -p $(OBJDIR) - -%.elf: $(LINKER_SCRIPT) $(APPOBJECTFILES) $(OBJECTFILES) - mkdir -p $(BINDIR) - $(LIBUC_CC) $(LIBUC_LDFLAGS) $(LIBUC_CFLAGS) -T $^ -o $@ $(LIBUC_BSP) $(LIBUC_LIBRARIES) - $(LIBUC_OBJDUMP) $(LIBUC_ODFLAGS) $@ > $(@:.elf=.dump) - $(LIBUC_SIZE) $@ - - -%.bin: %.elf $(BIN_LIBS_DEPS) - $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O binary $< $*.bin - @echo "BIN_LIBS_DEPS" - @echo $(BIN_LIBS_DEPS) - - -%.hex: %.elf - $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O ihex $< $*.hex - -$(TARGETINSTALLPATH)/$(TARGET).a: $(BINDIR)/$(TARGET).a - mkdir -p $(TARGETINSTALLPATH) - cp $(BINDIR)/$(TARGET).a $(TARGETINSTALLPATH)/$(TARGET).a - -libinstall: $(TARGETINSTALLPATH)/$(TARGET).a - @if [ -z $(HEADERSINSTALLPATH) ] ; then echo "No headers to install" ; else mkdir -p $(HEADERSINSTALLPATH) ; fi - @if [ -z "$(HEADERS)" ] ; then echo "No headers to install" ; else echo "cp -f $(HEADERS) $(HEADERSINSTALLPATH)/" ; cp -f $(HEADERS) $(HEADERSINSTALLPATH)/ ; fi - -clean: - rm -f *.o *.d *.bin *.hex *.dump *.map *.a *.elf - rm -f $(OBJECTFILES) - rm -f $(BINDIR)/*.bin - rm -f $(BINDIR)/*.hex - rm -f $(BINDIR)/*.dump - rm -f $(BINDIR)/*.map - rm -f $(BINDIR)/*.a - rm -f $(BINDIR)/*.elf - rm -f $(DEVSOURCESND) - rm -f $(ASMDEVSOURCESND) - -distclean: clean libclean - rm -f $(TARGETINSTALLPATH)/*.bin - rm -f $(TARGETINSTALLPATH)/*.a - rm -f Makefile - ' >> $MAKEFILE - - generateObjrules $MAKEFILE >> $MAKEFILE - echo 'install:'"$tmplt"'install - - ' >> $MAKEFILE - echo 'libclean:' >> $MAKEFILE - echo ' rm -f $(TARGETINSTALLPATH)/$(TARGET).a' >> $MAKEFILE - echo " Makefile writing finished" - echo "" - echo "=========================================================================" - echo "" - done - if [ "$TARGETS" == "Makefile" ] ; then - MAKEFILE="Makefile" - else - for mktargt in "all" "install" " clean" "distclean" - do - echo "" >> Makefile - echo "$mktargt:" >> Makefile - for ITEMS in $TARGETS - do - echo " make $mktargt -f $MAKEFILE" >> Makefile - done - echo "" >> Makefile - done - fi - - - -} - diff --git a/bin/templates/libucmake-dir b/bin/templates/libucmake-dir deleted file mode 100755 --- a/bin/templates/libucmake-dir +++ /dev/null @@ -1,55 +0,0 @@ -#!/bin/bash -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - -function template-run { - echo 'include $(LIBUC)/rules/common/rules.mk' >> Makefile - SUBDIRS=`getFilesList $PROJECTFILE SUBDIRS | sed 's/SUBDIRS//' | sed 's/=//' | sed 's/+//' ` - CURRENTDIR=`pwd` - echo "" >> Makefile - echo 'all:subdir' >> Makefile - for DIRS in $SUBDIRS - do - echo "enter $DIRS" - cd $DIRS - echo "run $0" - $0 - cd $CURRENTDIR - echo "exit $DIRS" - if [ -e "$DIRS/Makefile" ]; then - echo " make -C $DIRS">> Makefile - fi - done - echo " @echo Code compiled" >> Makefile - echo "" >> Makefile - for mktargt in "install" " clean" "distclean" - do - echo "" >> Makefile - echo "$mktargt:" >> Makefile - for DIRS in $SUBDIRS - do - echo " make $mktargt -C $DIRS" >> Makefile - done - echo "" >> Makefile - done -} - diff --git a/bin/templates/libucmake-lib b/bin/templates/libucmake-lib deleted file mode 100755 --- a/bin/templates/libucmake-lib +++ /dev/null @@ -1,28 +0,0 @@ -#!/bin/bash -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - - -function template-run { - source $scriptPath/templates/libucmake-app_lib - applib-run "lib" -} diff --git a/bin/templates/libucmake-pdf b/bin/templates/libucmake-pdf deleted file mode 100644 --- a/bin/templates/libucmake-pdf +++ /dev/null @@ -1,54 +0,0 @@ -#!/bin/bash -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - - - - -function template-run { - echo "=========================================================================" - echo " M A K E F I L E G E N E R A T I O N " - echo "-------------------------------------------------------------------------" - echo " Template = pdf " - echo "=========================================================================" - echo "" - echo " Start Writing Makefile ..." - - getFilesList $PROJECTFILE SOURCES | sed 's/SOURCES/LATEXSOURCES/' >> Makefile - echo 'include $(LIBUC)/rules/latex/rules.mk' >> Makefile - echo '' >> Makefile - echo 'all:$(PDFFILES)' >> Makefile - echo " @echo PDF file generated" >> Makefile - echo " Makefile writing finished" - echo "" - echo "=========================================================================" - echo "" -} - - - - - - - - - diff --git a/bsp/cfg/BEAGLESYNTH/bsp.pri b/bsp/cfg/BEAGLESYNTH/bsp.pri deleted file mode 100644 --- a/bsp/cfg/BEAGLESYNTH/bsp.pri +++ /dev/null @@ -1,7 +0,0 @@ -CPU=stm32f4xxxG -DEFINES+=BSP=\\\"BEAGLESYNTH\\\" -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) - -beagleCp.target = beagleCp -beagleCp.commands = scp $$DESTDIR/$(QMAKE_TARGET).bin root@192.168.7.2://opt/stm32flashAje/hello.bin -QMAKE_EXTRA_TARGETS += beagleCp diff --git a/bsp/cfg/M4Stick/bsp.mk b/bsp/cfg/M4Stick/bsp.mk deleted file mode 100644 --- a/bsp/cfg/M4Stick/bsp.mk +++ /dev/null @@ -1,2 +0,0 @@ -CPUMODEL = stm32f4xxxG -ARCH = stm32f4-arm-none-eabi-gcc diff --git a/bsp/cfg/M4Stick/bsp.pri b/bsp/cfg/M4Stick/bsp.pri deleted file mode 100644 --- a/bsp/cfg/M4Stick/bsp.pri +++ /dev/null @@ -1,3 +0,0 @@ -CPU=stm32f4xxxG -DEFINES+=BSP=\\\"M4Stick\\\" -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) diff --git a/bsp/cfg/M4StickV2/bsp.pri b/bsp/cfg/M4StickV2/bsp.pri deleted file mode 100644 --- a/bsp/cfg/M4StickV2/bsp.pri +++ /dev/null @@ -1,3 +0,0 @@ -CPU=stm32f4xxxG -DEFINES+=BSP=\\\"M4Stick\\\" -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) diff --git a/bsp/cfg/SOLAR_LFR_PSU/bsp.mk b/bsp/cfg/SOLAR_LFR_PSU/bsp.mk deleted file mode 100644 --- a/bsp/cfg/SOLAR_LFR_PSU/bsp.mk +++ /dev/null @@ -1,2 +0,0 @@ -CPUMODEL = stm32f4xxxG -ARCH = stm32f4-arm-none-eabi-gcc diff --git a/bsp/cfg/SOLAR_LFR_PSU/bsp.pri b/bsp/cfg/SOLAR_LFR_PSU/bsp.pri deleted file mode 100644 --- a/bsp/cfg/SOLAR_LFR_PSU/bsp.pri +++ /dev/null @@ -1,3 +0,0 @@ -CPU=stm32f4xxxG -DEFINES+=BSP=\\\"SOLAR_LFR_PSU\\\" -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) diff --git a/bsp/cfg/STM32F4Discovery/bsp.mk b/bsp/cfg/STM32F4Discovery/bsp.mk deleted file mode 100644 --- a/bsp/cfg/STM32F4Discovery/bsp.mk +++ /dev/null @@ -1,2 +0,0 @@ -CPUMODEL = stm32f4xxxG -ARCH = stm32f4-arm-none-eabi-gcc diff --git a/bsp/cfg/STM32F4Discovery/bsp.pri b/bsp/cfg/STM32F4Discovery/bsp.pri deleted file mode 100644 --- a/bsp/cfg/STM32F4Discovery/bsp.pri +++ /dev/null @@ -1,3 +0,0 @@ -CPU=stm32f4xxxG -DEFINES+=BSP=\\\"SOLAR_LFR_PSU\\\" -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) diff --git a/bsp/includes/BEAGLESYNTH/bsp.h b/bsp/includes/BEAGLESYNTH/bsp.h deleted file mode 100644 --- a/bsp/includes/BEAGLESYNTH/bsp.h +++ /dev/null @@ -1,105 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2011, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef BSP_H -#define BSP_H -#include -#include -#include -#include -#include -#include - -#define __MAX_OPENED_FILES__ 4 -#define __FS_ROOT_SIZE__ 4 -/* -#ifndef PD8 - #define PD8 -#endif -#ifndef PD9 - #define PD9 -#endif -*/ - - -#define LED1 PF6 -#define LED2 PF7 -#define LED3 PF8 - -#define PSU_DISABLE PH2 -#define PSU_ALERT_5V PF2 -#define PSU_ALERT_1_5V PF3 -#define PSU_ALERT_3_3V PF4 - -#define LCD_RESET PE2 - -extern float VREF0; - -extern uint32_t currentCpuFreq; -extern LCD_t lcd0; - - -extern int bsp_init(); - -extern void bsp_GPIO_init(); -extern void bsp_uart_init(); -extern void bsp_iic_init(); -extern void bsp_spi_init(); -extern void bsp_SD_init(); -extern int bsp_FSMC_init(); - -/* VS1053 */ -extern void clearXCS(); -extern void setXCS(); -extern int vs10XXDREQ(); - -/* SD CARD */ -void bsppowersdcard(char onoff); -char bspsdcardpresent(); -void bspsdcardselect(char YESNO); -char bspsdcardwriteprotected(); - - -void bsp_lcd0_write_reg(uint32_t reg,uint32_t data); -uint32_t bsp_lcd0_read_reg(uint32_t reg); -void bsp_lcd0_writeGRAM(void *buffer, uint32_t count); -void bsp_lcd0_readGRAM(void *buffer, uint32_t count); - -#endif - - - - - - - - - - - - - - - - - - - diff --git a/bsp/includes/M4Stick/bsp.h b/bsp/includes/M4Stick/bsp.h deleted file mode 100644 --- a/bsp/includes/M4Stick/bsp.h +++ /dev/null @@ -1,86 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2011, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef BSP_H -#define BSP_H -#include -#include -#include -#include - - -#define __MAX_OPENED_FILES__ 32 -#define __FS_ROOT_SIZE__ 32 - -#define LED1 PD8 -#define LED2 PD9 - -#define LED3ON GPIOB->BSRRH = GPIO_Pin_15 -#define LED2ON GPIOD->BSRRH = GPIO_Pin_8 -#define LED1ON GPIOD->BSRRH = GPIO_Pin_9 - -#define LED3OFF GPIOB->BSRRL = GPIO_Pin_15 -#define LED2OFF GPIOD->BSRRL = GPIO_Pin_8 -#define LED1OFF GPIOD->BSRRL = GPIO_Pin_9 - -extern float VREF0; - -extern uint32_t currentCpuFreq; - -extern int bsp_init(); - -extern void bsp_GPIO_init(); -extern void bsp_uart_init(); -extern void bsp_iic_init(); -extern void bsp_spi_init(); -extern void bsp_SD_init(); - -/* VS1053 */ -extern void clearXCS(); -extern void setXCS(); -extern int vs10XXDREQ(); - -/* SD CARD */ -void bsppowersdcard(char onoff); -char bspsdcardpresent(); -void bspsdcardselect(char YESNO); -char bspsdcardwriteprotected(); - -#endif - - - - - - - - - - - - - - - - - - - diff --git a/bsp/includes/M4StickV2/bsp.h b/bsp/includes/M4StickV2/bsp.h deleted file mode 100644 --- a/bsp/includes/M4StickV2/bsp.h +++ /dev/null @@ -1,92 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2011, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef BSP_H -#define BSP_H -#include -#include -#include -#include - - -#define __MAX_OPENED_FILES__ 32 -#define __FS_ROOT_SIZE__ 32 - -#define LED1 PD9 -#define LED2 PD8 -#define LED3 PB15 - -#define DAC_CS PA1 -#define DAC_DIN PA7 - -#define ADC_MODE0 PA2 -#define ADC_MODE1 PA3 -#define ADC_FSYNC PA4 -#define ADC_SCLK PA5 -#define ADC_DOUT1 PA6 - -#define ADC_SYNC PB10 -#define ADC_CLKDIV PB11 - - -extern float VREF0; - -extern uint32_t currentCpuFreq; - -extern int bsp_init(); - -extern void bsp_GPIO_init(); -extern void bsp_uart_init(); -extern void bsp_iic_init(); -extern void bsp_spi_init(); -extern void bsp_SD_init(); - -/* VS1053 */ -extern void clearXCS(); -extern void setXCS(); -extern int vs10XXDREQ(); - -/* SD CARD */ -void bsppowersdcard(char onoff); -char bspsdcardpresent(); -void bspsdcardselect(char YESNO); -char bspsdcardwriteprotected(); - -#endif - - - - - - - - - - - - - - - - - - - diff --git a/bsp/includes/SOLAR_LFR_PSU/bsp.h b/bsp/includes/SOLAR_LFR_PSU/bsp.h deleted file mode 100644 --- a/bsp/includes/SOLAR_LFR_PSU/bsp.h +++ /dev/null @@ -1,96 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2011, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef BSP_H -#define BSP_H -#include -#include -#include -#include - -#define __MAX_OPENED_FILES__ 4 -#define __FS_ROOT_SIZE__ 4 -/* -#ifndef PD8 - #define PD8 -#endif -#ifndef PD9 - #define PD9 -#endif -*/ - -#define LED1 PD12 -#define LED2 PD13 -#define LED3 PD14 -#define LED4 PD15 - - -#define LED3ON GPIOB->BSRRH = GPIO_Pin_15 -#define LED2ON GPIOD->BSRRH = GPIO_Pin_8 -#define LED1ON GPIOD->BSRRH = GPIO_Pin_9 - -#define LED3OFF GPIOB->BSRRL = GPIO_Pin_15 -#define LED2OFF GPIOD->BSRRL = GPIO_Pin_8 -#define LED1OFF GPIOD->BSRRL = GPIO_Pin_9 - -extern float VREF0; - -extern uint32_t currentCpuFreq; - -extern int bsp_init(); - -extern void bsp_GPIO_init(); -extern void bsp_uart_init(); -extern void bsp_iic_init(); -extern void bsp_spi_init(); -extern void bsp_SD_init(); - -/* VS1053 */ -extern void clearXCS(); -extern void setXCS(); -extern int vs10XXDREQ(); - -/* SD CARD */ -void bsppowersdcard(char onoff); -char bspsdcardpresent(); -void bspsdcardselect(char YESNO); -char bspsdcardwriteprotected(); - -#endif - - - - - - - - - - - - - - - - - - - diff --git a/bsp/includes/STM32F4Discovery/bsp.h b/bsp/includes/STM32F4Discovery/bsp.h deleted file mode 100644 --- a/bsp/includes/STM32F4Discovery/bsp.h +++ /dev/null @@ -1,95 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2011, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef BSP_H -#define BSP_H -#include -#include -/* -#ifndef PD12 - #define PD12 -#endif -#ifndef PD13 - #define PD13 -#endif -*/ -#define __MAX_OPENED_FILES__ 32 -#define __FS_ROOT_SIZE__ 32 - -#define LED1 PD12 -#define LED2 PD13 - -#define GREENLEDON (GPIOD->BSRRL = 1<<12) -#define ORANGELEDON (GPIOD->BSRRL = 1<<13) -#define REDLEDON (GPIOD->BSRRL = 1<<14) -#define BLUELEDON (GPIOD->BSRRL = 1<<15) - -#define GREENLEDOFF (GPIOD->BSRRH = 1<<12) -#define ORANGELEDOFF (GPIOD->BSRRH = 1<<13) -#define REDLEDOFF (GPIOD->BSRRH = 1<<14) -#define BLUELEDOFF (GPIOD->BSRRH = 1<<15) - -extern float VREF0; - -extern uint32_t OSC0; -extern uint32_t currentCpuFreq; - - - -extern int bsp_init(); - -extern void bsp_GPIO_init(); -extern void bsp_uart_init(); -extern void bsp_iic_init(); -extern void bsp_spi_init(); -extern void bsp_SD_init(); - -/* VS1053 */ -extern void clearXCS(); -extern void setXCS(); -extern int vs10XXDREQ(); - -/* SD CARD */ -void bsppowersdcard(char onoff); -char bspsdcardpresent(); -void bspsdcardselect(char YESNO); -char bspsdcardwriteprotected(); - -#endif - - - - - - - - - - - - - - - - - - - diff --git a/bsp/src/BEAGLESYNTH/BEAGLESYNTH.pro b/bsp/src/BEAGLESYNTH/BEAGLESYNTH.pro --- a/bsp/src/BEAGLESYNTH/BEAGLESYNTH.pro +++ b/bsp/src/BEAGLESYNTH/BEAGLESYNTH.pro @@ -1,13 +1,18 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt -CONFIG += bsp -BSP=BEAGLESYNTH -include(bsp.pri) -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) + +TARGET=bsp +OBJECTS_DIR = obj +BSP = BEAGLESYNTH + +UCMODEL=stm32f4 SOURCES += bsp.c +HEADERS += bsp.h -HEADERS += $$libuc2/bsp/includes/$$BSP/bsp.h + +BSPFILE = bsp.pri + + + diff --git a/bsp/src/BEAGLESYNTH/bsp.h b/bsp/src/BEAGLESYNTH/bsp.h new file mode 100644 --- /dev/null +++ b/bsp/src/BEAGLESYNTH/bsp.h @@ -0,0 +1,105 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2011, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef BSP_H +#define BSP_H +#include +#include +#include +#include +#include +#include + +#define __MAX_OPENED_FILES__ 4 +#define __FS_ROOT_SIZE__ 4 +/* +#ifndef PD8 + #define PD8 +#endif +#ifndef PD9 + #define PD9 +#endif +*/ + + +#define LED1 PF6 +#define LED2 PF7 +#define LED3 PF8 + +#define PSU_DISABLE PH2 +#define PSU_ALERT_5V PF2 +#define PSU_ALERT_1_5V PF3 +#define PSU_ALERT_3_3V PF4 + +#define LCD_RESET PE2 + +extern float VREF0; + +extern uint32_t currentCpuFreq; +extern LCD_t lcd0; + + +extern int bsp_init(); + +extern void bsp_GPIO_init(); +extern void bsp_uart_init(); +extern void bsp_iic_init(); +extern void bsp_spi_init(); +extern void bsp_SD_init(); +extern int bsp_FSMC_init(); + +/* VS1053 */ +extern void clearXCS(); +extern void setXCS(); +extern int vs10XXDREQ(); + +/* SD CARD */ +void bsppowersdcard(char onoff); +char bspsdcardpresent(); +void bspsdcardselect(char YESNO); +char bspsdcardwriteprotected(); + + +void bsp_lcd0_write_reg(uint32_t reg,uint32_t data); +uint32_t bsp_lcd0_read_reg(uint32_t reg); +void bsp_lcd0_writeGRAM(void *buffer, uint32_t count); +void bsp_lcd0_readGRAM(void *buffer, uint32_t count); + +#endif + + + + + + + + + + + + + + + + + + + diff --git a/bsp/src/BEAGLESYNTH/bsp.pri b/bsp/src/BEAGLESYNTH/bsp.pri --- a/bsp/src/BEAGLESYNTH/bsp.pri +++ b/bsp/src/BEAGLESYNTH/bsp.pri @@ -1,3 +1,6 @@ CPU=stm32f4xxxG -DEFINES+=BSP=\\\"SOLAR_LFR_PSU\\\" -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) +DEFINES+=BSP=\\\"BEAGLESYNTH\\\" +beagleCp.target = beagleCp +beagleCp.commands = scp $$DESTDIR/$(QMAKE_TARGET).bin root@192.168.7.2://opt/stm32flashAje/hello.bin +QMAKE_EXTRA_TARGETS += beagleCp +UCMODEL=stm32f4 diff --git a/bsp/src/M4Stick/M4Stick.pro b/bsp/src/M4Stick/M4Stick.pro --- a/bsp/src/M4Stick/M4Stick.pro +++ b/bsp/src/M4Stick/M4Stick.pro @@ -1,13 +1,18 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt -CONFIG += bsp + +TARGET=bsp +OBJECTS_DIR = obj + BSP=M4Stick -include(bsp.pri) -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) +UCMODEL=stm32f4 SOURCES += bsp.c +HEADERS += bsp.h -HEADERS += $$libuc2/bsp/includes/$$BSP/bsp.h + +BSPFILE = bsp.pri + + + diff --git a/bsp/src/M4Stick/bsp.h b/bsp/src/M4Stick/bsp.h new file mode 100644 --- /dev/null +++ b/bsp/src/M4Stick/bsp.h @@ -0,0 +1,86 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2011, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef BSP_H +#define BSP_H +#include +#include +#include +#include + + +#define __MAX_OPENED_FILES__ 32 +#define __FS_ROOT_SIZE__ 32 + +#define LED1 PD8 +#define LED2 PD9 + +#define LED3ON GPIOB->BSRRH = GPIO_Pin_15 +#define LED2ON GPIOD->BSRRH = GPIO_Pin_8 +#define LED1ON GPIOD->BSRRH = GPIO_Pin_9 + +#define LED3OFF GPIOB->BSRRL = GPIO_Pin_15 +#define LED2OFF GPIOD->BSRRL = GPIO_Pin_8 +#define LED1OFF GPIOD->BSRRL = GPIO_Pin_9 + +extern float VREF0; + +extern uint32_t currentCpuFreq; + +extern int bsp_init(); + +extern void bsp_GPIO_init(); +extern void bsp_uart_init(); +extern void bsp_iic_init(); +extern void bsp_spi_init(); +extern void bsp_SD_init(); + +/* VS1053 */ +extern void clearXCS(); +extern void setXCS(); +extern int vs10XXDREQ(); + +/* SD CARD */ +void bsppowersdcard(char onoff); +char bspsdcardpresent(); +void bspsdcardselect(char YESNO); +char bspsdcardwriteprotected(); + +#endif + + + + + + + + + + + + + + + + + + + diff --git a/bsp/src/M4Stick/bsp.pri b/bsp/src/M4Stick/bsp.pri --- a/bsp/src/M4Stick/bsp.pri +++ b/bsp/src/M4Stick/bsp.pri @@ -1,3 +1,3 @@ CPU=stm32f4xxxG DEFINES+=BSP=\\\"M4Stick\\\" -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) +UCMODEL=stm32f4 diff --git a/bsp/src/M4StickV2/M4StickV2.pro b/bsp/src/M4StickV2/M4StickV2.pro --- a/bsp/src/M4StickV2/M4StickV2.pro +++ b/bsp/src/M4StickV2/M4StickV2.pro @@ -1,11 +1,22 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt -CONFIG += bsp + +TARGET=bsp +OBJECTS_DIR = obj BSP=M4StickV2 -include(bsp.pri) -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) + + +UCMODEL=stm32f4 + +SOURCES += bsp.c + +HEADERS += bsp.h + + +BSPFILE = bsp.pri + + + INCLUDEPATH += $${PWD} diff --git a/bsp/src/M4StickV2/bsp.h b/bsp/src/M4StickV2/bsp.h new file mode 100644 --- /dev/null +++ b/bsp/src/M4StickV2/bsp.h @@ -0,0 +1,92 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2011, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef BSP_H +#define BSP_H +#include +#include +#include +#include + + +#define __MAX_OPENED_FILES__ 32 +#define __FS_ROOT_SIZE__ 32 + +#define LED1 PD9 +#define LED2 PD8 +#define LED3 PB15 + +#define DAC_CS PA1 +#define DAC_DIN PA7 + +#define ADC_MODE0 PA2 +#define ADC_MODE1 PA3 +#define ADC_FSYNC PA4 +#define ADC_SCLK PA5 +#define ADC_DOUT1 PA6 + +#define ADC_SYNC PB10 +#define ADC_CLKDIV PB11 + + +extern float VREF0; + +extern uint32_t currentCpuFreq; + +extern int bsp_init(); + +extern void bsp_GPIO_init(); +extern void bsp_uart_init(); +extern void bsp_iic_init(); +extern void bsp_spi_init(); +extern void bsp_SD_init(); + +/* VS1053 */ +extern void clearXCS(); +extern void setXCS(); +extern int vs10XXDREQ(); + +/* SD CARD */ +void bsppowersdcard(char onoff); +char bspsdcardpresent(); +void bspsdcardselect(char YESNO); +char bspsdcardwriteprotected(); + +#endif + + + + + + + + + + + + + + + + + + + diff --git a/bsp/src/M4StickV2/bsp.pri b/bsp/src/M4StickV2/bsp.pri --- a/bsp/src/M4StickV2/bsp.pri +++ b/bsp/src/M4StickV2/bsp.pri @@ -4,4 +4,4 @@ DEFINES+=BSP=\\\"M4StickV2\\\" USB += cdc DEFINES+= USE_USB_OTG_FS DEFINES+=stm32f4 -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) +UCMODEL=stm32f4 diff --git a/bsp/src/SOLAR_LFR_PSU/SOLAR_LFR_PSU.pro b/bsp/src/SOLAR_LFR_PSU/SOLAR_LFR_PSU.pro --- a/bsp/src/SOLAR_LFR_PSU/SOLAR_LFR_PSU.pro +++ b/bsp/src/SOLAR_LFR_PSU/SOLAR_LFR_PSU.pro @@ -1,13 +1,18 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt -CONFIG += bsp + +TARGET=bsp +OBJECTS_DIR = obj + BSP=SOLAR_LFR_PSU -include(bsp.pri) -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) +UCMODEL=stm32f4 SOURCES += bsp.c +HEADERS += bsp.h -HEADERS += $$libuc2/bsp/includes/$$BSP/bsp.h + +BSPFILE = bsp.pri + + + diff --git a/bsp/src/SOLAR_LFR_PSU/bsp.h b/bsp/src/SOLAR_LFR_PSU/bsp.h new file mode 100644 --- /dev/null +++ b/bsp/src/SOLAR_LFR_PSU/bsp.h @@ -0,0 +1,96 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2011, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef BSP_H +#define BSP_H +#include +#include +#include +#include + +#define __MAX_OPENED_FILES__ 4 +#define __FS_ROOT_SIZE__ 4 +/* +#ifndef PD8 + #define PD8 +#endif +#ifndef PD9 + #define PD9 +#endif +*/ + +#define LED1 PD12 +#define LED2 PD13 +#define LED3 PD14 +#define LED4 PD15 + + +#define LED3ON GPIOB->BSRRH = GPIO_Pin_15 +#define LED2ON GPIOD->BSRRH = GPIO_Pin_8 +#define LED1ON GPIOD->BSRRH = GPIO_Pin_9 + +#define LED3OFF GPIOB->BSRRL = GPIO_Pin_15 +#define LED2OFF GPIOD->BSRRL = GPIO_Pin_8 +#define LED1OFF GPIOD->BSRRL = GPIO_Pin_9 + +extern float VREF0; + +extern uint32_t currentCpuFreq; + +extern int bsp_init(); + +extern void bsp_GPIO_init(); +extern void bsp_uart_init(); +extern void bsp_iic_init(); +extern void bsp_spi_init(); +extern void bsp_SD_init(); + +/* VS1053 */ +extern void clearXCS(); +extern void setXCS(); +extern int vs10XXDREQ(); + +/* SD CARD */ +void bsppowersdcard(char onoff); +char bspsdcardpresent(); +void bspsdcardselect(char YESNO); +char bspsdcardwriteprotected(); + +#endif + + + + + + + + + + + + + + + + + + + diff --git a/bsp/src/SOLAR_LFR_PSU/bsp.pri b/bsp/src/SOLAR_LFR_PSU/bsp.pri --- a/bsp/src/SOLAR_LFR_PSU/bsp.pri +++ b/bsp/src/SOLAR_LFR_PSU/bsp.pri @@ -1,3 +1,3 @@ CPU=stm32f4xxxG DEFINES+=BSP=\\\"SOLAR_LFR_PSU\\\" -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) +UCMODEL=stm32f4 diff --git a/bsp/src/STM32F4Discovery/STM32F4Discovery.pro b/bsp/src/STM32F4Discovery/STM32F4Discovery.pro --- a/bsp/src/STM32F4Discovery/STM32F4Discovery.pro +++ b/bsp/src/STM32F4Discovery/STM32F4Discovery.pro @@ -1,13 +1,18 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt -CONFIG += bsp + +TARGET=bsp +OBJECTS_DIR = obj + BSP=STM32F4Discovery -include(bsp.pri) -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) +UCMODEL=stm32f4 SOURCES += bsp.c +HEADERS += bsp.h -HEADERS += $$libuc2/bsp/includes/$$BSP/bsp.h + +BSPFILE = bsp.pri + + + diff --git a/bsp/src/STM32F4Discovery/bsp.h b/bsp/src/STM32F4Discovery/bsp.h new file mode 100644 --- /dev/null +++ b/bsp/src/STM32F4Discovery/bsp.h @@ -0,0 +1,95 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2011, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef BSP_H +#define BSP_H +#include +#include +/* +#ifndef PD12 + #define PD12 +#endif +#ifndef PD13 + #define PD13 +#endif +*/ +#define __MAX_OPENED_FILES__ 32 +#define __FS_ROOT_SIZE__ 32 + +#define LED1 PD12 +#define LED2 PD13 + +#define GREENLEDON (GPIOD->BSRRL = 1<<12) +#define ORANGELEDON (GPIOD->BSRRL = 1<<13) +#define REDLEDON (GPIOD->BSRRL = 1<<14) +#define BLUELEDON (GPIOD->BSRRL = 1<<15) + +#define GREENLEDOFF (GPIOD->BSRRH = 1<<12) +#define ORANGELEDOFF (GPIOD->BSRRH = 1<<13) +#define REDLEDOFF (GPIOD->BSRRH = 1<<14) +#define BLUELEDOFF (GPIOD->BSRRH = 1<<15) + +extern float VREF0; + +extern uint32_t OSC0; +extern uint32_t currentCpuFreq; + + + +extern int bsp_init(); + +extern void bsp_GPIO_init(); +extern void bsp_uart_init(); +extern void bsp_iic_init(); +extern void bsp_spi_init(); +extern void bsp_SD_init(); + +/* VS1053 */ +extern void clearXCS(); +extern void setXCS(); +extern int vs10XXDREQ(); + +/* SD CARD */ +void bsppowersdcard(char onoff); +char bspsdcardpresent(); +void bspsdcardselect(char YESNO); +char bspsdcardwriteprotected(); + +#endif + + + + + + + + + + + + + + + + + + + diff --git a/bsp/src/STM32F4Discovery/bsp.pri b/bsp/src/STM32F4Discovery/bsp.pri --- a/bsp/src/STM32F4Discovery/bsp.pri +++ b/bsp/src/STM32F4Discovery/bsp.pri @@ -1,3 +1,3 @@ CPU=stm32f4xxxG -DEFINES+=BSP=\\\"STM32F4Discovery\\\" -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) +DEFINES+=BSP=\\\"SOLAR_LFR_PSU\\\" +UCMODEL=stm32f4 diff --git a/bsp/src/STM32F4Eval/STM32F4Eval.pro b/bsp/src/STM32F4Eval/STM32F4Eval.pro new file mode 100644 --- /dev/null +++ b/bsp/src/STM32F4Eval/STM32F4Eval.pro @@ -0,0 +1,18 @@ +TEMPLATE = lib + +TARGET=bsp +OBJECTS_DIR = obj + +BSP=STM32F4Eval + +UCMODEL=stm32f4 + +SOURCES += bsp.c + +HEADERS += bsp.h + + +BSPFILE = bsp.pri + + + diff --git a/bsp/src/STM32F4Eval/bsp.c b/bsp/src/STM32F4Eval/bsp.c new file mode 100644 --- /dev/null +++ b/bsp/src/STM32F4Eval/bsp.c @@ -0,0 +1,319 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2011, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#include "bsp.h" +#include +#include +#include +#include +#include +#include +#include +#include +#include +uint32_t OSC0 =8000000; +uint32_t INTOSC =16000000; +uint32_t RTCOSC =32768; +uint32_t currentCpuFreq=0; +extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__]; + +LCD_IF_t lcdIF0={ + .init = &bsp_FSMC_init, + .writereg = &bsp_lcd0_write_reg, + .readreg = &bsp_lcd0_read_reg, + .writeGRAM = &bsp_lcd0_writeGRAM, + .readGRAM = &bsp_lcd0_readGRAM +}; + +LCD_t lcd0={ + .interface = &lcdIF0, + .init = &ili9328init, + .paint = &ili9328paint, + .paintText = &ili9328paintText, + .paintFilRect = &ili9328paintFilRect, + .refreshenable = &ili9328refreshenable, + .width= 240, + .height = 320 +}; + +volatile int16_t* lcd0_CMD=(volatile int16_t*) (0x60000000 | 0x08000000); +volatile int16_t* lcd0_DATA=((volatile int16_t*)(0x60000000 | 0x08000002)); + +float VREF0 =(float)3.3; + +int bsp_init() +{ + int i=0; + for(i=0;i<32;i++) + { + __opnfiles__[i] = NULL; + } + bsp_GPIO_init(); + bsp_uart_init(); + bsp_iic_init(); + bsp_FSMC_init(); + lcd0.init(&lcd0); + printf("\r================================================================\n\r"); + printf("================================================================\n\r"); + printf(BSP); + printf(" initialised\n\r"); + printf("================================================================\n\r"); + return 1; +} + +void bsp_GPIO_init() +{ + gpio_t gpio1 = gpioopen(LED1); + gpio_t gpio2 = gpioopen(LED2); + gpio_t gpio3 = gpioopen(LED3); + gpiosetspeed(&gpio1,gpiohighspeed); + gpiosetspeed(&gpio2,gpiohighspeed); + gpiosetspeed(&gpio3,gpiohighspeed); + gpiosetdir(&gpio1,gpiooutdir); + gpiosetdir(&gpio2,gpiooutdir); + gpiosetdir(&gpio3,gpiooutdir); +} + +void bsp_uart_init() +{ + if(__opnfiles__[1]==NULL) + { + //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t)); + streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice)); + uart_t uart = uartopenandconfig(uart3,uartparitynone | uart8bits | uartonestop,115200,PC10,PC11,-1,-1); + uartmkstreamdev(uart,fd1); + __opnfiles__[1] = fd1; + } + else + { + uartopenandconfig(uart3,uartparitynone | uart8bits | uartonestop,115200,PC10,PC11,-1,-1); + } +} + +/* +D0 PD14 D1 PD15 D2 PD0 D3 PD1 D4 PE7 +D5 PE8 D6 PE9 D7 PE10 D8 PE11 D9 PE12 +D10 PE13 D11 PE14 D12 PE15 D13 PD8 D14 PD9 +D15 PD10 +A0 PF0 = RS FSMC_NE3 PG10 CS FSMC_NWE PD5 W/S +FSMC_NOE PD4 RD +*/ +/*-- GPIOs Configuration -----------------------------------------------------*/ +/* + +-------------------+--------------------+------------------+------------------+ + + SRAM pins assignment + + +-------------------+--------------------+------------------+------------------+ + | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 | + | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 | + | PD4 <-> FSMC_NOE | PE3 <-> FSMC_A19 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 | + | PD5 <-> FSMC_NWE | PE4 <-> FSMC_A20 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 | + | PD8 <-> FSMC_D13 | PE7 <-> FSMC_D4 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 | + | PD9 <-> FSMC_D14 | PE8 <-> FSMC_D5 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 | + | PD10 <-> FSMC_D15 | PE9 <-> FSMC_D6 | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 | + | PD11 <-> FSMC_A16 | PE10 <-> FSMC_D7 | PF13 <-> FSMC_A7 |------------------+ + | PD12 <-> FSMC_A17 | PE11 <-> FSMC_D8 | PF14 <-> FSMC_A8 | + | PD13 <-> FSMC_A18 | PE12 <-> FSMC_D9 | PF15 <-> FSMC_A9 | + | PD14 <-> FSMC_D0 | PE13 <-> FSMC_D10 |------------------+ + | PD15 <-> FSMC_D1 | PE14 <-> FSMC_D11 | + | | PE15 <-> FSMC_D12 | + +-------------------+--------------------+ +*/ +int bsp_FSMC_init() +{ +#define GPIOGETPORT(gpio) ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA)) +#define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8) + + gpio_t LCD_DBxList[]={ + PD0 ,PD1 ,PD4 ,PD5 ,PD8 ,PD9 ,PD10,PD11,PD12,PD13,PD14,PD15, + PE0 ,PE1 ,PE3 ,PE4 ,PE7 ,PE8 ,PE9 ,PE10,PE11,PE12,PE13,PE14, + PE15,PF0 ,PF1 ,PF2 ,PF3 ,PF4 ,PF5 ,PF12,PF13,PF14,PF15,PG0 , + PG1 ,PG2 ,PG3 ,PG4 ,PG5 ,PG9 ,PG10 + }; + + for(int i=0;i<43;i++) + { + gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]); + LCD_DBx |= gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype; + gpiosetconfig(&LCD_DBx); + GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC); + } + + FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; + FSMC_NORSRAMTimingInitTypeDef p; + + /* Enable FSMC clock */ + RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE); + + /*-- FSMC Configuration ------------------------------------------------------*/ + /*----------------------- SRAM Bank 3 ----------------------------------------*/ + /* FSMC_Bank1_NORSRAM3 configuration */ + p.FSMC_AddressSetupTime = 1; + p.FSMC_AddressHoldTime = 0; + p.FSMC_DataSetupTime = getCpuFreq()/14545450 ;// 11; + p.FSMC_BusTurnAroundDuration = 0; + p.FSMC_CLKDivision = 0; + p.FSMC_DataLatency = 0; + p.FSMC_AccessMode = FSMC_AccessMode_A; + /* Color LCD configuration ------------------------------------ + LCD configured as follow: + - Data/Address MUX = Disable + - Memory Type = SRAM + - Data Width = 16bit + - Write Operation = Enable + - Extended Mode = Enable + - Asynchronous Wait = Disable */ + + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; + + FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); + + /* Enable FSMC NOR/SRAM Bank1 */ + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); + + + p.FSMC_AddressSetupTime = getCpuFreq()/50000000; + p.FSMC_AddressHoldTime = 0; + p.FSMC_DataSetupTime = getCpuFreq()/25000000; + p.FSMC_BusTurnAroundDuration = 1; + p.FSMC_CLKDivision = 0; + p.FSMC_DataLatency = 0; + p.FSMC_AccessMode = FSMC_AccessMode_A; + + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; + + FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); + + /*!< Enable FSMC Bank1_SRAM2 Bank */ + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE); + + + return 1; +} + +void bsp_spi_init() +{ + +} + + +void bsp_iic_init() +{ + //i2copenandconfig(i2c2,0,400000,PF0,PF1); +} + +void bsp_SD_init() +{ + +} + +void vs10XXclearXCS(){} +void vs10XXsetXCS(){} +int vs10XXDREQ() +{ + return 1; +} + + +void bsppowersdcard(char onoff) //always ON +{ + +} + +char bspsdcardpresent() +{ + return 0; +} + +char bspsdcardwriteprotected() +{ + return 0; +} + +void bspsdcardselect(char YESNO) +{ + +} + + +void bsp_lcd0_write_reg(uint32_t reg,uint32_t data) +{ + *lcd0_CMD=(uint16_t)reg; + *lcd0_DATA=(uint16_t)data; +} + +uint32_t bsp_lcd0_read_reg(uint32_t reg) +{ + *lcd0_CMD=(uint16_t)reg; + return (uint16_t)*lcd0_DATA; +} + +void bsp_lcd0_writeGRAM(void* buffer,uint32_t count) +{ + *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM; + uint16_t* castedBuff=(uint16_t*)buffer; + for(int i=0;i<(int)count;i++) + { + *lcd0_DATA=castedBuff[i]; + } +} + +void bsp_lcd0_readGRAM(void* buffer,uint32_t count) +{ + *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM; + uint16_t* castedBuff=(uint16_t*)buffer; + castedBuff[0]=*lcd0_DATA; + for(int i=0;i<(int)count;i++) + { + castedBuff[i]=*lcd0_DATA; + } +} + + + + diff --git a/bsp/src/STM32F4Eval/bsp.h b/bsp/src/STM32F4Eval/bsp.h new file mode 100644 --- /dev/null +++ b/bsp/src/STM32F4Eval/bsp.h @@ -0,0 +1,93 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2011, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef BSP_H +#define BSP_H +#include +#include +#include +#include +#include +#include + +#define __MAX_OPENED_FILES__ 4 +#define __FS_ROOT_SIZE__ 4 + + + +#define LED1 PG6 +#define LED2 PG8 +#define LED3 PI9 +#define LED4 PC7 + + +extern float VREF0; + +extern uint32_t currentCpuFreq; +extern LCD_t lcd0; + + +extern int bsp_init(); + +extern void bsp_GPIO_init(); +extern void bsp_uart_init(); +extern void bsp_iic_init(); +extern void bsp_spi_init(); +extern void bsp_SD_init(); +extern int bsp_FSMC_init(); + +/* VS1053 */ +extern void clearXCS(); +extern void setXCS(); +extern int vs10XXDREQ(); + +/* SD CARD */ +void bsppowersdcard(char onoff); +char bspsdcardpresent(); +void bspsdcardselect(char YESNO); +char bspsdcardwriteprotected(); + + +void bsp_lcd0_write_reg(uint32_t reg,uint32_t data); +uint32_t bsp_lcd0_read_reg(uint32_t reg); +void bsp_lcd0_writeGRAM(void *buffer, uint32_t count); +void bsp_lcd0_readGRAM(void *buffer, uint32_t count); + +#endif + + + + + + + + + + + + + + + + + + + diff --git a/bsp/src/STM32F4Eval/bsp.pri b/bsp/src/STM32F4Eval/bsp.pri new file mode 100644 --- /dev/null +++ b/bsp/src/STM32F4Eval/bsp.pri @@ -0,0 +1,3 @@ +CPU=stm32f4xxxG +DEFINES+=BSP=\\\"STM32F4Eval\\\" +UCMODEL=stm32f4 diff --git a/bsp/src/bsp.pro b/bsp/src/bsp.pro --- a/bsp/src/bsp.pro +++ b/bsp/src/bsp.pro @@ -3,8 +3,9 @@ CONFIG += ordered SUBDIRS += STM32F4Discovery \ M4Stick \ M4StickV2 \ - SOLAR_LFR_PSU \ - BEAGLESYNTH + SOLAR_LFR_PSU \ + BEAGLESYNTH \ + STM32F4Eval @@ -12,4 +13,3 @@ SUBDIRS += STM32F4Discovery \ - diff --git a/examples/BeagleSynthHello/BeagleSynthHello.pro b/examples/BeagleSynthHello/BeagleSynthHello.pro --- a/examples/BeagleSynthHello/BeagleSynthHello.pro +++ b/examples/BeagleSynthHello/BeagleSynthHello.pro @@ -1,11 +1,11 @@ TEMPLATE = app -CONFIG += console -CONFIG -= qt +CONFIG += cpu + + +UCMODEL=stm32f4 BSP = BEAGLESYNTH #BSP = SOLAR_LFR_PSU -include($$(libuc2)/bsp/cfg/$$BSP/bsp.pri) -#include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) SOURCES += \ main.c diff --git a/examples/M4StickV2/M4StickV2.pro b/examples/M4StickV2/M4StickV2.pro new file mode 100644 --- /dev/null +++ b/examples/M4StickV2/M4StickV2.pro @@ -0,0 +1,12 @@ +TEMPLATE = app +CONFIG += console +CONFIG -= qt + +BSP=M4StickV2 + +include($$(libuc2)/bsp/cfg/$${BSP}/bsp.pri) +#include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) + +SOURCES += \ + main.c + diff --git a/examples/M4StickV2/main.c b/examples/M4StickV2/main.c new file mode 100644 --- /dev/null +++ b/examples/M4StickV2/main.c @@ -0,0 +1,42 @@ +#include +#include +#include +#include +#include +#include +#include + +void ads1278readOut(spi_t spidev,int32_t* data) +{ + gpioset(ADC_FSYNC); + delay_100us(1); + gpioclr(ADC_FSYNC); + for(int i=0;i<8;i++) + { + data[i]=spigetw(spidev)<<16; + data[i]+=spigetw(spidev)<<8; + data[i]+=spigetw(spidev); + if((data[i]&(1<<23)))data[i]-=(1<<24); + } + +} + +void pushData(int32_t* data) +{ + printf("%d;%d;%d\n\r",(int)data[0],(int)data[1],(int)data[2]); +} + + +int main() +{ + int32_t data[8]; + + while(1) + { + ads1278readOut(spi1,data); + gpioclr(LED2); + delay_100us(1000); + pushData(data); + gpioset(LED2); + } +} diff --git a/examples/M4stick/bin/STM32F4DiscoveryBlink.elf b/examples/M4stick/bin/STM32F4DiscoveryBlink.elf old mode 100755 new mode 100644 diff --git a/examples/M4stickV2/M4StickV2.pro b/examples/M4stickV2/M4StickV2.pro deleted file mode 100644 --- a/examples/M4stickV2/M4StickV2.pro +++ /dev/null @@ -1,12 +0,0 @@ -TEMPLATE = app -CONFIG += console -CONFIG -= qt - -BSP=M4StickV2 - -include($$(libuc2)/bsp/cfg/$${BSP}/bsp.pri) -#include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) - -SOURCES += \ - main.c - diff --git a/examples/M4stickV2/main.c b/examples/M4stickV2/main.c deleted file mode 100644 --- a/examples/M4stickV2/main.c +++ /dev/null @@ -1,42 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include - -void ads1278readOut(spi_t spidev,int32_t* data) -{ - gpioset(ADC_FSYNC); - delay_100us(1); - gpioclr(ADC_FSYNC); - for(int i=0;i<8;i++) - { - data[i]=spigetw(spidev)<<16; - data[i]+=spigetw(spidev)<<8; - data[i]+=spigetw(spidev); - if((data[i]&(1<<23)))data[i]-=(1<<24); - } - -} - -void pushData(int32_t* data) -{ - printf("%d;%d;%d\n\r",(int)data[0],(int)data[1],(int)data[2]); -} - - -int main() -{ - int32_t data[8]; - - while(1) - { - ads1278readOut(spi1,data); - gpioclr(LED2); - delay_100us(1000); - pushData(data); - gpioset(LED2); - } -} diff --git a/examples/SDCARD/SDCARD b/examples/SDCARD/SDCARD old mode 100755 new mode 100644 diff --git a/examples/SOLAR_PSU_HELLO/bin/dfu.py b/examples/SOLAR_PSU_HELLO/bin/dfu.py old mode 100755 new mode 100644 diff --git a/examples/SOLAR_PSU_HELLO/hello.pro b/examples/SOLAR_PSU_HELLO/hello.pro --- a/examples/SOLAR_PSU_HELLO/hello.pro +++ b/examples/SOLAR_PSU_HELLO/hello.pro @@ -2,11 +2,11 @@ TEMPLATE = app CONFIG += console CONFIG -= qt -#BSP = BEAGLESYNTH +BSP = BEAGLESYNTH #BSP = SOLAR_LFR_PSU #BSP=M4Stick -BSP=M4StickV2 -include($$(libuc2)/bsp/cfg/$$BSP/bsp.pri) +#BSP=M4StickV2 +#include($$(libuc2)/bsp/cfg/$$BSP/bsp.pri) #include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) SOURCES += \ diff --git a/examples/STM32F4Discovery/TestSpi/bin/stm32f4DiscoveryTestSpi.elf b/examples/STM32F4Discovery/TestSpi/bin/stm32f4DiscoveryTestSpi.elf old mode 100755 new mode 100644 diff --git a/examples/STM32F4Discovery/TestStdUart/bin/stm32f4DiscoveryTestStdUart.elf b/examples/STM32F4Discovery/TestStdUart/bin/stm32f4DiscoveryTestStdUart.elf old mode 100755 new mode 100644 diff --git a/examples/STM32F4Discovery/blink/bin/stm32f4DiscoveryBlink.elf b/examples/STM32F4Discovery/blink/bin/stm32f4DiscoveryBlink.elf old mode 100755 new mode 100644 diff --git a/examples/STM32F4Discovery/blink2/bin/stm32f4DiscoveryBlink.elf b/examples/STM32F4Discovery/blink2/bin/stm32f4DiscoveryBlink.elf old mode 100755 new mode 100644 diff --git a/examples/STM32F4Discovery/sdcard/bin/stm32f4DiscoverySDCARD.elf b/examples/STM32F4Discovery/sdcard/bin/stm32f4DiscoverySDCARD.elf old mode 100755 new mode 100644 diff --git a/examples/examples.pro b/examples/examples.pro --- a/examples/examples.pro +++ b/examples/examples.pro @@ -2,13 +2,15 @@ TEMPLATE = subdirs CONFIG += ordered SUBDIRS += QtTest/test.pro \ SOLAR_PSU_HELLO/hello.pro \ - SDCARD \ - STM32F4IT \ - BeagleSynthHello \ - M4StickV2 + SDCARD \ + STM32F4IT \ + M4StickV2 \ + lcdHello \ + # BeagleSynthHello \ + diff --git a/examples/lcdHello/lcdHello.pro b/examples/lcdHello/lcdHello.pro new file mode 100644 --- /dev/null +++ b/examples/lcdHello/lcdHello.pro @@ -0,0 +1,12 @@ +TEMPLATE = app +CONFIG += console +CONFIG -= qt + +BSP = STM32F4Eval +#BSP = SOLAR_LFR_PSU +include($$(libuc2)/bsp/cfg/$$BSP/bsp.pri) +#include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) + +SOURCES += \ + main.c + diff --git a/examples/lcdHello/main.c b/examples/lcdHello/main.c new file mode 100644 --- /dev/null +++ b/examples/lcdHello/main.c @@ -0,0 +1,92 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +extern streamdevice* __opnfiles__[]; + +#define LCD_COLOR_WHITE 0xFFFF +#define LCD_COLOR_BLACK 0x0000 +#define LCD_COLOR_GREY 0xF7DE +#define LCD_COLOR_BLUE 0x001F +#define LCD_COLOR_BLUE2 0x051F +#define LCD_COLOR_RED 0xF800 +#define LCD_COLOR_MAGENTA 0xF81F +#define LCD_COLOR_GREEN 0x07E0 +#define LCD_COLOR_CYAN 0x7FFF +#define LCD_COLOR_YELLOW 0xFFE0 + + +void monkDemo() +{ + while(1) + { + lcd0.paintText(&lcd0," ",10,Monk_24.Height+10,&Monk_24,LCD_COLOR_BLACK); + lcd0.paintText(&lcd0," ",230-Monk_24.Width,310,&Monk_24,LCD_COLOR_BLUE); + for(volatile int i=0;i<(1024*1024*16);i++); + lcd0.paintFilRect(&lcd0,0,0,240,320,LCD_COLOR_WHITE,1,LCD_COLOR_WHITE); + for(volatile int i=0;i<(1024*1024*4);i++); + } +} + + +void randBoxesDemo() +{ + int16_t x,y,w,h,t,r; + x=rand()%240; + y=rand()%320; + w=rand()%(240-x); + if(x>y) + r=(rand()%(y))%(320-y); + else + r=(rand()%(x))%(240-x); + h=rand()%(320-y); + t=rand()%(10); + //ili9328paintFilRect(&lcd0,x,y,w,h,rand(),t,rand()); + ili9328paintFilCircMidPoint(&lcd0,x,y,r,rand(),t,rand()); +} + +int main() +{ + //volatile int16_t* regtest=(volatile int16_t*) 0x80000000; + //volatile int16_t* regtest2=(volatile int16_t*)(0x80000001); + //*regtest=(int16_t)0; + //printf("LCD ID=%x\n\r",0xFFFF&(*regtest2)); + printf("Sys Tick=%d\n\r",SysTick->VAL); + printf("Sys Tick=%d\n\r",SysTick->VAL); + printf("Sys Tick=%d\n\r",SysTick->VAL); + printf("Sys Tick=%d\n\r",SysTick->VAL); + ili9328paintFilRect(&lcd0,0,0,240,320,LCD_COLOR_BLACK,1,LCD_COLOR_WHITE); + // while(1)randBoxesDemo();//monkDemo(); + ili9328paintFilCircMidPoint(&lcd0,120,160,100,LCD_COLOR_BLUE2,10,LCD_COLOR_GREEN); + while(1) + { + delay_100us(5000); + gpioset(LED1); + gpioclr(LED2); + delay_100us(5000); + gpioclr(LED1); + gpioset(LED2); + } + printf("hello world\n\r"); + return 0; +} + + + + + + + + + diff --git a/lib/includes/24LC0X.h b/lib/includes/24LC0X.h deleted file mode 100644 --- a/lib/includes/24LC0X.h +++ /dev/null @@ -1,57 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2011, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef B24LC0X_H -#define B24LC0X_H - -#include "iic.h" -#include - -struct eeprom24LC0X_str -{ - i2cDev iicdev; - unsigned char devAddress; - unsigned char size; -}; - -typedef struct eeprom24LC0X_str eeprom24lc0xDev; - - -extern void eeprom24lc0xopen(eeprom24lc0xDev* dev,i2cDev iicdev,unsigned char A0_A1_A2_val,unsigned int size); - -extern void eeprom24lc0xpagewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char* page); -extern void eeprom24lc0xpageread(eeprom24lc0xDev dev,unsigned char address,unsigned char* page); -extern void eeprom24lc0xbytewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char data); -extern unsigned char eeprom24lc0xbyteread(eeprom24lc0xDev dev,unsigned char address); -extern void eeprom24lc0xreadn(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count); -extern void eeprom24lc0xwriten(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count); - - - - -#endif - - - - - - - diff --git a/lib/includes/CS43L22.h b/lib/includes/CS43L22.h deleted file mode 100644 --- a/lib/includes/CS43L22.h +++ /dev/null @@ -1,87 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2011, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef CS43L22_H -#define CS43L22_H - -#include -#include - -typedef struct CS43L22_t -{ - i2c_t i2cdev; - uint8_t devAddress; -}CS43L22_t; - -extern int cs43l22open(CS43L22_t* dev,i2c_t i2cdev,uint8_t A0); -extern uint8_t cs43l22getID(CS43L22_t* dev); - -#define CS43L22_I2C_ADDRESS 0x4a - - -#define CS43L22_MAP_ID 1 -#define CS43L22_MAP_Power_Ctl_1 2 -#define CS43L22_MAP_Power_Ctl_2 4 -#define CS43L22_MAP_Clocking_Ctl 5 -#define CS43L22_MAP_Interface_Ctl_1 6 -#define CS43L22_MAP_Interface_Ctl_2 7 -#define CS43L22_MAP_Passthrough_A 8 -#define CS43L22_MAP_Passthrough_B 9 -#define CS43L22_MAP_Analog_ZC_SR 0xA -#define CS43L22_MAP_Passthrough 0xC -#define CS43L22_MAP_Playback_Ctl_1 0xD -#define CS43L22_MAP_Misc_Ctl 0xE -#define CS43L22_MAP_Playback_Ctl_2 0xF -#define CS43L22_MAP_Passthrough_A_Vol 0x14 -#define CS43L22_MAP_Passthrough_B_Vol 0x15 -#define CS43L22_MAP_PCMA_Vol 0x1A -#define CS43L22_MAP_PCMB_Vol 0x1B -#define CS43L22_MAP_BEEP_Freq 0x1C -#define CS43L22_MAP_BEEP_Vol 0x1d -#define CS43L22_MAP_BEEP_Tone_Cfg 0x1E -#define CS43L22_MAP_Tone_Ctl 0x1F -#define CS43L22_MAP_Master_A_Vol 0x20 -#define CS43L22_MAP_Master_B_Vol 0x21 -#define CS43L22_MAP_Headphone_A_Vol 0x22 -#define CS43L22_MAP_Headphone_B_Vol 0x23 -#define CS43L22_MAP_Speaker_A_Vol 0x24 -#define CS43L22_MAP_Speaker_B_Vol 0x25 -#define CS43L22_MAP_Channel_Mixer 0x26 -#define CS43L22_MAP_Limit_Ctl_1 0x27 -#define CS43L22_MAP_Limit Ctl_2 0x28 -#define CS43L22_MAP_Limiter_Attack 0x29 -#define CS43L22_MAP_Overflow_And_Clock_Status 0x2E -#define CS43L22_MAP_Battery_Compensation 0x2F -#define CS43L22_MAP_VP_Battery_Level 0x30 -#define CS43L22_MAP_Speaker_Status 0x31 -#define CS43L22_MAP_Temperature_Monitor_Control 0x32 -#define CS43L22_MAP_Thermal_Foldback 0x33 -#define CS43L22_MAP_Charge_Pump_Frequency 0x34 - - -#endif - - - - - - - diff --git a/lib/includes/GRAPHIC/CONTROLERS/genericLCD_Controler.h b/lib/includes/GRAPHIC/CONTROLERS/genericLCD_Controler.h deleted file mode 100644 --- a/lib/includes/GRAPHIC/CONTROLERS/genericLCD_Controler.h +++ /dev/null @@ -1,57 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef GENERICLCD_CONTROLER_H -#define GENERICLCD_CONTROLER_H - -#include -#include -#include - - -typedef struct LCD_IF_t -{ - int (*init)(); - void (*writereg)(uint32_t reg,uint32_t data); - uint32_t (*readreg)(uint32_t reg); - void (*writeGRAM)(void* buffer,uint32_t count); - void (*readGRAM)(void* buffer,uint32_t count); -}LCD_IF_t; - -typedef struct LCD_t -{ - LCD_IF_t* interface; - int (*init)(struct LCD_t* LCD); - void (*paint)(struct LCD_t* LCD,void* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t Width,uint16_t Height); - void (*paintText)(struct LCD_t* LCD,char* buffer,uint16_t Xpos,uint16_t Ypos,sFONT *font,uint32_t color); - void (*paintFilRect)(struct LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor); - void (*refreshenable)(struct LCD_t* LCD,int enable); - uint16_t width; - uint16_t height; -}LCD_t; - - -#endif /*GENERICLCD_CONTROLER_H*/ - - - - - diff --git a/lib/includes/GRAPHIC/CONTROLERS/ili9328.h b/lib/includes/GRAPHIC/CONTROLERS/ili9328.h deleted file mode 100644 --- a/lib/includes/GRAPHIC/CONTROLERS/ili9328.h +++ /dev/null @@ -1,96 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef ILI9328_H -#define ILI9328_H - -#include -#include -#include -#include - -extern int ili9328init(struct LCD_t* LCD); -extern void ili9328setFrame(LCD_t* LCD,uint16_t X,uint16_t Y,uint16_t W,uint16_t H); -extern void ili9328setGRAMaddress(LCD_t* LCD,uint16_t Haddress,uint16_t Vaddress); -extern void ili9328paint(LCD_t* LCD,void* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t Width,uint16_t Height); -extern void ili9328paintText(LCD_t* LCD,char* buffer,uint16_t Xpos,uint16_t Ypos,sFONT *font,uint32_t color); -extern void ili9328paintFilRect(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor); -extern void ili9328paintFilCirc(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor); -extern void ili9328refreshenable(struct LCD_t* LCD,int enable); - -#define ILI9328_REGISTER_DRIVERCODEREAD ((uint32_t) 0x0000 ) -#define ILI9328_REGISTER_DRIVEROUTPUTCONTROL1 ((uint32_t) 0x0001 ) -#define ILI9328_REGISTER_LCDDRIVINGCONTROL ((uint32_t) 0x0002 ) -#define ILI9328_REGISTER_ENTRYMODE ((uint32_t) 0x0003 ) -#define ILI9328_REGISTER_RESIZECONTROL ((uint32_t) 0x0004 ) -#define ILI9328_REGISTER_DISPLAYCONTROL1 ((uint32_t) 0x0007 ) -#define ILI9328_REGISTER_DISPLAYCONTROL2 ((uint32_t) 0x0008 ) -#define ILI9328_REGISTER_DISPLAYCONTROL3 ((uint32_t) 0x0009 ) -#define ILI9328_REGISTER_DISPLAYCONTROL4 ((uint32_t) 0x000A ) -#define ILI9328_REGISTER_RGBDISPLAYINTERFACECONTROL1 ((uint32_t) 0x000C ) -#define ILI9328_REGISTER_FRAMEMAKERPOSITION ((uint32_t) 0x000D ) -#define ILI9328_REGISTER_RGBDISPLAYINTERFACECONTROL2 ((uint32_t) 0x000F ) -#define ILI9328_REGISTER_POWERCONTROL1 ((uint32_t) 0x0010 ) -#define ILI9328_REGISTER_POWERCONTROL2 ((uint32_t) 0x0011 ) -#define ILI9328_REGISTER_POWERCONTROL3 ((uint32_t) 0x0012 ) -#define ILI9328_REGISTER_POWERCONTROL4 ((uint32_t) 0x0013 ) -#define ILI9328_REGISTER_HORIZONTALGRAMADDRESSSET ((uint32_t) 0x0020 ) -#define ILI9328_REGISTER_VERTICALGRAMADDRESSSET ((uint32_t) 0x0021 ) -#define ILI9328_REGISTER_WRITEDATATOGRAM ((uint32_t) 0x0022 ) -#define ILI9328_REGISTER_POWERCONTROL7 ((uint32_t) 0x0029 ) -#define ILI9328_REGISTER_FRAMERATEANDCOLORCONTROL ((uint32_t) 0x002B ) -#define ILI9328_REGISTER_GAMMACONTROL1 ((uint32_t) 0x0030 ) -#define ILI9328_REGISTER_GAMMACONTROL2 ((uint32_t) 0x0031 ) -#define ILI9328_REGISTER_GAMMACONTROL3 ((uint32_t) 0x0032 ) -#define ILI9328_REGISTER_GAMMACONTROL4 ((uint32_t) 0x0035 ) -#define ILI9328_REGISTER_GAMMACONTROL5 ((uint32_t) 0x0036 ) -#define ILI9328_REGISTER_GAMMACONTROL6 ((uint32_t) 0x0037 ) -#define ILI9328_REGISTER_GAMMACONTROL7 ((uint32_t) 0x0038 ) -#define ILI9328_REGISTER_GAMMACONTROL8 ((uint32_t) 0x0039 ) -#define ILI9328_REGISTER_GAMMACONTROL9 ((uint32_t) 0x003C ) -#define ILI9328_REGISTER_GAMMACONTROL10 ((uint32_t) 0x003D ) -#define ILI9328_REGISTER_HORIZONTALADDRESSSTARTPOSITION ((uint32_t) 0x0050 ) -#define ILI9328_REGISTER_HORIZONTALADDRESSENDPOSITION ((uint32_t) 0x0051 ) -#define ILI9328_REGISTER_VERTICALADDRESSSTARTPOSITION ((uint32_t) 0x0052 ) -#define ILI9328_REGISTER_VERTICALADDRESSENDPOSITION ((uint32_t) 0x0053 ) -#define ILI9328_REGISTER_DRIVEROUTPUTCONTROL2 ((uint32_t) 0x0060 ) -#define ILI9328_REGISTER_BASEIMAGEDISPLAYCONTROL ((uint32_t) 0x0061 ) -#define ILI9328_REGISTER_VERTICALSCROLLCONTROL ((uint32_t) 0x006A ) -#define ILI9328_REGISTER_PARTIALIMAGE1DISPLAYPOSITION ((uint32_t) 0x0080 ) -#define ILI9328_REGISTER_PARTIALIMAGE1AREASTARTLINE ((uint32_t) 0x0081 ) -#define ILI9328_REGISTER_PARTIALIMAGE1AREAENDLINE ((uint32_t) 0x0082 ) -#define ILI9328_REGISTER_PARTIALIMAGE2DISPLAYPOSITION ((uint32_t) 0x0083 ) -#define ILI9328_REGISTER_PARTIALIMAGE2AREASTARTLINE ((uint32_t) 0x0084 ) -#define ILI9328_REGISTER_PARTIALIMAGE2AREAENDLINE ((uint32_t) 0x0085 ) -#define ILI9328_REGISTER_PANELINTERFACECONTROL1 ((uint32_t) 0x0090 ) -#define ILI9328_REGISTER_PANELINTERFACECONTROL2 ((uint32_t) 0x0092 ) -#define ILI9328_REGISTER_PANELINTERFACECONTROL4 ((uint32_t) 0x0095 ) -#define ILI9328_REGISTER_OTPVCMPROGRAMMINGCONTROL ((uint32_t) 0x00A1 ) -#define ILI9328_REGISTER_OTPVCMSTATUSANDENABLE ((uint32_t) 0x00A2 ) -#define ILI9328_REGISTER_OTPPROGRAMMINGIDKEY ((uint32_t) 0x00A5 ) - - -#endif - - - - - diff --git a/lib/includes/GRAPHIC/GUI/FONTS/fonts.h b/lib/includes/GRAPHIC/GUI/FONTS/fonts.h deleted file mode 100644 --- a/lib/includes/GRAPHIC/GUI/FONTS/fonts.h +++ /dev/null @@ -1,57 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef FONTS_H -#define FONTS_H - -#ifdef __cplusplus - extern "C" { -#endif - -#include - - -typedef struct _tFont -{ - const uint8_t *table; - uint16_t Width; - uint16_t Height; - uint8_t bytesPerLine; - -} sFONT; - -extern sFONT ComicSansMS_24; -extern sFONT ComicSansMS_18; -extern sFONT Monk_24; - -#ifdef __cplusplus -} -#endif - -#endif - - - - - - - - diff --git a/lib/includes/GRAPHIC/GUI/Widgets/terminal.h b/lib/includes/GRAPHIC/GUI/Widgets/terminal.h deleted file mode 100644 --- a/lib/includes/GRAPHIC/GUI/Widgets/terminal.h +++ /dev/null @@ -1,26 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef TERMINAL_H -#define TERMINAL_H -#include - -#endif diff --git a/lib/includes/GRAPHIC/GUI/Widgets/widget.h b/lib/includes/GRAPHIC/GUI/Widgets/widget.h deleted file mode 100644 --- a/lib/includes/GRAPHIC/GUI/Widgets/widget.h +++ /dev/null @@ -1,42 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef WIDGET_H -#define WIDGET_H -#include - -typedef struct widget -{ - uint16_t Width; - uint16_t Height; - uint16_t Xpos; - uint16_t Ypos; - void (*paint)(); -} widget; - - - - - - -#endif - - diff --git a/lib/includes/adc.h b/lib/includes/adc.h deleted file mode 100644 --- a/lib/includes/adc.h +++ /dev/null @@ -1,139 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -/* -*/ - -#ifndef ADC_H -#define ADC_H -#include -#include - -#ifdef __cplusplus - extern "C" { -#endif - - -typedef struct adc_t -{ - void* _dev; - int cfg; - int rate; -}adc_t; - - -typedef enum -{ - adc6bits = 0x1, - adc7bits = 0x2, - adc8bits = 0x3, - adc9bits = 0x4, - adc10bits = 0x5, - adc11bits = 0x6, - adc12bits = 0x7, - adc13bits = 0x8, - adc14bits = 0x9, - adc15bits = 0xA, - adc16bits = 0xB, - adc17bits = 0xC, - adc18bits = 0xD, - adc19bits = 0xE, - adc20bits = 0xF, - adc21bits = 0x10, - adc22bits = 0x11, - adc23bits = 0x12, - adc24bits = 0x13 -}adcbits_t; - -#define ADCBITSMASK 0xF - -typedef enum -{ - adcsingle = 0x00, - adcmaster = 0x10 -}adcconvmode_t; - -#define ADCCONVMODEMASK 0x10 - -typedef enum -{ - spiclkinhlow = 0x00, - spiclkinhhigh = 0x20 -}spiclkinhlvl_t; - -#define SPICLKINHLVLMASK 0x20 - - -typedef enum -{ - spiclkfirstedge = 0x00, - spiclksecondedge = 0x40 -}spiclkphase_t; - -#define SPICLKPHASEMASK 0x40 - -typedef enum -{ - spimsbfirst = 0x00, - spilsbfirst = 0x80 -}spibitorder_t; - -#define SPIBITORDERMASK 0x80 - - -extern int spiopen(int count,spi_t* spidev); -extern int spiopenandconfig(int count,spi_t* spidev,uint32_t cfg,uint32_t speed,uint32_t MOSIpin,uint32_t MISOpin,uint32_t SCKpin,uint32_t SCSpin); -extern int spiclose(spi_t* spidev); -extern int spisetpins(spi_t* spidev,uint32_t MOSIpin,uint32_t MISOpin,uint32_t SCKpin,uint32_t SCSpin); -extern int spienable(spi_t* spidev); -extern int spidisable(spi_t* spidev); -extern int spisetconfig(spi_t* spidev); -extern int spisetspeed(spi_t* spidev, uint32_t speed); -extern int spisetbitorder(spi_t* spidev,spibitorder_t order); -extern int spisetdatabits(spi_t* spidev,spibits_t bitscnt); -extern int spisetclkinhlevel(spi_t* spidev,spiclkinhlvl_t level); -extern int spisetclkphase(spi_t* spidev,spiclkphase_t phase); -extern int spiputw(spi_t* spidev,uint16_t data); -extern uint16_t spigetw(spi_t* spidev); -extern int spiputs(spi_t* spidev,char* s); -extern int spigets(spi_t* spidev,char* s); -extern int spiputnw(spi_t* spidev,uint16_t* w,int n); -extern int spigetnw(spi_t* spidev,uint16_t* w,int n); -extern int spiputnc(spi_t* spidev,char* c,int n); -extern int spigetnc(spi_t* spidev,char* c,int n); -extern int spiavailiabledata(spi_t* spidev); - -#ifdef __cplusplus - } -#endif -#endif //ADC_H - - - - - - - - - - - - diff --git a/lib/includes/ads1278.h b/lib/includes/ads1278.h deleted file mode 100644 --- a/lib/includes/ads1278.h +++ /dev/null @@ -1,72 +0,0 @@ -/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ -#ifndef ADS1278_H -#define ADS1278_H -#include - -typedef void (*set_clkdiv_t)(int val); -typedef void (*set_sync_t)(int val); -typedef void (*set_mode0_t)(int val); -typedef void (*set_mode1_t)(int val); -typedef void (*set_fsync_t)(int val); -typedef int (*ready_t)(); - -struct ads1278Regs -{ - sspDev SSP_device; - set_clkdiv_t set_clkdiv; - set_sync_t set_sync; - set_mode0_t set_mode0; - set_mode1_t set_mode1; - set_fsync_t set_fsync; - ready_t ready; -}; - -typedef struct ads1278Regs ads1278Dev; - -void ads1278open(ads1278Dev* codec,sspDev dev); -void ads1278sample(ads1278Dev* dev); -void ads1278readresult(ads1278Dev* dev,unsigned int* CH1,unsigned int* CH2,unsigned int* CH3,unsigned int* CH4,unsigned int* CH5,unsigned int* CH6,unsigned int* CH7,unsigned int* CH8); - -extern void bsp_ads1278_Sample(); -extern int bsp_ads1278_Ready(); -extern void bsp_ads1278_Synch(); - -#endif - - - - - - - - - - - - - - - - - - diff --git a/lib/includes/blkdevice.h b/lib/includes/blkdevice.h deleted file mode 100644 --- a/lib/includes/blkdevice.h +++ /dev/null @@ -1,128 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef BLKDEVICE_H -#define BLKDEVICE_H -#include -/* Disk Status Bits (DSTATUS) */ - -#define STA_NOINIT 0x01 /* Drive not initialized */ -#define STA_NODISK 0x02 /* No medium in the drive */ -#define STA_PROTECT 0x04 /* Write protected */ - - -/* Command code for disk_ioctrl fucntion */ -/* Generic ioctl command (defined for FatFs) */ -#define CTRL_SYNC 0 /* Flush disk cache (for write functions) */ -#define GET_SECTOR_COUNT 1 /* Get media size (for only f_mkfs()) */ -#define GET_SECTOR_SIZE 2 /* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */ -#define GET_BLOCK_SIZE 3 /* Get erase block size (for only f_mkfs()) */ -#define CTRL_ERASE_SECTOR 4 /* Force erased a block of sectors (for only _USE_ERASE) */ - -/* Generic ioctl command */ -#define CTRL_POWER 5 /* Get/Set power status */ -#define CTRL_LOCK 6 /* Lock/Unlock media removal */ -#define CTRL_EJECT 7 /* Eject media */ - -/* MMC/SDC specific ioctl command */ -#define MMC_GET_TYPE 10 /* Get card type */ -#define MMC_GET_CSD 11 /* Get CSD */ -#define MMC_GET_CID 12 /* Get CID */ -#define MMC_GET_OCR 13 /* Get OCR */ -#define MMC_GET_SDSTAT 14 /* Get SD status */ - -/* ATA/CF specific ioctl command */ -#define ATA_GET_REV 20 /* Get F/W revision */ -#define ATA_GET_MODEL 21 /* Get model name */ -#define ATA_GET_SN 22 /* Get serial number */ - -/* NAND specific ioctl command */ -#define NAND_FORMAT 30 /* Create physical format */ - -/* Status of Disk Functions */ -typedef unsigned char DSTATUS; - -/* Results of Disk Functions */ -typedef enum { - RES_OK = 0, /* 0: Successful */ - RES_ERROR, /* 1: R/W Error */ - RES_WRPRT, /* 2: Write Protected */ - RES_NOTRDY, /* 3: Not Ready */ - RES_PARERR /* 4: Invalid Parameter */ -} DRESULT; - -typedef volatile struct blkdevice* blkdeviceptr; - -typedef void (*blkdevselect_t)(char) ; -typedef void (*blkdevpower_t)(char) ; -typedef char (*blkdevdetect_t)() ; -typedef char (*blkdevwriteprotected_t)() ; -typedef DRESULT (*blkdevwrite_t)(blkdeviceptr _this,const char *buff,unsigned long sector,char count) ; -typedef DRESULT (*blkdevread_t)(blkdeviceptr _this,char *buff,unsigned long sector,char count) ; -typedef DRESULT (*blkdevioctl_t)(blkdeviceptr _this,char ctrl,void *buff) ; -typedef DSTATUS (*blkdevinitialize_t)(blkdeviceptr _this) ; -typedef DSTATUS (*blkdevstatus_t) (blkdeviceptr _this) ; - -typedef struct blkdevice -{ - UHANDLE phy; - unsigned int size; - unsigned int MaxSpeed; - unsigned char Version; - blkdevselect_t select; - blkdevpower_t power; - blkdevdetect_t detect; - blkdevwriteprotected_t writeprotected; - blkdevwrite_t write; - blkdevread_t read; - blkdevioctl_t ioctl; - blkdevinitialize_t initialize; - blkdevstatus_t status; -}blkdevice; - - - - - - -#endif - - - - - - - - - - - - - - - - - - - - - - diff --git a/lib/includes/core.h b/lib/includes/core.h deleted file mode 100644 --- a/lib/includes/core.h +++ /dev/null @@ -1,65 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2011, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#include - -/* -#define pll0useInternal 0 -#define pll0useMainOsc 1 -#define pll0useRTC 2 -*/ - -//#define pll0setClksrc(src) if((unsigned int)(src)<3) LPC_SC->CLKSRCSEL=(src) -//#define pll0getClksrc (LPC_SC->CLKSRCSEL & 3) -#ifdef __cplusplus - extern "C" { -#endif -extern volatile uint32_t tickCounter; -extern uint32_t getAPB1Freq(); -extern uint32_t getAPB2Freq(); -extern uint32_t getCpuFreq(); -extern int setCpuFreq(uint32_t freq); -extern int optimizePLLcfg(uint32_t freq, uint32_t srcfreq,uint32_t PLLM,uint32_t* PLLP, uint32_t* PLLN,uint8_t* AHBPRindx); -extern int setPll(uint32_t freq); -extern void enable_FPU(); -extern void reset_AHB1(); -extern void reset_AHB2(); -extern void reset_APB1(); -extern void reset_APB2(); -extern void configureSysTick(); -extern void delay_100us(uint32_t value); -extern void SysTick_Handler(void); - -#ifdef __cplusplus - } -#endif - - - - - - - - - - - - diff --git a/lib/includes/fat32.h b/lib/includes/fat32.h deleted file mode 100644 --- a/lib/includes/fat32.h +++ /dev/null @@ -1,176 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef FAT32_H -#define FAT32_H -#include -#include -#include -#include -#include -/*BPB (Boot Sector) Offsets */ - -#define BS_jmpBootoff 0 -#define BS_OEMNameoff 3 -#define BPB_BytsPerSecoff 11 -#define BPB_SecPerClusoff 13 -#define BPB_RsvdSecCntoff 14 -#define BPB_NumFATsoff 16 -#define BPB_RootEntCntoff 17 -#define BPB_TotSec16off 19 -#define BPB_Mediaoff 21 -#define BPB_FATSz16off 22 -#define BPB_SecPerTrkoff 24 -#define BPB_NumHeadsoff 26 -#define BPB_HiddSecoff 28 -#define BPB_TotSec32off 32 -/*FAT16*/ -#define BS_DrvNumFAT16off 36 -#define BS_Reserved1FAT16off 37 -#define BS_BootSigFAT16off 38 -#define BS_VolIDFAT16off 39 -#define BS_VolLabFAT16off 43 -#define BS_FilSysTypeFAT16off 54 -/*FAT32*/ -#define BPB_FATSz32off 36 -#define BPB_ExtFlagsoff 40 -#define BPB_FSVeroff 42 -#define BPB_RootClusoff 44 -#define BPB_FSInfooff 48 -#define BPB_BkBootSecoff 50 -#define BPB_Reservedoff 52 -#define BS_DrvNumFAT32off 64 -#define BS_Reserved1FAT32off 65 -#define BS_BootSigFAT32off 66 -#define BS_VolIDFAT32off 67 -#define BS_VolLabFAT32off 71 -#define BS_FilSysTypeFAT32off 82 - - -#define DIR_Nameoff 0 -#define DIR_Attroff 0xb -#define DIR_FstClusHIoff 0x14 -#define DIR_FstClusLOoff 0x1A -#define DIR_FileSizeoff 0x1c -#define DIR_CrtTimeTenthoff 13 -#define DIR_CrtTimeoff 14 -#define DIR_CrtDateoff 16 -#define DIR_LstAccDateoff 18 -#define DIR_WrtTimeoff 22 -#define DIR_WrtDateoff 24 - - - -#define FATBadpart 1 -#define FATBabArg 2 -#define FATReadErr 3 -#define FATnoErr 0 - -typedef struct FAT32fs -{ - uint16_t BPB_BytsPerSec; - uint16_t BPB_RsvdSecCnt; - uint32_t BPB_FATSz32; - uint32_t BPB_RootClus; - uint32_t fat_begin_lba; - uint32_t cluster_begin_lba; - uint8_t BPB_SecPerClus; - uint8_t BPB_NumFATs; - dikpartition* part; -}FAT32fs; - - -#define castUI64(val) ((uint64_t)(val)) -#define castUI32(val) ((uint32_t)(val)) -#define castUI16(val) ((uint16_t)(val)) -#define castUI8(val) ((uint8_t)(val)) - -#define castI64(val) ((int64_t)(val)) -#define castI32(val) ((int32_t)(val)) -#define castI16(val) ((int16_t)(val)) -#define castI8(val) ((int8_t)(val)) - -#define fat32Ui8_2_Ui32(table,lsBindex) ((uint32_t)((0xFF&(table[lsBindex]))+(0xFF00&(((uint32_t)table[lsBindex+1])<<8))+(0xFF0000&(((uint32_t)table[lsBindex+2])<<16))+(0xFF000000&(((uint32_t)table[lsBindex+3])<<24)))) -#define fat32Ui8_2_Ui16(table,lsBindex) ((uint16_t)((0xFF&(table[lsBindex]))+(0xFF00&(((uint16_t)table[lsBindex+1])<<8)))) - -/* Get the first sector lba of given cluster number*/ -#define clusterlba(fs,cluster_number) ((uint32_t)fs->cluster_begin_lba + (((uint32_t)cluster_number) - (2)) * (uint32_t)fs->BPB_SecPerClus) - -//#define fat32clusterinfatsect(fs,cluster_number) ((((uint32_t)(cluster_number))>>6) + fs->fat_begin_lba) -#define fat32clusterinfatsect(fs,cluster_number) ((((uint32_t)(cluster_number))>>7) + fs->fat_begin_lba) -#define fat32clusterinfatoff(cluster_number) (((cluster_number)&0x3F)*4) - -/*Get cluster index in FAT Table from sector address*/ -#define fat32masksectorlba(sectorlba,fs) (sectorlba & (castUI32(-1)^castUI32(fs->BPB_SecPerClus-1))) -#define fat32sectorlbatoclusternum(fs,sectorlba) (((fat32masksectorlba(castUI32(sectorlba),fs) -(castUI32(fs->cluster_begin_lba)))/castUI32(fs->BPB_SecPerClus))+castUI32(2)) - -#define fat32extract16b(table, LSBOffset) (uint16_t)(( (uint16_t) ((uint8_t)table[(LSBOffset)]) ) + (uint16_t)( ((uint8_t)table[(LSBOffset)+1]) << 8 )) -#define fat32extract32b(table, LSBOffset) (uint32_t)(( (uint32_t) ((uint8_t)table[(LSBOffset)]) ) + (uint32_t)( ((uint8_t)table[(LSBOffset)+1]) << 8 )+ (uint32_t)( ((uint8_t)table[(LSBOffset)+2]) << 16 )+ (uint32_t)( ((uint8_t)table[(LSBOffset)+3]) << 24 )) - -#ifdef FAT32_PRIVATE -#define fat32sectorreadout(fs,fatsec) \ - if((lastSecAddrs!=(fatsec)) || (lastFATFS!=(fs))) /*Check if sector already buffered*/ \ - {\ - if((fs)->part->phy->read((fs)->part->phy,fat32buff,(fatsec),1)!=RES_OK) \ - {\ - return DIRENT_ReadErr;\ - }\ - }\ - lastSecAddrs=(fatsec);\ - lastFATFS=(fs); -#endif - -extern int fat32open(FAT32fs* fs,dikpartition* part); -extern int fat32mkdirent(FAT32fs* fs,ucdirent* dirent); -extern int fat32getVolName(FAT32fs* fs,char* Name); -extern int fat32getrootfirstent(ucdirent* entry); -extern int fat32nextdirent(ucdirent* entry); -extern int fat32nextsectorlba(FAT32fs* fs,uint32_t lastsector_lba,uint32_t* nextsector_lba); -extern int fat32prevsectorlba(FAT32fs* fs,uint32_t lastsector_lba,uint32_t *nextsector_lba); -extern uint32_t fat32getdirentlba(ucdirent* entry); -extern int fat32getdirentname(ucdirent* entry,char* nameBuffer); - -#endif - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/lib/includes/gpio.h b/lib/includes/gpio.h deleted file mode 100644 --- a/lib/includes/gpio.h +++ /dev/null @@ -1,557 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef GPIO_H -#define GPIO_H -#include -#ifdef __cplusplus - extern "C" { -#endif - - -typedef uint32_t gpio_t; - -typedef enum -{ - gpiolowspeed = 0x00000, - gpiomediumspeed = 0x10000, - gpiofastspeed = 0x20000, - gpiohighspeed = 0x30000 -}gpiospeed_t; - -#define GPIOSPEEDMASK 0x30000 - -typedef enum gpiodir_t -{ - gpioindir = 0x00000, - gpiooutdir = 0x40000, - gpioaf = 0x80000, - gpioan = 0xC0000 -}gpiodir_t; - -#define GPIODIRMASK 0xC0000 - - -typedef enum -{ - gpiopushpulltype = 0x000000, - gpioopendraintype = 0x100000 -}gpioouttype_t; - -#define GPIOOUTTYPEMASK 0x100000 - -typedef enum -{ - gpionopulltype = 0x000000, - gpiopulluptype = 0x200000, - gpiopulldowntype = 0x400000 -}gpiopulltype_t; - -#define GPIOPULLTYPEMASK 0x600000 - -extern gpio_t gpioopen(uint32_t gpio); -extern void gpioclose(gpio_t gpio); -extern void gpiosetconfig(gpio_t* gpio); -extern void gpiosetdir(gpio_t* gpio,gpiodir_t dir); -extern void gpiosetouttype(gpio_t* gpio, gpioouttype_t outtype); -extern void gpiosetpulltype(gpio_t* gpio,gpiopulltype_t pulltype); -extern void gpiosetspeed(gpio_t* gpio,gpiospeed_t speed); -extern void gpioset(gpio_t gpio); -extern void gpioclr(gpio_t gpio); -extern void gpiosetval(gpio_t gpio,int val); -extern int gpiogetval(gpio_t gpio); - -#define GPIOISINPUT(gpio) (((gpio) & GPIODIRMASK)==gpioindir) -#define GPIOISOUTPUT(gpio) (((gpio) & GPIOSPEEDMASK)==gpiooutdir) - -#define GPIOISLOWSPEED(gpio) (((gpio) & GPIOSPEEDMASK)==gpiolowspeed) -#define GPIOISMEDIUMSPEED(gpio) (((gpio) & GPIOSPEEDMASK)==gpiomediumspeed) -#define GPIOISFASTPEED(gpio) (((gpio) & GPIOSPEEDMASK)==gpiofastspeed) -#define GPIOISHIGHSPEED(gpio) (((gpio) & GPIOSPEEDMASK)==gpiohighspeeds) - -#define GPIOISPUSHPULL(gpio) (((gpio) & GPIOOUTTYPEMASK)==gpiopushpulltype) -#define GPIOISOPENDRAIN(gpio) (((gpio) & GPIOOUTTYPEMASK)==gpioopendraintype) - -#define GPIOISNOPULL(GPIO) (((gpio) & GPIOPULLTYPEMASK)==gpionopulltype) -#define GPIOISPULLUP(GPIO) (((gpio) & GPIOPULLTYPEMASK)==gpiopulluptype) -#define GPIOISPULLDOWN(GPIO) (((gpio) & GPIOPULLTYPEMASK)==gpiopulldowntype) - - -#define PA0 ((0<<8)+0) -#define PA1 ((0<<8)+1) -#define PA2 ((0<<8)+2) -#define PA3 ((0<<8)+3) -#define PA4 ((0<<8)+4) -#define PA5 ((0<<8)+5) -#define PA6 ((0<<8)+6) -#define PA7 ((0<<8)+7) -#define PA8 ((0<<8)+8) -#define PA9 ((0<<8)+9) -#define PA10 ((0<<8)+10) -#define PA11 ((0<<8)+11) -#define PA12 ((0<<8)+12) -#define PA13 ((0<<8)+13) -#define PA14 ((0<<8)+14) -#define PA15 ((0<<8)+15) -#define PAX ((0<<8)+255) -#define PB0 ((1<<8)+0) -#define PB1 ((1<<8)+1) -#define PB2 ((1<<8)+2) -#define PB3 ((1<<8)+3) -#define PB4 ((1<<8)+4) -#define PB5 ((1<<8)+5) -#define PB6 ((1<<8)+6) -#define PB7 ((1<<8)+7) -#define PB8 ((1<<8)+8) -#define PB9 ((1<<8)+9) -#define PB10 ((1<<8)+10) -#define PB11 ((1<<8)+11) -#define PB12 ((1<<8)+12) -#define PB13 ((1<<8)+13) -#define PB14 ((1<<8)+14) -#define PB15 ((1<<8)+15) -#define PBX ((1<<8)+255) -#define PC0 ((2<<8)+0) -#define PC1 ((2<<8)+1) -#define PC2 ((2<<8)+2) -#define PC3 ((2<<8)+3) -#define PC4 ((2<<8)+4) -#define PC5 ((2<<8)+5) -#define PC6 ((2<<8)+6) -#define PC7 ((2<<8)+7) -#define PC8 ((2<<8)+8) -#define PC9 ((2<<8)+9) -#define PC10 ((2<<8)+10) -#define PC11 ((2<<8)+11) -#define PC12 ((2<<8)+12) -#define PC13 ((2<<8)+13) -#define PC14 ((2<<8)+14) -#define PC15 ((2<<8)+15) -#define PCX ((2<<8)+255) -#define PD0 ((3<<8)+0) -#define PD1 ((3<<8)+1) -#define PD2 ((3<<8)+2) -#define PD3 ((3<<8)+3) -#define PD4 ((3<<8)+4) -#define PD5 ((3<<8)+5) -#define PD6 ((3<<8)+6) -#define PD7 ((3<<8)+7) -#define PD8 ((3<<8)+8) -#define PD9 ((3<<8)+9) -#define PD10 ((3<<8)+10) -#define PD11 ((3<<8)+11) -#define PD12 ((3<<8)+12) -#define PD13 ((3<<8)+13) -#define PD14 ((3<<8)+14) -#define PD15 ((3<<8)+15) -#define PDX ((3<<8)+255) -#define PE0 ((4<<8)+0) -#define PE1 ((4<<8)+1) -#define PE2 ((4<<8)+2) -#define PE3 ((4<<8)+3) -#define PE4 ((4<<8)+4) -#define PE5 ((4<<8)+5) -#define PE6 ((4<<8)+6) -#define PE7 ((4<<8)+7) -#define PE8 ((4<<8)+8) -#define PE9 ((4<<8)+9) -#define PE10 ((4<<8)+10) -#define PE11 ((4<<8)+11) -#define PE12 ((4<<8)+12) -#define PE13 ((4<<8)+13) -#define PE14 ((4<<8)+14) -#define PE15 ((4<<8)+15) -#define PEX ((4<<8)+255) -#define PF0 ((5<<8)+0) -#define PF1 ((5<<8)+1) -#define PF2 ((5<<8)+2) -#define PF3 ((5<<8)+3) -#define PF4 ((5<<8)+4) -#define PF5 ((5<<8)+5) -#define PF6 ((5<<8)+6) -#define PF7 ((5<<8)+7) -#define PF8 ((5<<8)+8) -#define PF9 ((5<<8)+9) -#define PF10 ((5<<8)+10) -#define PF11 ((5<<8)+11) -#define PF12 ((5<<8)+12) -#define PF13 ((5<<8)+13) -#define PF14 ((5<<8)+14) -#define PF15 ((5<<8)+15) -#define PFX ((5<<8)+255) -#define PG0 ((6<<8)+0) -#define PG1 ((6<<8)+1) -#define PG2 ((6<<8)+2) -#define PG3 ((6<<8)+3) -#define PG4 ((6<<8)+4) -#define PG5 ((6<<8)+5) -#define PG6 ((6<<8)+6) -#define PG7 ((6<<8)+7) -#define PG8 ((6<<8)+8) -#define PG9 ((6<<8)+9) -#define PG10 ((6<<8)+10) -#define PG11 ((6<<8)+11) -#define PG12 ((6<<8)+12) -#define PG13 ((6<<8)+13) -#define PG14 ((6<<8)+14) -#define PG15 ((6<<8)+15) -#define PGX ((6<<8)+255) -#define PH0 ((7<<8)+0) -#define PH1 ((7<<8)+1) -#define PH2 ((7<<8)+2) -#define PH3 ((7<<8)+3) -#define PH4 ((7<<8)+4) -#define PH5 ((7<<8)+5) -#define PH6 ((7<<8)+6) -#define PH7 ((7<<8)+7) -#define PH8 ((7<<8)+8) -#define PH9 ((7<<8)+9) -#define PH10 ((7<<8)+10) -#define PH11 ((7<<8)+11) -#define PH12 ((7<<8)+12) -#define PH13 ((7<<8)+13) -#define PH14 ((7<<8)+14) -#define PH15 ((7<<8)+15) -#define PHX ((7<<8)+255) -#define PI0 ((8<<8)+0) -#define PI1 ((8<<8)+1) -#define PI2 ((8<<8)+2) -#define PI3 ((8<<8)+3) -#define PI4 ((8<<8)+4) -#define PI5 ((8<<8)+5) -#define PI6 ((8<<8)+6) -#define PI7 ((8<<8)+7) -#define PI8 ((8<<8)+8) -#define PI9 ((8<<8)+9) -#define PI10 ((8<<8)+10) -#define PI11 ((8<<8)+11) -#define PI12 ((8<<8)+12) -#define PI13 ((8<<8)+13) -#define PI14 ((8<<8)+14) -#define PI15 ((8<<8)+15) -#define PIX ((8<<8)+255) -#define PJ0 ((9<<8)+0) -#define PJ1 ((9<<8)+1) -#define PJ2 ((9<<8)+2) -#define PJ3 ((9<<8)+3) -#define PJ4 ((9<<8)+4) -#define PJ5 ((9<<8)+5) -#define PJ6 ((9<<8)+6) -#define PJ7 ((9<<8)+7) -#define PJ8 ((9<<8)+8) -#define PJ9 ((9<<8)+9) -#define PJ10 ((9<<8)+10) -#define PJ11 ((9<<8)+11) -#define PJ12 ((9<<8)+12) -#define PJ13 ((9<<8)+13) -#define PJ14 ((9<<8)+14) -#define PJ15 ((9<<8)+15) -#define PJX ((9<<8)+255) -#define PK0 ((10<<8)+0) -#define PK1 ((10<<8)+1) -#define PK2 ((10<<8)+2) -#define PK3 ((10<<8)+3) -#define PK4 ((10<<8)+4) -#define PK5 ((10<<8)+5) -#define PK6 ((10<<8)+6) -#define PK7 ((10<<8)+7) -#define PK8 ((10<<8)+8) -#define PK9 ((10<<8)+9) -#define PK10 ((10<<8)+10) -#define PK11 ((10<<8)+11) -#define PK12 ((10<<8)+12) -#define PK13 ((10<<8)+13) -#define PK14 ((10<<8)+14) -#define PK15 ((10<<8)+15) -#define PKX ((10<<8)+255) -#define PL0 ((11<<8)+0) -#define PL1 ((11<<8)+1) -#define PL2 ((11<<8)+2) -#define PL3 ((11<<8)+3) -#define PL4 ((11<<8)+4) -#define PL5 ((11<<8)+5) -#define PL6 ((11<<8)+6) -#define PL7 ((11<<8)+7) -#define PL8 ((11<<8)+8) -#define PL9 ((11<<8)+9) -#define PL10 ((11<<8)+10) -#define PL11 ((11<<8)+11) -#define PL12 ((11<<8)+12) -#define PL13 ((11<<8)+13) -#define PL14 ((11<<8)+14) -#define PL15 ((11<<8)+15) -#define PLX ((11<<8)+255) -#define PM0 ((12<<8)+0) -#define PM1 ((12<<8)+1) -#define PM2 ((12<<8)+2) -#define PM3 ((12<<8)+3) -#define PM4 ((12<<8)+4) -#define PM5 ((12<<8)+5) -#define PM6 ((12<<8)+6) -#define PM7 ((12<<8)+7) -#define PM8 ((12<<8)+8) -#define PM9 ((12<<8)+9) -#define PM10 ((12<<8)+10) -#define PM11 ((12<<8)+11) -#define PM12 ((12<<8)+12) -#define PM13 ((12<<8)+13) -#define PM14 ((12<<8)+14) -#define PM15 ((12<<8)+15) -#define PMX ((12<<8)+255) -#define PN0 ((13<<8)+0) -#define PN1 ((13<<8)+1) -#define PN2 ((13<<8)+2) -#define PN3 ((13<<8)+3) -#define PN4 ((13<<8)+4) -#define PN5 ((13<<8)+5) -#define PN6 ((13<<8)+6) -#define PN7 ((13<<8)+7) -#define PN8 ((13<<8)+8) -#define PN9 ((13<<8)+9) -#define PN10 ((13<<8)+10) -#define PN11 ((13<<8)+11) -#define PN12 ((13<<8)+12) -#define PN13 ((13<<8)+13) -#define PN14 ((13<<8)+14) -#define PN15 ((13<<8)+15) -#define PNX ((13<<8)+255) -#define PO0 ((14<<8)+0) -#define PO1 ((14<<8)+1) -#define PO2 ((14<<8)+2) -#define PO3 ((14<<8)+3) -#define PO4 ((14<<8)+4) -#define PO5 ((14<<8)+5) -#define PO6 ((14<<8)+6) -#define PO7 ((14<<8)+7) -#define PO8 ((14<<8)+8) -#define PO9 ((14<<8)+9) -#define PO10 ((14<<8)+10) -#define PO11 ((14<<8)+11) -#define PO12 ((14<<8)+12) -#define PO13 ((14<<8)+13) -#define PO14 ((14<<8)+14) -#define PO15 ((14<<8)+15) -#define POX ((14<<8)+255) -#define PP0 ((15<<8)+0) -#define PP1 ((15<<8)+1) -#define PP2 ((15<<8)+2) -#define PP3 ((15<<8)+3) -#define PP4 ((15<<8)+4) -#define PP5 ((15<<8)+5) -#define PP6 ((15<<8)+6) -#define PP7 ((15<<8)+7) -#define PP8 ((15<<8)+8) -#define PP9 ((15<<8)+9) -#define PP10 ((15<<8)+10) -#define PP11 ((15<<8)+11) -#define PP12 ((15<<8)+12) -#define PP13 ((15<<8)+13) -#define PP14 ((15<<8)+14) -#define PP15 ((15<<8)+15) -#define PPX ((15<<8)+255) -#define PQ0 ((16<<8)+0) -#define PQ1 ((16<<8)+1) -#define PQ2 ((16<<8)+2) -#define PQ3 ((16<<8)+3) -#define PQ4 ((16<<8)+4) -#define PQ5 ((16<<8)+5) -#define PQ6 ((16<<8)+6) -#define PQ7 ((16<<8)+7) -#define PQ8 ((16<<8)+8) -#define PQ9 ((16<<8)+9) -#define PQ10 ((16<<8)+10) -#define PQ11 ((16<<8)+11) -#define PQ12 ((16<<8)+12) -#define PQ13 ((16<<8)+13) -#define PQ14 ((16<<8)+14) -#define PQ15 ((16<<8)+15) -#define PQX ((16<<8)+255) -#define PR0 ((17<<8)+0) -#define PR1 ((17<<8)+1) -#define PR2 ((17<<8)+2) -#define PR3 ((17<<8)+3) -#define PR4 ((17<<8)+4) -#define PR5 ((17<<8)+5) -#define PR6 ((17<<8)+6) -#define PR7 ((17<<8)+7) -#define PR8 ((17<<8)+8) -#define PR9 ((17<<8)+9) -#define PR10 ((17<<8)+10) -#define PR11 ((17<<8)+11) -#define PR12 ((17<<8)+12) -#define PR13 ((17<<8)+13) -#define PR14 ((17<<8)+14) -#define PR15 ((17<<8)+15) -#define PRX ((17<<8)+255) -#define PS0 ((18<<8)+0) -#define PS1 ((18<<8)+1) -#define PS2 ((18<<8)+2) -#define PS3 ((18<<8)+3) -#define PS4 ((18<<8)+4) -#define PS5 ((18<<8)+5) -#define PS6 ((18<<8)+6) -#define PS7 ((18<<8)+7) -#define PS8 ((18<<8)+8) -#define PS9 ((18<<8)+9) -#define PS10 ((18<<8)+10) -#define PS11 ((18<<8)+11) -#define PS12 ((18<<8)+12) -#define PS13 ((18<<8)+13) -#define PS14 ((18<<8)+14) -#define PS15 ((18<<8)+15) -#define PSX ((18<<8)+255) -#define PT0 ((19<<8)+0) -#define PT1 ((19<<8)+1) -#define PT2 ((19<<8)+2) -#define PT3 ((19<<8)+3) -#define PT4 ((19<<8)+4) -#define PT5 ((19<<8)+5) -#define PT6 ((19<<8)+6) -#define PT7 ((19<<8)+7) -#define PT8 ((19<<8)+8) -#define PT9 ((19<<8)+9) -#define PT10 ((19<<8)+10) -#define PT11 ((19<<8)+11) -#define PT12 ((19<<8)+12) -#define PT13 ((19<<8)+13) -#define PT14 ((19<<8)+14) -#define PT15 ((19<<8)+15) -#define PTX ((19<<8)+255) -#define PU0 ((20<<8)+0) -#define PU1 ((20<<8)+1) -#define PU2 ((20<<8)+2) -#define PU3 ((20<<8)+3) -#define PU4 ((20<<8)+4) -#define PU5 ((20<<8)+5) -#define PU6 ((20<<8)+6) -#define PU7 ((20<<8)+7) -#define PU8 ((20<<8)+8) -#define PU9 ((20<<8)+9) -#define PU10 ((20<<8)+10) -#define PU11 ((20<<8)+11) -#define PU12 ((20<<8)+12) -#define PU13 ((20<<8)+13) -#define PU14 ((20<<8)+14) -#define PU15 ((20<<8)+15) -#define PUX ((20<<8)+255) -#define PV0 ((21<<8)+0) -#define PV1 ((21<<8)+1) -#define PV2 ((21<<8)+2) -#define PV3 ((21<<8)+3) -#define PV4 ((21<<8)+4) -#define PV5 ((21<<8)+5) -#define PV6 ((21<<8)+6) -#define PV7 ((21<<8)+7) -#define PV8 ((21<<8)+8) -#define PV9 ((21<<8)+9) -#define PV10 ((21<<8)+10) -#define PV11 ((21<<8)+11) -#define PV12 ((21<<8)+12) -#define PV13 ((21<<8)+13) -#define PV14 ((21<<8)+14) -#define PV15 ((21<<8)+15) -#define PVX ((21<<8)+255) -#define PW0 ((22<<8)+0) -#define PW1 ((22<<8)+1) -#define PW2 ((22<<8)+2) -#define PW3 ((22<<8)+3) -#define PW4 ((22<<8)+4) -#define PW5 ((22<<8)+5) -#define PW6 ((22<<8)+6) -#define PW7 ((22<<8)+7) -#define PW8 ((22<<8)+8) -#define PW9 ((22<<8)+9) -#define PW10 ((22<<8)+10) -#define PW11 ((22<<8)+11) -#define PW12 ((22<<8)+12) -#define PW13 ((22<<8)+13) -#define PW14 ((22<<8)+14) -#define PW15 ((22<<8)+15) -#define PWX ((22<<8)+255) -#define PX0 ((23<<8)+0) -#define PX1 ((23<<8)+1) -#define PX2 ((23<<8)+2) -#define PX3 ((23<<8)+3) -#define PX4 ((23<<8)+4) -#define PX5 ((23<<8)+5) -#define PX6 ((23<<8)+6) -#define PX7 ((23<<8)+7) -#define PX8 ((23<<8)+8) -#define PX9 ((23<<8)+9) -#define PX10 ((23<<8)+10) -#define PX11 ((23<<8)+11) -#define PX12 ((23<<8)+12) -#define PX13 ((23<<8)+13) -#define PX14 ((23<<8)+14) -#define PX15 ((23<<8)+15) -#define PXX ((23<<8)+255) -#define PY0 ((24<<8)+0) -#define PY1 ((24<<8)+1) -#define PY2 ((24<<8)+2) -#define PY3 ((24<<8)+3) -#define PY4 ((24<<8)+4) -#define PY5 ((24<<8)+5) -#define PY6 ((24<<8)+6) -#define PY7 ((24<<8)+7) -#define PY8 ((24<<8)+8) -#define PY9 ((24<<8)+9) -#define PY10 ((24<<8)+10) -#define PY11 ((24<<8)+11) -#define PY12 ((24<<8)+12) -#define PY13 ((24<<8)+13) -#define PY14 ((24<<8)+14) -#define PY15 ((24<<8)+15) -#define PYX ((24<<8)+255) -#define PZ0 ((25<<8)+0) -#define PZ1 ((25<<8)+1) -#define PZ2 ((25<<8)+2) -#define PZ3 ((25<<8)+3) -#define PZ4 ((25<<8)+4) -#define PZ5 ((25<<8)+5) -#define PZ6 ((25<<8)+6) -#define PZ7 ((25<<8)+7) -#define PZ8 ((25<<8)+8) -#define PZ9 ((25<<8)+9) -#define PZ10 ((25<<8)+10) -#define PZ11 ((25<<8)+11) -#define PZ12 ((25<<8)+12) -#define PZ13 ((25<<8)+13) -#define PZ14 ((25<<8)+14) -#define PZ15 ((25<<8)+15) -#define PZX ((25<<8)+255) - - -#ifdef __cplusplus - } -#endif -#endif //GPIO_H - - - - - - - - - - - - diff --git a/lib/includes/hexviewer.h b/lib/includes/hexviewer.h deleted file mode 100644 --- a/lib/includes/hexviewer.h +++ /dev/null @@ -1,52 +0,0 @@ -/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ -#ifndef HEXVIEWER_H -#define HEXVIEWER_H - -#include - - - - -extern void hexviewershow(const char* table,unsigned int size,unsigned int offset); - - -#endif - - - - - - - - - - - - - - - - - - - diff --git a/lib/includes/i2c.h b/lib/includes/i2c.h deleted file mode 100644 --- a/lib/includes/i2c.h +++ /dev/null @@ -1,74 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef I2C_H -#define I2C_H -#include -#include -#include - -#ifdef __cplusplus - extern "C" { -#endif - -typedef int i2c_t; - -#define i2c1 0 -#define i2c2 1 -#define i2c3 2 -#define i2c4 3 -#define i2c5 4 -#define i2c6 5 -#define i2c7 6 -#define i2c8 7 -#define i2c9 8 - -extern int i2ctimeout; - -extern i2c_t i2copen(int count); -extern i2c_t i2copenandconfig(int count ,uint32_t cfg,uint32_t speed,uint32_t SDA,uint32_t SCL); -extern int i2cclose(i2c_t dev); -extern int i2csetpins(i2c_t dev,uint32_t SDA,uint32_t SCL); -extern int i2cenable(i2c_t dev); -extern int i2cdisable(i2c_t dev); -//extern int i2csetconfig(i2c_t dev); -extern int i2csetspeed(i2c_t dev,uint32_t speed); -//extern int i2csetdatabits(i2c_t* dev,uartbits_t databits); -extern int i2cwrite(i2c_t dev,char address,char* data,int count); -extern int i2cread(i2c_t dev,char address,char* data,int count); -extern int i2cbusy(i2c_t dev); -extern int i2cStatusCheck(i2c_t dev,int32_t flagMask); -#ifdef __cplusplus - } -#endif -#endif //I2C_H - - - - - - - - - - - - diff --git a/lib/includes/ina226.h b/lib/includes/ina226.h deleted file mode 100644 --- a/lib/includes/ina226.h +++ /dev/null @@ -1,104 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2011, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef INA226_H -#define INA226_H - -#include -#include - -typedef struct INA226_t -{ - i2c_t i2cdev; - uint8_t devAddress; - uint32_t shuntmOhm; - uint32_t CurrentRangeuAmp; -}INA226_t; - -extern int ina226open(INA226_t* dev,i2c_t i2cdev,uint16_t config,uint8_t A0,uint8_t A1,uint32_t shuntmOhm, uint32_t CurrentRangeuAmp); -extern uint16_t ina226getID(INA226_t* dev); -extern int ina226calibrate(INA226_t* dev,uint32_t shuntmOhm, uint32_t CurrentRangeuAmp); -extern uint32_t ina226getBusVoltage(INA226_t* dev); -extern uint32_t ina226getPower(INA226_t* dev); -extern int32_t ina226getCurrent(INA226_t* dev); -extern uint16_t ina226getReg(INA226_t* dev,char reg); -extern int ina226setReg(INA226_t* dev,char reg,int16_t value); - - -#define INA226_I2C_ADDRESS 0x40 - - -#define INA226_Die_ID_Reg 0xFF -#define INA226_Configuration_Reg 0 -#define INA226_Shunt_Voltage_Reg 1 -#define INA226_Bus_Voltage_Reg 2 -#define INA226_Power_Reg 3 -#define INA226_Current_Reg 4 -#define INA226_Calibration_Reg 5 -#define INA226_Mask_Enable_Reg 6 -#define INA226_Alert_Limit_Reg 7 - -#define INA226_AVERAGES_1 0 -#define INA226_AVERAGES_4 (1<<9) -#define INA226_AVERAGES_16 (2<<9) -#define INA226_AVERAGES_64 (3<<9) -#define INA226_AVERAGES_128 (4<<9) -#define INA226_AVERAGES_256 (5<<9) -#define INA226_AVERAGES_512 (6<<9) -#define INA226_AVERAGES_1024 (7<<9) - -#define INA226_BUS_CONV_140us 0 -#define INA226_BUS_CONV_204us (1<<6) -#define INA226_BUS_CONV_332us (2<<6) -#define INA226_BUS_CONV_588us (3<<6) -#define INA226_BUS_CONV_1100us (4<<6) -#define INA226_BUS_CONV_2116us (5<<6) -#define INA226_BUS_CONV_4156us (6<<6) -#define INA226_BUS_CONV_8244us (7<<6) - -#define INA226_SHUNT_CONV_140us 0 -#define INA226_SHUNT_CONV_204us (1<<3) -#define INA226_SHUNT_CONV_332us (2<<3) -#define INA226_SHUNT_CONV_588us (3<<3) -#define INA226_SHUNT_CONV_1100us (4<<3) -#define INA226_SHUNT_CONV_2116us (5<<3) -#define INA226_SHUNT_CONV_4156us (6<<3) -#define INA226_SHUNT_CONV_8244us (7<<3) - -#define INA226_MODE_POWER_DOWN 0 -#define INA226_MODE_SHUNT_VOLTAGE_TRIGGERRED 1 -#define INA226_MODE_BUS_VOLTAGE_TRIGGERRED 2 -#define INA226_MODE_SHUNT_AND_BUS_TRIGGERRED 3 -#define INA226_MODE_SHUNT_VOLTAGE_CONTINUOUS 5 -#define INA226_MODE_BUS_VOLTAGE_CONTINUOUS 6 -#define INA226_MODE_SHUNT_AND_BUS_CONTINUOUS 7 - - - - -#endif - - - - - - - diff --git a/lib/includes/libucfs.h b/lib/includes/libucfs.h deleted file mode 100644 --- a/lib/includes/libucfs.h +++ /dev/null @@ -1,78 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef FS_H -#define FS_H -#include -#include - -struct fs_str -{ - UHANDLE fat; -}; - -typedef struct fs_str filesys_t; - - - -#endif - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/lib/includes/libucstrings.h b/lib/includes/libucstrings.h deleted file mode 100644 --- a/lib/includes/libucstrings.h +++ /dev/null @@ -1,32 +0,0 @@ -/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - -#include - -extern streamdevice* stdo; - -void clearstr(char* a); -void int2hex(unsigned long a,char*b); -int libucprintf(const char* format,...); -int libucfprintf(streamdevice* device,const char* format,...); -int libucscanf(const char*,...); -void libucprintchartable(char* table,int size,const char* format,const char* separator); diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/core_cm3.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/core_cm3.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/core_cm3.h +++ /dev/null @@ -1,1818 +0,0 @@ -/**************************************************************************//** - * @file core_cm3.h - * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File - * @version V1.30 - * @date 30. October 2009 - * - * @note - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * @par - * ARM Limited (ARM) is supplying this software for use with Cortex-M - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * @par - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - -#ifndef __CM3_CORE_H__ -#define __CM3_CORE_H__ - -/** @addtogroup CMSIS_CM3_core_LintCinfiguration CMSIS CM3 Core Lint Configuration - * - * List of Lint messages which will be suppressed and not shown: - * - Error 10: \n - * register uint32_t __regBasePri __asm("basepri"); \n - * Error 10: Expecting ';' - * . - * - Error 530: \n - * return(__regBasePri); \n - * Warning 530: Symbol '__regBasePri' (line 264) not initialized - * . - * - Error 550: \n - * __regBasePri = (basePri & 0x1ff); \n - * Warning 550: Symbol '__regBasePri' (line 271) not accessed - * . - * - Error 754: \n - * uint32_t RESERVED0[24]; \n - * Info 754: local structure member '' (line 109, file ./cm3_core.h) not referenced - * . - * - Error 750: \n - * #define __CM3_CORE_H__ \n - * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced - * . - * - Error 528: \n - * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n - * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced - * . - * - Error 751: \n - * } InterruptType_Type; \n - * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced - * . - * Note: To re-enable a Message, insert a space before 'lint' * - * - */ - -/*lint -save */ -/*lint -e10 */ -/*lint -e530 */ -/*lint -e550 */ -/*lint -e754 */ -/*lint -e750 */ -/*lint -e528 */ -/*lint -e751 */ - - -/** @addtogroup CMSIS_CM3_core_definitions CM3 Core Definitions - This file defines all structures and symbols for CMSIS core: - - CMSIS version number - - Cortex-M core registers and bitfields - - Cortex-M core peripheral base address - @{ - */ - -#ifdef __cplusplus - extern "C" { -#endif - -#define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */ -#define __CM3_CMSIS_VERSION_SUB (0x30) /*!< [15:0] CMSIS HAL sub version */ -#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x03) /*!< Cortex core */ - -#include /* Include standard types */ - -#if defined (__ICCARM__) - #include /* IAR Intrinsics */ -#endif - - -#ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */ -#endif - - - - -/** - * IO definitions - * - * define access restrictions to peripheral registers - */ - -#ifdef __cplusplus - #define __I volatile /*!< defines 'read only' permissions */ -#else - #define __I volatile const /*!< defines 'read only' permissions */ -#endif -#define __O volatile /*!< defines 'write only' permissions */ -#define __IO volatile /*!< defines 'read / write' permissions */ - - - -/******************************************************************************* - * Register Abstraction - ******************************************************************************/ -/** @addtogroup CMSIS_CM3_core_register CMSIS CM3 Core Register - @{ -*/ - - -/** @addtogroup CMSIS_CM3_NVIC CMSIS CM3 NVIC - memory mapped structure for Nested Vectored Interrupt Controller (NVIC) - @{ - */ -typedef struct -{ - __IO uint32_t ISER[8]; /*!< Offset: 0x000 Interrupt Set Enable Register */ - uint32_t RESERVED0[24]; - __IO uint32_t ICER[8]; /*!< Offset: 0x080 Interrupt Clear Enable Register */ - uint32_t RSERVED1[24]; - __IO uint32_t ISPR[8]; /*!< Offset: 0x100 Interrupt Set Pending Register */ - uint32_t RESERVED2[24]; - __IO uint32_t ICPR[8]; /*!< Offset: 0x180 Interrupt Clear Pending Register */ - uint32_t RESERVED3[24]; - __IO uint32_t IABR[8]; /*!< Offset: 0x200 Interrupt Active bit Register */ - uint32_t RESERVED4[56]; - __IO uint8_t IP[240]; /*!< Offset: 0x300 Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644]; - __O uint32_t STIR; /*!< Offset: 0xE00 Software Trigger Interrupt Register */ -} NVIC_Type; -/*@}*/ /* end of group CMSIS_CM3_NVIC */ - - -/** @addtogroup CMSIS_CM3_SCB CMSIS CM3 SCB - memory mapped structure for System Control Block (SCB) - @{ - */ -typedef struct -{ - __I uint32_t CPUID; /*!< Offset: 0x00 CPU ID Base Register */ - __IO uint32_t ICSR; /*!< Offset: 0x04 Interrupt Control State Register */ - __IO uint32_t VTOR; /*!< Offset: 0x08 Vector Table Offset Register */ - __IO uint32_t AIRCR; /*!< Offset: 0x0C Application Interrupt / Reset Control Register */ - __IO uint32_t SCR; /*!< Offset: 0x10 System Control Register */ - __IO uint32_t CCR; /*!< Offset: 0x14 Configuration Control Register */ - __IO uint8_t SHP[12]; /*!< Offset: 0x18 System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IO uint32_t SHCSR; /*!< Offset: 0x24 System Handler Control and State Register */ - __IO uint32_t CFSR; /*!< Offset: 0x28 Configurable Fault Status Register */ - __IO uint32_t HFSR; /*!< Offset: 0x2C Hard Fault Status Register */ - __IO uint32_t DFSR; /*!< Offset: 0x30 Debug Fault Status Register */ - __IO uint32_t MMFAR; /*!< Offset: 0x34 Mem Manage Address Register */ - __IO uint32_t BFAR; /*!< Offset: 0x38 Bus Fault Address Register */ - __IO uint32_t AFSR; /*!< Offset: 0x3C Auxiliary Fault Status Register */ - __I uint32_t PFR[2]; /*!< Offset: 0x40 Processor Feature Register */ - __I uint32_t DFR; /*!< Offset: 0x48 Debug Feature Register */ - __I uint32_t ADR; /*!< Offset: 0x4C Auxiliary Feature Register */ - __I uint32_t MMFR[4]; /*!< Offset: 0x50 Memory Model Feature Register */ - __I uint32_t ISAR[5]; /*!< Offset: 0x60 ISA Feature Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFul << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFul << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFul << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFul << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1ul << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1ul << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1ul << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1ul << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1ul << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1ul << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1ul << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFul << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11 /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1ul << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFul << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_VTOR_TBLBASE_Pos 29 /*!< SCB VTOR: TBLBASE Position */ -#define SCB_VTOR_TBLBASE_Msk (0x1FFul << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ - -#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFul << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFul << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFul << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1ul << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7ul << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1ul << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1ul << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0 /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1ul << SCB_AIRCR_VECTRESET_Pos) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1ul << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1ul << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1ul << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1ul << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1ul << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1ul << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1ul << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1ul << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0 /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1ul << SCB_CCR_NONBASETHRDENA_Pos) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18 /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1ul << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17 /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1ul << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1ul << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1ul << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14 /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1ul << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13 /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1ul << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12 /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1ul << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11 /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1ul << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10 /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1ul << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8 /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1ul << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7 /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1ul << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3 /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1ul << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1 /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1ul << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0 /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1ul << SCB_SHCSR_MEMFAULTACT_Pos) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Registers Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16 /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFul << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8 /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFul << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0 /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFul << SCB_CFSR_MEMFAULTSR_Pos) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* SCB Hard Fault Status Registers Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31 /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1ul << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30 /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1ul << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1 /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1ul << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4 /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1ul << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3 /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1ul << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2 /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1ul << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1 /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1ul << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0 /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1ul << SCB_DFSR_HALTED_Pos) /*!< SCB DFSR: HALTED Mask */ -/*@}*/ /* end of group CMSIS_CM3_SCB */ - - -/** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick - memory mapped structure for SysTick - @{ - */ -typedef struct -{ - __IO uint32_t CTRL; /*!< Offset: 0x00 SysTick Control and Status Register */ - __IO uint32_t LOAD; /*!< Offset: 0x04 SysTick Reload Value Register */ - __IO uint32_t VAL; /*!< Offset: 0x08 SysTick Current Value Register */ - __I uint32_t CALIB; /*!< Offset: 0x0C SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */ -/*@}*/ /* end of group CMSIS_CM3_SysTick */ - - -/** @addtogroup CMSIS_CM3_ITM CMSIS CM3 ITM - memory mapped structure for Instrumentation Trace Macrocell (ITM) - @{ - */ -typedef struct -{ - __O union - { - __O uint8_t u8; /*!< Offset: ITM Stimulus Port 8-bit */ - __O uint16_t u16; /*!< Offset: ITM Stimulus Port 16-bit */ - __O uint32_t u32; /*!< Offset: ITM Stimulus Port 32-bit */ - } PORT [32]; /*!< Offset: 0x00 ITM Stimulus Port Registers */ - uint32_t RESERVED0[864]; - __IO uint32_t TER; /*!< Offset: ITM Trace Enable Register */ - uint32_t RESERVED1[15]; - __IO uint32_t TPR; /*!< Offset: ITM Trace Privilege Register */ - uint32_t RESERVED2[15]; - __IO uint32_t TCR; /*!< Offset: ITM Trace Control Register */ - uint32_t RESERVED3[29]; - __IO uint32_t IWR; /*!< Offset: ITM Integration Write Register */ - __IO uint32_t IRR; /*!< Offset: ITM Integration Read Register */ - __IO uint32_t IMCR; /*!< Offset: ITM Integration Mode Control Register */ - uint32_t RESERVED4[43]; - __IO uint32_t LAR; /*!< Offset: ITM Lock Access Register */ - __IO uint32_t LSR; /*!< Offset: ITM Lock Status Register */ - uint32_t RESERVED5[6]; - __I uint32_t PID4; /*!< Offset: ITM Peripheral Identification Register #4 */ - __I uint32_t PID5; /*!< Offset: ITM Peripheral Identification Register #5 */ - __I uint32_t PID6; /*!< Offset: ITM Peripheral Identification Register #6 */ - __I uint32_t PID7; /*!< Offset: ITM Peripheral Identification Register #7 */ - __I uint32_t PID0; /*!< Offset: ITM Peripheral Identification Register #0 */ - __I uint32_t PID1; /*!< Offset: ITM Peripheral Identification Register #1 */ - __I uint32_t PID2; /*!< Offset: ITM Peripheral Identification Register #2 */ - __I uint32_t PID3; /*!< Offset: ITM Peripheral Identification Register #3 */ - __I uint32_t CID0; /*!< Offset: ITM Component Identification Register #0 */ - __I uint32_t CID1; /*!< Offset: ITM Component Identification Register #1 */ - __I uint32_t CID2; /*!< Offset: ITM Component Identification Register #2 */ - __I uint32_t CID3; /*!< Offset: ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0 /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFul << ITM_TPR_PRIVMASK_Pos) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23 /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1ul << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_ATBID_Pos 16 /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_ATBID_Msk (0x7Ful << ITM_TCR_ATBID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_TSPrescale_Pos 8 /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3ul << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4 /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1ul << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3 /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1ul << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2 /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1ul << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1 /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1ul << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0 /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1ul << ITM_TCR_ITMENA_Pos) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Integration Write Register Definitions */ -#define ITM_IWR_ATVALIDM_Pos 0 /*!< ITM IWR: ATVALIDM Position */ -#define ITM_IWR_ATVALIDM_Msk (1ul << ITM_IWR_ATVALIDM_Pos) /*!< ITM IWR: ATVALIDM Mask */ - -/* ITM Integration Read Register Definitions */ -#define ITM_IRR_ATREADYM_Pos 0 /*!< ITM IRR: ATREADYM Position */ -#define ITM_IRR_ATREADYM_Msk (1ul << ITM_IRR_ATREADYM_Pos) /*!< ITM IRR: ATREADYM Mask */ - -/* ITM Integration Mode Control Register Definitions */ -#define ITM_IMCR_INTEGRATION_Pos 0 /*!< ITM IMCR: INTEGRATION Position */ -#define ITM_IMCR_INTEGRATION_Msk (1ul << ITM_IMCR_INTEGRATION_Pos) /*!< ITM IMCR: INTEGRATION Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2 /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1ul << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1 /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1ul << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0 /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1ul << ITM_LSR_Present_Pos) /*!< ITM LSR: Present Mask */ -/*@}*/ /* end of group CMSIS_CM3_ITM */ - - -/** @addtogroup CMSIS_CM3_InterruptType CMSIS CM3 Interrupt Type - memory mapped structure for Interrupt Type - @{ - */ -typedef struct -{ - uint32_t RESERVED0; - __I uint32_t ICTR; /*!< Offset: 0x04 Interrupt Control Type Register */ -#if ((defined __CM3_REV) && (__CM3_REV >= 0x200)) - __IO uint32_t ACTLR; /*!< Offset: 0x08 Auxiliary Control Register */ -#else - uint32_t RESERVED1; -#endif -} InterruptType_Type; - -/* Interrupt Controller Type Register Definitions */ -#define InterruptType_ICTR_INTLINESNUM_Pos 0 /*!< InterruptType ICTR: INTLINESNUM Position */ -#define InterruptType_ICTR_INTLINESNUM_Msk (0x1Ful << InterruptType_ICTR_INTLINESNUM_Pos) /*!< InterruptType ICTR: INTLINESNUM Mask */ - -/* Auxiliary Control Register Definitions */ -#define InterruptType_ACTLR_DISFOLD_Pos 2 /*!< InterruptType ACTLR: DISFOLD Position */ -#define InterruptType_ACTLR_DISFOLD_Msk (1ul << InterruptType_ACTLR_DISFOLD_Pos) /*!< InterruptType ACTLR: DISFOLD Mask */ - -#define InterruptType_ACTLR_DISDEFWBUF_Pos 1 /*!< InterruptType ACTLR: DISDEFWBUF Position */ -#define InterruptType_ACTLR_DISDEFWBUF_Msk (1ul << InterruptType_ACTLR_DISDEFWBUF_Pos) /*!< InterruptType ACTLR: DISDEFWBUF Mask */ - -#define InterruptType_ACTLR_DISMCYCINT_Pos 0 /*!< InterruptType ACTLR: DISMCYCINT Position */ -#define InterruptType_ACTLR_DISMCYCINT_Msk (1ul << InterruptType_ACTLR_DISMCYCINT_Pos) /*!< InterruptType ACTLR: DISMCYCINT Mask */ -/*@}*/ /* end of group CMSIS_CM3_InterruptType */ - - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) -/** @addtogroup CMSIS_CM3_MPU CMSIS CM3 MPU - memory mapped structure for Memory Protection Unit (MPU) - @{ - */ -typedef struct -{ - __I uint32_t TYPE; /*!< Offset: 0x00 MPU Type Register */ - __IO uint32_t CTRL; /*!< Offset: 0x04 MPU Control Register */ - __IO uint32_t RNR; /*!< Offset: 0x08 MPU Region RNRber Register */ - __IO uint32_t RBAR; /*!< Offset: 0x0C MPU Region Base Address Register */ - __IO uint32_t RASR; /*!< Offset: 0x10 MPU Region Attribute and Size Register */ - __IO uint32_t RBAR_A1; /*!< Offset: 0x14 MPU Alias 1 Region Base Address Register */ - __IO uint32_t RASR_A1; /*!< Offset: 0x18 MPU Alias 1 Region Attribute and Size Register */ - __IO uint32_t RBAR_A2; /*!< Offset: 0x1C MPU Alias 2 Region Base Address Register */ - __IO uint32_t RASR_A2; /*!< Offset: 0x20 MPU Alias 2 Region Attribute and Size Register */ - __IO uint32_t RBAR_A3; /*!< Offset: 0x24 MPU Alias 3 Region Base Address Register */ - __IO uint32_t RASR_A3; /*!< Offset: 0x28 MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register */ -#define MPU_TYPE_IREGION_Pos 16 /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFul << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8 /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFul << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0 /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1ul << MPU_TYPE_SEPARATE_Pos) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register */ -#define MPU_CTRL_PRIVDEFENA_Pos 2 /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1ul << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1 /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1ul << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0 /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1ul << MPU_CTRL_ENABLE_Pos) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register */ -#define MPU_RNR_REGION_Pos 0 /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFul << MPU_RNR_REGION_Pos) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register */ -#define MPU_RBAR_ADDR_Pos 5 /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFul << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4 /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1ul << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0 /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFul << MPU_RBAR_REGION_Pos) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register */ -#define MPU_RASR_XN_Pos 28 /*!< MPU RASR: XN Position */ -#define MPU_RASR_XN_Msk (1ul << MPU_RASR_XN_Pos) /*!< MPU RASR: XN Mask */ - -#define MPU_RASR_AP_Pos 24 /*!< MPU RASR: AP Position */ -#define MPU_RASR_AP_Msk (7ul << MPU_RASR_AP_Pos) /*!< MPU RASR: AP Mask */ - -#define MPU_RASR_TEX_Pos 19 /*!< MPU RASR: TEX Position */ -#define MPU_RASR_TEX_Msk (7ul << MPU_RASR_TEX_Pos) /*!< MPU RASR: TEX Mask */ - -#define MPU_RASR_S_Pos 18 /*!< MPU RASR: Shareable bit Position */ -#define MPU_RASR_S_Msk (1ul << MPU_RASR_S_Pos) /*!< MPU RASR: Shareable bit Mask */ - -#define MPU_RASR_C_Pos 17 /*!< MPU RASR: Cacheable bit Position */ -#define MPU_RASR_C_Msk (1ul << MPU_RASR_C_Pos) /*!< MPU RASR: Cacheable bit Mask */ - -#define MPU_RASR_B_Pos 16 /*!< MPU RASR: Bufferable bit Position */ -#define MPU_RASR_B_Msk (1ul << MPU_RASR_B_Pos) /*!< MPU RASR: Bufferable bit Mask */ - -#define MPU_RASR_SRD_Pos 8 /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFul << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1 /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1Ful << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENA_Pos 0 /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENA_Msk (0x1Ful << MPU_RASR_ENA_Pos) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@}*/ /* end of group CMSIS_CM3_MPU */ -#endif - - -/** @addtogroup CMSIS_CM3_CoreDebug CMSIS CM3 Core Debug - memory mapped structure for Core Debug Register - @{ - */ -typedef struct -{ - __IO uint32_t DHCSR; /*!< Offset: 0x00 Debug Halting Control and Status Register */ - __O uint32_t DCRSR; /*!< Offset: 0x04 Debug Core Register Selector Register */ - __IO uint32_t DCRDR; /*!< Offset: 0x08 Debug Core Register Data Register */ - __IO uint32_t DEMCR; /*!< Offset: 0x0C Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16 /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFul << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25 /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1ul << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1ul << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19 /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1ul << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18 /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1ul << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17 /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1ul << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16 /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1ul << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1ul << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3 /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1ul << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2 /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1ul << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1 /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1ul << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1ul << CoreDebug_DHCSR_C_DEBUGEN_Pos) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register */ -#define CoreDebug_DCRSR_REGWnR_Pos 16 /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1ul << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0 /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1Ful << CoreDebug_DCRSR_REGSEL_Pos) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register */ -#define CoreDebug_DEMCR_TRCENA_Pos 24 /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1ul << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19 /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1ul << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18 /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1ul << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17 /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1ul << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16 /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1ul << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10 /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1ul << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9 /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1ul << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8 /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1ul << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7 /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1ul << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6 /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1ul << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1ul << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4 /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1ul << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0 /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1ul << CoreDebug_DEMCR_VC_CORERESET_Pos) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ -/*@}*/ /* end of group CMSIS_CM3_CoreDebug */ - - -/* Memory mapping of Cortex-M3 Hardware */ -#define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000) /*!< ITM Base Address */ -#define CoreDebug_BASE (0xE000EDF0) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */ - -#define InterruptType ((InterruptType_Type *) SCS_BASE) /*!< Interrupt Type Register */ -#define SCB ((SCB_Type *) SCB_BASE) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) - #define MPU_BASE (SCS_BASE + 0x0D90) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type*) MPU_BASE) /*!< Memory Protection Unit */ -#endif - -/*@}*/ /* end of group CMSIS_CM3_core_register */ - - -/******************************************************************************* - * Hardware Abstraction Layer - ******************************************************************************/ - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - -#endif - - -/* ################### Compiler specific Intrinsics ########################### */ - -#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ -/* ARM armcc specific functions */ - -#define __enable_fault_irq __enable_fiq -#define __disable_fault_irq __disable_fiq - -#define __NOP __nop -#define __WFI __wfi -#define __WFE __wfe -#define __SEV __sev -#define __ISB() __isb(0) -#define __DSB() __dsb(0) -#define __DMB() __dmb(0) -#define __REV __rev -#define __RBIT __rbit -#define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr)) -#define __LDREXH(ptr) ((unsigned short) __ldrex(ptr)) -#define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr)) -#define __STREXB(value, ptr) __strex(value, ptr) -#define __STREXH(value, ptr) __strex(value, ptr) -#define __STREXW(value, ptr) __strex(value, ptr) - - -/* intrinsic unsigned long long __ldrexd(volatile void *ptr) */ -/* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */ -/* intrinsic void __enable_irq(); */ -/* intrinsic void __disable_irq(); */ - - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - - -#if (__ARMCC_VERSION < 400000) - -/** - * @brief Remove the exclusive lock created by ldrex - * - * Removes the exclusive lock which is created by ldrex. - */ -extern void __CLREX(void); - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value - * - * @return Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -#else /* (__ARMCC_VERSION >= 400000) */ - -/** - * @brief Remove the exclusive lock created by ldrex - * - * Removes the exclusive lock which is created by ldrex. - */ -#define __CLREX __clrex - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -static __INLINE uint32_t __get_BASEPRI(void) -{ - register uint32_t __regBasePri __ASM("basepri"); - return(__regBasePri); -} - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -static __INLINE void __set_BASEPRI(uint32_t basePri) -{ - register uint32_t __regBasePri __ASM("basepri"); - __regBasePri = (basePri & 0xff); -} - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -static __INLINE uint32_t __get_PRIMASK(void) -{ - register uint32_t __regPriMask __ASM("primask"); - return(__regPriMask); -} - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -static __INLINE void __set_PRIMASK(uint32_t priMask) -{ - register uint32_t __regPriMask __ASM("primask"); - __regPriMask = (priMask); -} - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -static __INLINE uint32_t __get_FAULTMASK(void) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - return(__regFaultMask); -} - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -static __INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - __regFaultMask = (faultMask & 1); -} - -/** - * @brief Return the Control Register value - * - * @return Control value - * - * Return the content of the control register - */ -static __INLINE uint32_t __get_CONTROL(void) -{ - register uint32_t __regControl __ASM("control"); - return(__regControl); -} - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -static __INLINE void __set_CONTROL(uint32_t control) -{ - register uint32_t __regControl __ASM("control"); - __regControl = control; -} - -#endif /* __ARMCC_VERSION */ - - - -#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ -/* IAR iccarm specific functions */ - -#define __enable_irq __enable_interrupt /*!< global Interrupt enable */ -#define __disable_irq __disable_interrupt /*!< global Interrupt disable */ - -static __INLINE void __enable_fault_irq() { __ASM ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM ("cpsid f"); } - -#define __NOP __no_operation /*!< no operation intrinsic in IAR Compiler */ -static __INLINE void __WFI() { __ASM ("wfi"); } -static __INLINE void __WFE() { __ASM ("wfe"); } -static __INLINE void __SEV() { __ASM ("sev"); } -static __INLINE void __CLREX() { __ASM ("clrex"); } - -/* intrinsic void __ISB(void) */ -/* intrinsic void __DSB(void) */ -/* intrinsic void __DMB(void) */ -/* intrinsic void __set_PRIMASK(); */ -/* intrinsic void __get_PRIMASK(); */ -/* intrinsic void __set_FAULTMASK(); */ -/* intrinsic void __get_FAULTMASK(); */ -/* intrinsic uint32_t __REV(uint32_t value); */ -/* intrinsic uint32_t __REVSH(uint32_t value); */ -/* intrinsic unsigned long __STREX(unsigned long, unsigned long); */ -/* intrinsic unsigned long __LDREX(unsigned long *); */ - - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse bit order of value - * - * @param value value to reverse - * @return reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive (8 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 8 bit values) - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive (16 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 16 bit values - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive (32 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 32 bit values - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive (8 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 8 bit values - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive (16 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 16 bit values - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive (32 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 32 bit values - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - - -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ -/* GNU gcc specific functions */ - -static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); } -static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); } - -static __INLINE void __enable_fault_irq() { __ASM volatile ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM volatile ("cpsid f"); } - -static __INLINE void __NOP() { __ASM volatile ("nop"); } -static __INLINE void __WFI() { __ASM volatile ("wfi"); } -static __INLINE void __WFE() { __ASM volatile ("wfe"); } -static __INLINE void __SEV() { __ASM volatile ("sev"); } -static __INLINE void __ISB() { __ASM volatile ("isb"); } -static __INLINE void __DSB() { __ASM volatile ("dsb"); } -static __INLINE void __DMB() { __ASM volatile ("dmb"); } -static __INLINE void __CLREX() { __ASM volatile ("clrex"); } - - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value -* -* @return Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -/** - * @brief Reverse byte order in integer value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in integer value - */ -extern uint32_t __REV(uint32_t value); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - -/** - * @brief Reverse bit order of value - * - * @param value value to reverse - * @return reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive (8 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 8 bit value - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive (16 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 16 bit values - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive (32 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 32 bit values - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive (8 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 8 bit values - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive (16 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 16 bit values - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive (32 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 32 bit values - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - -#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ -/* TASKING carm specific functions */ - -/* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all instrinsics, - * Including the CMSIS ones. - */ - -#endif - - -/** @addtogroup CMSIS_CM3_Core_FunctionInterface CMSIS CM3 Core Function Interface - Core Function Interface containing: - - Core NVIC Functions - - Core SysTick Functions - - Core Reset Functions -*/ -/*@{*/ - -/* ########################## NVIC functions #################################### */ - -/** - * @brief Set the Priority Grouping in NVIC Interrupt Controller - * - * @param PriorityGroup is priority grouping field - * - * Set the priority grouping field using the required unlock sequence. - * The parameter priority_grouping is assigned to the field - * SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - */ -static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */ - reg_value = (reg_value | - (0x5FA << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << 8)); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - -/** - * @brief Get the Priority Grouping from NVIC Interrupt Controller - * - * @return priority grouping field - * - * Get the priority grouping from NVIC Interrupt Controller. - * priority grouping is SCB->AIRCR [10:8] PRIGROUP field. - */ -static __INLINE uint32_t NVIC_GetPriorityGrouping(void) -{ - return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority grouping field */ -} - -/** - * @brief Enable Interrupt in NVIC Interrupt Controller - * - * @param IRQn The positive number of the external interrupt to enable - * - * Enable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ -} - -/** - * @brief Disable the interrupt line for external interrupt specified - * - * @param IRQn The positive number of the external interrupt to disable - * - * Disable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ -} - -/** - * @brief Read the interrupt pending bit for a device specific interrupt source - * - * @param IRQn The number of the device specifc interrupt - * @return 1 = interrupt pending, 0 = interrupt not pending - * - * Read the pending register in NVIC and return 1 if its status is pending, - * otherwise it returns 0 - */ -static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */ -} - -/** - * @brief Set the pending bit for an external interrupt - * - * @param IRQn The number of the interrupt for set pending - * - * Set the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ -} - -/** - * @brief Clear the pending bit for an external interrupt - * - * @param IRQn The number of the interrupt for clear pending - * - * Clear the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */ -} - -/** - * @brief Read the active bit for an external interrupt - * - * @param IRQn The number of the interrupt for read active bit - * @return 1 = interrupt active, 0 = interrupt not active - * - * Read the active register in NVIC and returns 1 if its status is active, - * otherwise it returns 0. - */ -static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) -{ - return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */ -} - -/** - * @brief Set the priority for an interrupt - * - * @param IRQn The number of the interrupt for set priority - * @param priority The priority to set - * - * Set the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if(IRQn < 0) { - SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M3 System Interrupts */ - else { - NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */ -} - -/** - * @brief Read the priority for an interrupt - * - * @param IRQn The number of the interrupt for get priority - * @return The priority for the interrupt - * - * Read the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. - * - * The returned priority value is automatically aligned to the implemented - * priority bits of the microcontroller. - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if(IRQn < 0) { - return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M3 system interrupts */ - else { - return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */ -} - - -/** - * @brief Encode the priority for an interrupt - * - * @param PriorityGroup The used priority group - * @param PreemptPriority The preemptive priority value (starting from 0) - * @param SubPriority The sub priority value (starting from 0) - * @return The encoded priority for the interrupt - * - * Encode the priority for an interrupt with the given priority group, - * preemptive priority value and sub priority value. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. - * - * The returned priority value can be used for NVIC_SetPriority(...) function - */ -static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; - SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; - - return ( - ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) | - ((SubPriority & ((1 << (SubPriorityBits )) - 1))) - ); -} - - -/** - * @brief Decode the priority of an interrupt - * - * @param Priority The priority for the interrupt - * @param PriorityGroup The used priority group - * @param pPreemptPriority The preemptive priority value (starting from 0) - * @param pSubPriority The sub priority value (starting from 0) - * - * Decode an interrupt priority value with the given priority group to - * preemptive priority value and sub priority value. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. - * - * The priority value can be retrieved with NVIC_GetPriority(...) function - */ -static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; - SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; - - *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1); - *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1); -} - - - -/* ################################## SysTick function ############################################ */ - -#if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0) - -/** - * @brief Initialize and start the SysTick counter and its interrupt. - * - * @param ticks number of ticks between two interrupts - * @return 1 = failed, 0 = successful - * - * Initialise the system tick timer and its interrupt and start the - * system tick timer / counter in free running mode to generate - * periodical interrupts. - */ -static __INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if (ticks > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */ - - SysTick->LOAD = (ticks & SysTick_LOAD_RELOAD_Msk) - 1; /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */ - SysTick->VAL = 0; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0); /* Function successful */ -} - -#endif - - - - -/* ################################## Reset function ############################################ */ - -/** - * @brief Initiate a system reset request. - * - * Initiate a system reset request to reset the MCU - */ -static __INLINE void NVIC_SystemReset(void) -{ - SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - while(1); /* wait until reset */ -} - -/*@}*/ /* end of group CMSIS_CM3_Core_FunctionInterface */ - - - -/* ##################################### Debug In/Output function ########################################### */ - -/** @addtogroup CMSIS_CM3_CoreDebugInterface CMSIS CM3 Core Debug Interface - Core Debug Interface containing: - - Core Debug Receive / Transmit Functions - - Core Debug Defines - - Core Debug Variables -*/ -/*@{*/ - -extern volatile int ITM_RxBuffer; /*!< variable to receive characters */ -#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /*!< value identifying ITM_RxBuffer is ready for next character */ - - -/** - * @brief Outputs a character via the ITM channel 0 - * - * @param ch character to output - * @return character to output - * - * The function outputs a character via the ITM channel 0. - * The function returns when no debugger is connected that has booked the output. - * It is blocking when a debugger is connected, but the previous character send is not transmitted. - */ -static __INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA_Msk) && /* Trace enabled */ - (ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ - (ITM->TER & (1ul << 0) ) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0].u32 == 0); - ITM->PORT[0].u8 = (uint8_t) ch; - } - return (ch); -} - - -/** - * @brief Inputs a character via variable ITM_RxBuffer - * - * @return received character, -1 = no character received - * - * The function inputs a character via variable ITM_RxBuffer. - * The function returns when no debugger is connected that has booked the output. - * It is blocking when a debugger is connected, but the previous character send is not transmitted. - */ -static __INLINE int ITM_ReceiveChar (void) { - int ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - * @brief Check if a character via variable ITM_RxBuffer is available - * - * @return 1 = character available, 0 = no character available - * - * The function checks variable ITM_RxBuffer whether a character is available or not. - * The function returns '1' if a character is available and '0' if no character is available. - */ -static __INLINE int ITM_CheckChar (void) { - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) { - return (0); /* no character available */ - } else { - return (1); /* character available */ - } -} - -/*@}*/ /* end of group CMSIS_CM3_core_DebugInterface */ - - -#ifdef __cplusplus -} -#endif - -/*@}*/ /* end of group CMSIS_CM3_core_definitions */ - -#endif /* __CM3_CORE_H__ */ - -/*lint -restore */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx.h +++ /dev/null @@ -1,1038 +0,0 @@ -/**************************************************************************//** - * @file LPC17xx.h - * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File for - * NXP LPC17xx Device Series - * @version V1.07 - * @date 19. October 2009 - * - * @note - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * @par - * ARM Limited (ARM) is supplying this software for use with Cortex-M - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * @par - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - -#ifndef __LPC17xx_H__ -#define __LPC17xx_H__ - -/* - * ========================================================================== - * ---------- Interrupt Number Definition ----------------------------------- - * ========================================================================== - */ - -typedef enum IRQn -{ -/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/ - NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ - MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */ - BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */ - UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */ - SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */ - DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */ - PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */ - SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */ - -/****** LPC17xx Specific Interrupt Numbers *******************************************************/ - WDT_IRQn = 0, /*!< Watchdog Timer Interrupt */ - TIMER0_IRQn = 1, /*!< Timer0 Interrupt */ - TIMER1_IRQn = 2, /*!< Timer1 Interrupt */ - TIMER2_IRQn = 3, /*!< Timer2 Interrupt */ - TIMER3_IRQn = 4, /*!< Timer3 Interrupt */ - UART0_IRQn = 5, /*!< UART0 Interrupt */ - UART1_IRQn = 6, /*!< UART1 Interrupt */ - UART2_IRQn = 7, /*!< UART2 Interrupt */ - UART3_IRQn = 8, /*!< UART3 Interrupt */ - PWM1_IRQn = 9, /*!< PWM1 Interrupt */ - I2C0_IRQn = 10, /*!< I2C0 Interrupt */ - I2C1_IRQn = 11, /*!< I2C1 Interrupt */ - I2C2_IRQn = 12, /*!< I2C2 Interrupt */ - SPI_IRQn = 13, /*!< SPI Interrupt */ - SSP0_IRQn = 14, /*!< SSP0 Interrupt */ - SSP1_IRQn = 15, /*!< SSP1 Interrupt */ - PLL0_IRQn = 16, /*!< PLL0 Lock (Main PLL) Interrupt */ - RTC_IRQn = 17, /*!< Real Time Clock Interrupt */ - EINT0_IRQn = 18, /*!< External Interrupt 0 Interrupt */ - EINT1_IRQn = 19, /*!< External Interrupt 1 Interrupt */ - EINT2_IRQn = 20, /*!< External Interrupt 2 Interrupt */ - EINT3_IRQn = 21, /*!< External Interrupt 3 Interrupt */ - ADC_IRQn = 22, /*!< A/D Converter Interrupt */ - BOD_IRQn = 23, /*!< Brown-Out Detect Interrupt */ - USB_IRQn = 24, /*!< USB Interrupt */ - CAN_IRQn = 25, /*!< CAN Interrupt */ - DMA_IRQn = 26, /*!< General Purpose DMA Interrupt */ - I2S_IRQn = 27, /*!< I2S Interrupt */ - ENET_IRQn = 28, /*!< Ethernet Interrupt */ - RIT_IRQn = 29, /*!< Repetitive Interrupt Timer Interrupt */ - MCPWM_IRQn = 30, /*!< Motor Control PWM Interrupt */ - QEI_IRQn = 31, /*!< Quadrature Encoder Interface Interrupt */ - PLL1_IRQn = 32, /*!< PLL1 Lock (USB PLL) Interrupt */ - USBActivity_IRQn = 33, /*!< USB Activity Interrupt */ - CANActivity_IRQn = 34, /*!< CAN Activity Interrupt */ -} IRQn_Type; - - -/* - * ========================================================================== - * ----------- Processor and Core Peripheral Section ------------------------ - * ========================================================================== - */ - -/* Configuration of the Cortex-M3 Processor and Core Peripherals */ -#define __MPU_PRESENT 1 /*!< MPU present or not */ -#define __NVIC_PRIO_BITS 5 /*!< Number of Bits used for Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ - - -#include "core_cm3.h" /* Cortex-M3 processor and core peripherals */ -#include "system_LPC17xx.h" /* System Header */ - - -/******************************************************************************/ -/* Device Specific Peripheral registers structures */ -/******************************************************************************/ - -#if defined ( __CC_ARM ) -#pragma anon_unions -#endif - -/*------------- System Control (SC) ------------------------------------------*/ -typedef struct -{ - __IO uint32_t FLASHCFG; /* Flash Accelerator Module */ - uint32_t RESERVED0[31]; - __IO uint32_t PLL0CON; /* Clocking and Power Control */ - __IO uint32_t PLL0CFG; - __I uint32_t PLL0STAT; - __O uint32_t PLL0FEED; - uint32_t RESERVED1[4]; - __IO uint32_t PLL1CON; - __IO uint32_t PLL1CFG; - __I uint32_t PLL1STAT; - __O uint32_t PLL1FEED; - uint32_t RESERVED2[4]; - __IO uint32_t PCON; - __IO uint32_t PCONP; - uint32_t RESERVED3[15]; - __IO uint32_t CCLKCFG; - __IO uint32_t USBCLKCFG; - __IO uint32_t CLKSRCSEL; - uint32_t RESERVED4[12]; - __IO uint32_t EXTINT; /* External Interrupts */ - uint32_t RESERVED5; - __IO uint32_t EXTMODE; - __IO uint32_t EXTPOLAR; - uint32_t RESERVED6[12]; - __IO uint32_t RSID; /* Reset */ - uint32_t RESERVED7[7]; - __IO uint32_t SCS; /* Syscon Miscellaneous Registers */ - __IO uint32_t IRCTRIM; /* Clock Dividers */ - __IO uint32_t PCLKSEL0; - __IO uint32_t PCLKSEL1; - uint32_t RESERVED8[4]; - __IO uint32_t USBIntSt; /* USB Device/OTG Interrupt Register */ - __IO uint32_t DMAREQSEL; - __IO uint32_t CLKOUTCFG; /* Clock Output Configuration */ - } LPC_SC_TypeDef; - -/*------------- Pin Connect Block (PINCON) -----------------------------------*/ -typedef struct -{ - __IO uint32_t PINSEL0; - __IO uint32_t PINSEL1; - __IO uint32_t PINSEL2; - __IO uint32_t PINSEL3; - __IO uint32_t PINSEL4; - __IO uint32_t PINSEL5; - __IO uint32_t PINSEL6; - __IO uint32_t PINSEL7; - __IO uint32_t PINSEL8; - __IO uint32_t PINSEL9; - __IO uint32_t PINSEL10; - uint32_t RESERVED0[5]; - __IO uint32_t PINMODE0; - __IO uint32_t PINMODE1; - __IO uint32_t PINMODE2; - __IO uint32_t PINMODE3; - __IO uint32_t PINMODE4; - __IO uint32_t PINMODE5; - __IO uint32_t PINMODE6; - __IO uint32_t PINMODE7; - __IO uint32_t PINMODE8; - __IO uint32_t PINMODE9; - __IO uint32_t PINMODE_OD0; - __IO uint32_t PINMODE_OD1; - __IO uint32_t PINMODE_OD2; - __IO uint32_t PINMODE_OD3; - __IO uint32_t PINMODE_OD4; - __IO uint32_t I2CPADCFG; -} LPC_PINCON_TypeDef; - -/*------------- General Purpose Input/Output (GPIO) --------------------------*/ -typedef struct -{ - union { - __IO uint32_t FIODIR; - struct { - __IO uint16_t FIODIRL; - __IO uint16_t FIODIRH; - }; - struct { - __IO uint8_t FIODIR0; - __IO uint8_t FIODIR1; - __IO uint8_t FIODIR2; - __IO uint8_t FIODIR3; - }; - }; - uint32_t RESERVED0[3]; - union { - __IO uint32_t FIOMASK; - struct { - __IO uint16_t FIOMASKL; - __IO uint16_t FIOMASKH; - }; - struct { - __IO uint8_t FIOMASK0; - __IO uint8_t FIOMASK1; - __IO uint8_t FIOMASK2; - __IO uint8_t FIOMASK3; - }; - }; - union { - __IO uint32_t FIOPIN; - struct { - __IO uint16_t FIOPINL; - __IO uint16_t FIOPINH; - }; - struct { - __IO uint8_t FIOPIN0; - __IO uint8_t FIOPIN1; - __IO uint8_t FIOPIN2; - __IO uint8_t FIOPIN3; - }; - }; - union { - __IO uint32_t FIOSET; - struct { - __IO uint16_t FIOSETL; - __IO uint16_t FIOSETH; - }; - struct { - __IO uint8_t FIOSET0; - __IO uint8_t FIOSET1; - __IO uint8_t FIOSET2; - __IO uint8_t FIOSET3; - }; - }; - union { - __O uint32_t FIOCLR; - struct { - __O uint16_t FIOCLRL; - __O uint16_t FIOCLRH; - }; - struct { - __O uint8_t FIOCLR0; - __O uint8_t FIOCLR1; - __O uint8_t FIOCLR2; - __O uint8_t FIOCLR3; - }; - }; -} LPC_GPIO_TypeDef; - -typedef struct -{ - __I uint32_t IntStatus; - __I uint32_t IO0IntStatR; - __I uint32_t IO0IntStatF; - __O uint32_t IO0IntClr; - __IO uint32_t IO0IntEnR; - __IO uint32_t IO0IntEnF; - uint32_t RESERVED0[3]; - __I uint32_t IO2IntStatR; - __I uint32_t IO2IntStatF; - __O uint32_t IO2IntClr; - __IO uint32_t IO2IntEnR; - __IO uint32_t IO2IntEnF; -} LPC_GPIOINT_TypeDef; - -/*------------- Timer (TIM) --------------------------------------------------*/ -typedef struct -{ - __IO uint32_t IR; - __IO uint32_t TCR; - __IO uint32_t TC; - __IO uint32_t PR; - __IO uint32_t PC; - __IO uint32_t MCR; - __IO uint32_t MR0; - __IO uint32_t MR1; - __IO uint32_t MR2; - __IO uint32_t MR3; - __IO uint32_t CCR; - __I uint32_t CR0; - __I uint32_t CR1; - uint32_t RESERVED0[2]; - __IO uint32_t EMR; - uint32_t RESERVED1[12]; - __IO uint32_t CTCR; -} LPC_TIM_TypeDef; - -/*------------- Pulse-Width Modulation (PWM) ---------------------------------*/ -typedef struct -{ - __IO uint32_t IR; - __IO uint32_t TCR; - __IO uint32_t TC; - __IO uint32_t PR; - __IO uint32_t PC; - __IO uint32_t MCR; - __IO uint32_t MR0; - __IO uint32_t MR1; - __IO uint32_t MR2; - __IO uint32_t MR3; - __IO uint32_t CCR; - __I uint32_t CR0; - __I uint32_t CR1; - __I uint32_t CR2; - __I uint32_t CR3; - uint32_t RESERVED0; - __IO uint32_t MR4; - __IO uint32_t MR5; - __IO uint32_t MR6; - __IO uint32_t PCR; - __IO uint32_t LER; - uint32_t RESERVED1[7]; - __IO uint32_t CTCR; -} LPC_PWM_TypeDef; - -/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/ -typedef struct -{ - union { - __I uint8_t RBR; - __O uint8_t THR; - __IO uint8_t DLL; - uint32_t RESERVED0; - }; - union { - __IO uint8_t DLM; - __IO uint32_t IER; - }; - union { - __I uint32_t IIR; - __O uint8_t FCR; - }; - __IO uint8_t LCR; - uint8_t RESERVED1[7]; - __I uint8_t LSR; - uint8_t RESERVED2[7]; - __IO uint8_t SCR; - uint8_t RESERVED3[3]; - __IO uint32_t ACR; - __IO uint8_t ICR; - uint8_t RESERVED4[3]; - __IO uint8_t FDR; - uint8_t RESERVED5[7]; - __IO uint8_t TER; - uint8_t RESERVED6[39]; - __I uint8_t FIFOLVL; -} LPC_UART_TypeDef; - -typedef struct -{ - union { - __I uint8_t RBR; - __O uint8_t THR; - __IO uint8_t DLL; - uint32_t RESERVED0; - }; - union { - __IO uint8_t DLM; - __IO uint32_t IER; - }; - union { - __I uint32_t IIR; - __O uint8_t FCR; - }; - __IO uint8_t LCR; - uint8_t RESERVED1[7]; - __I uint8_t LSR; - uint8_t RESERVED2[7]; - __IO uint8_t SCR; - uint8_t RESERVED3[3]; - __IO uint32_t ACR; - __IO uint8_t ICR; - uint8_t RESERVED4[3]; - __IO uint8_t FDR; - uint8_t RESERVED5[7]; - __IO uint8_t TER; - uint8_t RESERVED6[39]; - __I uint8_t FIFOLVL; -} LPC_UART0_TypeDef; - -typedef struct -{ - union { - __I uint8_t RBR; - __O uint8_t THR; - __IO uint8_t DLL; - uint32_t RESERVED0; - }; - union { - __IO uint8_t DLM; - __IO uint32_t IER; - }; - union { - __I uint32_t IIR; - __O uint8_t FCR; - }; - __IO uint8_t LCR; - uint8_t RESERVED1[3]; - __IO uint8_t MCR; - uint8_t RESERVED2[3]; - __I uint8_t LSR; - uint8_t RESERVED3[3]; - __I uint8_t MSR; - uint8_t RESERVED4[3]; - __IO uint8_t SCR; - uint8_t RESERVED5[3]; - __IO uint32_t ACR; - uint32_t RESERVED6; - __IO uint32_t FDR; - uint32_t RESERVED7; - __IO uint8_t TER; - uint8_t RESERVED8[27]; - __IO uint8_t RS485CTRL; - uint8_t RESERVED9[3]; - __IO uint8_t ADRMATCH; - uint8_t RESERVED10[3]; - __IO uint8_t RS485DLY; - uint8_t RESERVED11[3]; - __I uint8_t FIFOLVL; -} LPC_UART1_TypeDef; - -/*------------- Serial Peripheral Interface (SPI) ----------------------------*/ -typedef struct -{ - __IO uint32_t SPCR; - __I uint32_t SPSR; - __IO uint32_t SPDR; - __IO uint32_t SPCCR; - uint32_t RESERVED0[3]; - __IO uint32_t SPINT; -} LPC_SPI_TypeDef; - -/*------------- Synchronous Serial Communication (SSP) -----------------------*/ -typedef struct -{ - __IO uint32_t CR0; - __IO uint32_t CR1; - __IO uint32_t DR; - __I uint32_t SR; - __IO uint32_t CPSR; - __IO uint32_t IMSC; - __IO uint32_t RIS; - __IO uint32_t MIS; - __IO uint32_t ICR; - __IO uint32_t DMACR; -} LPC_SSP_TypeDef; - -/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/ -typedef struct -{ - __IO uint32_t I2CONSET; - __I uint32_t I2STAT; - __IO uint32_t I2DAT; - __IO uint32_t I2ADR0; - __IO uint32_t I2SCLH; - __IO uint32_t I2SCLL; - __O uint32_t I2CONCLR; - __IO uint32_t MMCTRL; - __IO uint32_t I2ADR1; - __IO uint32_t I2ADR2; - __IO uint32_t I2ADR3; - __I uint32_t I2DATA_BUFFER; - __IO uint32_t I2MASK0; - __IO uint32_t I2MASK1; - __IO uint32_t I2MASK2; - __IO uint32_t I2MASK3; -} LPC_I2C_TypeDef; - -/*------------- Inter IC Sound (I2S) -----------------------------------------*/ -typedef struct -{ - __IO uint32_t I2SDAO; - __IO uint32_t I2SDAI; - __O uint32_t I2STXFIFO; - __I uint32_t I2SRXFIFO; - __I uint32_t I2SSTATE; - __IO uint32_t I2SDMA1; - __IO uint32_t I2SDMA2; - __IO uint32_t I2SIRQ; - __IO uint32_t I2STXRATE; - __IO uint32_t I2SRXRATE; - __IO uint32_t I2STXBITRATE; - __IO uint32_t I2SRXBITRATE; - __IO uint32_t I2STXMODE; - __IO uint32_t I2SRXMODE; -} LPC_I2S_TypeDef; - -/*------------- Repetitive Interrupt Timer (RIT) -----------------------------*/ -typedef struct -{ - __IO uint32_t RICOMPVAL; - __IO uint32_t RIMASK; - __IO uint8_t RICTRL; - uint8_t RESERVED0[3]; - __IO uint32_t RICOUNTER; -} LPC_RIT_TypeDef; - -/*------------- Real-Time Clock (RTC) ----------------------------------------*/ -typedef struct -{ - __IO uint8_t ILR; - uint8_t RESERVED0[7]; - __IO uint8_t CCR; - uint8_t RESERVED1[3]; - __IO uint8_t CIIR; - uint8_t RESERVED2[3]; - __IO uint8_t AMR; - uint8_t RESERVED3[3]; - __I uint32_t CTIME0; - __I uint32_t CTIME1; - __I uint32_t CTIME2; - __IO uint8_t SEC; - uint8_t RESERVED4[3]; - __IO uint8_t MIN; - uint8_t RESERVED5[3]; - __IO uint8_t HOUR; - uint8_t RESERVED6[3]; - __IO uint8_t DOM; - uint8_t RESERVED7[3]; - __IO uint8_t DOW; - uint8_t RESERVED8[3]; - __IO uint16_t DOY; - uint16_t RESERVED9; - __IO uint8_t MONTH; - uint8_t RESERVED10[3]; - __IO uint16_t YEAR; - uint16_t RESERVED11; - __IO uint32_t CALIBRATION; - __IO uint32_t GPREG0; - __IO uint32_t GPREG1; - __IO uint32_t GPREG2; - __IO uint32_t GPREG3; - __IO uint32_t GPREG4; - __IO uint8_t RTC_AUXEN; - uint8_t RESERVED12[3]; - __IO uint8_t RTC_AUX; - uint8_t RESERVED13[3]; - __IO uint8_t ALSEC; - uint8_t RESERVED14[3]; - __IO uint8_t ALMIN; - uint8_t RESERVED15[3]; - __IO uint8_t ALHOUR; - uint8_t RESERVED16[3]; - __IO uint8_t ALDOM; - uint8_t RESERVED17[3]; - __IO uint8_t ALDOW; - uint8_t RESERVED18[3]; - __IO uint16_t ALDOY; - uint16_t RESERVED19; - __IO uint8_t ALMON; - uint8_t RESERVED20[3]; - __IO uint16_t ALYEAR; - uint16_t RESERVED21; -} LPC_RTC_TypeDef; - -/*------------- Watchdog Timer (WDT) -----------------------------------------*/ -typedef struct -{ - __IO uint8_t WDMOD; - uint8_t RESERVED0[3]; - __IO uint32_t WDTC; - __O uint8_t WDFEED; - uint8_t RESERVED1[3]; - __I uint32_t WDTV; - __IO uint32_t WDCLKSEL; -} LPC_WDT_TypeDef; - -/*------------- Analog-to-Digital Converter (ADC) ----------------------------*/ -typedef struct -{ - __IO uint32_t ADCR; - __IO uint32_t ADGDR; - uint32_t RESERVED0; - __IO uint32_t ADINTEN; - __I uint32_t ADDR0; - __I uint32_t ADDR1; - __I uint32_t ADDR2; - __I uint32_t ADDR3; - __I uint32_t ADDR4; - __I uint32_t ADDR5; - __I uint32_t ADDR6; - __I uint32_t ADDR7; - __I uint32_t ADSTAT; - __IO uint32_t ADTRM; -} LPC_ADC_TypeDef; - -/*------------- Digital-to-Analog Converter (DAC) ----------------------------*/ -typedef struct -{ - __IO uint32_t DACR; - __IO uint32_t DACCTRL; - __IO uint16_t DACCNTVAL; -} LPC_DAC_TypeDef; - -/*------------- Motor Control Pulse-Width Modulation (MCPWM) -----------------*/ -typedef struct -{ - __I uint32_t MCCON; - __O uint32_t MCCON_SET; - __O uint32_t MCCON_CLR; - __I uint32_t MCCAPCON; - __O uint32_t MCCAPCON_SET; - __O uint32_t MCCAPCON_CLR; - __IO uint32_t MCTIM0; - __IO uint32_t MCTIM1; - __IO uint32_t MCTIM2; - __IO uint32_t MCPER0; - __IO uint32_t MCPER1; - __IO uint32_t MCPER2; - __IO uint32_t MCPW0; - __IO uint32_t MCPW1; - __IO uint32_t MCPW2; - __IO uint32_t MCDEADTIME; - __IO uint32_t MCCCP; - __IO uint32_t MCCR0; - __IO uint32_t MCCR1; - __IO uint32_t MCCR2; - __I uint32_t MCINTEN; - __O uint32_t MCINTEN_SET; - __O uint32_t MCINTEN_CLR; - __I uint32_t MCCNTCON; - __O uint32_t MCCNTCON_SET; - __O uint32_t MCCNTCON_CLR; - __I uint32_t MCINTFLAG; - __O uint32_t MCINTFLAG_SET; - __O uint32_t MCINTFLAG_CLR; - __O uint32_t MCCAP_CLR; -} LPC_MCPWM_TypeDef; - -/*------------- Quadrature Encoder Interface (QEI) ---------------------------*/ -typedef struct -{ - __O uint32_t QEICON; - __I uint32_t QEISTAT; - __IO uint32_t QEICONF; - __I uint32_t QEIPOS; - __IO uint32_t QEIMAXPOS; - __IO uint32_t CMPOS0; - __IO uint32_t CMPOS1; - __IO uint32_t CMPOS2; - __I uint32_t INXCNT; - __IO uint32_t INXCMP; - __IO uint32_t QEILOAD; - __I uint32_t QEITIME; - __I uint32_t QEIVEL; - __I uint32_t QEICAP; - __IO uint32_t VELCOMP; - __IO uint32_t FILTER; - uint32_t RESERVED0[998]; - __O uint32_t QEIIEC; - __O uint32_t QEIIES; - __I uint32_t QEIINTSTAT; - __I uint32_t QEIIE; - __O uint32_t QEICLR; - __O uint32_t QEISET; -} LPC_QEI_TypeDef; - -/*------------- Controller Area Network (CAN) --------------------------------*/ -typedef struct -{ - __IO uint32_t mask[512]; /* ID Masks */ -} LPC_CANAF_RAM_TypeDef; - -typedef struct /* Acceptance Filter Registers */ -{ - __IO uint32_t AFMR; - __IO uint32_t SFF_sa; - __IO uint32_t SFF_GRP_sa; - __IO uint32_t EFF_sa; - __IO uint32_t EFF_GRP_sa; - __IO uint32_t ENDofTable; - __I uint32_t LUTerrAd; - __I uint32_t LUTerr; - __IO uint32_t FCANIE; - __IO uint32_t FCANIC0; - __IO uint32_t FCANIC1; -} LPC_CANAF_TypeDef; - -typedef struct /* Central Registers */ -{ - __I uint32_t CANTxSR; - __I uint32_t CANRxSR; - __I uint32_t CANMSR; -} LPC_CANCR_TypeDef; - -typedef struct /* Controller Registers */ -{ - __IO uint32_t MOD; - __O uint32_t CMR; - __IO uint32_t GSR; - __I uint32_t ICR; - __IO uint32_t IER; - __IO uint32_t BTR; - __IO uint32_t EWL; - __I uint32_t SR; - __IO uint32_t RFS; - __IO uint32_t RID; - __IO uint32_t RDA; - __IO uint32_t RDB; - __IO uint32_t TFI1; - __IO uint32_t TID1; - __IO uint32_t TDA1; - __IO uint32_t TDB1; - __IO uint32_t TFI2; - __IO uint32_t TID2; - __IO uint32_t TDA2; - __IO uint32_t TDB2; - __IO uint32_t TFI3; - __IO uint32_t TID3; - __IO uint32_t TDA3; - __IO uint32_t TDB3; -} LPC_CAN_TypeDef; - -/*------------- General Purpose Direct Memory Access (GPDMA) -----------------*/ -typedef struct /* Common Registers */ -{ - __I uint32_t DMACIntStat; - __I uint32_t DMACIntTCStat; - __O uint32_t DMACIntTCClear; - __I uint32_t DMACIntErrStat; - __O uint32_t DMACIntErrClr; - __I uint32_t DMACRawIntTCStat; - __I uint32_t DMACRawIntErrStat; - __I uint32_t DMACEnbldChns; - __IO uint32_t DMACSoftBReq; - __IO uint32_t DMACSoftSReq; - __IO uint32_t DMACSoftLBReq; - __IO uint32_t DMACSoftLSReq; - __IO uint32_t DMACConfig; - __IO uint32_t DMACSync; -} LPC_GPDMA_TypeDef; - -typedef struct /* Channel Registers */ -{ - __IO uint32_t DMACCSrcAddr; - __IO uint32_t DMACCDestAddr; - __IO uint32_t DMACCLLI; - __IO uint32_t DMACCControl; - __IO uint32_t DMACCConfig; -} LPC_GPDMACH_TypeDef; - -/*------------- Universal Serial Bus (USB) -----------------------------------*/ -typedef struct -{ - __I uint32_t HcRevision; /* USB Host Registers */ - __IO uint32_t HcControl; - __IO uint32_t HcCommandStatus; - __IO uint32_t HcInterruptStatus; - __IO uint32_t HcInterruptEnable; - __IO uint32_t HcInterruptDisable; - __IO uint32_t HcHCCA; - __I uint32_t HcPeriodCurrentED; - __IO uint32_t HcControlHeadED; - __IO uint32_t HcControlCurrentED; - __IO uint32_t HcBulkHeadED; - __IO uint32_t HcBulkCurrentED; - __I uint32_t HcDoneHead; - __IO uint32_t HcFmInterval; - __I uint32_t HcFmRemaining; - __I uint32_t HcFmNumber; - __IO uint32_t HcPeriodicStart; - __IO uint32_t HcLSTreshold; - __IO uint32_t HcRhDescriptorA; - __IO uint32_t HcRhDescriptorB; - __IO uint32_t HcRhStatus; - __IO uint32_t HcRhPortStatus1; - __IO uint32_t HcRhPortStatus2; - uint32_t RESERVED0[40]; - __I uint32_t Module_ID; - - __I uint32_t OTGIntSt; /* USB On-The-Go Registers */ - __IO uint32_t OTGIntEn; - __O uint32_t OTGIntSet; - __O uint32_t OTGIntClr; - __IO uint32_t OTGStCtrl; - __IO uint32_t OTGTmr; - uint32_t RESERVED1[58]; - - __I uint32_t USBDevIntSt; /* USB Device Interrupt Registers */ - __IO uint32_t USBDevIntEn; - __O uint32_t USBDevIntClr; - __O uint32_t USBDevIntSet; - - __O uint32_t USBCmdCode; /* USB Device SIE Command Registers */ - __I uint32_t USBCmdData; - - __I uint32_t USBRxData; /* USB Device Transfer Registers */ - __O uint32_t USBTxData; - __I uint32_t USBRxPLen; - __O uint32_t USBTxPLen; - __IO uint32_t USBCtrl; - __O uint32_t USBDevIntPri; - - __I uint32_t USBEpIntSt; /* USB Device Endpoint Interrupt Regs */ - __IO uint32_t USBEpIntEn; - __O uint32_t USBEpIntClr; - __O uint32_t USBEpIntSet; - __O uint32_t USBEpIntPri; - - __IO uint32_t USBReEp; /* USB Device Endpoint Realization Reg*/ - __O uint32_t USBEpInd; - __IO uint32_t USBMaxPSize; - - __I uint32_t USBDMARSt; /* USB Device DMA Registers */ - __O uint32_t USBDMARClr; - __O uint32_t USBDMARSet; - uint32_t RESERVED2[9]; - __IO uint32_t USBUDCAH; - __I uint32_t USBEpDMASt; - __O uint32_t USBEpDMAEn; - __O uint32_t USBEpDMADis; - __I uint32_t USBDMAIntSt; - __IO uint32_t USBDMAIntEn; - uint32_t RESERVED3[2]; - __I uint32_t USBEoTIntSt; - __O uint32_t USBEoTIntClr; - __O uint32_t USBEoTIntSet; - __I uint32_t USBNDDRIntSt; - __O uint32_t USBNDDRIntClr; - __O uint32_t USBNDDRIntSet; - __I uint32_t USBSysErrIntSt; - __O uint32_t USBSysErrIntClr; - __O uint32_t USBSysErrIntSet; - uint32_t RESERVED4[15]; - - __I uint32_t I2C_RX; /* USB OTG I2C Registers */ - __O uint32_t I2C_WO; - __I uint32_t I2C_STS; - __IO uint32_t I2C_CTL; - __IO uint32_t I2C_CLKHI; - __O uint32_t I2C_CLKLO; - uint32_t RESERVED5[823]; - - union { - __IO uint32_t USBClkCtrl; /* USB Clock Control Registers */ - __IO uint32_t OTGClkCtrl; - }; - union { - __I uint32_t USBClkSt; - __I uint32_t OTGClkSt; - }; -} LPC_USB_TypeDef; - -/*------------- Ethernet Media Access Controller (EMAC) ----------------------*/ -typedef struct -{ - __IO uint32_t MAC1; /* MAC Registers */ - __IO uint32_t MAC2; - __IO uint32_t IPGT; - __IO uint32_t IPGR; - __IO uint32_t CLRT; - __IO uint32_t MAXF; - __IO uint32_t SUPP; - __IO uint32_t TEST; - __IO uint32_t MCFG; - __IO uint32_t MCMD; - __IO uint32_t MADR; - __O uint32_t MWTD; - __I uint32_t MRDD; - __I uint32_t MIND; - uint32_t RESERVED0[2]; - __IO uint32_t SA0; - __IO uint32_t SA1; - __IO uint32_t SA2; - uint32_t RESERVED1[45]; - __IO uint32_t Command; /* Control Registers */ - __I uint32_t Status; - __IO uint32_t RxDescriptor; - __IO uint32_t RxStatus; - __IO uint32_t RxDescriptorNumber; - __I uint32_t RxProduceIndex; - __IO uint32_t RxConsumeIndex; - __IO uint32_t TxDescriptor; - __IO uint32_t TxStatus; - __IO uint32_t TxDescriptorNumber; - __IO uint32_t TxProduceIndex; - __I uint32_t TxConsumeIndex; - uint32_t RESERVED2[10]; - __I uint32_t TSV0; - __I uint32_t TSV1; - __I uint32_t RSV; - uint32_t RESERVED3[3]; - __IO uint32_t FlowControlCounter; - __I uint32_t FlowControlStatus; - uint32_t RESERVED4[34]; - __IO uint32_t RxFilterCtrl; /* Rx Filter Registers */ - __IO uint32_t RxFilterWoLStatus; - __IO uint32_t RxFilterWoLClear; - uint32_t RESERVED5; - __IO uint32_t HashFilterL; - __IO uint32_t HashFilterH; - uint32_t RESERVED6[882]; - __I uint32_t IntStatus; /* Module Control Registers */ - __IO uint32_t IntEnable; - __O uint32_t IntClear; - __O uint32_t IntSet; - uint32_t RESERVED7; - __IO uint32_t PowerDown; - uint32_t RESERVED8; - __IO uint32_t Module_ID; -} LPC_EMAC_TypeDef; - -#if defined ( __CC_ARM ) -#pragma no_anon_unions -#endif - - -/******************************************************************************/ -/* Peripheral memory map */ -/******************************************************************************/ -/* Base addresses */ -#define LPC_FLASH_BASE (0x00000000UL) -#define LPC_RAM_BASE (0x10000000UL) -#ifdef __LPC17XX_REV00 -#define LPC_AHBRAM0_BASE (0x20000000UL) -#define LPC_AHBRAM1_BASE (0x20004000UL) -#else -#define LPC_AHBRAM0_BASE (0x2007C000UL) -#define LPC_AHBRAM1_BASE (0x20080000UL) -#endif -#define LPC_GPIO_BASE (0x2009C000UL) -#define LPC_APB0_BASE (0x40000000UL) -#define LPC_APB1_BASE (0x40080000UL) -#define LPC_AHB_BASE (0x50000000UL) -#define LPC_CM3_BASE (0xE0000000UL) - -/* APB0 peripherals */ -#define LPC_WDT_BASE (LPC_APB0_BASE + 0x00000) -#define LPC_TIM0_BASE (LPC_APB0_BASE + 0x04000) -#define LPC_TIM1_BASE (LPC_APB0_BASE + 0x08000) -#define LPC_UART0_BASE (LPC_APB0_BASE + 0x0C000) -#define LPC_UART1_BASE (LPC_APB0_BASE + 0x10000) -#define LPC_PWM1_BASE (LPC_APB0_BASE + 0x18000) -#define LPC_I2C0_BASE (LPC_APB0_BASE + 0x1C000) -#define LPC_SPI_BASE (LPC_APB0_BASE + 0x20000) -#define LPC_RTC_BASE (LPC_APB0_BASE + 0x24000) -#define LPC_GPIOINT_BASE (LPC_APB0_BASE + 0x28080) -#define LPC_PINCON_BASE (LPC_APB0_BASE + 0x2C000) -#define LPC_SSP1_BASE (LPC_APB0_BASE + 0x30000) -#define LPC_ADC_BASE (LPC_APB0_BASE + 0x34000) -#define LPC_CANAF_RAM_BASE (LPC_APB0_BASE + 0x38000) -#define LPC_CANAF_BASE (LPC_APB0_BASE + 0x3C000) -#define LPC_CANCR_BASE (LPC_APB0_BASE + 0x40000) -#define LPC_CAN1_BASE (LPC_APB0_BASE + 0x44000) -#define LPC_CAN2_BASE (LPC_APB0_BASE + 0x48000) -#define LPC_I2C1_BASE (LPC_APB0_BASE + 0x5C000) - -/* APB1 peripherals */ -#define LPC_SSP0_BASE (LPC_APB1_BASE + 0x08000) -#define LPC_DAC_BASE (LPC_APB1_BASE + 0x0C000) -#define LPC_TIM2_BASE (LPC_APB1_BASE + 0x10000) -#define LPC_TIM3_BASE (LPC_APB1_BASE + 0x14000) -#define LPC_UART2_BASE (LPC_APB1_BASE + 0x18000) -#define LPC_UART3_BASE (LPC_APB1_BASE + 0x1C000) -#define LPC_I2C2_BASE (LPC_APB1_BASE + 0x20000) -#define LPC_I2S_BASE (LPC_APB1_BASE + 0x28000) -#define LPC_RIT_BASE (LPC_APB1_BASE + 0x30000) -#define LPC_MCPWM_BASE (LPC_APB1_BASE + 0x38000) -#define LPC_QEI_BASE (LPC_APB1_BASE + 0x3C000) -#define LPC_SC_BASE (LPC_APB1_BASE + 0x7C000) - -/* AHB peripherals */ -#define LPC_EMAC_BASE (LPC_AHB_BASE + 0x00000) -#define LPC_GPDMA_BASE (LPC_AHB_BASE + 0x04000) -#define LPC_GPDMACH0_BASE (LPC_AHB_BASE + 0x04100) -#define LPC_GPDMACH1_BASE (LPC_AHB_BASE + 0x04120) -#define LPC_GPDMACH2_BASE (LPC_AHB_BASE + 0x04140) -#define LPC_GPDMACH3_BASE (LPC_AHB_BASE + 0x04160) -#define LPC_GPDMACH4_BASE (LPC_AHB_BASE + 0x04180) -#define LPC_GPDMACH5_BASE (LPC_AHB_BASE + 0x041A0) -#define LPC_GPDMACH6_BASE (LPC_AHB_BASE + 0x041C0) -#define LPC_GPDMACH7_BASE (LPC_AHB_BASE + 0x041E0) -#define LPC_USB_BASE (LPC_AHB_BASE + 0x0C000) - -/* GPIOs */ -#define LPC_GPIO0_BASE (LPC_GPIO_BASE + 0x00000) -#define LPC_GPIO1_BASE (LPC_GPIO_BASE + 0x00020) -#define LPC_GPIO2_BASE (LPC_GPIO_BASE + 0x00040) -#define LPC_GPIO3_BASE (LPC_GPIO_BASE + 0x00060) -#define LPC_GPIO4_BASE (LPC_GPIO_BASE + 0x00080) - - -/******************************************************************************/ -/* Peripheral declaration */ -/******************************************************************************/ -#define LPC_SC ((LPC_SC_TypeDef *) LPC_SC_BASE ) -#define LPC_GPIO0 ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE ) -#define LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE ) -#define LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE ) -#define LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE ) -#define LPC_GPIO4 ((LPC_GPIO_TypeDef *) LPC_GPIO4_BASE ) -#define LPC_WDT ((LPC_WDT_TypeDef *) LPC_WDT_BASE ) -#define LPC_TIM0 ((LPC_TIM_TypeDef *) LPC_TIM0_BASE ) -#define LPC_TIM1 ((LPC_TIM_TypeDef *) LPC_TIM1_BASE ) -#define LPC_TIM2 ((LPC_TIM_TypeDef *) LPC_TIM2_BASE ) -#define LPC_TIM3 ((LPC_TIM_TypeDef *) LPC_TIM3_BASE ) -#define LPC_RIT ((LPC_RIT_TypeDef *) LPC_RIT_BASE ) -#define LPC_UART0 ((LPC_UART_TypeDef *) LPC_UART0_BASE ) -#define LPC_UART1 ((LPC_UART1_TypeDef *) LPC_UART1_BASE ) -#define LPC_UART2 ((LPC_UART_TypeDef *) LPC_UART2_BASE ) -#define LPC_UART3 ((LPC_UART_TypeDef *) LPC_UART3_BASE ) -#define LPC_PWM1 ((LPC_PWM_TypeDef *) LPC_PWM1_BASE ) -#define LPC_I2C0 ((LPC_I2C_TypeDef *) LPC_I2C0_BASE ) -#define LPC_I2C1 ((LPC_I2C_TypeDef *) LPC_I2C1_BASE ) -#define LPC_I2C2 ((LPC_I2C_TypeDef *) LPC_I2C2_BASE ) -#define LPC_I2S ((LPC_I2S_TypeDef *) LPC_I2S_BASE ) -#define LPC_SPI ((LPC_SPI_TypeDef *) LPC_SPI_BASE ) -#define LPC_RTC ((LPC_RTC_TypeDef *) LPC_RTC_BASE ) -#define LPC_GPIOINT ((LPC_GPIOINT_TypeDef *) LPC_GPIOINT_BASE ) -#define LPC_PINCON ((LPC_PINCON_TypeDef *) LPC_PINCON_BASE ) -#define LPC_SSP0 ((LPC_SSP_TypeDef *) LPC_SSP0_BASE ) -#define LPC_SSP1 ((LPC_SSP_TypeDef *) LPC_SSP1_BASE ) -#define LPC_ADC ((LPC_ADC_TypeDef *) LPC_ADC_BASE ) -#define LPC_DAC ((LPC_DAC_TypeDef *) LPC_DAC_BASE ) -#define LPC_CANAF_RAM ((LPC_CANAF_RAM_TypeDef *) LPC_CANAF_RAM_BASE) -#define LPC_CANAF ((LPC_CANAF_TypeDef *) LPC_CANAF_BASE ) -#define LPC_CANCR ((LPC_CANCR_TypeDef *) LPC_CANCR_BASE ) -#define LPC_CAN1 ((LPC_CAN_TypeDef *) LPC_CAN1_BASE ) -#define LPC_CAN2 ((LPC_CAN_TypeDef *) LPC_CAN2_BASE ) -#define LPC_MCPWM ((LPC_MCPWM_TypeDef *) LPC_MCPWM_BASE ) -#define LPC_QEI ((LPC_QEI_TypeDef *) LPC_QEI_BASE ) -#define LPC_EMAC ((LPC_EMAC_TypeDef *) LPC_EMAC_BASE ) -#define LPC_GPDMA ((LPC_GPDMA_TypeDef *) LPC_GPDMA_BASE ) -#define DMAREQSEL (*(__IO uint32_t *) ( 0x4000C1C4)) -#define LPC_GPDMACH0 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH0_BASE ) -#define LPC_GPDMACH1 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH1_BASE ) -#define LPC_GPDMACH2 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH2_BASE ) -#define LPC_GPDMACH3 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH3_BASE ) -#define LPC_GPDMACH4 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH4_BASE ) -#define LPC_GPDMACH5 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH5_BASE ) -#define LPC_GPDMACH6 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH6_BASE ) -#define LPC_GPDMACH7 ((LPC_GPDMACH_TypeDef *) LPC_GPDMACH7_BASE ) -#define LPC_USB ((LPC_USB_TypeDef *) LPC_USB_BASE ) - -#endif // __LPC17xx_H__ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_adc.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_adc.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_adc.h +++ /dev/null @@ -1,299 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_adc.h - * @brief : Contains all macro definitions and function prototypes - * support for ADC firmware library on LPC17xx - * @version : 1.0 - * @date : 3. April. 2009 - * @author : NgaDinh - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup ADC - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_ADC_H_ -#define LPC17XX_ADC_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup ADC_Private_Macros ADC_Private_Macros - * @{ - */ - - -/** @defgroup group3 ADC_REGISTER_BIT_DEFINITIONS - * @{ - */ - -/*********************************************************************//** - * Macro defines for ADC control register - **********************************************************************/ -/** Selects which of the AD0.0:7 pins is (are) to be sampled and converted */ -#define ADC_CR_CH_SEL(n) ((1UL << n)) -/** The APB clock (PCLK) is divided by (this value plus one) -* to produce the clock for the A/D */ -#define ADC_CR_CLKDIV(n) ((n<<8)) -/** Repeated conversions A/D enable bit */ -#define ADC_CR_BURST ((1UL<<16)) -/** ADC convert in power down mode */ -#define ADC_CR_PDN ((1UL<<21)) -/** Start mask bits */ -#define ADC_CR_START_MASK ((7UL<<24)) -/** Select Start Mode */ -#define ADC_CR_START_MODE_SEL(SEL) ((SEL<<24)) -/** Start conversion now */ -#define ADC_CR_START_NOW ((1UL<<24)) -/** Start conversion when the edge selected by bit 27 occurs on P2.10/EINT0 */ -#define ADC_CR_START_EINT0 ((2UL<<24)) -/** Start conversion when the edge selected by bit 27 occurs on P1.27/CAP0.1 */ -#define ADC_CR_START_CAP01 ((3UL<<24)) -/** Start conversion when the edge selected by bit 27 occurs on MAT0.1 */ -#define ADC_CR_START_MAT01 ((4UL<<24)) -/** Start conversion when the edge selected by bit 27 occurs on MAT0.3 */ -#define ADC_CR_START_MAT03 ((5UL<<24)) -/** Start conversion when the edge selected by bit 27 occurs on MAT1.0 */ -#define ADC_CR_START_MAT10 ((6UL<<24)) -/** Start conversion when the edge selected by bit 27 occurs on MAT1.1 */ -#define ADC_CR_START_MAT11 ((7UL<<24)) -/** Start conversion on a falling edge on the selected CAP/MAT signal */ -#define ADC_CR_EDGE ((1UL<<27)) - -/*********************************************************************//** - * Macro defines for ADC Global Data register - **********************************************************************/ -/** When DONE is 1, this field contains result value of ADC conversion */ -#define ADC_GDR_RESULT(n) (((n>>4)&0xFFF)) -/** These bits contain the channel from which the LS bits were converted */ -#define ADC_GDR_CH(n) (((n>>24)&0x7)) -/** This bit is 1 in burst mode if the results of one or - * more conversions was (were) lost */ -#define ADC_GDR_OVERRUN_FLAG ((1UL<<30)) -/** This bit is set to 1 when an A/D conversion completes */ -#define ADC_GDR_DONE_FLAG ((1UL<<31)) - -/** This bits is used to mask for Channel */ -#define ADC_GDR_CH_MASK ((7UL<<24)) -/*********************************************************************//** - * Macro defines for ADC Interrupt register - **********************************************************************/ -/** These bits allow control over which A/D channels generate - * interrupts for conversion completion */ -#define ADC_INTEN_CH(n) ((1UL<>4)&0xFFF)) -/** These bits mirror the OVERRRUN status flags that appear in the - * result register for each A/D channel */ -#define ADC_DR_OVERRUN_FLAG ((1UL<<30)) -/** This bit is set to 1 when an A/D conversion completes. It is cleared - * when this register is read */ -#define ADC_DR_DONE_FLAG ((1UL<<31)) - -/*********************************************************************//** - * Macro defines for ADC Status register -**********************************************************************/ -/** These bits mirror the DONE status flags that appear in the result - * register for each A/D channel */ -#define ADC_STAT_CH_DONE_FLAG(n) ((n&0xFF)) -/** These bits mirror the OVERRRUN status flags that appear in the - * result register for each A/D channel */ -#define ADC_STAT_CH_OVERRUN_FLAG(n) (((n>>8)&0xFF)) -/** This bit is the A/D interrupt flag */ -#define ADC_STAT_INT_FLAG ((1UL<<16)) - -/*********************************************************************//** - * Macro defines for ADC Trim register -**********************************************************************/ -/** Offset trim bits for ADC operation */ -#define ADC_ADCOFFS(n) (((n&0xF)<<4)) -/** Written to boot code*/ -#define ADC_TRIM(n) (((n&0xF)<<8)) - -/** - * @} - */ - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup ADC_Public_Types - * @{ - */ - -/*********************************************************************//** - * @brief ADC enumeration - **********************************************************************/ -/** @brief Channel Selection */ -typedef enum -{ - ADC_CHANNEL_0 = 0, /*!< Channel 0 */ - ADC_CHANNEL_1, /*!< Channel 1 */ - ADC_CHANNEL_2, /*!< Channel 2 */ - ADC_CHANNEL_3, /*!< Channel 3 */ - ADC_CHANNEL_4, /*!< Channel 4 */ - ADC_CHANNEL_5, /*!< Channel 5 */ - ADC_CHANNEL_6, /*!< Channel 6 */ - ADC_CHANNEL_7 /*!< Channel 7 */ -}ADC_CHANNEL_SELECTION; - - - -/** @brief Type of start option */ - -/** @brief Type of start option */ - -typedef enum -{ - ADC_START_CONTINUOUS =0, /*!< Continuous mode */ - ADC_START_NOW, /*!< Start conversion now */ - ADC_START_ON_EINT0, /*!< Start conversion when the edge selected - * by bit 27 occurs on P2.10/EINT0 */ - ADC_START_ON_CAP01, /*!< Start conversion when the edge selected - * by bit 27 occurs on P1.27/CAP0.1 */ - ADC_START_ON_MAT01, /*!< Start conversion when the edge selected - * by bit 27 occurs on MAT0.1 */ - ADC_START_ON_MAT03, /*!< Start conversion when the edge selected - * by bit 27 occurs on MAT0.3 */ - ADC_START_ON_MAT10, /*!< Start conversion when the edge selected - * by bit 27 occurs on MAT1.0 */ - ADC_START_ON_MAT11 /*!< Start conversion when the edge selected - * by bit 27 occurs on MAT1.1 */ -} ADC_START_OPT; - - -/** @brief Type of edge when start conversion on the selected CAP/MAT signal */ - -typedef enum -{ - ADC_START_ON_RISING = 0, /*!< Start conversion on a rising edge - *on the selected CAP/MAT signal */ - ADC_START_ON_FALLING /*!< Start conversion on a falling edge - *on the selected CAP/MAT signal */ -} ADC_START_ON_EDGE_OPT; - -/** @brief* ADC type interrupt enum */ -typedef enum -{ - ADC_ADINTEN0 = 0, /*!< Interrupt channel 0 */ - ADC_ADINTEN1, /*!< Interrupt channel 1 */ - ADC_ADINTEN2, /*!< Interrupt channel 2 */ - ADC_ADINTEN3, /*!< Interrupt channel 3 */ - ADC_ADINTEN4, /*!< Interrupt channel 4 */ - ADC_ADINTEN5, /*!< Interrupt channel 5 */ - ADC_ADINTEN6, /*!< Interrupt channel 6 */ - ADC_ADINTEN7, /*!< Interrupt channel 7 */ - ADC_ADGINTEN /*!< Individual channel/global flag done generate an interrupt */ -}ADC_TYPE_INT_OPT; - -/** Macro to determine if it is valid interrupt type */ -#define PARAM_ADC_TYPE_INT_OPT(OPT) ((OPT == ADC_ADINTEN0)||(OPT == ADC_ADINTEN1)\ -||(OPT == ADC_ADINTEN2)||(OPT == ADC_ADINTEN3)\ -||(OPT == ADC_ADINTEN4)||(OPT == ADC_ADINTEN5)\ -||(OPT == ADC_ADINTEN6)||(OPT == ADC_ADINTEN7)\ -||(OPT == ADC_ADGINTEN)) - - -/** @brief ADC Data status */ -typedef enum -{ - ADC_DATA_BURST = 0, /*Burst bit*/ - ADC_DATA_DONE /*Done bit*/ -}ADC_DATA_STATUS; - - -#define PARAM_ADC_START_ON_EDGE_OPT(OPT) ((OPT == ADC_START_ON_RISING)||(OPT == ADC_START_ON_FALLING)) - -#define PARAM_ADC_DATA_STATUS(OPT) ((OPT== ADC_DATA_BURST)||(OPT== ADC_DATA_DONE)) - -#define PARAM_ADC_FREQUENCY(FRE) (FRE <= 13000000 ) - -#define PARAM_ADC_CHANNEL_SELECTION(SEL) ((SEL == ADC_CHANNEL_0)||(ADC_CHANNEL_1)\ -||(SEL == ADC_CHANNEL_2)|(ADC_CHANNEL_3)\ -||(SEL == ADC_CHANNEL_4)||(ADC_CHANNEL_5)\ -||(SEL == ADC_CHANNEL_6)||(ADC_CHANNEL_7)) - -#define PARAM_ADC_START_OPT(OPT) ((OPT == ADC_START_CONTINUOUS)||(OPT == ADC_START_NOW)\ -||(OPT == ADC_START_ON_EINT0)||(OPT == ADC_START_ON_CAP01)\ -||(OPT == ADC_START_ON_MAT01)||(OPT == ADC_START_ON_MAT03)\ -||(OPT == ADC_START_ON_MAT10)||(OPT == ADC_START_ON_MAT11)) - -#define PARAM_ADC_TYPE_INT_OPT(OPT) ((OPT == ADC_ADINTEN0)||(OPT == ADC_ADINTEN1)\ -||(OPT == ADC_ADINTEN2)||(OPT == ADC_ADINTEN3)\ -||(OPT == ADC_ADINTEN4)||(OPT == ADC_ADINTEN5)\ -||(OPT == ADC_ADINTEN6)||(OPT == ADC_ADINTEN7)\ -||(OPT == ADC_ADGINTEN)) - -#define PARAM_ADCx(n) (((uint32_t *)n)==((uint32_t *)LPC_ADC)) - -/** - * @} - */ - - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup ADC_Public_Functions - * @{ - */ - -void ADC_Init(LPC_ADC_TypeDef *ADCx, uint32_t ConvFreq); -void ADC_DeInit(LPC_ADC_TypeDef *ADCx); -void ADC_BurstCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState); -void ADC_PowerdownCmd(LPC_ADC_TypeDef *ADCx, FunctionalState NewState); -void ADC_StartCmd(LPC_ADC_TypeDef *ADCx, uint8_t start_mode); -void ADC_EdgeStartConfig(LPC_ADC_TypeDef *ADCx, uint8_t EdgeOption); -void ADC_IntConfig (LPC_ADC_TypeDef *ADCx, ADC_TYPE_INT_OPT IntType, FunctionalState NewState); -void ADC_ChannelCmd (LPC_ADC_TypeDef *ADCx, uint8_t Channel, FunctionalState NewState); -uint16_t ADC_ChannelGetData(LPC_ADC_TypeDef *ADCx, uint8_t channel); -FlagStatus ADC_ChannelGetStatus(LPC_ADC_TypeDef *ADCx, uint8_t channel, uint32_t StatusType); -uint16_t ADC_GlobalGetData(LPC_ADC_TypeDef *ADCx, uint8_t channel); -FlagStatus ADC_GlobalGetStatus(LPC_ADC_TypeDef *ADCx, uint32_t StatusType); - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - - -#endif /* LPC17XX_ADC_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_can.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_can.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_can.h +++ /dev/null @@ -1,855 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_can.h - * @brief : Contains all macro definitions and function prototypes - * support for CAN firmware library on LPC17xx - * @version : 1.0 - * @date : 1.June.2009 - * @author : NguyenCao - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup CAN - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_CAN_H_ -#define LPC17XX_CAN_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup CAN_Private_Macros - * @{ - */ - -#define ID_11 1 -#define MAX_HW_FULLCAN_OBJ 64 -#define MAX_SW_FULLCAN_OBJ 32 - - -/** @defgroup CAN_REGISTER_BIT_DEFINITION - * @{ - */ - -/** CAN Reset mode */ -#define CAN_MOD_RM ((uint32_t)(1)) -/** CAN Listen Only Mode */ -#define CAN_MOD_LOM ((uint32_t)(1<<1)) -/** CAN Self Test mode */ -#define CAN_MOD_STM ((uint32_t)(1<<2)) -/** CAN Transmit Priority mode */ -#define CAN_MOD_TPM ((uint32_t)(1<<3)) -/** CAN Sleep mode */ -#define CAN_MOD_SM ((uint32_t)(1<<4)) -/** CAN Receive Polarity mode */ -#define CAN_MOD_RPM ((uint32_t)(1<<5)) -/** CAN Test mode */ -#define CAN_MOD_TM ((uint32_t)(1<<7)) -/*********************************************************************//** - * Macro defines for CAN Command Register - **********************************************************************/ -/** CAN Transmission Request */ -#define CAN_CMR_TR ((uint32_t)(1)) -/** CAN Abort Transmission */ -#define CAN_CMR_AT ((uint32_t)(1<<1)) -/** CAN Release Receive Buffer */ -#define CAN_CMR_RRB ((uint32_t)(1<<2)) -/** CAN Clear Data Overrun */ -#define CAN_CMR_CDO ((uint32_t)(1<<3)) -/** CAN Self Reception Request */ -#define CAN_CMR_SRR ((uint32_t)(1<<4)) -/** CAN Select Tx Buffer 1 */ -#define CAN_CMR_STB1 ((uint32_t)(1<<5)) -/** CAN Select Tx Buffer 2 */ -#define CAN_CMR_STB2 ((uint32_t)(1<<6)) -/** CAN Select Tx Buffer 3 */ -#define CAN_CMR_STB3 ((uint32_t)(1<<7)) - -/*********************************************************************//** - * Macro defines for CAN Global Status Register - **********************************************************************/ -/** CAN Receive Buffer Status */ -#define CAN_GSR_RBS ((uint32_t)(1)) -/** CAN Data Overrun Status */ -#define CAN_GSR_DOS ((uint32_t)(1<<1)) -/** CAN Transmit Buffer Status */ -#define CAN_GSR_TBS ((uint32_t)(1<<2)) -/** CAN Transmit Complete Status */ -#define CAN_GSR_TCS ((uint32_t)(1<<3)) -/** CAN Receive Status */ -#define CAN_GSR_RS ((uint32_t)(1<<4)) -/** CAN Transmit Status */ -#define CAN_GSR_TS ((uint32_t)(1<<5)) -/** CAN Error Status */ -#define CAN_GSR_ES ((uint32_t)(1<<6)) -/** CAN Bus Status */ -#define CAN_GSR_BS ((uint32_t)(1<<7)) -/** CAN Current value of the Rx Error Counter */ -#define CAN_GSR_RXERR(n) ((uint32_t)((n&0xFF)<<16)) -/** CAN Current value of the Tx Error Counter */ -#define CAN_GSR_TXERR(n) ((uint32_t)(n&0xFF)<<24)) - -/*********************************************************************//** - * Macro defines for CAN Interrupt and Capture Register - **********************************************************************/ -/** CAN Receive Interrupt */ -#define CAN_ICR_RI ((uint32_t)(1)) -/** CAN Transmit Interrupt 1 */ -#define CAN_ICR_TI1 ((uint32_t)(1<<1)) -/** CAN Error Warning Interrupt */ -#define CAN_ICR_EI ((uint32_t)(1<<2)) -/** CAN Data Overrun Interrupt */ -#define CAN_ICR_DOI ((uint32_t)(1<<3)) -/** CAN Wake-Up Interrupt */ -#define CAN_ICR_WUI ((uint32_t)(1<<4)) -/** CAN Error Passive Interrupt */ -#define CAN_ICR_EPI ((uint32_t)(1<<5)) -/** CAN Arbitration Lost Interrupt */ -#define CAN_ICR_ALI ((uint32_t)(1<<6)) -/** CAN Bus Error Interrupt */ -#define CAN_ICR_BEI ((uint32_t)(1<<7)) -/** CAN ID Ready Interrupt */ -#define CAN_ICR_IDI ((uint32_t)(1<<8)) -/** CAN Transmit Interrupt 2 */ -#define CAN_ICR_TI2 ((uint32_t)(1<<9)) -/** CAN Transmit Interrupt 3 */ -#define CAN_ICR_TI3 ((uint32_t)(1<<10)) -/** CAN Error Code Capture */ -#define CAN_ICR_ERRBIT(n) ((uint32_t)((n&0x1F)<<16)) -/** CAN Error Direction */ -#define CAN_ICR_ERRDIR ((uint32_t)(1<<21)) -/** CAN Error Capture */ -#define CAN_ICR_ERRC(n) ((uint32_t)((n&0x3)<<22)) -/** CAN Arbitration Lost Capture */ -#define CAN_ICR_ALCBIT(n) ((uint32_t)((n&0xFF)<<24)) - -/*********************************************************************//** - * Macro defines for CAN Interrupt Enable Register - **********************************************************************/ -/** CAN Receive Interrupt Enable */ -#define CAN_IER_RIE ((uint32_t)(1)) -/** CAN Transmit Interrupt Enable for buffer 1 */ -#define CAN_IER_TIE1 ((uint32_t)(1<<1)) -/** CAN Error Warning Interrupt Enable */ -#define CAN_IER_EIE ((uint32_t)(1<<2)) -/** CAN Data Overrun Interrupt Enable */ -#define CAN_IER_DOIE ((uint32_t)(1<<3)) -/** CAN Wake-Up Interrupt Enable */ -#define CAN_IER_WUIE ((uint32_t)(1<<4)) -/** CAN Error Passive Interrupt Enable */ -#define CAN_IER_EPIE ((uint32_t)(1<<5)) -/** CAN Arbitration Lost Interrupt Enable */ -#define CAN_IER_ALIE ((uint32_t)(1<<6)) -/** CAN Bus Error Interrupt Enable */ -#define CAN_IER_BEIE ((uint32_t)(1<<7)) -/** CAN ID Ready Interrupt Enable */ -#define CAN_IER_IDIE ((uint32_t)(1<<8)) -/** CAN Transmit Enable Interrupt for Buffer 2 */ -#define CAN_IER_TIE2 ((uint32_t)(1<<9)) -/** CAN Transmit Enable Interrupt for Buffer 3 */ -#define CAN_IER_TIE3 ((uint32_t)(1<<10)) - -/*********************************************************************//** - * Macro defines for CAN Bus Timing Register - **********************************************************************/ -/** CAN Baudrate Prescaler */ -#define CAN_BTR_BRP(n) ((uint32_t)(n&0x3FF)) -/** CAN Synchronization Jump Width */ -#define CAN_BTR_SJM(n) ((uint32_t)((n&0x3)<<14)) -/** CAN Time Segment 1 */ -#define CAN_BTR_TESG1(n) ((uint32_t)(n&0xF)<<16)) -/** CAN Time Segment 2 */ -#define CAN_BTR_TESG2(n) ((uint32_t)(n&0xF)<<20)) -/** CAN Sampling */ -#define CAN_BTR_SAM(n) ((uint32_t)(1<<23)) - -/*********************************************************************//** - * Macro defines for CAN Error Warning Limit Register - **********************************************************************/ -/** CAN Error Warning Limit */ -#define CAN_EWL_EWL(n) ((uint32_t)(n&0xFF)) - -/*********************************************************************//** - * Macro defines for CAN Status Register - **********************************************************************/ -/** CAN Receive Buffer Status */ -#define CAN_SR_RBS ((uint32_t)(1)) -/** CAN Data Overrun Status */ -#define CAN_SR_DOS ((uint32_t)(1<<1)) -/** CAN Transmit Buffer Status 1 */ -#define CAN_SR_TBS1 ((uint32_t)(1<<2)) -/** CAN Transmission Complete Status of Buffer 1 */ -#define CAN_SR_TCS1 ((uint32_t)(1<<3)) -/** CAN Receive Status */ -#define CAN_SR_RS ((uint32_t)(1<<4)) -/** CAN Transmit Status 1 */ -#define CAN_SR_TS1 ((uint32_t)(1<<5)) -/** CAN Error Status */ -#define CAN_SR_ES ((uint32_t)(1<<6)) -/** CAN Bus Status */ -#define CAN_SR_BS ((uint32_t)(1<<7)) -/** CAN Transmit Buffer Status 2 */ -#define CAN_SR_TBS2 ((uint32_t)(1<<10)) -/** CAN Transmission Complete Status of Buffer 2 */ -#define CAN_SR_TCS2 ((uint32_t)(1<<11)) -/** CAN Transmit Status 2 */ -#define CAN_SR_TS2 ((uint32_t)(1<<13)) -/** CAN Transmit Buffer Status 2 */ -#define CAN_SR_TBS3 ((uint32_t)(1<<18)) -/** CAN Transmission Complete Status of Buffer 2 */ -#define CAN_SR_TCS3 ((uint32_t)(1<<19)) -/** CAN Transmit Status 2 */ -#define CAN_SR_TS3 ((uint32_t)(1<<21)) - -/*********************************************************************//** - * Macro defines for CAN Receive Frame Status Register - **********************************************************************/ -/** CAN ID Index */ -#define CAN_RFS_ID_INDEX(n) ((uint32_t)(n&0x3FF)) -/** CAN Bypass */ -#define CAN_RFS_BP ((uint32_t)(1<<10)) -/** CAN Data Length Code */ -#define CAN_RFS_DLC(n) ((uint32_t)((n&0xF)<<16) -/** CAN Remote Transmission Request */ -#define CAN_RFS_RTR ((uint32_t)(1<<30)) -/** CAN control 11 bit or 29 bit Identifier */ -#define CAN_RFS_FF ((uint32_t)(1<<31)) - -/*********************************************************************//** - * Macro defines for CAN Receive Identifier Register - **********************************************************************/ -/** CAN 11 bit Identifier */ -#define CAN_RID_ID_11(n) ((uint32_t)(n&0x7FF)) -/** CAN 29 bit Identifier */ -#define CAN_RID_ID_29(n) ((uint32_t)(n&0x1FFFFFFF)) - -/*********************************************************************//** - * Macro defines for CAN Receive Data A Register - **********************************************************************/ -/** CAN Receive Data 1 */ -#define CAN_RDA_DATA1(n) ((uint32_t)(n&0xFF)) -/** CAN Receive Data 2 */ -#define CAN_RDA_DATA2(n) ((uint32_t)((n&0xFF)<<8)) -/** CAN Receive Data 3 */ -#define CAN_RDA_DATA3(n) ((uint32_t)((n&0xFF)<<16)) -/** CAN Receive Data 4 */ -#define CAN_RDA_DATA4(n) ((uint32_t)((n&0xFF)<<24)) - -/*********************************************************************//** - * Macro defines for CAN Receive Data B Register - **********************************************************************/ -/** CAN Receive Data 5 */ -#define CAN_RDB_DATA5(n) ((uint32_t)(n&0xFF)) -/** CAN Receive Data 6 */ -#define CAN_RDB_DATA6(n) ((uint32_t)((n&0xFF)<<8)) -/** CAN Receive Data 7 */ -#define CAN_RDB_DATA7(n) ((uint32_t)((n&0xFF)<<16)) -/** CAN Receive Data 8 */ -#define CAN_RDB_DATA8(n) ((uint32_t)((n&0xFF)<<24)) - -/*********************************************************************//** - * Macro defines for CAN Transmit Frame Information Register - **********************************************************************/ -/** CAN Priority */ -#define CAN_TFI_PRIO(n) ((uint32_t)(n&0xFF)) -/** CAN Data Length Code */ -#define CAN_TFI_DLC(n) ((uint32_t)((n&0xF)<<16)) -/** CAN Remote Frame Transmission */ -#define CAN_TFI_RTR ((uint32_t)(1<<30)) -/** CAN control 11-bit or 29-bit Identifier */ -#define CAN_TFI_FF ((uint32_t)(1<<31)) - -/*********************************************************************//** - * Macro defines for CAN Transmit Identifier Register - **********************************************************************/ -/** CAN 11-bit Identifier */ -#define CAN_TID_ID11(n) ((uint32_t)(n&0x7FF)) -/** CAN 11-bit Identifier */ -#define CAN_TID_ID29(n) ((uint32_t)(n&0x1FFFFFFF)) - -/*********************************************************************//** - * Macro defines for CAN Transmit Data A Register - **********************************************************************/ -/** CAN Transmit Data 1 */ -#define CAN_TDA_DATA1(n) ((uint32_t)(n&0xFF)) -/** CAN Transmit Data 2 */ -#define CAN_TDA_DATA2(n) ((uint32_t)((n&0xFF)<<8)) -/** CAN Transmit Data 3 */ -#define CAN_TDA_DATA3(n) ((uint32_t)((n&0xFF)<<16)) -/** CAN Transmit Data 4 */ -#define CAN_TDA_DATA4(n) ((uint32_t)((n&0xFF)<<24)) - -/*********************************************************************//** - * Macro defines for CAN Transmit Data B Register - **********************************************************************/ -/** CAN Transmit Data 5 */ -#define CAN_TDA_DATA5(n) ((uint32_t)(n&0xFF)) -/** CAN Transmit Data 6 */ -#define CAN_TDA_DATA6(n) ((uint32_t)((n&0xFF)<<8)) -/** CAN Transmit Data 7 */ -#define CAN_TDA_DATA7(n) ((uint32_t)((n&0xFF)<<16)) -/** CAN Transmit Data 8 */ -#define CAN_TDA_DATA8(n) ((uint32_t)((n&0xFF)<<24)) - -/*********************************************************************//** - * Macro defines for CAN Sleep Clear Register - **********************************************************************/ -/** CAN1 Sleep mode */ -#define CAN1SLEEPCLR ((uint32_t)(1<<1)) -/** CAN2 Sleep Mode */ -#define CAN2SLEEPCLR ((uint32_t)(1<<2)) - -/*********************************************************************//** - * Macro defines for CAN Wake up Flags Register - **********************************************************************/ -/** CAN1 Sleep mode */ -#define CAN_WAKEFLAGES_CAN1WAKE ((uint32_t)(1<<1)) -/** CAN2 Sleep Mode */ -#define CAN_WAKEFLAGES_CAN2WAKE ((uint32_t)(1<<2)) - -/*********************************************************************//** - * Macro defines for Central transmit Status Register - **********************************************************************/ -/** CAN Transmit 1 */ -#define CAN_TSR_TS1 ((uint32_t)(1)) -/** CAN Transmit 2 */ -#define CAN_TSR_TS2 ((uint32_t)(1<<1)) -/** CAN Transmit Buffer Status 1 */ -#define CAN_TSR_TBS1 ((uint32_t)(1<<8)) -/** CAN Transmit Buffer Status 2 */ -#define CAN_TSR_TBS2 ((uint32_t)(1<<9)) -/** CAN Transmission Complete Status 1 */ -#define CAN_TSR_TCS1 ((uint32_t)(1<<16)) -/** CAN Transmission Complete Status 2 */ -#define CAN_TSR_TCS2 ((uint32_t)(1<<17)) - -/*********************************************************************//** - * Macro defines for Central Receive Status Register - **********************************************************************/ -/** CAN Receive Status 1 */ -#define CAN_RSR_RS1 ((uint32_t)(1)) -/** CAN Receive Status 1 */ -#define CAN_RSR_RS2 ((uint32_t)(1<<1)) -/** CAN Receive Buffer Status 1*/ -#define CAN_RSR_RB1 ((uint32_t)(1<<8)) -/** CAN Receive Buffer Status 2*/ -#define CAN_RSR_RB2 ((uint32_t)(1<<9)) -/** CAN Data Overrun Status 1 */ -#define CAN_RSR_DOS1 ((uint32_t)(1<<16)) -/** CAN Data Overrun Status 1 */ -#define CAN_RSR_DOS2 ((uint32_t)(1<<17)) - -/*********************************************************************//** - * Macro defines for Central Miscellaneous Status Register - **********************************************************************/ -/** Same CAN Error Status in CAN1GSR */ -#define CAN_MSR_E1 ((uint32_t)(1)) -/** Same CAN Error Status in CAN2GSR */ -#define CAN_MSR_E2 ((uint32_t)(1<<1)) -/** Same CAN Bus Status in CAN1GSR */ -#define CAN_MSR_BS1 ((uint32_t)(1<<8)) -/** Same CAN Bus Status in CAN2GSR */ -#define CAN_MSR_BS2 ((uint32_t)(1<<9)) - -/*********************************************************************//** - * Macro defines for Acceptance Filter Mode Register - **********************************************************************/ -/** CAN Acceptance Filter Off mode */ -#define CAN_AFMR_AccOff ((uint32_t)(1)) -/** CAN Acceptance File Bypass mode */ -#define CAN_AFMR_AccBP ((uint32_t)(1<<1)) -/** FullCAN Mode Enhancements */ -#define CAN_AFMR_eFCAN ((uint32_t)(1<<2)) - -/*********************************************************************//** - * Macro defines for Standard Frame Individual Start Address Register - **********************************************************************/ -/** The start address of the table of individual Standard Identifier */ -#define CAN_STT_sa(n) ((uint32_t)((n&1FF)<<2)) - -/*********************************************************************//** - * Macro defines for Standard Frame Group Start Address Register - **********************************************************************/ -/** The start address of the table of grouped Standard Identifier */ -#define CAN_SFF_GRP_sa(n) ((uint32_t)((n&3FF)<<2)) - -/*********************************************************************//** - * Macro defines for Extended Frame Start Address Register - **********************************************************************/ -/** The start address of the table of individual Extended Identifier */ -#define CAN_EFF_sa(n) ((uint32_t)((n&1FF)<<2)) - -/*********************************************************************//** - * Macro defines for Extended Frame Group Start Address Register - **********************************************************************/ -/** The start address of the table of grouped Extended Identifier */ -#define CAN_Eff_GRP_sa(n) ((uint32_t)((n&3FF)<<2)) - -/*********************************************************************//** - * Macro defines for End Of AF Table Register - **********************************************************************/ -/** The End of Table of AF LookUp Table */ -#define CAN_EndofTable(n) ((uint32_t)((n&3FF)<<2)) - -/*********************************************************************//** - * Macro defines for LUT Error Address Register - **********************************************************************/ -/** CAN Look-Up Table Error Address */ -#define CAN_LUTerrAd(n) ((uint32_t)((n&1FF)<<2)) - -/*********************************************************************//** - * Macro defines for LUT Error Register - **********************************************************************/ -/** CAN Look-Up Table Error */ -#define CAN_LUTerr ((uint32_t)(1)) - -/*********************************************************************//** - * Macro defines for Global FullCANInterrupt Enable Register - **********************************************************************/ -/** Global FullCANInterrupt Enable */ -#define CAN_FCANIE ((uint32_t)(1)) - -/*********************************************************************//** - * Macro defines for FullCAN Interrupt and Capture Register 0 - **********************************************************************/ -/** FullCAN Interrupt and Capture (0-31)*/ -#define CAN_FCANIC0_IntPnd(n) ((uint32_t)(1<=0)&&(data <= 0xFFFFFFFF)) -#define PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000)) - -/** Macro to check Pin Selection value */ -#define PARAM_RD1_PIN(n) ((n==CAN_RD1_P0_0)||(n==CAN_RD1_P0_21)) -#define PARAM_TD1_PIN(n) ((n==CAN_TD1_P0_1)||(n==CAN_TD1_P0_22)) -#define PARAM_RD2_PIN(n) ((n==CAN_RD2_P0_4)||(n==CAN_RD2_P2_7)) -#define PARAM_TD2_PIN(n) ((n==CAN_TD2_P0_5)||(n==CAN_TD2_P2_8)) - -/** Macro to check Frame Identifier */ -#define PARAM_ID_11(n) ((n>>11)==0) /*-- 11 bit --*/ -#define PARAM_ID_29(n) ((n>>29)==0) /*-- 29 bit --*/ - -#define PARAM_DLC(n) ((n>>4)==0) /*-- 4 bit --*/ -#define PARAM_ID_FORMAT(n) ((n==STD_ID_FORMAT)||(n==EXT_ID_FORMAT)) -#define PARAM_GRP_ID(x, y) ((x<=y)) -#define PARAM_FRAME_TYPE(n) ((n==DATA_FRAME)||(n==REMOTE_FRAME)) - -/** Macro to check Control/Central Status type parameter */ -#define PARAM_CTRL_STS_TYPE(n) ((n==CANCTRL_GLOBAL_STS)||(n==CANCTRL_INT_CAP) \ -||(n==CANCTRL_ERR_WRN)||(n==CANCTRL_STS)) -#define PARAM_CR_STS_TYPE(n) ((n==CANCR_TX_STS)||(n==CANCR_RX_STS) \ -||(n==CANCR_MS)) -/** Macro to check AF Mode type parameter */ -#define PARAM_AFMODE_TYPE(n) ((n==CAN_Normal)||(n==CAN_AccOff) \ -||(n==CAN_AccBP)||(n==CAN_eFCAN)) -/** Macro to check Operation Mode */ -#define PARAM_MODE_TYPE(n) ((n==CAN_OPERATING_MODE)||(n==CAN_RESET_MODE) \ -||(n==CAN_LISTENONLY_MODE)||(n==CAN_SELFTEST_MODE) \ -||(n==CAN_TXPRIORITY_MODE)||(n==CAN_SLEEP_MODE) \ -||(n==CAN_RXPOLARITY_MODE)||(n==CAN_TEST_MODE)) - -/** Macro define for struct AF_Section parameter */ -#define CAN1_CTRL ((uint8_t)(0)) -#define CAN2_CTRL ((uint8_t)(1)) -#define PARAM_CTRL(n) ((n==CAN1_CTRL)|(n==CAN2_CTRL)) - -#define MSG_ENABLE ((uint8_t)(0)) -#define MSG_DISABLE ((uint8_t)(1)) -#define PARAM_MSG_DISABLE(n) ((n==MSG_ENABLE)|(n==MSG_DISABLE)) - -/**Macro to check Interrupt Type parameter */ -#define PARAM_INT_EN_TYPE(n) ((n==CANINT_RIE)||(n==CANINT_TIE1) \ -||(n==CANINT_EIE)||(n==CANINT_DOIE) \ -||(n==CANINT_WUIE)||(n==CANINT_EPIE) \ -||(n==CANINT_ALIE)||(n==CANINT_BEIE) \ -||(n==CANINT_IDIE)||(n==CANINT_TIE2) \ -||(n==CANINT_TIE3)||(n==CANINT_FCE)) - -/** Macro to check AFLUT Entry type */ -#define PARAM_AFLUT_ENTRY_TYPE(n) ((n==FULLCAN_ENTRY)||(n==EXPLICIT_STANDARD_ENTRY)\ -||(n==GROUP_STANDARD_ENTRY)||(n==EXPLICIT_EXTEND_ENTRY) \ -||(n==GROUP_EXTEND_ENTRY)) -#define PARAM_POSITION(n) ((n>=0)&&(n<512)) - -/** CAN function pin selection defines */ -#define CAN_RD1_P0_0 ((uint8_t)(0)) -#define CAN_RD1_P0_21 ((uint8_t)(1)) -#define CAN_TD1_P0_1 ((uint8_t)(0)) -#define CAN_TD1_P0_22 ((uint8_t)(1)) - -#define CAN_RD2_P0_4 ((uint8_t)(0)) -#define CAN_RD2_P2_7 ((uint8_t)(1)) -#define CAN_TD2_P0_5 ((uint8_t)(0)) -#define CAN_TD2_P2_8 ((uint8_t)(1)) - - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup CAN_Public_Functions - * @{ - */ - -void CAN_Init(LPC_CAN_TypeDef *CANx, uint32_t baudrate); -void CAN_DeInit(LPC_CAN_TypeDef *CANx); - -Status CAN_SendMsg(LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg); -Status CAN_ReceiveMsg(LPC_CAN_TypeDef *CANx, CAN_MSG_Type *CAN_Msg); -CAN_ERROR FCAN_ReadObj(LPC_CANAF_TypeDef* CANAFx, CAN_MSG_Type *CAN_Msg); - -uint32_t CAN_GetCTRLStatus(LPC_CAN_TypeDef* CANx, CAN_CTRL_STS_Type arg); -uint32_t CAN_GetCRStatus(LPC_CANCR_TypeDef* CANCRx, CAN_CR_STS_Type arg); -void CAN_ModeConfig(LPC_CAN_TypeDef* CANx, CAN_MODE_Type mode, - FunctionalState NewState); -void CAN_SetBaudRate(LPC_CAN_TypeDef *CANx, uint32_t baudrate); - -void CAN_SetAFMode(LPC_CANAF_TypeDef* CANAFx, CAN_AFMODE_Type AFmode); -CAN_ERROR CAN_SetupAFLUT(LPC_CANAF_TypeDef* CANAFx, AF_SectionDef* AFSection); -CAN_ERROR CAN_LoadFullCANEntry(LPC_CAN_TypeDef* CANx, uint16_t ID); -CAN_ERROR CAN_LoadExplicitEntry(LPC_CAN_TypeDef* CANx, uint32_t ID, - CAN_ID_FORMAT_Type format); -CAN_ERROR CAN_LoadGroupEntry(LPC_CAN_TypeDef* CANx, uint32_t lowerID, - uint32_t upperID, CAN_ID_FORMAT_Type format); -CAN_ERROR CAN_RemoveEntry(AFLUT_ENTRY_Type EntryType, uint16_t position); - -void CAN_SetupCBS(CAN_INT_EN_Type arg, fnCANCbs_Type* pnCANCbs); -void CAN_IRQCmd(LPC_CAN_TypeDef* CANx, CAN_INT_EN_Type arg, - FunctionalState NewState); -void CAN_IntHandler(LPC_CAN_TypeDef* CANx); - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_CAN_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_clkpwr.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_clkpwr.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_clkpwr.h +++ /dev/null @@ -1,384 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_clkpwr.h - * @brief : Contains all macro definitions and function prototypes - * support for Clock and Power Control firmware library on LPC17xx - * @version : 1.0 - * @date : 18. Mar. 2009 - * @author : HieuNguyen - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup CLKPWR - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_CLKPWR_H_ -#define LPC17XX_CLKPWR_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc17xx.h" -#include "lpc_types.h" - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup CLKPWR_Private_Macros - * @{ - */ - -/** @defgroup CLKPPWR_REGISTER_BIT_DEFINITIONS - * @{ - */ - -/* Clock source selection multiplexer definition */ -/** Internal RC oscillator */ -#define CLKPWR_CLKSRCSEL_CLKSRC_IRC ((uint32_t)(0x00)) -/** Main oscillator */ -#define CLKPWR_CLKSRCSEL_CLKSRC_MAINOSC ((uint32_t)(0x01)) -/** RTC oscillator */ -#define CLKPWR_CLKSRCSEL_CLKSRC_RTC ((uint32_t)(0x02)) -/** Clock source selection bit mask */ -#define CLKPWR_CLKSRCSEL_BITMASK ((uint32_t)(0x03)) - - -/* Clock Output Configuration register definition */ -/** Selects the CPU clock as the CLKOUT source */ -#define CLKPWR_CLKOUTCFG_CLKOUTSEL_CPU ((uint32_t)(0x00)) -/** Selects the main oscillator as the CLKOUT source */ -#define CLKPWR_CLKOUTCFG_CLKOUTSEL_MAINOSC ((uint32_t)(0x01)) -/** Selects the Internal RC oscillator as the CLKOUT source */ -#define CLKPWR_CLKOUTCFG_CLKOUTSEL_RC ((uint32_t)(0x02)) -/** Selects the USB clock as the CLKOUT source */ -#define CLKPWR_CLKOUTCFG_CLKOUTSEL_USB ((uint32_t)(0x03)) -/** Selects the RTC oscillator as the CLKOUT source */ -#define CLKPWR_CLKOUTCFG_CLKOUTSEL_RTC ((uint32_t)(0x04)) -/** Integer value to divide the output clock by, minus one */ -#define CLKPWR_CLKOUTCFG_CLKOUTDIV(n) ((uint32_t)((n&0x0F)<<4)) -/** CLKOUT enable control */ -#define CLKPWR_CLKOUTCFG_CLKOUT_EN ((uint32_t)(1<<8)) -/** CLKOUT activity indication */ -#define CLKPWR_CLKOUTCFG_CLKOUT_ACT ((uint32_t)(1<<9)) -/** Clock source selection bit mask */ -#define CLKPWR_CLKOUTCFG_BITMASK ((uint32_t)(0x3FF)) - - -/* PLL 0 control definition */ -/** PLL 0 control enable */ -#define CLKPWR_PLL0CON_ENABLE ((uint32_t)(0x01)) -/** PLL 0 control connect */ -#define CLKPWR_PLL0CON_CONNECT ((uint32_t)(0x02)) -/** PLL 0 control bit mask */ -#define CLKPWR_PLL0CON_BITMASK ((uint32_t)(0x03)) - - -/* PLL 0 Configuration register definition */ -/** PLL 0 Configuration MSEL field */ -#define CLKPWR_PLL0CFG_MSEL(n) ((uint32_t)(n&0x7FFF)) -/** PLL 0 Configuration NSEL field */ -#define CLKPWR_PLL0CFG_NSEL(n) ((uint32_t)((n<<16)&0xFF0000)) -/** PLL 0 Configuration bit mask */ -#define CLKPWR_PLL0CFG_BITMASK ((uint32_t)(0xFF7FFF)) - - -/* PLL 0 status definition */ -/** PLL 0 MSEL value */ -#define CLKPWR_PLL0STAT_MSEL(n) ((uint32_t)(n&0x7FFF)) -/** PLL NSEL get value */ -#define CLKPWR_PLL0STAT_NSEL(n) ((uint32_t)((n>>16)&0xFF)) -/** PLL status enable bit */ -#define CLKPWR_PLL0STAT_PLLE ((uint32_t)(1<<24)) -/** PLL status Connect bit */ -#define CLKPWR_PLL0STAT_PLLC ((uint32_t)(1<<25)) -/** PLL status lock */ -#define CLKPWR_PLL0STAT_PLOCK ((uint32_t)(1<<26)) - - -/* PLL0 Feed register definition */ -/** PLL0 Feed bit mask */ -#define CLKPWR_PLL0FEED_BITMASK ((uint32_t)0xFF) - - -/* USB PLL control definition */ -/** USB PLL control enable */ -#define CLKPWR_PLL1CON_ENABLE ((uint32_t)(0x01)) -/** USB PLL control connect */ -#define CLKPWR_PLL1CON_CONNECT ((uint32_t)(0x02)) -/** USB PLL control bit mask */ -#define CLKPWR_PLL1CON_BITMASK ((uint32_t)(0x03)) - - -/* USB PLL configuration definition */ -/** USB PLL MSEL set value */ -#define CLKPWR_PLL1CFG_MSEL(n) ((uint32_t)(n&0x1F)) -/** USB PLL PSEL set value */ -#define CLKPWR_PLL1CFG_PSEL(n) ((uint32_t)((n&0x03)<<5)) -/** USB PLL configuration bit mask */ -#define CLKPWR_PLL1CFG_BITMASK ((uint32_t)(0x7F)) - - -/* USB PLL status definition */ -/** USB PLL MSEL get value */ -#define CLKPWR_PLL1STAT_MSEL(n) ((uint32_t)(n&0x1F)) -/** USB PLL PSEL get value */ -#define CLKPWR_PLL1STAT_PSEL(n) ((uint32_t)((n>>5)&0x03)) -/** USB PLL status enable bit */ -#define CLKPWR_PLL1STAT_PLLE ((uint32_t)(1<<8)) -/** USB PLL status Connect bit */ -#define CLKPWR_PLL1STAT_PLLC ((uint32_t)(1<<9)) -/** USB PLL status lock */ -#define CLKPWR_PLL1STAT_PLOCK ((uint32_t)(1<<10)) - - -/* PLL1 Feed register definition */ -/** PLL1 Feed bit mask */ -#define CLKPWR_PLL1FEED_BITMASK ((uint32_t)0xFF) - - -/* CPU Clock Configuration register definition */ -/** CPU Clock configuration bit mask */ -#define CLKPWR_CCLKCFG_BITMASK ((uint32_t)(0xFF)) - -/* USB Clock Configuration register definition */ -/** USB Clock Configuration bit mask */ -#define CLKPWR_USBCLKCFG_BITMASK ((uint32_t)(0x0F)) - -/* IRC Trim register definition */ -/** IRC Trim bit mask */ -#define CLKPWR_IRCTRIM_BITMASK ((uint32_t)(0x0F)) - - -/* Peripheral clock divider bit position definition */ -/** Peripheral Clock Selection 0 mask bit */ -#define CLKPWR_PCLKSEL0_BITMASK ((uint32_t)(0xFFF3F3FF)) -/** Peripheral Clock Selection 1 mask bit */ -#define CLKPWR_PCLKSEL1_BITMASK ((uint32_t)(0xFCF3F0F3)) - - -/** Macro to set peripheral clock of each type - * p: position of two bits that hold divider of peripheral clock - * n: value of divider of peripheral clock to be set */ -#define CLKPWR_PCLKSEL_SET(p,n) _SBF(p,n) -/** Macro to mask peripheral clock of each type */ -#define CLKPWR_PCLKSEL_BITMASK(p) _SBF(p,0x03) -/** Macro to get peripheral clock of each type */ -#define CLKPWR_PCLKSEL_GET(p, n) ((uint32_t)((n>>p)&0x03)) - - -/* Power Mode Control register definition */ -/** Power mode control bit 0 */ -#define CLKPWR_PCON_PM0 ((uint32_t)(1<<0)) -/** Power mode control bit 1 */ -#define CLKPWR_PCON_PM1 ((uint32_t)(1<<1)) -/** Brown-Out Reduced Power Mode */ -#define CLKPWR_PCON_BODPDM ((uint32_t)(1<<2)) -/** Brown-Out Global Disable */ -#define CLKPWR_PCON_BOGD ((uint32_t)(1<<3)) -/** Brown Out Reset Disable */ -#define CLKPWR_PCON_BORD ((uint32_t)(1<<4)) -/** Sleep Mode entry flag */ -#define CLKPWR_PCON_SMFLAG ((uint32_t)(1<<8)) -/** Deep Sleep entry flag */ -#define CLKPWR_PCON_DSFLAG ((uint32_t)(1<<9)) -/** Power-down entry flag */ -#define CLKPWR_PCON_PDFLAG ((uint32_t)(1<<10)) -/** Deep Power-down entry flag */ -#define CLKPWR_PCON_DPDFLAG ((uint32_t)(1<<11)) - - -/** Power Control for Peripherals bit mask */ -#define CLKPWR_PCONP_BITMASK 0xEFEFF7DE - -/** - * @} - */ - -/** - * @} - */ - - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup CLKPWR_Public_Macros - * @{ - */ - -/********************************************************************** - * Peripheral Clock Selection Definitions - **********************************************************************/ -/** Peripheral clock divider bit position for WDT */ -#define CLKPWR_PCLKSEL_WDT ((uint32_t)(0)) -/** Peripheral clock divider bit position for TIMER0 */ -#define CLKPWR_PCLKSEL_TIMER0 ((uint32_t)(2)) -/** Peripheral clock divider bit position for TIMER1 */ -#define CLKPWR_PCLKSEL_TIMER1 ((uint32_t)(4)) -/** Peripheral clock divider bit position for UART0 */ -#define CLKPWR_PCLKSEL_UART0 ((uint32_t)(6)) -/** Peripheral clock divider bit position for UART1 */ -#define CLKPWR_PCLKSEL_UART1 ((uint32_t)(8)) -/** Peripheral clock divider bit position for PWM1 */ -#define CLKPWR_PCLKSEL_PWM1 ((uint32_t)(12)) -/** Peripheral clock divider bit position for I2C0 */ -#define CLKPWR_PCLKSEL_I2C0 ((uint32_t)(14)) -/** Peripheral clock divider bit position for SPI */ -#define CLKPWR_PCLKSEL_SPI ((uint32_t)(16)) -/** Peripheral clock divider bit position for SSP1 */ -#define CLKPWR_PCLKSEL_SSP1 ((uint32_t)(20)) -/** Peripheral clock divider bit position for DAC */ -#define CLKPWR_PCLKSEL_DAC ((uint32_t)(22)) -/** Peripheral clock divider bit position for ADC */ -#define CLKPWR_PCLKSEL_ADC ((uint32_t)(24)) -/** Peripheral clock divider bit position for CAN1 */ -#define CLKPWR_PCLKSEL_CAN1 ((uint32_t)(26)) -/** Peripheral clock divider bit position for CAN2 */ -#define CLKPWR_PCLKSEL_CAN2 ((uint32_t)(28)) -/** Peripheral clock divider bit position for ACF */ -#define CLKPWR_PCLKSEL_ACF ((uint32_t)(30)) -/** Peripheral clock divider bit position for QEI */ -#define CLKPWR_PCLKSEL_QEI ((uint32_t)(32)) -/** Peripheral clock divider bit position for PCB */ -#define CLKPWR_PCLKSEL_PCB ((uint32_t)(36)) -/** Peripheral clock divider bit position for I2C1 */ -#define CLKPWR_PCLKSEL_I2C1 ((uint32_t)(38)) -/** Peripheral clock divider bit position for SSP0 */ -#define CLKPWR_PCLKSEL_SSP0 ((uint32_t)(42)) -/** Peripheral clock divider bit position for TIMER2 */ -#define CLKPWR_PCLKSEL_TIMER2 ((uint32_t)(44)) -/** Peripheral clock divider bit position for TIMER3 */ -#define CLKPWR_PCLKSEL_TIMER3 ((uint32_t)(46)) -/** Peripheral clock divider bit position for UART2 */ -#define CLKPWR_PCLKSEL_UART2 ((uint32_t)(48)) -/** Peripheral clock divider bit position for UART3 */ -#define CLKPWR_PCLKSEL_UART3 ((uint32_t)(50)) -/** Peripheral clock divider bit position for I2C2 */ -#define CLKPWR_PCLKSEL_I2C2 ((uint32_t)(52)) -/** Peripheral clock divider bit position for I2S */ -#define CLKPWR_PCLKSEL_I2S ((uint32_t)(54)) -/** Peripheral clock divider bit position for RIT */ -#define CLKPWR_PCLKSEL_RIT ((uint32_t)(58)) -/** Peripheral clock divider bit position for SYSCON */ -#define CLKPWR_PCLKSEL_SYSCON ((uint32_t)(60)) -/** Peripheral clock divider bit position for MC */ -#define CLKPWR_PCLKSEL_MC ((uint32_t)(62)) - -/** Macro for Peripheral Clock Selection register bit values - * Note: When CCLK_DIV_8, Peripheral�s clock is selected to - * PCLK_xyz = CCLK/8 except for CAN1, CAN2, and CAN filtering - * when �11�selects PCLK_xyz = CCLK/6 */ -/* Peripheral clock divider is set to 4 from CCLK */ -#define CLKPWR_PCLKSEL_CCLK_DIV_4 ((uint32_t)(0)) -/** Peripheral clock divider is the same with CCLK */ -#define CLKPWR_PCLKSEL_CCLK_DIV_1 ((uint32_t)(1)) -/** Peripheral clock divider is set to 2 from CCLK */ -#define CLKPWR_PCLKSEL_CCLK_DIV_2 ((uint32_t)(2)) - - -/******************************************************************** -* Power Control for Peripherals Definitions -**********************************************************************/ -/** Timer/Counter 0 power/clock control bit */ -#define CLKPWR_PCONP_PCTIM0 ((uint32_t)(1<<1)) -/* Timer/Counter 1 power/clock control bit */ -#define CLKPWR_PCONP_PCTIM1 ((uint32_t)(1<<2)) -/** UART0 power/clock control bit */ -#define CLKPWR_PCONP_PCUART0 ((uint32_t)(1<<3)) -/** UART1 power/clock control bit */ -#define CLKPWR_PCONP_PCUART1 ((uint32_t)(1<<4)) -/** PWM1 power/clock control bit */ -#define CLKPWR_PCONP_PCPWM1 ((uint32_t)(1<<6)) -/** The I2C0 interface power/clock control bit */ -#define CLKPWR_PCONP_PCI2C0 ((uint32_t)(1<<7)) -/** The SPI interface power/clock control bit */ -#define CLKPWR_PCONP_PCSPI ((uint32_t)(1<<8)) -/** The RTC power/clock control bit */ -#define CLKPWR_PCONP_PCRTC ((uint32_t)(1<<9)) -/** The SSP1 interface power/clock control bit */ -#define CLKPWR_PCONP_PCSSP1 ((uint32_t)(1<<10)) -/** A/D converter 0 (ADC0) power/clock control bit */ -#define CLKPWR_PCONP_PCAD ((uint32_t)(1<<12)) -/** CAN Controller 1 power/clock control bit */ -#define CLKPWR_PCONP_PCAN1 ((uint32_t)(1<<13)) -/** CAN Controller 2 power/clock control bit */ -#define CLKPWR_PCONP_PCAN2 ((uint32_t)(1<<14)) -/** GPIO power/clock control bit */ -#define CLKPWR_PCONP_PCGPIO ((uint32_t)(1<<15)) -/** Repetitive Interrupt Timer power/clock control bit */ -#define CLKPWR_PCONP_PCRIT ((uint32_t)(1<<16)) -/** Motor Control PWM */ -#define CLKPWR_PCONP_PCMC ((uint32_t)(1<<17)) -/** Quadrature Encoder Interface power/clock control bit */ -#define CLKPWR_PCONP_PCQEI ((uint32_t)(1<<18)) -/** The I2C1 interface power/clock control bit */ -#define CLKPWR_PCONP_PCI2C1 ((uint32_t)(1<<19)) -/** The SSP0 interface power/clock control bit */ -#define CLKPWR_PCONP_PCSSP0 ((uint32_t)(1<<21)) -/** Timer 2 power/clock control bit */ -#define CLKPWR_PCONP_PCTIM2 ((uint32_t)(1<<22)) -/** Timer 3 power/clock control bit */ -#define CLKPWR_PCONP_PCTIM3 ((uint32_t)(1<<23)) -/** UART 2 power/clock control bit */ -#define CLKPWR_PCONP_PCUART2 ((uint32_t)(1<<24)) -/** UART 3 power/clock control bit */ -#define CLKPWR_PCONP_PCUART3 ((uint32_t)(1<<25)) -/** I2C interface 2 power/clock control bit */ -#define CLKPWR_PCONP_PCI2C2 ((uint32_t)(1<<26)) -/** I2S interface power/clock control bit*/ -#define CLKPWR_PCONP_PCI2S ((uint32_t)(1<<27)) -/** GP DMA function power/clock control bit*/ -#define CLKPWR_PCONP_PCGPDMA ((uint32_t)(1<<29)) -/** Ethernet block power/clock control bit*/ -#define CLKPWR_PCONP_PCENET ((uint32_t)(1<<30)) -/** USB interface power/clock control bit*/ -#define CLKPWR_PCONP_PCUSB ((uint32_t)(1<<31)) - - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup CLKPWR_Public_Functions - * @{ - */ - -void CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal); -uint32_t CLKPWR_GetPCLKSEL (uint32_t ClkType); -uint32_t CLKPWR_GetPCLK (uint32_t ClkType); -void CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState); -void CLKPWR_Sleep(void); -void CLKPWR_DeepSleep(void); -void CLKPWR_PowerDown(void); -void CLKPWR_DeepPowerDown(void); - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_CLKPWR_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_dac.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_dac.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_dac.h +++ /dev/null @@ -1,144 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_dac.h - * @brief : Contains all macro definitions and function prototypes - * support for DAC firmware library on LPC17xx - * @version : 1.0 - * @date : 3. April. 2009 - * @author : HieuNguyen - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup DAC - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_DAC_H_ -#define LPC17XX_DAC_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup DAC_Public_Types - * @{ - */ - -/** - * @brief Current option in ADC confuration option */ -typedef enum -{ - DAC_MAX_CURRENT_700uA = 0, /*!< The settling time of the DAC is 1 us max, - and the maximum current is 700 uA */ - DAC_MAX_CURRENT_350uA /*!< The settling time of the DAC is 2.5 us - and the maximum current is 350 uA */ -} DAC_CURRENT_OPT; -#define PARAM_DAC_CURRENT_OPT(OPTION) ((OPTION == DAC_MAX_CURRENT_700uA)\ -||(OPTION == DAC_MAX_CURRENT_350uA)) - -/** - * @brief Configuration for DA converter control register */ -typedef struct -{ - - uint8_t DBLBUF_ENA; /**< - -0: Disable DACR double buffering - -1: when bit CNT_ENA, enable DACR double buffering feature - */ - uint8_t CNT_ENA; /*!< - -0: Time out counter is disable - -1: Time out conter is enable - */ - uint8_t DMA_ENA; /*!< - -0: DMA access is disable - -1: DMA burst request - */ - uint8_t RESERVED; - -} DAC_CONVERTER_CFG_Type; - -/** - * @} - */ - - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup DAC_Public_Macros - * @{ - */ - -/** After the selected settling time after this field is written with a -new VALUE, the voltage on the AOUT pin (with respect to VSSA) -is VALUE/1024 � VREF */ -#define DAC_VALUE(n) ((uint32_t)((n&0x3FF)<<6)) -/** If this bit = 0: The settling time of the DAC is 1 microsecond max, - * and the maximum current is 700 microAmpere - * If this bit = 1: The settling time of the DAC is 2.5 microsecond - * and the maximum current is 350 microAmpere */ -#define DAC_BIAS_EN ((uint32_t)(1<<16)) -/** Value to reload interrupt DMA counter */ -#define DAC_CCNT_VALUE(n) ((uint32_t)(n&0xff)) - -/** DCAR double buffering */ -#define DAC_DBLBUF_ENA ((uint32_t)(1<<1)) -/** DCAR Time out count enable */ -#define DAC_CNT_ENA ((uint32_t)(1<<2)) -/** DCAR DMA access */ -#define DAC_DMA_ENA ((uint32_t)(1<<3)) -/** DCAR DACCTRL mask bit */ -#define DAC_DACCTRL_MASK ((uint32_t)(0x0F)) - -/** Macro to determine if it is valid DAC peripheral */ -#define PARAM_DACx(n) (((uint32_t *)n)==((uint32_t *)LPC_DAC)) - -/** - * @} - */ - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup DAC_Public_Functions - * @{ - */ - -void DAC_Init(LPC_DAC_TypeDef *DACx); -void DAC_UpdateValue (LPC_DAC_TypeDef *DACx, uint32_t dac_value); -void DAC_SetBias (LPC_DAC_TypeDef *DACx,uint32_t bias); -void DAC_ConfigDAConverterControl (LPC_DAC_TypeDef *DACx,DAC_CONVERTER_CFG_Type *DAC_ConverterConfigStruct); -void DAC_SetDMATimeOut(LPC_DAC_TypeDef *DACx,uint32_t time_out); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* LPC17XX_DAC_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ - diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_emac.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_emac.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_emac.h +++ /dev/null @@ -1,582 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_emac.h - * @brief : Contains all macro definitions and function prototypes - * support for Ethernet MAC firmware library on LPC17xx - * @version : 1.0 - * @date : 02. Jun. 2009 - * @author : HieuNguyen - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup EMAC - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_EMAC_H_ -#define LPC17XX_EMAC_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup EMAC_Private_Macros - * @{ - */ - - -/** @defgroup EMAC_REGISTER_BIT_DEFINITIONS - * @{ - */ - - -/* EMAC Memory Buffer configuration for 16K Ethernet RAM */ -#define EMAC_NUM_RX_FRAG 4 /**< Num.of RX Fragments 4*1536= 6.0kB */ -#define EMAC_NUM_TX_FRAG 3 /**< Num.of TX Fragments 3*1536= 4.6kB */ -#define EMAC_ETH_MAX_FLEN 1536 /**< Max. Ethernet Frame Size */ -#define EMAC_TX_FRAME_TOUT 0x00100000 /**< Frame Transmit timeout count */ - -/* Ethernet MAC register definitions --------------------------------------------------------------------- */ -/* MAC Configuration Register 1 */ -#define EMAC_MAC1_REC_EN 0x00000001 /**< Receive Enable */ -#define EMAC_MAC1_PASS_ALL 0x00000002 /**< Pass All Receive Frames */ -#define EMAC_MAC1_RX_FLOWC 0x00000004 /**< RX Flow Control */ -#define EMAC_MAC1_TX_FLOWC 0x00000008 /**< TX Flow Control */ -#define EMAC_MAC1_LOOPB 0x00000010 /**< Loop Back Mode */ -#define EMAC_MAC1_RES_TX 0x00000100 /**< Reset TX Logic */ -#define EMAC_MAC1_RES_MCS_TX 0x00000200 /**< Reset MAC TX Control Sublayer */ -#define EMAC_MAC1_RES_RX 0x00000400 /**< Reset RX Logic */ -#define EMAC_MAC1_RES_MCS_RX 0x00000800 /**< Reset MAC RX Control Sublayer */ -#define EMAC_MAC1_SIM_RES 0x00004000 /**< Simulation Reset */ -#define EMAC_MAC1_SOFT_RES 0x00008000 /**< Soft Reset MAC */ - -/* MAC Configuration Register 2 */ -#define EMAC_MAC2_FULL_DUP 0x00000001 /**< Full-Duplex Mode */ -#define EMAC_MAC2_FRM_LEN_CHK 0x00000002 /**< Frame Length Checking */ -#define EMAC_MAC2_HUGE_FRM_EN 0x00000004 /**< Huge Frame Enable */ -#define EMAC_MAC2_DLY_CRC 0x00000008 /**< Delayed CRC Mode */ -#define EMAC_MAC2_CRC_EN 0x00000010 /**< Append CRC to every Frame */ -#define EMAC_MAC2_PAD_EN 0x00000020 /**< Pad all Short Frames */ -#define EMAC_MAC2_VLAN_PAD_EN 0x00000040 /**< VLAN Pad Enable */ -#define EMAC_MAC2_ADET_PAD_EN 0x00000080 /**< Auto Detect Pad Enable */ -#define EMAC_MAC2_PPREAM_ENF 0x00000100 /**< Pure Preamble Enforcement */ -#define EMAC_MAC2_LPREAM_ENF 0x00000200 /**< Long Preamble Enforcement */ -#define EMAC_MAC2_NO_BACKOFF 0x00001000 /**< No Backoff Algorithm */ -#define EMAC_MAC2_BACK_PRESSURE 0x00002000 /**< Backoff Presurre / No Backoff */ -#define EMAC_MAC2_EXCESS_DEF 0x00004000 /**< Excess Defer */ - -/* Back-to-Back Inter-Packet-Gap Register */ -/** Programmable field representing the nibble time offset of the minimum possible period - * between the end of any transmitted packet to the beginning of the next */ -#define EMAC_IPGT_BBIPG(n) (n&0x7F) -/** Recommended value for Full Duplex of Programmable field representing the nibble time - * offset of the minimum possible period between the end of any transmitted packet to the - * beginning of the next */ -#define EMAC_IPGT_FULL_DUP (EMAC_IPGT_BBIPG(0x15)) -/** Recommended value for Half Duplex of Programmable field representing the nibble time - * offset of the minimum possible period between the end of any transmitted packet to the - * beginning of the next */ -#define EMAC_IPGT_HALF_DUP (EMAC_IPGT_BBIPG(0x12)) - -/* Non Back-to-Back Inter-Packet-Gap Register */ -/** Programmable field representing the Non-Back-to-Back Inter-Packet-Gap */ -#define EMAC_IPGR_NBBIPG_P2(n) (n&0x7F) -/** Recommended value for Programmable field representing the Non-Back-to-Back Inter-Packet-Gap Part 1 */ -#define EMAC_IPGR_P2_DEF (EMAC_IPGR_NBBIPG_P2(0x12)) -/** Programmable field representing the optional carrierSense window referenced in - * IEEE 802.3/4.2.3.2.1 'Carrier Deference' */ -#define EMAC_IPGR_NBBIPG_P1(n) ((n&0x7F)<<8) -/** Recommended value for Programmable field representing the Non-Back-to-Back Inter-Packet-Gap Part 2 */ -#define EMAC_IPGR_P1_DEF EMAC_IPGR_NBBIPG_P1(0x0C) - -/* Collision Window/Retry Register */ -/** Programmable field specifying the number of retransmission attempts following a collision before - * aborting the packet due to excessive collisions */ -#define EMAC_CLRT_MAX_RETX(n) (n&0x0F) -/** Programmable field representing the slot time or collision window during which collisions occur - * in properly configured networks */ -#define EMAC_CLRT_COLL(n) ((n&0x3F)<<8) -/** Default value for Collision Window / Retry register */ -#define EMAC_CLRT_DEF ((EMAC_CLRT_MAX_RETX(0x0F))|(EMAC_CLRT_COLL(0x37))) - -/* Maximum Frame Register */ -/** Represents a maximum receive frame of 1536 octets */ -#define EMAC_MAXF_MAXFRMLEN(n) (n&0xFFFF) - -/* PHY Support Register */ -#define EMAC_SUPP_SPEED 0x00000100 /**< Reduced MII Logic Current Speed */ -#define EMAC_SUPP_RES_RMII 0x00000800 /**< Reset Reduced MII Logic */ - -/* Test Register */ -#define EMAC_TEST_SHCUT_PQUANTA 0x00000001 /**< Shortcut Pause Quanta */ -#define EMAC_TEST_TST_PAUSE 0x00000002 /**< Test Pause */ -#define EMAC_TEST_TST_BACKP 0x00000004 /**< Test Back Pressure */ - -/* MII Management Configuration Register */ -#define EMAC_MCFG_SCAN_INC 0x00000001 /**< Scan Increment PHY Address */ -#define EMAC_MCFG_SUPP_PREAM 0x00000002 /**< Suppress Preamble */ -#define EMAC_MCFG_CLK_SEL(n) ((n&0x0F)<<2) /**< Clock Select Field */ -#define EMAC_MCFG_RES_MII 0x00008000 /**< Reset MII Management Hardware */ -#define EMAC_MCFG_MII_MAXCLK 2500000UL /**< MII Clock max */ - -/* MII Management Command Register */ -#define EMAC_MCMD_READ 0x00000001 /**< MII Read */ -#define EMAC_MCMD_SCAN 0x00000002 /**< MII Scan continuously */ - -#define EMAC_MII_WR_TOUT 0x00050000 /**< MII Write timeout count */ -#define EMAC_MII_RD_TOUT 0x00050000 /**< MII Read timeout count */ - -/* MII Management Address Register */ -#define EMAC_MADR_REG_ADR(n) (n&0x1F) /**< MII Register Address field */ -#define EMAC_MADR_PHY_ADR(n) ((n&0x1F)<<8) /**< PHY Address Field */ - -/* MII Management Write Data Register */ -#define EMAC_MWTD_DATA(n) (n&0xFFFF) /**< Data field for MMI Management Write Data register */ - -/* MII Management Read Data Register */ -#define EMAC_MRDD_DATA(n) (n&0xFFFF) /**< Data field for MMI Management Read Data register */ - -/* MII Management Indicators Register */ -#define EMAC_MIND_BUSY 0x00000001 /**< MII is Busy */ -#define EMAC_MIND_SCAN 0x00000002 /**< MII Scanning in Progress */ -#define EMAC_MIND_NOT_VAL 0x00000004 /**< MII Read Data not valid */ -#define EMAC_MIND_MII_LINK_FAIL 0x00000008 /**< MII Link Failed */ - -/* Station Address 0 Register */ -/* Station Address 1 Register */ -/* Station Address 2 Register */ - - -/* Control register definitions --------------------------------------------------------------------------- */ -/* Command Register */ -#define EMAC_CR_RX_EN 0x00000001 /**< Enable Receive */ -#define EMAC_CR_TX_EN 0x00000002 /**< Enable Transmit */ -#define EMAC_CR_REG_RES 0x00000008 /**< Reset Host Registers */ -#define EMAC_CR_TX_RES 0x00000010 /**< Reset Transmit Datapath */ -#define EMAC_CR_RX_RES 0x00000020 /**< Reset Receive Datapath */ -#define EMAC_CR_PASS_RUNT_FRM 0x00000040 /**< Pass Runt Frames */ -#define EMAC_CR_PASS_RX_FILT 0x00000080 /**< Pass RX Filter */ -#define EMAC_CR_TX_FLOW_CTRL 0x00000100 /**< TX Flow Control */ -#define EMAC_CR_RMII 0x00000200 /**< Reduced MII Interface */ -#define EMAC_CR_FULL_DUP 0x00000400 /**< Full Duplex */ - -/* Status Register */ -#define EMAC_SR_RX_EN 0x00000001 /**< Enable Receive */ -#define EMAC_SR_TX_EN 0x00000002 /**< Enable Transmit */ - -/* Receive Descriptor Base Address Register */ -// - -/* Receive Status Base Address Register */ -// - -/* Receive Number of Descriptors Register */ -// - -/* Receive Produce Index Register */ -// - -/* Receive Consume Index Register */ -// - -/* Transmit Descriptor Base Address Register */ -// - -/* Transmit Status Base Address Register */ -// - -/* Transmit Number of Descriptors Register */ -// - -/* Transmit Produce Index Register */ -// - -/* Transmit Consume Index Register */ -// - -/* Transmit Status Vector 0 Register */ -#define EMAC_TSV0_CRC_ERR 0x00000001 /**< CRC error */ -#define EMAC_TSV0_LEN_CHKERR 0x00000002 /**< Length Check Error */ -#define EMAC_TSV0_LEN_OUTRNG 0x00000004 /**< Length Out of Range */ -#define EMAC_TSV0_DONE 0x00000008 /**< Tramsmission Completed */ -#define EMAC_TSV0_MCAST 0x00000010 /**< Multicast Destination */ -#define EMAC_TSV0_BCAST 0x00000020 /**< Broadcast Destination */ -#define EMAC_TSV0_PKT_DEFER 0x00000040 /**< Packet Deferred */ -#define EMAC_TSV0_EXC_DEFER 0x00000080 /**< Excessive Packet Deferral */ -#define EMAC_TSV0_EXC_COLL 0x00000100 /**< Excessive Collision */ -#define EMAC_TSV0_LATE_COLL 0x00000200 /**< Late Collision Occured */ -#define EMAC_TSV0_GIANT 0x00000400 /**< Giant Frame */ -#define EMAC_TSV0_UNDERRUN 0x00000800 /**< Buffer Underrun */ -#define EMAC_TSV0_BYTES 0x0FFFF000 /**< Total Bytes Transferred */ -#define EMAC_TSV0_CTRL_FRAME 0x10000000 /**< Control Frame */ -#define EMAC_TSV0_PAUSE 0x20000000 /**< Pause Frame */ -#define EMAC_TSV0_BACK_PRESS 0x40000000 /**< Backpressure Method Applied */ -#define EMAC_TSV0_VLAN 0x80000000 /**< VLAN Frame */ - -/* Transmit Status Vector 1 Register */ -#define EMAC_TSV1_BYTE_CNT 0x0000FFFF /**< Transmit Byte Count */ -#define EMAC_TSV1_COLL_CNT 0x000F0000 /**< Transmit Collision Count */ - -/* Receive Status Vector Register */ -#define EMAC_RSV_BYTE_CNT 0x0000FFFF /**< Receive Byte Count */ -#define EMAC_RSV_PKT_IGNORED 0x00010000 /**< Packet Previously Ignored */ -#define EMAC_RSV_RXDV_SEEN 0x00020000 /**< RXDV Event Previously Seen */ -#define EMAC_RSV_CARR_SEEN 0x00040000 /**< Carrier Event Previously Seen */ -#define EMAC_RSV_REC_CODEV 0x00080000 /**< Receive Code Violation */ -#define EMAC_RSV_CRC_ERR 0x00100000 /**< CRC Error */ -#define EMAC_RSV_LEN_CHKERR 0x00200000 /**< Length Check Error */ -#define EMAC_RSV_LEN_OUTRNG 0x00400000 /**< Length Out of Range */ -#define EMAC_RSV_REC_OK 0x00800000 /**< Frame Received OK */ -#define EMAC_RSV_MCAST 0x01000000 /**< Multicast Frame */ -#define EMAC_RSV_BCAST 0x02000000 /**< Broadcast Frame */ -#define EMAC_RSV_DRIB_NIBB 0x04000000 /**< Dribble Nibble */ -#define EMAC_RSV_CTRL_FRAME 0x08000000 /**< Control Frame */ -#define EMAC_RSV_PAUSE 0x10000000 /**< Pause Frame */ -#define EMAC_RSV_UNSUPP_OPC 0x20000000 /**< Unsupported Opcode */ -#define EMAC_RSV_VLAN 0x40000000 /**< VLAN Frame */ - -/* Flow Control Counter Register */ -#define EMAC_FCC_MIRR_CNT(n) (n&0xFFFF) /**< Mirror Counter */ -#define EMAC_FCC_PAUSE_TIM(n) ((n&0xFFFF)<<16) /**< Pause Timer */ - -/* Flow Control Status Register */ -#define EMAC_FCS_MIRR_CNT(n) (n&0xFFFF) /**< Mirror Counter Current */ - - -/* Receive filter register definitions -------------------------------------------------------- */ -/* Receive Filter Control Register */ -#define EMAC_RFC_UCAST_EN 0x00000001 /**< Accept Unicast Frames Enable */ -#define EMAC_RFC_BCAST_EN 0x00000002 /**< Accept Broadcast Frames Enable */ -#define EMAC_RFC_MCAST_EN 0x00000004 /**< Accept Multicast Frames Enable */ -#define EMAC_RFC_UCAST_HASH_EN 0x00000008 /**< Accept Unicast Hash Filter Frames */ -#define EMAC_RFC_MCAST_HASH_EN 0x00000010 /**< Accept Multicast Hash Filter Fram.*/ -#define EMAC_RFC_PERFECT_EN 0x00000020 /**< Accept Perfect Match Enable */ -#define EMAC_RFC_MAGP_WOL_EN 0x00001000 /**< Magic Packet Filter WoL Enable */ -#define EMAC_RFC_PFILT_WOL_EN 0x00002000 /**< Perfect Filter WoL Enable */ - -/* Receive Filter WoL Status/Clear Registers */ -#define EMAC_WOL_UCAST 0x00000001 /**< Unicast Frame caused WoL */ -#define EMAC_WOL_BCAST 0x00000002 /**< Broadcast Frame caused WoL */ -#define EMAC_WOL_MCAST 0x00000004 /**< Multicast Frame caused WoL */ -#define EMAC_WOL_UCAST_HASH 0x00000008 /**< Unicast Hash Filter Frame WoL */ -#define EMAC_WOL_MCAST_HASH 0x00000010 /**< Multicast Hash Filter Frame WoL */ -#define EMAC_WOL_PERFECT 0x00000020 /**< Perfect Filter WoL */ -#define EMAC_WOL_RX_FILTER 0x00000080 /**< RX Filter caused WoL */ -#define EMAC_WOL_MAG_PACKET 0x00000100 /**< Magic Packet Filter caused WoL */ -#define EMAC_WOL_BITMASK 0x01BF /**< Receive Filter WoL Status/Clear bitmasl value */ - -/* Hash Filter Table LSBs Register */ -// - -/* Hash Filter Table MSBs Register */ -// - - -/* Module control register definitions ---------------------------------------------------- */ -/* Interrupt Status/Enable/Clear/Set Registers */ -#define EMAC_INT_RX_OVERRUN 0x00000001 /**< Overrun Error in RX Queue */ -#define EMAC_INT_RX_ERR 0x00000002 /**< Receive Error */ -#define EMAC_INT_RX_FIN 0x00000004 /**< RX Finished Process Descriptors */ -#define EMAC_INT_RX_DONE 0x00000008 /**< Receive Done */ -#define EMAC_INT_TX_UNDERRUN 0x00000010 /**< Transmit Underrun */ -#define EMAC_INT_TX_ERR 0x00000020 /**< Transmit Error */ -#define EMAC_INT_TX_FIN 0x00000040 /**< TX Finished Process Descriptors */ -#define EMAC_INT_TX_DONE 0x00000080 /**< Transmit Done */ -#define EMAC_INT_SOFT_INT 0x00001000 /**< Software Triggered Interrupt */ -#define EMAC_INT_WAKEUP 0x00002000 /**< Wakeup Event Interrupt */ - -/* Power Down Register */ -#define EMAC_PD_POWER_DOWN 0x80000000 /**< Power Down MAC */ - -/* RX Descriptor Control Word */ -#define EMAC_RCTRL_SIZE(n) (n&0x7FF) /**< Buffer size field */ -#define EMAC_RCTRL_INT 0x80000000 /**< Generate RxDone Interrupt */ - -/* RX Status Hash CRC Word */ -#define EMAC_RHASH_SA 0x000001FF /**< Hash CRC for Source Address */ -#define EMAC_RHASH_DA 0x001FF000 /**< Hash CRC for Destination Address */ - -/* RX Status Information Word */ -#define EMAC_RINFO_SIZE 0x000007FF /**< Data size in bytes */ -#define EMAC_RINFO_CTRL_FRAME 0x00040000 /**< Control Frame */ -#define EMAC_RINFO_VLAN 0x00080000 /**< VLAN Frame */ -#define EMAC_RINFO_FAIL_FILT 0x00100000 /**< RX Filter Failed */ -#define EMAC_RINFO_MCAST 0x00200000 /**< Multicast Frame */ -#define EMAC_RINFO_BCAST 0x00400000 /**< Broadcast Frame */ -#define EMAC_RINFO_CRC_ERR 0x00800000 /**< CRC Error in Frame */ -#define EMAC_RINFO_SYM_ERR 0x01000000 /**< Symbol Error from PHY */ -#define EMAC_RINFO_LEN_ERR 0x02000000 /**< Length Error */ -#define EMAC_RINFO_RANGE_ERR 0x04000000 /**< Range Error (exceeded max. size) */ -#define EMAC_RINFO_ALIGN_ERR 0x08000000 /**< Alignment Error */ -#define EMAC_RINFO_OVERRUN 0x10000000 /**< Receive overrun */ -#define EMAC_RINFO_NO_DESCR 0x20000000 /**< No new Descriptor available */ -#define EMAC_RINFO_LAST_FLAG 0x40000000 /**< Last Fragment in Frame */ -#define EMAC_RINFO_ERR 0x80000000 /**< Error Occured (OR of all errors) */ - -/** RX Status Information word mask */ -#define EMAC_RINFO_ERR_MASK (EMAC_RINFO_FAIL_FILT | EMAC_RINFO_CRC_ERR | EMAC_RINFO_SYM_ERR | \ -EMAC_RINFO_LEN_ERR | EMAC_RINFO_ALIGN_ERR | EMAC_RINFO_OVERRUN) - -/* TX Descriptor Control Word */ -#define EMAC_TCTRL_SIZE 0x000007FF /**< Size of data buffer in bytes */ -#define EMAC_TCTRL_OVERRIDE 0x04000000 /**< Override Default MAC Registers */ -#define EMAC_TCTRL_HUGE 0x08000000 /**< Enable Huge Frame */ -#define EMAC_TCTRL_PAD 0x10000000 /**< Pad short Frames to 64 bytes */ -#define EMAC_TCTRL_CRC 0x20000000 /**< Append a hardware CRC to Frame */ -#define EMAC_TCTRL_LAST 0x40000000 /**< Last Descriptor for TX Frame */ -#define EMAC_TCTRL_INT 0x80000000 /**< Generate TxDone Interrupt */ - -/* TX Status Information Word */ -#define EMAC_TINFO_COL_CNT 0x01E00000 /**< Collision Count */ -#define EMAC_TINFO_DEFER 0x02000000 /**< Packet Deferred (not an error) */ -#define EMAC_TINFO_EXCESS_DEF 0x04000000 /**< Excessive Deferral */ -#define EMAC_TINFO_EXCESS_COL 0x08000000 /**< Excessive Collision */ -#define EMAC_TINFO_LATE_COL 0x10000000 /**< Late Collision Occured */ -#define EMAC_TINFO_UNDERRUN 0x20000000 /**< Transmit Underrun */ -#define EMAC_TINFO_NO_DESCR 0x40000000 /**< No new Descriptor available */ -#define EMAC_TINFO_ERR 0x80000000 /**< Error Occured (OR of all errors) */ - - -/* DP83848C PHY definition ------------------------------------------------------------ */ - -/** PHY device reset time out definition */ -#define EMAC_PHY_RESP_TOUT 0x100000UL - -/* ENET Device Revision ID */ -#define EMAC_OLD_EMAC_MODULE_ID 0x39022000 /**< Rev. ID for first rev '-' */ - -/* DP83848C PHY Registers */ -#define EMAC_PHY_REG_BMCR 0x00 /**< Basic Mode Control Register */ -#define EMAC_PHY_REG_BMSR 0x01 /**< Basic Mode Status Register */ -#define EMAC_PHY_REG_IDR1 0x02 /**< PHY Identifier 1 */ -#define EMAC_PHY_REG_IDR2 0x03 /**< PHY Identifier 2 */ -#define EMAC_PHY_REG_ANAR 0x04 /**< Auto-Negotiation Advertisement */ -#define EMAC_PHY_REG_ANLPAR 0x05 /**< Auto-Neg. Link Partner Abitily */ -#define EMAC_PHY_REG_ANER 0x06 /**< Auto-Neg. Expansion Register */ -#define EMAC_PHY_REG_ANNPTR 0x07 /**< Auto-Neg. Next Page TX */ -#define EMAC_PHY_REG_LPNPA 0x08 - - -/* PHY Extended Registers */ -#define EMAC_PHY_REG_STS 0x10 /**< Status Register */ -#define EMAC_PHY_REG_MICR 0x11 /**< MII Interrupt Control Register */ -#define EMAC_PHY_REG_MISR 0x12 /**< MII Interrupt Status Register */ -#define EMAC_PHY_REG_FCSCR 0x14 /**< False Carrier Sense Counter */ -#define EMAC_PHY_REG_RECR 0x15 /**< Receive Error Counter */ -#define EMAC_PHY_REG_PCSR 0x16 /**< PCS Sublayer Config. and Status */ -#define EMAC_PHY_REG_RBR 0x17 /**< RMII and Bypass Register */ -#define EMAC_PHY_REG_LEDCR 0x18 /**< LED Direct Control Register */ -#define EMAC_PHY_REG_PHYCR 0x19 /**< PHY Control Register */ -#define EMAC_PHY_REG_10BTSCR 0x1A /**< 10Base-T Status/Control Register */ -#define EMAC_PHY_REG_CDCTRL1 0x1B /**< CD Test Control and BIST Extens. */ -#define EMAC_PHY_REG_EDCR 0x1D /**< Energy Detect Control Register */ - - -/* PHY Basic Mode Control Register (BMCR) bitmap definitions */ -#define EMAC_PHY_BMCR_RESET (1<<15) /**< Reset bit */ -#define EMAC_PHY_BMCR_LOOPBACK (1<<14) /**< Loop back */ -#define EMAC_PHY_BMCR_SPEED_SEL (1<<13) /**< Speed selection */ -#define EMAC_PHY_BMCR_AN (1<<12) /**< Auto Negotiation */ -#define EMAC_PHY_BMCR_POWERDOWN (1<<11) /**< Power down mode */ -#define EMAC_PHY_BMCR_ISOLATE (1<<10) /**< Isolate */ -#define EMAC_PHY_BMCR_RE_AN (1<<9) /**< Restart auto negotiation */ -#define EMAC_PHY_BMCR_DUPLEX (1<<8) /**< Duplex mode */ - -/* PHY Basic Mode Status Status Register (BMSR) bitmap definitions */ -#define EMAC_PHY_BMSR_100BE_T4 (1<<15) /**< 100 base T4 */ -#define EMAC_PHY_BMSR_100TX_FULL (1<<14) /**< 100 base full duplex */ -#define EMAC_PHY_BMSR_100TX_HALF (1<<13) /**< 100 base half duplex */ -#define EMAC_PHY_BMSR_10BE_FULL (1<<12) /**< 10 base T full duplex */ -#define EMAC_PHY_BMSR_10BE_HALF (1<<11) /**< 10 base T half duplex */ -#define EMAC_PHY_BMSR_NOPREAM (1<<6) /**< MF Preamable Supress */ -#define EMAC_PHY_BMSR_AUTO_DONE (1<<5) /**< Auto negotiation complete */ -#define EMAC_PHY_BMSR_REMOTE_FAULT (1<<4) /**< Remote fault */ -#define EMAC_PHY_BMSR_NO_AUTO (1<<3) /**< Auto Negotiation ability */ -#define EMAC_PHY_BMSR_LINK_ESTABLISHED (1<<2) /**< Link status */ - -/* PHY Status Register bitmap definitions */ -#define EMAC_PHY_SR_REMOTE_FAULT (1<<6) /**< Remote Fault */ -#define EMAC_PHY_SR_JABBER (1<<5) /**< Jabber detect */ -#define EMAC_PHY_SR_AUTO_DONE (1<<4) /**< Auto Negotiation complete */ -#define EMAC_PHY_SR_LOOPBACK (1<<3) /**< Loop back status */ -#define EMAC_PHY_SR_DUP (1<<2) /**< Duplex status */ -#define EMAC_PHY_SR_SPEED (1<<1) /**< Speed status */ -#define EMAC_PHY_SR_LINK (1<<0) /**< Link Status */ - - -#define EMAC_PHY_FULLD_100M 0x2100 /**< Full Duplex 100Mbit */ -#define EMAC_PHY_HALFD_100M 0x2000 /**< Half Duplex 100Mbit */ -#define EMAC_PHY_FULLD_10M 0x0100 /**< Full Duplex 10Mbit */ -#define EMAC_PHY_HALFD_10M 0x0000 /**< Half Duplex 10MBit */ -#define EMAC_PHY_AUTO_NEG 0x3000 /**< Select Auto Negotiation */ - -#define EMAC_DP83848C_DEF_ADR 0x0100 /**< Default PHY device address */ -#define EMAC_DP83848C_ID 0x20005C90 /**< PHY Identifier */ - - -/** - * @} - */ - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup EMAC_Public_Types - * @{ - */ - -/* Descriptor and status formats ---------------------------------------------- */ - -/** - * @brief RX Descriptor structure type definition - */ -typedef struct { - uint32_t Packet; /**< Receive Packet Descriptor */ - uint32_t Ctrl; /**< Receive Control Descriptor */ -} RX_Desc; - -/** - * @brief RX Status structure type definition - */ -typedef struct { - uint32_t Info; /**< Receive Information Status */ - uint32_t HashCRC; /**< Receive Hash CRC Status */ -} RX_Stat; - -/** - * @brief TX Descriptor structure type definition - */ -typedef struct { - uint32_t Packet; /**< Transmit Packet Descriptor */ - uint32_t Ctrl; /**< Transmit Control Descriptor */ -} TX_Desc; - -/** - * @brief TX Status structure type definition - */ -typedef struct { - uint32_t Info; /**< Transmit Information Status */ -} TX_Stat; - - -/** - * @brief TX Data Buffer structure definition - */ -typedef struct { - uint32_t ulDataLen; /**< Data length */ - uint32_t *pbDataBuf; /**< A word-align data pointer to data buffer */ -} EMAC_PACKETBUF_Type; - -/** - * @brief EMAC configuration structure definition - */ -typedef struct { - uint32_t Mode; /**< Supported EMAC PHY device speed, should be one of the following: - - EMAC_MODE_AUTO - - EMAC_MODE_10M_FULL - - EMAC_MODE_10M_HALF - - EMAC_MODE_100M_FULL - - EMAC_MODE_100M_HALF - */ - uint8_t *pbEMAC_Addr; /**< Pointer to EMAC Station address that contains 6-bytes - of MAC address, it must be sorted in order (bEMAC_Addr[0]..[5]) - */ -} EMAC_CFG_Type; - -/** EMAC Call back function type definition */ -typedef void (EMAC_IntCBSType)(void); - - -/** - * @} - */ - - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup EMAC_Public_Macros - * @{ - */ - - -/* EMAC PHY status type definitions */ -#define EMAC_PHY_STAT_LINK (0) /**< Link Status */ -#define EMAC_PHY_STAT_SPEED (1) /**< Speed Status */ -#define EMAC_PHY_STAT_DUP (2) /**< Duplex Status */ - -/* EMAC PHY device Speed definitions */ -#define EMAC_MODE_AUTO (0) /**< Auto-negotiation mode */ -#define EMAC_MODE_10M_FULL (1) /**< 10Mbps FullDuplex mode */ -#define EMAC_MODE_10M_HALF (2) /**< 10Mbps HalfDuplex mode */ -#define EMAC_MODE_100M_FULL (3) /**< 100Mbps FullDuplex mode */ -#define EMAC_MODE_100M_HALF (4) /**< 100Mbps HalfDuplex mode */ - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup EMAC_Public_Functions - * @{ - */ - -Status EMAC_Init(EMAC_CFG_Type *EMAC_ConfigStruct); -void EMAC_DeInit(void); -int32_t EMAC_CheckPHYStatus(uint32_t ulPHYState); -int32_t EMAC_SetPHYMode(uint32_t ulPHYMode); -int32_t EMAC_UpdatePHYStatus(void); -void EMAC_SetHashFilter(uint8_t dstMAC_addr[], FunctionalState NewState); -int32_t EMAC_CRCCalc(uint8_t frame_no_fcs[], int32_t frame_len); -void EMAC_SetFilterMode(uint32_t ulFilterMode, FunctionalState NewState); -FlagStatus EMAC_GetWoLStatus(uint32_t ulWoLMode); -void EMAC_WritePacketBuffer(EMAC_PACKETBUF_Type *pDataStruct); -void EMAC_ReadPacketBuffer(EMAC_PACKETBUF_Type *pDataStruct); -void EMAC_StandardIRQHandler(void); -void EMAC_SetupIntCBS(uint32_t ulIntType, EMAC_IntCBSType *pfnIntCb); -void EMAC_IntCmd(uint32_t ulIntType, FunctionalState NewState); -IntStatus EMAC_IntGetStatus(uint32_t ulIntType); -Bool EMAC_CheckReceiveIndex(void); -Bool EMAC_CheckTransmitIndex(void); -FlagStatus EMAC_CheckReceiveDataStatus(uint32_t ulRxStatType); -uint32_t EMAC_GetReceiveDataSize(void); -void EMAC_UpdateRxConsumeIndex(void); -void EMAC_UpdateTxProduceIndex(void); - - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_EMAC_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_gpdma.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_gpdma.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_gpdma.h +++ /dev/null @@ -1,394 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_gpdma.h - * @brief : Contains all macro definitions and function prototypes - * support for GPDMA firmware library on LPC17xx - * @version : 1.0 - * @date : 20. Apr. 2009 - * @author : HieuNguyen - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup GPDMA - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_GPDMA_H_ -#define LPC17XX_GPDMA_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup GPDMA_Private_Macros - * @{ - */ - -/** @defgroup DMA_REGISTER_BIT_DEFINITIONS - * @{ - */ - -/** Macros define for DMA interrupt */ -/** DMA Interrupt Status register */ -#define GPDMA_DMACIntStat_Ch(n) (((1UL<=0) && (n<=7)) - -/** DMA Connection number definitions */ -#define GPDMA_CONN_SSP0_Tx ((0UL)) /**< SSP0 Tx */ -#define GPDMA_CONN_SSP0_Rx ((1UL)) /**< SSP0 Rx */ -#define GPDMA_CONN_SSP1_Tx ((2UL)) /**< SSP1 Tx */ -#define GPDMA_CONN_SSP1_Rx ((3UL)) /**< SSP1 Rx */ -#define GPDMA_CONN_ADC ((4UL)) /**< ADC */ -#define GPDMA_CONN_I2S_Channel_0 ((5UL)) /**< I2S channel 0 */ -#define GPDMA_CONN_I2S_Channel_1 ((6UL)) /**< I2S channel 1 */ -#define GPDMA_CONN_DAC ((7UL)) /**< DAC */ -#define GPDMA_CONN_UART0_Tx ((8UL)) /**< UART0 Tx */ -#define GPDMA_CONN_UART0_Rx ((9UL)) /**< UART0 Rx */ -#define GPDMA_CONN_UART1_Tx ((10UL)) /**< UART1 Tx */ -#define GPDMA_CONN_UART1_Rx ((11UL)) /**< UART1 Rx */ -#define GPDMA_CONN_UART2_Tx ((12UL)) /**< UART2 Tx */ -#define GPDMA_CONN_UART2_Rx ((13UL)) /**< UART2 Rx */ -#define GPDMA_CONN_UART3_Tx ((14UL)) /**< UART3 Tx */ -#define GPDMA_CONN_UART3_Rx ((15UL)) /**< UART3 Rx */ -#define GPDMA_CONN_MAT0_0 ((16UL)) /**< MAT0.0 */ -#define GPDMA_CONN_MAT0_1 ((17UL)) /**< MAT0.1 */ -#define GPDMA_CONN_MAT1_0 ((18UL)) /**< MAT1.0 */ -#define GPDMA_CONN_MAT1_1 ((19UL)) /**< MAT1.1 */ -#define GPDMA_CONN_MAT2_0 ((20UL)) /**< MAT2.0 */ -#define GPDMA_CONN_MAT2_1 ((21UL)) /**< MAT2.1 */ -#define GPDMA_CONN_MAT3_0 ((22UL)) /**< MAT3.0 */ -#define GPDMA_CONN_MAT3_1 ((23UL)) /**< MAT3.1 */ - -#define PARAM_GPDMA_CONN(n) ((n==GPDMA_CONN_SSP0_Tx) || (n==GPDMA_CONN_SSP0_Rx) \ -|| (n==GPDMA_CONN_SSP1_Tx) || (n==GPDMA_CONN_SSP1_Rx) \ -|| (n==GPDMA_CONN_ADC) || (n==GPDMA_CONN_I2S_Channel_0) \ -|| (n==GPDMA_CONN_I2S_Channel_1) || (n==GPDMA_CONN_DAC) \ -|| (n==GPDMA_CONN_UART0_Tx) || (n==GPDMA_CONN_UART0_Rx) \ -|| (n==GPDMA_CONN_UART1_Tx) || (n==GPDMA_CONN_UART1_Rx) \ -|| (n==GPDMA_CONN_UART2_Tx) || (n==GPDMA_CONN_UART2_Rx) \ -|| (n==GPDMA_CONN_UART3_Tx) || (n==GPDMA_CONN_UART3_Rx) \ -|| (n==GPDMA_CONN_MAT0_0) || (n==GPDMA_CONN_MAT0_1) \ -|| (n==GPDMA_CONN_MAT1_0) || (n==GPDMA_CONN_MAT1_1) \ -|| (n==GPDMA_CONN_MAT2_0) || (n==GPDMA_CONN_MAT2_1) \ -|| (n==GPDMA_CONN_MAT3_0) || (n==GPDMA_CONN_MAT3_1)) - - -/** GPDMA Transfer type definitions */ -#define GPDMA_TRANSFERTYPE_M2M ((0UL)) /**< Memory to memory - DMA control */ -#define GPDMA_TRANSFERTYPE_M2P ((1UL)) /**< Memory to peripheral - DMA control */ -#define GPDMA_TRANSFERTYPE_P2M ((2UL)) /**< Peripheral to memory - DMA control */ -#define GPDMA_TRANSFERTYPE_P2P ((3UL)) /**< Source peripheral to destination peripheral - DMA control */ - - -#define PARAM_GPDMA_TRANSFERTYPE(n) ((n==GPDMA_TRANSFERTYPE_M2M)||(n==GPDMA_TRANSFERTYPE_M2P) \ -||(n==GPDMA_TRANSFERTYPE_P2M)||(n==GPDMA_TRANSFERTYPE_P2P)) - - -/** Burst size in Source and Destination definitions */ -#define GPDMA_BSIZE_1 ((0UL)) /**< Burst size = 1 */ -#define GPDMA_BSIZE_4 ((1UL)) /**< Burst size = 4 */ -#define GPDMA_BSIZE_8 ((2UL)) /**< Burst size = 8 */ -#define GPDMA_BSIZE_16 ((3UL)) /**< Burst size = 16 */ -#define GPDMA_BSIZE_32 ((4UL)) /**< Burst size = 32 */ -#define GPDMA_BSIZE_64 ((5UL)) /**< Burst size = 64 */ -#define GPDMA_BSIZE_128 ((6UL)) /**< Burst size = 128 */ -#define GPDMA_BSIZE_256 ((7UL)) /**< Burst size = 256 */ - -#define PARAM_GPDMA_BSIZE(n) ((n==GPDMA_BSIZE_1) || (n==GPDMA_BSIZE_4) \ -|| (n==GPDMA_BSIZE_8) || (n==GPDMA_BSIZE_16) \ -|| (n==GPDMA_BSIZE_32) || (n==GPDMA_BSIZE_64) \ -|| (n==GPDMA_BSIZE_128) || (n==GPDMA_BSIZE_256)) - - -/** Width in Source transfer width and Destination transfer width definitions */ -#define GPDMA_WIDTH_BYTE ((0UL)) /**< Width = 1 byte */ -#define GPDMA_WIDTH_HALFWORD ((1UL)) /**< Width = 2 bytes */ -#define GPDMA_WIDTH_WORD ((2UL)) /**< Width = 4 bytes */ - -#define PARAM_GPDMA_WIDTH(n) ((n==GPDMA_WIDTH_BYTE) || (n==GPDMA_WIDTH_HALFWORD) \ -|| (n==GPDMA_WIDTH_WORD)) - - -/** DMA Request Select Mode definitions */ -#define GPDMA_REQSEL_UART ((0UL)) /**< UART TX/RX is selected */ -#define GPDMA_REQSEL_TIMER ((1UL)) /**< Timer match is selected */ - -#define PARAM_GPDMA_REQSEL(n) ((n==GPDMA_REQSEL_UART) || (n==GPDMA_REQSEL_TIMER)) - -/** GPDMA Status type definitions */ -/** GPDMA Interrupt Status */ -#define GPDMA_STAT_INT ((0UL)) -/** GPDMA Interrupt Terminal Count Request Status */ -#define GPDMA_STAT_INTTC ((1UL)) -/** GPDMA Interrupt Error Status */ -#define GPDMA_STAT_INTERR ((2UL)) -/** GPDMA Raw Interrupt Terminal Count Status */ -#define GPDMA_STAT_RAWINTTC ((3UL)) -/** GPDMA Raw Error Interrupt Status */ -#define GPDMA_STAT_RAWINTERR ((4UL)) -/** DMA Enabled Channel Status */ -#define GPDMA_STAT_ENABLED_CH ((5UL)) - -#define PARAM_GPDMA_STAT(n) ((n==GPDMA_STAT_INT) || (n==GPDMA_STAT_INTTC) \ -|| (n==GPDMA_STAT_INTERR) || (n==GPDMA_STAT_RAWINTTC) \ -|| (n==GPDMA_STAT_RAWINTERR) || (n==GPDMA_STAT_ENABLED_CH)) - -/** GPDMA status type definition that can be clear */ -/** GPDMA Interrupt Terminal Count Request Clear */ -#define GPDMA_STATCLR_INTTC ((0UL)) -/** GPDMA Interrupt Error Clear */ -#define GPDMA_STATCLR_INTERR ((1UL)) - -#define GPDMA_STATCLR(n) ((n==GPDMA_STATCLR_INTTC) || (n==GPDMA_STATCLR_INTERR)) - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup GPDMA_Public_Functions - * @{ - */ - -void GPDMA_Init(void); -Status GPDMA_Setup(GPDMA_Channel_CFG_Type *GPDMAChannelConfig, fnGPDMACbs_Type *pfnGPDMACbs); -void GPDMA_ChannelCmd(uint8_t channelNum, FunctionalState NewState); -void GPDMA_IntHandler(void); - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_GPDMA_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_gpio.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_gpio.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_gpio.h +++ /dev/null @@ -1,166 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_gpio.h - * @brief : Contains all macro definitions and function prototypes - * support for GPIO firmware library on LPC17xx - * @version : 1.0 - * @date : 23. Apr. 2009 - * @author : HieuNguyen - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup GPIO - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_GPIO_H_ -#define LPC17XX_GPIO_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup GPIO_Public_Types - * @{ - */ - -/** - * @brief Fast GPIO port byte type definition - */ -typedef struct { - __IO uint8_t FIODIR[4]; /**< FIO direction register in byte-align */ - uint32_t RESERVED0[3]; /**< Reserved */ - __IO uint8_t FIOMASK[4]; /**< FIO mask register in byte-align */ - __IO uint8_t FIOPIN[4]; /**< FIO pin register in byte align */ - __IO uint8_t FIOSET[4]; /**< FIO set register in byte-align */ - __O uint8_t FIOCLR[4]; /**< FIO clear register in byte-align */ -} GPIO_Byte_TypeDef; - - -/** - * @brief Fast GPIO port half-word type definition - */ -typedef struct { - __IO uint16_t FIODIRL; /**< FIO direction register lower halfword part */ - __IO uint16_t FIODIRU; /**< FIO direction register upper halfword part */ - uint32_t RESERVED0[3]; /**< Reserved */ - __IO uint16_t FIOMASKL; /**< FIO mask register lower halfword part */ - __IO uint16_t FIOMASKU; /**< FIO mask register upper halfword part */ - __IO uint16_t FIOPINL; /**< FIO pin register lower halfword part */ - __IO uint16_t FIOPINU; /**< FIO pin register upper halfword part */ - __IO uint16_t FIOSETL; /**< FIO set register lower halfword part */ - __IO uint16_t FIOSETU; /**< FIO set register upper halfword part */ - __O uint16_t FIOCLRL; /**< FIO clear register lower halfword part */ - __O uint16_t FIOCLRU; /**< FIO clear register upper halfword part */ -} GPIO_HalfWord_TypeDef; - - -/** - * @} - */ - - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup GPIO_Public_Macros - * @{ - */ - -/** Fast GPIO port 0 byte accessible definition */ -#define GPIO0_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO0_BASE)) -/** Fast GPIO port 1 byte accessible definition */ -#define GPIO1_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO1_BASE)) -/** Fast GPIO port 2 byte accessible definition */ -#define GPIO2_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO2_BASE)) -/** Fast GPIO port 3 byte accessible definition */ -#define GPIO3_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO3_BASE)) -/** Fast GPIO port 4 byte accessible definition */ -#define GPIO4_Byte ((GPIO_Byte_TypeDef *)(LPC_GPIO4_BASE)) - - - -/** Fast GPIO port 0 half-word accessible definition */ -#define GPIO0_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO0_BASE)) -/** Fast GPIO port 1 half-word accessible definition */ -#define GPIO1_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO1_BASE)) -/** Fast GPIO port 2 half-word accessible definition */ -#define GPIO2_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO2_BASE)) -/** Fast GPIO port 3 half-word accessible definition */ -#define GPIO3_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO3_BASE)) -/** Fast GPIO port 4 half-word accessible definition */ -#define GPIO4_HalfWord ((GPIO_HalfWord_TypeDef *)(LPC_GPIO4_BASE)) - - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup GPIO_Public_Functions - * @{ - */ - -/* GPIO style ------------------------------- */ -void GPIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir); -void GPIO_SetValue(uint8_t portNum, uint32_t bitValue); -void GPIO_ClearValue(uint8_t portNum, uint32_t bitValue); -uint32_t GPIO_ReadValue(uint8_t portNum); - -/* FIO (word-accessible) style ------------------------------- */ -void FIO_SetDir(uint8_t portNum, uint32_t bitValue, uint8_t dir); -void FIO_SetValue(uint8_t portNum, uint32_t bitValue); -void FIO_ClearValue(uint8_t portNum, uint32_t bitValue); -uint32_t FIO_ReadValue(uint8_t portNum); -void FIO_SetMask(uint8_t portNum, uint32_t bitValue, uint8_t maskValue); - -/* FIO (halfword-accessible) style ------------------------------- */ -void FIO_HalfWordSetDir(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t dir); -void FIO_HalfWordSetMask(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue, uint8_t maskValue); -void FIO_HalfWordSetValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue); -void FIO_HalfWordClearValue(uint8_t portNum, uint8_t halfwordNum, uint16_t bitValue); -uint16_t FIO_HalfWordReadValue(uint8_t portNum, uint8_t halfwordNum); - -/* FIO (byte-accessible) style ------------------------------- */ -void FIO_ByteSetDir(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t dir); -void FIO_ByteSetMask(uint8_t portNum, uint8_t byteNum, uint8_t bitValue, uint8_t maskValue); -void FIO_ByteSetValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue); -void FIO_ByteClearValue(uint8_t portNum, uint8_t byteNum, uint8_t bitValue); -uint8_t FIO_ByteReadValue(uint8_t portNum, uint8_t byteNum); - - - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_GPIO_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_i2c.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_i2c.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_i2c.h +++ /dev/null @@ -1,386 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_i2c.h - * @brief : Contains all macro definitions and function prototypes - * support for I2C firmware library on LPC17xx - * @version : 1.0 - * @date : 13. Apr. 2009 - * @author : HieuNguyen - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup I2C - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_I2C_H_ -#define LPC17XX_I2C_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup I2C_Private_Macros - * @{ - */ - -/** @defgroup I2C_REGISTER_BIT_DEFINITIONS - * @{ - */ - -/*******************************************************************//** - * I2C Control Set register description - *********************************************************************/ -#define I2C_I2CONSET_AA ((0x04)) /*!< Assert acknowledge flag */ -#define I2C_I2CONSET_SI ((0x08)) /*!< I2C interrupt flag */ -#define I2C_I2CONSET_STO ((0x10)) /*!< STOP flag */ -#define I2C_I2CONSET_STA ((0x20)) /*!< START flag */ -#define I2C_I2CONSET_I2EN ((0x40)) /*!< I2C interface enable */ - - -/*******************************************************************//** - * I2C Control Clear register description - *********************************************************************/ -/** Assert acknowledge Clear bit */ -#define I2C_I2CONCLR_AAC ((1<<2)) -/** I2C interrupt Clear bit */ -#define I2C_I2CONCLR_SIC ((1<<3)) -/** START flag Clear bit */ -#define I2C_I2CONCLR_STAC ((1<<5)) -/** I2C interface Disable bit */ -#define I2C_I2CONCLR_I2ENC ((1<<6)) - - -/********************************************************************//** - * I2C Status Code definition (I2C Status register) - *********************************************************************/ -/* Return Code in I2C status register */ -#define I2C_STAT_CODE_BITMASK ((0xF8)) - -/* I2C return status code definitions ----------------------------- */ - -/** No relevant information */ -#define I2C_I2STAT_NO_INF ((0xF8)) - -/* Master transmit mode -------------------------------------------- */ -/** A start condition has been transmitted */ -#define I2C_I2STAT_M_TX_START ((0x08)) -/** A repeat start condition has been transmitted */ -#define I2C_I2STAT_M_TX_RESTART ((0x10)) -/** SLA+W has been transmitted, ACK has been received */ -#define I2C_I2STAT_M_TX_SLAW_ACK ((0x18)) -/** SLA+W has been transmitted, NACK has been received */ -#define I2C_I2STAT_M_TX_SLAW_NACK ((0x20)) -/** Data has been transmitted, ACK has been received */ -#define I2C_I2STAT_M_TX_DAT_ACK ((0x28)) -/** Data has been transmitted, NACK has been received */ -#define I2C_I2STAT_M_TX_DAT_NACK ((0x30)) -/** Arbitration lost in SLA+R/W or Data bytes */ -#define I2C_I2STAT_M_TX_ARB_LOST ((0x38)) - -/* Master receive mode -------------------------------------------- */ -/** A start condition has been transmitted */ -#define I2C_I2STAT_M_RX_START ((0x08)) -/** A repeat start condition has been transmitted */ -#define I2C_I2STAT_M_RX_RESTART ((0x10)) -/** Arbitration lost */ -#define I2C_I2STAT_M_RX_ARB_LOST ((0x38)) -/** SLA+R has been transmitted, ACK has been received */ -#define I2C_I2STAT_M_RX_SLAR_ACK ((0x40)) -/** SLA+R has been transmitted, NACK has been received */ -#define I2C_I2STAT_M_RX_SLAR_NACK ((0x48)) -/** Data has been received, ACK has been returned */ -#define I2C_I2STAT_M_RX_DAT_ACK ((0x50)) -/** Data has been received, NACK has been return */ -#define I2C_I2STAT_M_RX_DAT_NACK ((0x58)) - -/* Slave receive mode -------------------------------------------- */ -/** Own slave address has been received, ACK has been returned */ -#define I2C_I2STAT_S_RX_SLAW_ACK ((0x60)) - -/** Arbitration lost in SLA+R/W as master */ -#define I2C_I2STAT_S_RX_ARB_LOST_M_SLA ((0x68)) -/** Own SLA+W has been received, ACK returned */ -//#define I2C_I2STAT_S_RX_SLAW_ACK ((0x68)) - -/** General call address has been received, ACK has been returned */ -#define I2C_I2STAT_S_RX_GENCALL_ACK ((0x70)) - -/** Arbitration lost in SLA+R/W (GENERAL CALL) as master */ -#define I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL ((0x78)) -/** General call address has been received, ACK has been returned */ -//#define I2C_I2STAT_S_RX_GENCALL_ACK ((0x78)) - -/** Previously addressed with own SLV address; - * Data has been received, ACK has been return */ -#define I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK ((0x80)) -/** Previously addressed with own SLA; - * Data has been received and NOT ACK has been return */ -#define I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK ((0x88)) -/** Previously addressed with General Call; - * Data has been received and ACK has been return */ -#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK ((0x90)) -/** Previously addressed with General Call; - * Data has been received and NOT ACK has been return */ -#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK ((0x98)) -/** A STOP condition or repeated START condition has - * been received while still addressed as SLV/REC - * (Slave Receive) or SLV/TRX (Slave Transmit) */ -#define I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX ((0xA0)) - -/** Slave transmit mode */ -/** Own SLA+R has been received, ACK has been returned */ -#define I2C_I2STAT_S_TX_SLAR_ACK ((0xA8)) - -/** Arbitration lost in SLA+R/W as master */ -#define I2C_I2STAT_S_TX_ARB_LOST_M_SLA ((0xB0)) -/** Own SLA+R has been received, ACK has been returned */ -//#define I2C_I2STAT_S_TX_SLAR_ACK ((0xB0)) - -/** Data has been transmitted, ACK has been received */ -#define I2C_I2STAT_S_TX_DAT_ACK ((0xB8)) -/** Data has been transmitted, NACK has been received */ -#define I2C_I2STAT_S_TX_DAT_NACK ((0xC0)) -/** Last data byte in I2DAT has been transmitted (AA = 0); - ACK has been received */ -#define I2C_I2STAT_S_TX_LAST_DAT_ACK ((0xC8)) - -/** Time out in case of using I2C slave mode */ -#define I2C_SLAVE_TIME_OUT 0x10000UL - -/********************************************************************//** - * I2C Data register definition - *********************************************************************/ -/** Mask for I2DAT register*/ -#define I2C_I2DAT_BITMASK ((0xFF)) - -/** Idle data value will be send out in slave mode in case of the actual - * expecting data requested from the master is greater than its sending data - * length that can be supported */ -#define I2C_I2DAT_IDLE_CHAR (0xFF) - - -/********************************************************************//** - * I2C Monitor mode control register description - *********************************************************************/ -#define I2C_I2MMCTRL_MM_ENA ((1<<0)) /**< Monitor mode enable */ -#define I2C_I2MMCTRL_ENA_SCL ((1<<1)) /**< SCL output enable */ -#define I2C_I2MMCTRL_MATCH_ALL ((1<<2)) /**< Select interrupt register match */ -#define I2C_I2MMCTRL_BITMASK ((0x07)) /**< Mask for I2MMCTRL register */ - - -/********************************************************************//** - * I2C Data buffer register description - *********************************************************************/ -/** I2C Data buffer register bit mask */ -#define I2DATA_BUFFER_BITMASK ((0xFF)) - - -/********************************************************************//** - * I2C Slave Address registers definition - *********************************************************************/ -/** General Call enable bit */ -#define I2C_I2ADR_GC ((1<<0)) -/** I2C Slave Address registers bit mask */ -#define I2C_I2ADR_BITMASK ((0xFF)) - - -/********************************************************************//** - * I2C Mask Register definition - *********************************************************************/ -/** I2C Mask Register mask field */ -#define I2C_I2MASK_MASK(n) ((n&0xFE)) - - -/********************************************************************//** - * I2C SCL HIGH duty cycle Register definition - *********************************************************************/ -/** I2C SCL HIGH duty cycle Register bit mask */ -#define I2C_I2SCLH_BITMASK ((0xFFFF)) - - -/********************************************************************//** - * I2C SCL LOW duty cycle Register definition - *********************************************************************/ -/** I2C SCL LOW duty cycle Register bit mask */ -#define I2C_I2SCLL_BITMASK ((0xFFFF)) - -/** - * @} - */ - -/** - * @} - */ - - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup I2C_Public_Types - * @{ - */ - -/** @brief I2C Own slave address setting structure */ -typedef struct { - uint8_t SlaveAddrChannel; /**< Slave Address channel in I2C control, - should be in range from 0..3 - */ - uint8_t SlaveAddr_7bit; /**< Value of 7-bit slave address */ - uint8_t GeneralCallState; /**< Enable/Disable General Call Functionality - when I2C control being in Slave mode, should be: - - ENABLE: Enable General Call function. - - DISABLE: Disable General Call function. - */ - uint8_t SlaveAddrMaskValue; /**< Any bit in this 8-bit value (bit 7:1) - which is set to '1' will cause an automatic compare on - the corresponding bit of the received address when it - is compared to the SlaveAddr_7bit value associated with this - mask register. In other words, bits in SlaveAddr_7bit value - which are masked are not taken into account in determining - an address match - */ -} I2C_OWNSLAVEADDR_CFG_Type; - - -/** @brief Master transfer setup data structure definitions */ -typedef struct -{ - uint32_t sl_addr7bit; /**< Slave address in 7bit mode */ - uint8_t* tx_data; /**< Pointer to Transmit data - NULL if data transmit - is not used */ - uint32_t tx_length; /**< Transmit data length - 0 if data transmit - is not used*/ - uint32_t tx_count; /**< Current Transmit data counter */ - uint8_t* rx_data; /**< Pointer to Receive data - NULL if data receive - is not used */ - uint32_t rx_length; /**< Receive data length - 0 if data receive is - not used */ - uint32_t rx_count; /**< Current Receive data counter */ - uint32_t retransmissions_max; /**< Max Re-Transmission value */ - uint32_t retransmissions_count; /**< Current Re-Transmission counter */ - uint32_t status; /**< Current status of I2C activity */ - void (*callback)(void); /**< Pointer to Call back function when transmission complete - used in interrupt transfer mode */ -} I2C_M_SETUP_Type; - - -/** @brief Slave transfer setup data structure definitions */ -typedef struct -{ - uint8_t* tx_data; - uint32_t tx_length; - uint32_t tx_count; - uint8_t* rx_data; - uint32_t rx_length; - uint32_t rx_count; - uint32_t status; - void (*callback)(void); -} I2C_S_SETUP_Type; - -/** - * @brief Transfer option type definitions - */ -typedef enum { - I2C_TRANSFER_POLLING = 0, /**< Transfer in polling mode */ - I2C_TRANSFER_INTERRUPT /**< Transfer in interrupt mode */ -} I2C_TRANSFER_OPT_Type; - - -/** - * @} - */ - - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup I2C_Public_Macros - * @{ - */ - -#define PARAM_I2C_SLAVEADDR_CH(n) ((n>=0) && (n<=3)) - -/** Macro to determine if it is valid SSP port number */ -#define PARAM_I2Cx(n) ((((uint32_t *)n)==((uint32_t *)LPC_I2C0)) \ -|| (((uint32_t *)n)==((uint32_t *)LPC_I2C1)) \ -|| (((uint32_t *)n)==((uint32_t *)LPC_I2C2))) - -/* I2C status values */ -#define I2C_SETUP_STATUS_ARBF (1<<8) /**< Arbitration false */ -#define I2C_SETUP_STATUS_NOACKF (1<<9) /**< No ACK returned */ -#define I2C_SETUP_STATUS_DONE (1<<10) /**< Status DONE */ - - -/*********************************************************************//** - * I2C monitor control configuration defines - **********************************************************************/ -#define I2C_MONITOR_CFG_SCL_OUTPUT I2C_I2MMCTRL_ENA_SCL /**< SCL output enable */ -#define I2C_MONITOR_CFG_MATCHALL I2C_I2MMCTRL_MATCH_ALL /**< Select interrupt register match */ - -#define PARAM_I2C_MONITOR_CFG(n) ((n==I2C_MONITOR_CFG_SCL_OUTPUT) || (I2C_MONITOR_CFG_MATCHALL)) - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup I2C_Public_Functions - * @{ - */ - -void I2C_SetClock (LPC_I2C_TypeDef *I2Cx, uint32_t target_clock); -void I2C_DeInit(LPC_I2C_TypeDef* I2Cx); -void I2C_Init(LPC_I2C_TypeDef *I2Cx, uint32_t clockrate); -void I2C_Cmd(LPC_I2C_TypeDef* I2Cx, FunctionalState NewState); - -Status I2C_MasterTransferData(LPC_I2C_TypeDef *I2Cx, \ - I2C_M_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt); -Status I2C_SlaveTransferData(LPC_I2C_TypeDef *I2Cx, \ - I2C_S_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt); - -void I2C_SetOwnSlaveAddr(LPC_I2C_TypeDef *I2Cx, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct); -uint8_t I2C_GetLastStatusCode(LPC_I2C_TypeDef* I2Cx); - -void I2C_MonitorModeConfig(LPC_I2C_TypeDef *I2Cx, uint32_t MonitorCfgType, FunctionalState NewState); -void I2C_MonitorModeCmd(LPC_I2C_TypeDef *I2Cx, FunctionalState NewState); -uint8_t I2C_MonitorGetDatabuffer(LPC_I2C_TypeDef *I2Cx); - -void I2C0_StdIntHandler(void); -void I2C1_StdIntHandler(void); -void I2C2_StdIntHandler(void); - - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_I2C_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_i2s.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_i2s.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_i2s.h +++ /dev/null @@ -1,434 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_i2s.h - * @brief : Contains all macro definitions and function prototypes - * support for I2S firmware library on LPC17xx - * @version : 1.0 - * @date : 13. May. 2009 - * @author : NguyenCao - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup I2S - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_I2S_H_ -#define LPC17XX_I2S_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup I2S_Private_Macros - * @{ - */ - -/*********************************************************************//** - * Macro defines for DAO-Digital Audio Output register - **********************************************************************/ -/** @defgroup I2S_REGISTER_BIT_DEFINITION - * @{ - */ - -/** I2S wordwide - the number of bytes in data*/ -#define I2S_DAO_WORDWIDTH_8 ((uint32_t)(0)) /** 8 bit */ -#define I2S_DAO_WORDWIDTH_16 ((uint32_t)(1)) /** 16 bit */ -#define I2S_DAO_WORDWIDTH_32 ((uint32_t)(3)) /** 32 bit */ -/** I2S control mono or stereo format */ -#define I2S_DAO_MONO ((uint32_t)(1<<2)) -/** I2S control stop mode */ -#define I2S_DAO_STOP ((uint32_t)(1<<3)) -/** I2S control reset mode */ -#define I2S_DAO_RESET ((uint32_t)(1<<4)) -/** I2S control master/slave mode */ -#define I2S_DAO_SLAVE ((uint32_t)(1<<5)) -/** I2S word select half period minus one */ -#define I2S_DAO_WS_HALFPERIOD(n) ((uint32_t)(n<<6)) -/** I2S control mute mode */ -#define I2S_DAO_MUTE ((uint32_t)(1<<15)) - -/*********************************************************************//** - * Macro defines for DAI-Digital Audio Input register -**********************************************************************/ -/** I2S wordwide - the number of bytes in data*/ -#define I2S_DAI_WORDWIDTH_8 ((uint32_t)(0)) /** 8 bit */ -#define I2S_DAI_WORDWIDTH_16 ((uint32_t)(1)) /** 16 bit */ -#define I2S_DAI_WORDWIDTH_32 ((uint32_t)(3)) /** 32 bit */ -/** I2S control mono or stereo format */ -#define I2S_DAI_MONO ((uint32_t)(1<<2)) -/** I2S control stop mode */ -#define I2S_DAI_STOP ((uint32_t)(1<<3)) -/** I2S control reset mode */ -#define I2S_DAI_RESET ((uint32_t)(1<<4)) -/** I2S control master/slave mode */ -#define I2S_DAI_SLAVE ((uint32_t)(1<<5)) -/** I2S word select half period minus one (9 bits)*/ -#define I2S_DAI_WS_HALFPERIOD(n) ((uint32_t)((n&0x1FF)<<6)) -/** I2S control mute mode */ -#define I2S_DAI_MUTE ((uint32_t)(1<<15)) - -/*********************************************************************//** - * Macro defines for STAT register (Status Feedback register) -**********************************************************************/ -/** I2S Status Receive or Transmit Interrupt */ -#define I2S_STATE_IRQ ((uint32_t)(1)) -/** I2S Status Receive or Transmit DMA1 */ -#define I2S_STATE_DMA1 ((uint32_t)(1<<1)) -/** I2S Status Receive or Transmit DMA2 */ -#define I2S_STATE_DMA2 ((uint32_t)(1<<2)) -/** I2S Status Current level of the Receive FIFO (5 bits)*/ -#define I2S_STATE_RX_LEVEL(n) ((uint32_t)((n&1F)<<8)) -/** I2S Status Current level of the Transmit FIFO (5 bits)*/ -#define I2S_STATE_TX_LEVEL(n) ((uint32_t)((n&1F)<<16)) - -/*********************************************************************//** - * Macro defines for DMA1 register (DMA1 Configuration register) -**********************************************************************/ -/** I2S control DMA1 for I2S receive */ -#define I2S_DMA1_RX_ENABLE ((uint32_t)(1)) -/** I2S control DMA1 for I2S transmit */ -#define I2S_DMA1_TX_ENABLE ((uint32_t)(1<<1)) -/** I2S set FIFO level that trigger a receive DMA request on DMA1 */ -#define I2S_DMA1_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8)) -/** I2S set FIFO level that trigger a transmit DMA request on DMA1 */ -#define I2S_DMA1_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16)) - -/*********************************************************************//** - * Macro defines for DMA2 register (DMA2 Configuration register) -**********************************************************************/ -/** I2S control DMA2 for I2S receive */ -#define I2S_DMA2_RX_ENABLE ((uint32_t)(1)) -/** I2S control DMA1 for I2S transmit */ -#define I2S_DMA2_TX_ENABLE ((uint32_t)(1<<1)) -/** I2S set FIFO level that trigger a receive DMA request on DMA1 */ -#define I2S_DMA2_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8)) -/** I2S set FIFO level that trigger a transmit DMA request on DMA1 */ -#define I2S_DMA2_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16)) - -/*********************************************************************//** -* Macro defines for IRQ register (Interrupt Request Control register) -**********************************************************************/ -/** I2S control I2S receive interrupt */ -#define I2S_IRQ_RX_ENABLE ((uint32_t)(1)) -/** I2S control I2S transmit interrupt */ -#define I2S_IRQ_TX_ENABLE ((uint32_t)(1<<1)) -/** I2S set the FIFO level on which to create an irq request */ -#define I2S_IRQ_RX_DEPTH(n) ((uint32_t)((n&0x1F)<<8)) -/** I2S set the FIFO level on which to create an irq request */ -#define I2S_IRQ_TX_DEPTH(n) ((uint32_t)((n&0x1F)<<16)) - -/********************************************************************************//** - * Macro defines for TXRATE/RXRATE register (Transmit/Receive Clock Rate register) -*********************************************************************************/ -/** I2S Transmit MCLK rate denominator */ -#define I2S_TXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF)) -/** I2S Transmit MCLK rate denominator */ -#define I2S_TXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8)) -/** I2S Receive MCLK rate denominator */ -#define I2S_RXRATE_Y_DIVIDER(n) ((uint32_t)(n&0xFF)) -/** I2S Receive MCLK rate denominator */ -#define I2S_RXRATE_X_DIVIDER(n) ((uint32_t)((n&0xFF)<<8)) - -/*************************************************************************************//** - * Macro defines for TXBITRATE & RXBITRATE register (Transmit/Receive Bit Rate register) -**************************************************************************************/ -#define I2S_TXBITRATE(n) ((uint32_t)(n&0x3F)) -#define I2S_RXBITRATE(n) ((uint32_t)(n&0x3F)) - -/**********************************************************************************//** - * Macro defines for TXMODE/RXMODE register (Transmit/Receive Mode Control register) -************************************************************************************/ -/** I2S Transmit select clock source (2 bits)*/ -#define I2S_TXMODE_CLKSEL(n) ((uint32_t)(n&0x03)) -/** I2S Transmit control 4-pin mode */ -#define I2S_TXMODE_4PIN_ENABLE ((uint32_t)(1<<2)) -/** I2S Transmit control the TX_MCLK output */ -#define I2S_TXMODE_MCENA ((uint32_t)(1<<3)) -/** I2S Receive select clock source */ -#define I2S_RXMODE_CLKSEL(n) ((uint32_t)(n&0x03)) -/** I2S Receive control 4-pin mode */ -#define I2S_RXMODE_4PIN_ENABLE ((uint32_t)(1<<2)) -/** I2S Receive control the TX_MCLK output */ -#define I2S_RXMODE_MCENA ((uint32_t)(1<<3)) - -/** - * @} - */ - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup I2S_Public_Types - * @{ - */ - - -/** - * @brief I2S configuration structure - */ -typedef struct { - uint8_t CLK_Pin; /**< Clock Pin, should be: - - I2S_SRX_CLK_P0_4: RX_CLK pin is on P0.4 - - I2S_SRX_CLK_P0_23: RX_CLK pin is on P0.23 - - I2S_STX_CLK_P0_7: TX_CLK pin is on P0.7 - - I2S_STX_CLK_P2_11: TX_CLK pin is on P2.11 */ - uint8_t WS_Pin; /**< Word Select, should be: - - I2S_SRX_WS_P0_5: RX_WS pin is on P0.5 - - I2S_SRX_WS_P0_24: RX_WS pin is on P0.24 - - I2S_STX_WS_P0_8: TX_WS pin is on P0.8 - - I2S_STX_WS_P2_12: TX_WS pin is on P2.12 */ - uint8_t SDA_Pin; /**< Data, should be: - - I2S_SRX_SDA_P0_6: RX_SDA pin is on P0.6 - - I2S_SRX_SDA_P0_25: RX_SDA pin is on P0.25 - - I2S_STX_SDA_P0_9: TX_SDA pin is on P0.8 - - I2S_STX_SDA_P2_13: TX_SDA pin is on P2.13 */ - uint8_t MCLK_Pin; /**< Master Clock output, should be: - - I2S_RX_MCLK_P4_28: RX_MCLK pin is on P4.28 - - I2S_TX_MCLK_P4_29: TX_MCLK pin is on P4.29*/ -}I2S_PinCFG_Type; - -/** - * @brief I2S configuration structure definition - */ -typedef struct { - uint8_t wordwidth; /** the number of bytes in data as follow: - -I2S_WORDWIDTH_8: 8 bit data - -I2S_WORDWIDTH_16: 16 bit data - -I2S_WORDWIDTH_32: 32 bit data */ - uint8_t mono; /** Set mono/stereo mode, should be: - - I2S_STEREO: stereo mode - - I2S_MONO: mono mode */ - uint8_t stop; /** Disables accesses on FIFOs, should be: - - I2S_STOP_ENABLE: enable stop mode - - I2S_STOP_DISABLE: disable stop mode */ - uint8_t reset; /** Asynchronously reset tje transmit channel and FIFO, should be: - - I2S_RESET_ENABLE: enable reset mode - - I2S_RESET_DISABLE: disable reset mode */ - uint8_t ws_sel; /** Set Master/Slave mode, should be: - - I2S_MASTER_MODE: I2S master mode - - I2S_SLAVE_MODE: I2S slave mode */ - uint8_t mute; /** MUTE mode: when true, the transmit channel sends only zeroes, shoule be: - - I2S_MUTE_ENABLE: enable mute mode - - I2S_MUTE_DISABLE: disable mute mode */ - uint8_t Reserved0[2]; -} I2S_CFG_Type; - -/** - * @brief I2S DMA configuration structure definition - */ -typedef struct { - uint8_t DMAIndex; /** Select DMA1 or DMA2, should be: - - I2S_DMA_1: DMA1 - - I2S_DMA_2: DMA2 */ - uint8_t depth; /** FIFO level that triggers a DMA request */ - uint8_t Reserved0[2]; -}I2S_DMAConf_Type; - -/** - * @brief I2S mode configuration structure definition - */ -typedef struct{ - uint8_t clksel; /** Clock source selection, should be: - - I2S_CLKSEL_0: Select the fractional rate divider clock output - - I2S_CLKSEL_2: Select the MCLK signal as the clock source */ - uint8_t fpin; /** Select four pin mode, should be: - - I2S_4PIN_ENABLE: 4-pin enable - - I2S_4PIN_DISABLE: 4-pin disable */ - uint8_t mcena; /** Select MCLK mode, should be: - - I2S_MCLK_ENABLE: MCLK enable for output - - I2S_MCLK_DISABLE: MCLK disable for output */ - uint8_t Reserved; -}I2S_MODEConf_Type; - -/** I2S call-back function type definitions */ -typedef void (fnI2SCbs_Type)(); - -/** - * @} - */ - - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup I2S_Public_Macros - * @{ - */ - -/** Macro to determine if it is valid I2S peripheral */ -#define PARAM_I2Sx(n) (((uint32_t *)n)==((uint32_t *)LPC_I2S)) - -/** Macro to check Data to send valid */ -#define PARAM_I2S_DATA(data) ((data>=0)&&(data <= 0xFFFFFFFF)) -#define PRAM_I2S_FREQ(freq) ((freq>=16000)&&(freq <= 96000)) - -/** SSP0 function pin selection defines */ -#define I2S_SRX_CLK_P0_4 ((uint8_t)(0)) -#define I2S_SRX_WS_P0_5 ((uint8_t)(0)) -#define I2S_SRX_SDA_P0_6 ((uint8_t)(0)) -#define I2S_STX_CLK_P0_7 ((uint8_t)(0)) -#define I2S_STX_WS_P0_8 ((uint8_t)(0)) -#define I2S_STX_SDA_P0_9 ((uint8_t)(0)) - - -#define I2S_SRX_CLK_P0_23 ((uint8_t)(0)) -#define I2S_SRX_WS_P0_24 ((uint8_t)(0)) -#define I2S_SRX_SDA_P0_25 ((uint8_t)(0)) - -#define I2S_STX_CLK_P2_11 ((uint8_t)(2)) -#define I2S_STX_WS_P2_12 ((uint8_t)(2)) -#define I2S_STX_SDA_P2_13 ((uint8_t)(2)) - -#define I2S_TX_MCLK_P4_29 ((uint8_t)(4)) -#define I2S_RX_MCLK_P4_28 ((uint8_t)(4)) - -/** Macro to check PIN parameter */ -#define PARAM_RX_CLK_PIN(n) ((n==I2S_SRX_CLK_P0_4)||(n==I2S_SRX_CLK_P0_23)) -#define PARAM_TX_CLK_PIN(n) ((n==I2S_STX_CLK_P0_7)||(n==I2S_STX_CLK_P2_11)) - -#define PARAM_RX_WS_PIN(n) ((n==I2S_SRX_WS_P0_5)||(n==I2S_SRX_WS_P0_24)) -#define PARAM_TX_WS_PIN(n) ((n==I2S_STX_WS_P0_8)||(n==I2S_STX_WS_P2_12)) - -#define PARAM_RX_SDA_PIN(n) ((n==I2S_SRX_SDA_P0_6)||(n==I2S_SRX_SDA_P0_25)) -#define PARAM_TX_SDA_PIN(n) ((n==I2S_STX_SDA_P0_9)||(n==I2S_STX_SDA_P2_13)) - -#define PARAM_RX_MCLK_PIN(n) (n==I2S_RX_MCLK_P4_28) -#define PARAM_TX_MCLK_PIN(n) (n==I2S_TX_MCLK_P4_29) - -/*********************************************************************//** - * I2S configuration parameter defines - **********************************************************************/ -/** I2S Wordwidth bit */ -#define I2S_WORDWIDTH_8 I2S_DAO_WORDWIDTH_8 -#define I2S_WORDWIDTH_16 I2S_DAO_WORDWIDTH_16 -#define I2S_WORDWIDTH_32 I2S_DAO_WORDWIDTH_32 -#define PARAM_I2S_WORDWIDTH(n) ((n==I2S_WORDWIDTH_8)||(n==I2S_WORDWIDTH_16)\ -||(n==I2S_WORDWIDTH_32)) - -/** I2S Channel bit */ -#define I2S_STEREO ((uint32_t)(0)) -#define I2S_MONO ((uint32_t)(1)) -#define PARAM_I2S_CHANNEL(n) ((n==I2S_STEREO)||(n==I2S_MONO)) - -/** I2S Master/Slave mode bit */ -#define I2S_MASTER_MODE ((uint8_t)(0)) -#define I2S_SLAVE_MODE ((uint8_t)(1)) -#define PARAM_I2S_WS_SEL(n) ((n==I2S_MASTER_MODE)||(n=I2S_SLAVE_MODE)) - -/** I2S Stop bit */ -#define I2S_STOP_ENABLE ((uint8_t)(1)) -#define I2S_STOP_DISABLE ((uint8_t)(0)) -#define PARAM_I2S_STOP(n) ((n==I2S_STOP_ENABLE)||(n==I2S_STOP_DISABLE)) - -/** I2S Reset bit */ -#define I2S_RESET_ENABLE ((uint8_t)(1)) -#define I2S_RESET_DISABLE ((uint8_t)(0)) -#define PARAM_I2S_RESET(n) ((n==I2S_RESET_ENABLE)||(n==I2S_RESET_DISABLE)) - -/** I2S Mute bit */ -#define I2S_MUTE_ENABLE ((uint8_t)(1)) -#define I2S_MUTE_DISABLE ((uint8_t)(0)) -#define PARAM_I2S_MUTE(n) ((n==I2S_MUTE_ENABLE)||(n==I2S_MUTE_DISABLE)) - -/** I2S Transmit/Receive bit */ -#define I2S_TX_MODE ((uint8_t)(0)) -#define I2S_RX_MODE ((uint8_t)(1)) -#define PARAM_I2S_TRX(n) ((n==I2S_TX_MODE)||(n==I2S_RX_MODE)) - -/** I2S Clock Select bit */ -#define I2S_CLKSEL_0 ((uint8_t)(0)) -#define I2S_CLKSEL_1 ((uint8_t)(2)) -#define PARAM_I2S_CLKSEL(n) ((n==I2S_CLKSEL_0)||(n==I2S_CLKSEL_1)) - -/** I2S 4-pin Mode bit */ -#define I2S_4PIN_ENABLE ((uint8_t)(1)) -#define I2S_4PIN_DISABLE ((uint8_t)(0)) -#define PARAM_I2S_4PIN(n) ((n==I2S_4PIN_ENABLE)||(n==I2S_4PIN_DISABLE)) - -/** I2S MCLK Enable bit */ -#define I2S_MCLK_ENABLE ((uint8_t)(1)) -#define I2S_MCLK_DISABLE ((uint8_t)(0)) -#define PARAM_I2S_MCLK(n) ((n==I2S_MCLK_ENABLE)||(n==I2S_MCLK_DISABLE)) - -/** I2S select DMA bit */ -#define I2S_DMA_1 ((uint8_t)(0)) -#define I2S_DMA_2 ((uint8_t)(1)) -#define PARAM_I2S_DMA(n) ((n==I2S_DMA_1)||(n==I2S_DMA_2)) - -#define PARAM_I2S_DMA_DEPTH(n) ((n>=0)||(n<=31)) -#define PARAM_I2S_IRQ_LEVEL(n) ((n>=0)||(n<=31)) - -#define PARAM_I2S_HALFPERIOD(n) ((n>0)&&(n<512)) - -#define PARAM_I2S_BITRATE(n) ((n>=1)&&(n<=64)) - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup I2S_Public_Functions - * @{ - */ - -void I2S_Init(LPC_I2S_TypeDef *I2Sx); -void I2S_DeInit(LPC_I2S_TypeDef *I2Sx); - -void I2S_Config(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, I2S_CFG_Type* ConfigStruct); -Status I2S_FreqConfig(LPC_I2S_TypeDef *I2Sx, uint32_t Freq, uint8_t TRMode); -void I2S_SetBitRate(LPC_I2S_TypeDef *I2Sx, uint8_t bitrate, uint8_t TRMode); -void I2S_ModeConfig(LPC_I2S_TypeDef *I2Sx, I2S_MODEConf_Type* ModeConfig, uint8_t TRMode); - -void I2S_Send(LPC_I2S_TypeDef *I2Sx, uint32_t BufferData); -uint32_t I2S_Receive(LPC_I2S_TypeDef* I2Sx); -void I2S_Start(LPC_I2S_TypeDef *I2Sx); -void I2S_Pause(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode); -void I2S_Mute(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode); -void I2S_Stop(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode); - -void I2S_DMAConfig(LPC_I2S_TypeDef *I2Sx, I2S_DMAConf_Type* DMAConfig, uint8_t TRMode); -void I2S_DMACmd(LPC_I2S_TypeDef *I2Sx, uint8_t DMAIndex,uint8_t TRMode, FunctionalState NewState); -void I2S_IRQConfig(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode, uint8_t level, fnI2SCbs_Type *pfnI2SCbs); -void I2S_IRQCmd(LPC_I2S_TypeDef *I2Sx,uint8_t TRMode, FunctionalState NewState); -void I2S_IntHandler(void); -uint8_t I2S_GetLevel(LPC_I2S_TypeDef *I2Sx, uint8_t TRMode); - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - - -#endif /* LPC17XX_SSP_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_libcfg_default.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_libcfg_default.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_libcfg_default.h +++ /dev/null @@ -1,163 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_libcfg_default.h - * @brief : Default Library configuration header file - * @version : 1.0 - * @date : 26. Mar. 2009 - * @author : HieuNguyen - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Library Configuration group ----------------------------------------------------------- */ -/** @defgroup LIBCFG_DEFAULT - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_LIBCFG_DEFAULT_H_ -#define LPC17XX_LIBCFG_DEFAULT_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "lpc_types.h" - - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup LIBCFG_DEFAULT_Public_Macros - * @{ - */ - -/************************** DEBUG MODE DEFINITIONS *********************************/ -/* Un-comment the line below to compile the library in DEBUG mode, this will expanse - the "CHECK_PARAM" macro in the FW library code */ - -#define DEBUG 1 - - -/******************* PERIPHERAL FW LIBRARY CONFIGURATION DEFINITIONS ***********************/ - -/* Comment the line below to disable the specific peripheral inclusion */ - -/* GPIO ------------------------------- */ -#define _GPIO 1 - -/* UART ------------------------------- */ -#define _UART 1 -#define _UART0 1 -#define _UART1 1 -#define _UART2 1 -#define _UART3 1 - -/* SPI ------------------------------- */ -#define _SPI 1 - -/* SSP ------------------------------- */ -#define _SSP 1 -#define _SSP0 1 -#define _SSP1 1 - - -/* I2C ------------------------------- */ -#define _I2C 1 -#define _I2C0 1 -#define _I2C1 1 -#define _I2C2 1 - -/* TIMER ------------------------------- */ -#define _TIM 1 - -/* WDT ------------------------------- */ -#define _WDT 1 - - -/* GPDMA ------------------------------- */ -#define _GPDMA 1 - - -/* DAC ------------------------------- */ -#define _DAC 1 - -/* DAC ------------------------------- */ -#define _ADC 1 - - -/* PWM ------------------------------- */ -#define _PWM 1 -#define _PWM1 1 - -/* RTC ------------------------------- */ -#define _RTC 1 - -/* I2S ------------------------------- */ -#define _I2S 1 - -/* USB device ------------------------------- */ -#define _USBDEV 1 -#define _USB_DMA 1 - -/* QEI ------------------------------- */ -#define _QEI 1 - -/* MCPWM ------------------------------- */ -#define _MCPWM 1 - -/* CAN--------------------------------*/ -#define _CAN 1 - -/* RIT ------------------------------- */ -#define _RIT 1 - -/* EMAC ------------------------------ */ -#define _EMAC 1 - - -/************************** GLOBAL/PUBLIC MACRO DEFINITIONS *********************************/ - -#ifdef DEBUG -/******************************************************************************* -* @brief The CHECK_PARAM macro is used for function's parameters check. -* It is used only if the library is compiled in DEBUG mode. -* @param[in] expr - If expr is false, it calls check_failed() function -* which reports the name of the source file and the source -* line number of the call that failed. -* - If expr is true, it returns no value. -* @return None -*******************************************************************************/ -#define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__)) -#else -#define CHECK_PARAM(expr) -#endif /* DEBUG */ - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup LIBCFG_DEFAULT_Public_Functions - * @{ - */ - -#ifdef DEBUG -void check_failed(uint8_t *file, uint32_t line); -#endif - -/** - * @} - */ - -#endif /* LPC17XX_LIBCFG_DEFAULT_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_mcpwm.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_mcpwm.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_mcpwm.h +++ /dev/null @@ -1,317 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_mcpwm.h - * @brief : Contains all macro definitions and function prototypes - * support for Motor Control PWM firmware library on LPC17xx - * @version : 1.0 - * @date : 28. May. 2009 - * @author : HieuNguyen - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup MCPWM - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_MCPWM_H_ -#define LPC17XX_MCPWM_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup MCPWM_Private_Macros - * @{ - */ - -/** @defgroup MCPWM_REGISTER_BIT_DEFINITIONS - * @{ - */ - -/* MCPWM Control register, these macro definitions below can be applied for these - * register type: - * - MCPWM Control read address - * - MCPWM Control set address - * - MCPWM Control clear address - */ -#define MCPWM_CON_RUN(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*8)+0))) : (0)) /**< Stops/starts timer channel n */ -#define MCPWM_CON_CENTER(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*8)+1))) : (0)) /**< Edge/center aligned operation for channel n */ -#define MCPWM_CON_POLAR(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*8)+2))) : (0)) /**< Select polarity of the MCOAn and MCOBn pin */ -#define MCPWM_CON_DTE(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*8)+3))) : (0)) /**< Control the dead-time feature for channel n */ -#define MCPWM_CON_DISUP(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*8)+4))) : (0)) /**< Enable/Disable update of functional register for channel n */ -#define MCPWM_CON_INVBDC ((uint32_t)(1<<29)) /**< Control the polarity for all 3 channels */ -#define MCPWM_CON_ACMODE ((uint32_t)(1<<30)) /**< 3-phase AC mode select */ -#define MCPWM_CON_DCMODE ((uint32_t)(1<<31)) /**< 3-phase DC mode select */ - -/* Capture Control register, these macro definitions below can be applied for these - * register type: - * - MCPWM Capture Control read address - * - MCPWM Capture Control set address - * - MCPWM Capture control clear address - */ -/** Enables/Disable channel (cap) capture event on a rising edge on MCI(mci) */ -#define MCPWM_CAPCON_CAPMCI_RE(cap,mci) (((cap>=0)&&(cap<=2)&&(mci>=0)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+0))) : (0)) -/** Enables/Disable channel (cap) capture event on a falling edge on MCI(mci) */ -#define MCPWM_CAPCON_CAPMCI_FE(cap,mci) (((cap>=0)&&(cap<=2)&&(mci>=0)&&(mci<=2)) ? ((uint32_t)(1<<((cap*6)+(mci*2)+1))) : (0)) -/** TC(n) is reset by channel (n) capture event */ -#define MCPWM_CAPCON_RT(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<(18+(n)))) : (0)) -/** Hardware noise filter: channel (n) capture events are delayed */ -#define MCPWM_CAPCON_HNFCAP(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<(21+(n)))) : (0)) - -/* Interrupt registers, these macro definitions below can be applied for these - * register type: - * - MCPWM Interrupt Enable read address - * - MCPWM Interrupt Enable set address - * - MCPWM Interrupt Enable clear address - * - MCPWM Interrupt Flags read address - * - MCPWM Interrupt Flags set address - * - MCPWM Interrupt Flags clear address - */ -/** Limit interrupt for channel (n) */ -#define MCPWM_INT_ILIM(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+0))) : (0)) -/** Match interrupt for channel (n) */ -#define MCPWM_INT_IMAT(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+1))) : (0)) -/** Capture interrupt for channel (n) */ -#define MCPWM_INT_ICAP(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<((n*4)+2))) : (0)) -/** Fast abort interrupt */ -#define MCPWM_INT_ABORT ((uint32_t)(1<<15)) - -/* MCPWM Count Control register, these macro definitions below can be applied for these - * register type: - * - MCPWM Count Control read address - * - MCPWM Count Control set address - * - MCPWM Count Control clear address - */ -/** Counter(tc) advances on a rising edge on MCI(mci) pin */ -#define MCPWM_CNTCON_TCMCI_RE(tc,mci) (((tc>=0)&&(tc<=2)&&(mci>=0)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+0))) : (0)) -/** Counter(cnt) advances on a falling edge on MCI(mci) pin */ -#define MCPWM_CNTCON_TCMCI_FE(tc,mci) (((tc>=0)&&(tc<=2)&&(mci>=0)&&(mci<=2)) ? ((uint32_t)(1<<((6*tc)+(2*mci)+1))) : (0)) -/** Channel (n) is in counter mode */ -#define MCPWM_CNTCON_CNTR(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<<(29+n))) : (0)) - -/* MCPWM Timer/Counter 0-2 registers --------------------------------------------------- */ -/* MCPWM Limit 0-2 registers ----------------------------------------------------------- */ -/* MCPWM Match 0-2 registers ----------------------------------------------------------- */ - -/* MCPWM Dead-time register ------------------------------------------------------------ */ -/** Dead time value x for channel n */ -#define MCPWM_DT(n,x) (((n>=0)&&(n<=2)) ? ((uint32_t)((x&0x3FF)<<(n*10))) : (0)) - -/* MCPWM Communication Pattern register ------------------------------------------------ */ -#define MCPWM_CP_A0 ((uint32_t)(1<<0)) /**< MCOA0 tracks internal MCOA0 */ -#define MCPWM_CP_B0 ((uint32_t)(1<<1)) /**< MCOB0 tracks internal MCOA0 */ -#define MCPWM_CP_A1 ((uint32_t)(1<<2)) /**< MCOA1 tracks internal MCOA0 */ -#define MCPWM_CP_B1 ((uint32_t)(1<<3)) /**< MCOB1 tracks internal MCOA0 */ -#define MCPWM_CP_A2 ((uint32_t)(1<<4)) /**< MCOA2 tracks internal MCOA0 */ -#define MCPWM_CP_B2 ((uint32_t)(1<<5)) /**< MCOB2 tracks internal MCOA0 */ - -/* MCPWM Capture Registers ------------------------------------------------------------- */ -/* MCPWM Capture read addresses */ - -/* MCPWM Capture clear address --------------------------------------------------------- */ -/** Clear the MCCAP (n) register */ -#define MCPWM_CAPCLR_CAP(n) (((n>=0)&&(n<=2)) ? ((uint32_t)(1<=0) && (n<=6)) -#define PARAM_PWM1_CHANNEL(n) ((n>=1) && (n<=6)) -#define PARAM_PWM1_EDGE_MODE_CHANNEL(n) ((n>=2) && (n<=6)) -#define PARAM_PWM1_CAPTURE_CHANNEL(n) ((n==0) || (n==1)) - - -/* Timer/Counter in PWM configuration type definition -----------------------------------*/ - -/** @brief PMW TC mode select option */ -typedef enum { - PWM_MODE_TIMER = 0, /*!< PWM using Timer mode */ - PWM_MODE_COUNTER, /*!< PWM using Counter mode */ -} PWM_TC_MODE_OPT; - -#define PARAM_PWM_TC_MODE(n) ((n==PWM_MODE_TIMER) || (n==PWM_MODE_COUNTER)) - - -/** @brief PWM Timer/Counter prescale option */ -typedef enum -{ - PWM_TIMER_PRESCALE_TICKVAL = 0, /*!< Prescale in absolute value */ - PWM_TIMER_PRESCALE_USVAL /*!< Prescale in microsecond value */ -} PWM_TIMER_PRESCALE_OPT; - -#define PARAM_PWM_TIMER_PRESCALE(n) ((n==PWM_TIMER_PRESCALE_TICKVAL) || (n==PWM_TIMER_PRESCALE_USVAL)) - - -/** @brief PWM Input Select in counter mode */ -typedef enum { - PWM_COUNTER_PCAP1_0 = 0, /*!< PWM Counter input selected is PCAP1.0 pin */ - PWM_COUNTER_PCAP1_1 /*!< PWM counter input selected is CAP1.1 pin */ -} PWM_COUNTER_INPUTSEL_OPT; - -#define PARAM_PWM_COUNTER_INPUTSEL(n) ((n==PWM_COUNTER_PCAP1_0) || (n==PWM_COUNTER_PCAP1_1)) - -/** @brief PWM Input Edge Option in counter mode */ -typedef enum { - PWM_COUNTER_RISING = 1, /*!< Rising edge mode */ - PWM_COUNTER_FALLING = 2, /*!< Falling edge mode */ - PWM_COUNTER_ANY = 3 /*!< Both rising and falling mode */ -} PWM_COUNTER_EDGE_OPT; - -#define PARAM_PWM_COUNTER_EDGE(n) ((n==PWM_COUNTER_RISING) || (n==PWM_COUNTER_FALLING) \ -|| (n==PWM_COUNTER_ANY)) - - -/* PWM configuration type definition ----------------------------------------------------- */ -/** @brief PWM operating mode options */ -typedef enum { - PWM_CHANNEL_SINGLE_EDGE, /*!< PWM Channel Single edge mode */ - PWM_CHANNEL_DUAL_EDGE /*!< PWM Channel Dual edge mode */ -} PWM_CHANNEL_EDGE_OPT; - -#define PARAM_PWM_CHANNEL_EDGE(n) ((n==PWM_CHANNEL_SINGLE_EDGE) || (n==PWM_CHANNEL_DUAL_EDGE)) - - -/** @brief PWM update type */ -typedef enum { - PWM_MATCH_UPDATE_NOW = 0, /**< PWM Match Channel Update Now */ - PWM_MATCH_UPDATE_NEXT_RST /**< PWM Match Channel Update on next - PWM Counter resetting */ -} PWM_MATCH_UPDATE_OPT; - -#define PARAM_PWM_MATCH_UPDATE(n) ((n==PWM_MATCH_UPDATE_NOW) || (n==PWM_MATCH_UPDATE_NEXT_RST)) - - -/** @brief PWM interrupt status type definition ----------------------------------------------------- */ -/** @brief PWM Interrupt status type */ -typedef enum -{ - PWM_INTSTAT_MR0 = PWM_IR_PWMMRn(0), /**< Interrupt flag for PWM match channel 0 */ - PWM_INTSTAT_MR1 = PWM_IR_PWMMRn(1), /**< Interrupt flag for PWM match channel 1 */ - PWM_INTSTAT_MR2 = PWM_IR_PWMMRn(2), /**< Interrupt flag for PWM match channel 2 */ - PWM_INTSTAT_MR3 = PWM_IR_PWMMRn(3), /**< Interrupt flag for PWM match channel 3 */ - PWM_INTSTAT_CAP0 = PWM_IR_PWMCAPn(0), /**< Interrupt flag for capture input 0 */ - PWM_INTSTAT_CAP1 = PWM_IR_PWMCAPn(1), /**< Interrupt flag for capture input 1 */ - PWM_INTSTAT_MR4 = PWM_IR_PWMMRn(4), /**< Interrupt flag for PWM match channel 4 */ - PWM_INTSTAT_MR6 = PWM_IR_PWMMRn(5), /**< Interrupt flag for PWM match channel 5 */ - PWM_INTSTAT_MR5 = PWM_IR_PWMMRn(6), /**< Interrupt flag for PWM match channel 6 */ -}PWM_INTSTAT_TYPE; - -#define PARAM_PWM_INTSTAT(n) ((n==PWM_INTSTAT_MR0) || (n==PWM_INTSTAT_MR1) || (n==PWM_INTSTAT_MR2) \ -|| (n==PWM_INTSTAT_MR3) || (n==PWM_INTSTAT_MR4) || (n==PWM_INTSTAT_MR5) \ -|| (n==PWM_INTSTAT_MR6) || (n==PWM_INTSTAT_CAP0) || (n==PWM_INTSTAT_CAP1)) - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup PWM_Public_Functions - * @{ - */ - -void PWM_PinConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWM_Channel, uint8_t PinselOption); -IntStatus PWM_GetIntStatus(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag); -void PWM_ClearIntPending(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag); -void PWM_ConfigStructInit(uint8_t PWMTimerCounterMode, void *PWM_InitStruct); -void PWM_Init(LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct); -void PWM_DeInit (LPC_PWM_TypeDef *PWMx); -void PWM_Cmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState); -void PWM_CounterCmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState); -void PWM_ResetCounter(LPC_PWM_TypeDef *PWMx); -void PWM_ConfigMatch(LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct); -void PWM_ConfigCapture(LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct); -uint32_t PWM_GetCaptureValue(LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel); -void PWM_MatchUpdate(LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, \ - uint32_t MatchValue, uint8_t UpdateType); -void PWM_ChannelConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption); -void PWM_ChannelCmd(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_PWM_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_qei.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_qei.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_qei.h +++ /dev/null @@ -1,414 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_qei.h - * @brief : Contains all macro definitions and function prototypes - * support for QEI firmware library on LPC17xx - * @version : 1.0 - * @date : 26. May. 2009 - * @author : HieuNguyen - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup QEI - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_QEI_H_ -#define LPC17XX_QEI_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup QEI_Private_Macros - * @{ - */ - -/** @defgroup QEI_REGISTER_BIT_DEFINITIONS - * @{ - */ - -/* Quadrature Encoder Interface Control Register Definition --------------------- */ -/* QEI Control register */ -#define QEI_CON_RESP ((uint32_t)(1<<0)) /**< Reset position counter */ -#define QEI_CON_RESPI ((uint32_t)(1<<1)) /**< Reset Posistion Counter on Index */ -#define QEI_CON_RESV ((uint32_t)(1<<2)) /**< Reset Velocity */ -#define QEI_CON_RESI ((uint32_t)(1<<3)) /**< Reset Index Counter */ -#define QEI_CON_BITMASK ((uint32_t)(0x0F)) /**< QEI Control register bit-mask */ - -/* QEI Configuration register */ -#define QEI_CONF_DIRINV ((uint32_t)(1<<0)) /**< Direction Invert */ -#define QEI_CONF_SIGMODE ((uint32_t)(1<<1)) /**< Signal mode */ -#define QEI_CONF_CAPMODE ((uint32_t)(1<<2)) /**< Capture mode */ -#define QEI_CONF_INVINX ((uint32_t)(1<<3)) /**< Invert index */ -#define QEI_CONF_BITMASK ((uint32_t)(0x0F)) /**< QEI Configuration register bit-mask */ - -/* QEI Status register */ -#define QEI_STAT_DIR ((uint32_t)(1<<0)) /**< Direction bit */ -#define QEI_STAT_BITMASK ((uint32_t)(1<<0)) /**< QEI status register bit-mask */ - -/* Quadrature Encoder Interface Position, index and timer Register Definitions --- */ -/* QEI Position register */ - -/* QEI Maximum Position register */ - -/* QEI Position Compare register 0 */ - -/* QEI Position Compare register 1 */ - -/* QEI Position Compare register 2 */ - -/* QEI Index Count register */ - -/* QEI Index Compare register */ - -/* QEI Timer Reload register */ - -/* QEI Timer register */ - -/* QEI Velocity register */ - -/* QEI Velocity Capture register */ - -/* QEI Velocity Compare register */ - -/* QEI Digital Filter register */ - -/* Quadrature Encoder Interface Interrupt registers definitions --------------------- */ -/* QEI Interrupt Status register */ -#define QEI_INTSTAT_INX_Int ((uint32_t)(1<<0)) /**< Indicates that an index pulse was detected */ -#define QEI_INTSTAT_TIM_Int ((uint32_t)(1<<1)) /**< Indicates that a velocity timer overflow occurred */ -#define QEI_INTSTAT_VELC_Int ((uint32_t)(1<<2)) /**< Indicates that capture velocity is less than compare velocity */ -#define QEI_INTSTAT_DIR_Int ((uint32_t)(1<<3)) /**< Indicates that a change of direction was detected */ -#define QEI_INTSTAT_ERR_Int ((uint32_t)(1<<4)) /**< Indicates that an encoder phase error was detected */ -#define QEI_INTSTAT_ENCLK_Int ((uint32_t)(1<<5)) /**< Indicates that and encoder clock pulse was detected */ -#define QEI_INTSTAT_POS0_Int ((uint32_t)(1<<6)) /**< Indicates that the position 0 compare value is equal to the - current position */ -#define QEI_INTSTAT_POS1_Int ((uint32_t)(1<<7)) /**< Indicates that the position 1compare value is equal to the - current position */ -#define QEI_INTSTAT_POS2_Int ((uint32_t)(1<<8)) /**< Indicates that the position 2 compare value is equal to the - current position */ -#define QEI_INTSTAT_REV_Int ((uint32_t)(1<<9)) /**< Indicates that the index compare value is equal to the current - index count */ -#define QEI_INTSTAT_POS0REV_Int ((uint32_t)(1<<10)) /**< Combined position 0 and revolution count interrupt. Set when - both the POS0_Int bit is set and the REV_Int is set */ -#define QEI_INTSTAT_POS1REV_Int ((uint32_t)(1<<11)) /**< Combined position 1 and revolution count interrupt. Set when - both the POS1_Int bit is set and the REV_Int is set */ -#define QEI_INTSTAT_POS2REV_Int ((uint32_t)(1<<12)) /**< Combined position 2 and revolution count interrupt. Set when - both the POS2_Int bit is set and the REV_Int is set */ -#define QEI_INTSTAT_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Status register bit-mask */ - -/* QEI Interrupt Set register */ -#define QEI_INTSET_INX_Int ((uint32_t)(1<<0)) /**< Set Bit Indicates that an index pulse was detected */ -#define QEI_INTSET_TIM_Int ((uint32_t)(1<<1)) /**< Set Bit Indicates that a velocity timer overflow occurred */ -#define QEI_INTSET_VELC_Int ((uint32_t)(1<<2)) /**< Set Bit Indicates that capture velocity is less than compare velocity */ -#define QEI_INTSET_DIR_Int ((uint32_t)(1<<3)) /**< Set Bit Indicates that a change of direction was detected */ -#define QEI_INTSET_ERR_Int ((uint32_t)(1<<4)) /**< Set Bit Indicates that an encoder phase error was detected */ -#define QEI_INTSET_ENCLK_Int ((uint32_t)(1<<5)) /**< Set Bit Indicates that and encoder clock pulse was detected */ -#define QEI_INTSET_POS0_Int ((uint32_t)(1<<6)) /**< Set Bit Indicates that the position 0 compare value is equal to the - current position */ -#define QEI_INTSET_POS1_Int ((uint32_t)(1<<7)) /**< Set Bit Indicates that the position 1compare value is equal to the - current position */ -#define QEI_INTSET_POS2_Int ((uint32_t)(1<<8)) /**< Set Bit Indicates that the position 2 compare value is equal to the - current position */ -#define QEI_INTSET_REV_Int ((uint32_t)(1<<9)) /**< Set Bit Indicates that the index compare value is equal to the current - index count */ -#define QEI_INTSET_POS0REV_Int ((uint32_t)(1<<10)) /**< Set Bit that combined position 0 and revolution count interrupt */ -#define QEI_INTSET_POS1REV_Int ((uint32_t)(1<<11)) /**< Set Bit that Combined position 1 and revolution count interrupt */ -#define QEI_INTSET_POS2REV_Int ((uint32_t)(1<<12)) /**< Set Bit that Combined position 2 and revolution count interrupt */ -#define QEI_INTSET_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Set register bit-mask */ - -/* QEI Interrupt Clear register */ -#define QEI_INTCLR_INX_Int ((uint32_t)(1<<0)) /**< Clear Bit Indicates that an index pulse was detected */ -#define QEI_INTCLR_TIM_Int ((uint32_t)(1<<1)) /**< Clear Bit Indicates that a velocity timer overflow occurred */ -#define QEI_INTCLR_VELC_Int ((uint32_t)(1<<2)) /**< Clear Bit Indicates that capture velocity is less than compare velocity */ -#define QEI_INTCLR_DIR_Int ((uint32_t)(1<<3)) /**< Clear Bit Indicates that a change of direction was detected */ -#define QEI_INTCLR_ERR_Int ((uint32_t)(1<<4)) /**< Clear Bit Indicates that an encoder phase error was detected */ -#define QEI_INTCLR_ENCLK_Int ((uint32_t)(1<<5)) /**< Clear Bit Indicates that and encoder clock pulse was detected */ -#define QEI_INTCLR_POS0_Int ((uint32_t)(1<<6)) /**< Clear Bit Indicates that the position 0 compare value is equal to the - current position */ -#define QEI_INTCLR_POS1_Int ((uint32_t)(1<<7)) /**< Clear Bit Indicates that the position 1compare value is equal to the - current position */ -#define QEI_INTCLR_POS2_Int ((uint32_t)(1<<8)) /**< Clear Bit Indicates that the position 2 compare value is equal to the - current position */ -#define QEI_INTCLR_REV_Int ((uint32_t)(1<<9)) /**< Clear Bit Indicates that the index compare value is equal to the current - index count */ -#define QEI_INTCLR_POS0REV_Int ((uint32_t)(1<<10)) /**< Clear Bit that combined position 0 and revolution count interrupt */ -#define QEI_INTCLR_POS1REV_Int ((uint32_t)(1<<11)) /**< Clear Bit that Combined position 1 and revolution count interrupt */ -#define QEI_INTCLR_POS2REV_Int ((uint32_t)(1<<12)) /**< Clear Bit that Combined position 2 and revolution count interrupt */ -#define QEI_INTCLR_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Clear register bit-mask */ - -/* QEI Interrupt Enable register */ -#define QEI_INTEN_INX_Int ((uint32_t)(1<<0)) /**< Enabled Interrupt Bit Indicates that an index pulse was detected */ -#define QEI_INTEN_TIM_Int ((uint32_t)(1<<1)) /**< Enabled Interrupt Bit Indicates that a velocity timer overflow occurred */ -#define QEI_INTEN_VELC_Int ((uint32_t)(1<<2)) /**< Enabled Interrupt Bit Indicates that capture velocity is less than compare velocity */ -#define QEI_INTEN_DIR_Int ((uint32_t)(1<<3)) /**< Enabled Interrupt Bit Indicates that a change of direction was detected */ -#define QEI_INTEN_ERR_Int ((uint32_t)(1<<4)) /**< Enabled Interrupt Bit Indicates that an encoder phase error was detected */ -#define QEI_INTEN_ENCLK_Int ((uint32_t)(1<<5)) /**< Enabled Interrupt Bit Indicates that and encoder clock pulse was detected */ -#define QEI_INTEN_POS0_Int ((uint32_t)(1<<6)) /**< Enabled Interrupt Bit Indicates that the position 0 compare value is equal to the - current position */ -#define QEI_INTEN_POS1_Int ((uint32_t)(1<<7)) /**< Enabled Interrupt Bit Indicates that the position 1compare value is equal to the - current position */ -#define QEI_INTEN_POS2_Int ((uint32_t)(1<<8)) /**< Enabled Interrupt Bit Indicates that the position 2 compare value is equal to the - current position */ -#define QEI_INTEN_REV_Int ((uint32_t)(1<<9)) /**< Enabled Interrupt Bit Indicates that the index compare value is equal to the current - index count */ -#define QEI_INTEN_POS0REV_Int ((uint32_t)(1<<10)) /**< Enabled Interrupt Bit that combined position 0 and revolution count interrupt */ -#define QEI_INTEN_POS1REV_Int ((uint32_t)(1<<11)) /**< Enabled Interrupt Bit that Combined position 1 and revolution count interrupt */ -#define QEI_INTEN_POS2REV_Int ((uint32_t)(1<<12)) /**< Enabled Interrupt Bit that Combined position 2 and revolution count interrupt */ -#define QEI_INTEN_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Enable register bit-mask */ - -/* QEI Interrupt Enable Set register */ -#define QEI_IESET_INX_Int ((uint32_t)(1<<0)) /**< Set Enable Interrupt Bit Indicates that an index pulse was detected */ -#define QEI_IESET_TIM_Int ((uint32_t)(1<<1)) /**< Set Enable Interrupt Bit Indicates that a velocity timer overflow occurred */ -#define QEI_IESET_VELC_Int ((uint32_t)(1<<2)) /**< Set Enable Interrupt Bit Indicates that capture velocity is less than compare velocity */ -#define QEI_IESET_DIR_Int ((uint32_t)(1<<3)) /**< Set Enable Interrupt Bit Indicates that a change of direction was detected */ -#define QEI_IESET_ERR_Int ((uint32_t)(1<<4)) /**< Set Enable Interrupt Bit Indicates that an encoder phase error was detected */ -#define QEI_IESET_ENCLK_Int ((uint32_t)(1<<5)) /**< Set Enable Interrupt Bit Indicates that and encoder clock pulse was detected */ -#define QEI_IESET_POS0_Int ((uint32_t)(1<<6)) /**< Set Enable Interrupt Bit Indicates that the position 0 compare value is equal to the - current position */ -#define QEI_IESET_POS1_Int ((uint32_t)(1<<7)) /**< Set Enable Interrupt Bit Indicates that the position 1compare value is equal to the - current position */ -#define QEI_IESET_POS2_Int ((uint32_t)(1<<8)) /**< Set Enable Interrupt Bit Indicates that the position 2 compare value is equal to the - current position */ -#define QEI_IESET_REV_Int ((uint32_t)(1<<9)) /**< Set Enable Interrupt Bit Indicates that the index compare value is equal to the current - index count */ -#define QEI_IESET_POS0REV_Int ((uint32_t)(1<<10)) /**< Set Enable Interrupt Bit that combined position 0 and revolution count interrupt */ -#define QEI_IESET_POS1REV_Int ((uint32_t)(1<<11)) /**< Set Enable Interrupt Bit that Combined position 1 and revolution count interrupt */ -#define QEI_IESET_POS2REV_Int ((uint32_t)(1<<12)) /**< Set Enable Interrupt Bit that Combined position 2 and revolution count interrupt */ -#define QEI_IESET_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Enable Set register bit-mask */ - -/* QEI Interrupt Enable Clear register */ -#define QEI_IECLR_INX_Int ((uint32_t)(1<<0)) /**< Clear Enabled Interrupt Bit Indicates that an index pulse was detected */ -#define QEI_IECLR_TIM_Int ((uint32_t)(1<<1)) /**< Clear Enabled Interrupt Bit Indicates that a velocity timer overflow occurred */ -#define QEI_IECLR_VELC_Int ((uint32_t)(1<<2)) /**< Clear Enabled Interrupt Bit Indicates that capture velocity is less than compare velocity */ -#define QEI_IECLR_DIR_Int ((uint32_t)(1<<3)) /**< Clear Enabled Interrupt Bit Indicates that a change of direction was detected */ -#define QEI_IECLR_ERR_Int ((uint32_t)(1<<4)) /**< Clear Enabled Interrupt Bit Indicates that an encoder phase error was detected */ -#define QEI_IECLR_ENCLK_Int ((uint32_t)(1<<5)) /**< Clear Enabled Interrupt Bit Indicates that and encoder clock pulse was detected */ -#define QEI_IECLR_POS0_Int ((uint32_t)(1<<6)) /**< Clear Enabled Interrupt Bit Indicates that the position 0 compare value is equal to the - current position */ -#define QEI_IECLR_POS1_Int ((uint32_t)(1<<7)) /**< Clear Enabled Interrupt Bit Indicates that the position 1compare value is equal to the - current position */ -#define QEI_IECLR_POS2_Int ((uint32_t)(1<<8)) /**< Clear Enabled Interrupt Bit Indicates that the position 2 compare value is equal to the - current position */ -#define QEI_IECLR_REV_Int ((uint32_t)(1<<9)) /**< Clear Enabled Interrupt Bit Indicates that the index compare value is equal to the current - index count */ -#define QEI_IECLR_POS0REV_Int ((uint32_t)(1<<10)) /**< Clear Enabled Interrupt Bit that combined position 0 and revolution count interrupt */ -#define QEI_IECLR_POS1REV_Int ((uint32_t)(1<<11)) /**< Clear Enabled Interrupt Bit that Combined position 1 and revolution count interrupt */ -#define QEI_IECLR_POS2REV_Int ((uint32_t)(1<<12)) /**< Clear Enabled Interrupt Bit that Combined position 2 and revolution count interrupt */ -#define QEI_IECLR_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Enable Clear register bit-mask */ - - -/** - * @} - */ - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup QEI_Public_Types - * @{ - */ - -/** - * @brief QEI Configuration structure type definition - */ -typedef struct { - uint32_t DirectionInvert :1; /**< Direction invert option: - - QEI_DIRINV_NONE: QEI Direction is normal - - QEI_DIRINV_CMPL: QEI Direction is complemented - */ - uint32_t SignalMode :1; /**< Signal mode Option: - - QEI_SIGNALMODE_QUAD: Signal is in Quadrature phase mode - - QEI_SIGNALMODE_CLKDIR: Signal is in Clock/Direction mode - */ - uint32_t CaptureMode :1; /**< Capture Mode Option: - - QEI_CAPMODE_2X: Only Phase-A edges are counted (2X) - - QEI_CAPMODE_4X: BOTH Phase-A and Phase-B edges are counted (4X) - */ - uint32_t InvertIndex :1; /**< Invert Index Option: - - QEI_INVINX_NONE: the sense of the index input is normal - - QEI_INVINX_EN: inverts the sense of the index input - */ -} QEI_CFG_Type; - -/** - * @brief Timer Reload Configuration structure type definition - */ -typedef struct { - - uint8_t ReloadOption; /**< Velocity Timer Reload Option, should be: - - QEI_TIMERRELOAD_TICKVAL: Reload value in absolute value - - QEI_TIMERRELOAD_USVAL: Reload value in microsecond value - */ - uint8_t Reserved[3]; - uint32_t ReloadValue; /**< Velocity Timer Reload Value, 32-bit long, should be matched - with Velocity Timer Reload Option - */ -} QEI_RELOADCFG_Type; - -/** - * @} - */ - - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup QEI_Public_Macros - * @{ - */ - -#define PARAM_QEIx(n) ((n==LPC_QEI)) - -/* QEI Reset types */ -#define QEI_RESET_POS QEI_CON_RESP /**< Reset position counter */ -#define QEI_RESET_POSOnIDX QEI_CON_RESPI /**< Reset Posistion Counter on Index */ -#define QEI_RESET_VEL QEI_CON_RESV /**< Reset Velocity */ -#define QEI_RESET_IDX QEI_CON_RESI /**< Reset Index Counter */ - -#define PARAM_QEI_RESET(n) ((n==QEI_CON_RESP) \ -|| (n==QEI_RESET_POSOnIDX) \ -|| (n==QEI_RESET_VEL) \ -|| (n==QEI_RESET_IDX)) - -/* QEI Direction Invert Type Option */ -#define QEI_DIRINV_NONE ((uint32_t)(0)) /**< Direction is not inverted */ -#define QEI_DIRINV_CMPL ((uint32_t)(1)) /**< Direction is complemented */ - -#define PARAM_QEI_DIRINV(n) ((n==QEI_DIRINV_NONE) || (n==QEI_DIRINV_CMPL)) - -/* QEI Signal Mode Option */ -#define QEI_SIGNALMODE_QUAD ((uint32_t)(0)) /**< Signal operation: Quadrature phase mode */ -#define QEI_SIGNALMODE_CLKDIR ((uint32_t)(1)) /**< Signal operation: Clock/Direction mode */ - -#define PARAM_QEI_SIGNALMODE(n) ((n==QEI_SIGNALMODE_QUAD) || (n==QEI_SIGNALMODE_CLKDIR)) - -/* QEI Capture Mode Option */ -#define QEI_CAPMODE_2X ((uint32_t)(0)) /**< Capture mode: Only Phase-A edges are counted (2X) */ -#define QEI_CAPMODE_4X ((uint32_t)(1)) /**< Capture mode: BOTH PhA and PhB edges are counted (4X)*/ - -#define PARAM_QEI_CAPMODE(n) ((n==QEI_CAPMODE_2X) || (n==QEI_CAPMODE_4X)) - -/* QEI Invert Index Signal Option */ -#define QEI_INVINX_NONE ((uint32_t)(0)) /**< Invert Index signal option: None */ -#define QEI_INVINX_EN ((uint32_t)(1)) /**< Invert Index signal option: Enable */ - -#define PARAM_QEI_INVINX(n) ((n==QEI_INVINX_NONE) || (n==QEI_INVINX_EN)) - -/* QEI timer reload option */ -#define QEI_TIMERRELOAD_TICKVAL ((uint8_t)(0)) /**< Reload value in absolute value */ -#define QEI_TIMERRELOAD_USVAL ((uint8_t)(1)) /**< Reload value in microsecond value */ -#define PARAM_QEI_TIMERRELOAD(n) ((n==QEI_TIMERRELOAD_TICKVAL) || (n==QEI_TIMERRELOAD_USVAL)) - -/* QEI Flag Status type */ -#define QEI_STATUS_DIR ((uint32_t)(1<<0)) /**< Direction status */ -#define PARAM_QEI_STATUS(n) ((n==QEI_STATUS_DIR)) - -/* QEI Compare Position channel option */ -#define QEI_COMPPOS_CH_0 ((uint8_t)(0)) /**< QEI compare position channel 0 */ -#define QEI_COMPPOS_CH_1 ((uint8_t)(1)) /**< QEI compare position channel 1 */ -#define QEI_COMPPOS_CH_2 ((uint8_t)(2)) /**< QEI compare position channel 2 */ -#define PARAM_QEI_COMPPOS_CH(n) ((n==QEI_COMPPOS_CH_0) || (n==QEI_COMPPOS_CH_1) || (n==QEI_COMPPOS_CH_2)) - -/* QEI interrupt flag type */ -#define QEI_INTFLAG_INX_Int ((uint32_t)(1<<0)) /**< index pulse was detected interrupt */ -#define QEI_INTFLAG_TIM_Int ((uint32_t)(1<<1)) /**< Velocity timer over flow interrupt */ -#define QEI_INTFLAG_VELC_Int ((uint32_t)(1<<2)) /**< Capture velocity is less than compare interrupt */ -#define QEI_INTFLAG_DIR_Int ((uint32_t)(1<<3)) /**< Change of direction interrupt */ -#define QEI_INTFLAG_ERR_Int ((uint32_t)(1<<4)) /**< An encoder phase error interrupt */ -#define QEI_INTFLAG_ENCLK_Int ((uint32_t)(1<<5)) /**< An encoder clock pulse was detected interrupt */ -#define QEI_INTFLAG_POS0_Int ((uint32_t)(1<<6)) /**< position 0 compare value is equal to the - current position interrupt */ -#define QEI_INTFLAG_POS1_Int ((uint32_t)(1<<7)) /**< position 1 compare value is equal to the - current position interrupt */ -#define QEI_INTFLAG_POS2_Int ((uint32_t)(1<<8)) /**< position 2 compare value is equal to the - current position interrupt */ -#define QEI_INTFLAG_REV_Int ((uint32_t)(1<<9)) /**< Index compare value is equal to the current - index count interrupt */ -#define QEI_INTFLAG_POS0REV_Int ((uint32_t)(1<<10)) /**< Combined position 0 and revolution count interrupt */ -#define QEI_INTFLAG_POS1REV_Int ((uint32_t)(1<<11)) /**< Combined position 1 and revolution count interrupt */ -#define QEI_INTFLAG_POS2REV_Int ((uint32_t)(1<<12)) /**< Combined position 2 and revolution count interrupt */ - -#define PARAM_QEI_INTFLAG(n) ((n==QEI_INTFLAG_INX_Int) \ -|| (n==QEI_INTFLAG_TIM_Int) \ -|| (n==QEI_INTFLAG_VELC_Int) \ -|| (n==QEI_INTFLAG_DIR_Int) \ -|| (n==QEI_INTFLAG_ERR_Int) \ -|| (n==QEI_INTFLAG_ENCLK_Int) \ -|| (n==QEI_INTFLAG_POS0_Int) \ -|| (n==QEI_INTFLAG_POS1_Int) \ -|| (n==QEI_INTFLAG_POS2_Int) \ -|| (n==QEI_INTFLAG_REV_Int) \ -|| (n==QEI_INTFLAG_POS0REV_Int) \ -|| (n==QEI_INTFLAG_POS1REV_Int) \ -|| (n==QEI_INTFLAG_POS2REV_Int)) - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup QEI_Public_Functions - * @{ - */ - -void QEI_Reset(LPC_QEI_TypeDef *QEIx, uint32_t ulResetType); -void QEI_Init(LPC_QEI_TypeDef *QEIx, QEI_CFG_Type *QEI_ConfigStruct); -void QEI_ConfigStructInit(QEI_CFG_Type *QIE_InitStruct); -void QEI_DeInit(LPC_QEI_TypeDef *QEIx); -FlagStatus QEI_GetStatus(LPC_QEI_TypeDef *QEIx, uint32_t ulFlagType); -uint32_t QEI_GetPosition(LPC_QEI_TypeDef *QEIx); -void QEI_SetMaxPosition(LPC_QEI_TypeDef *QEIx, uint32_t ulMaxPos); -void QEI_SetPositionComp(LPC_QEI_TypeDef *QEIx, uint8_t bPosCompCh, uint32_t ulPosComp); -uint32_t QEI_GetIndex(LPC_QEI_TypeDef *QEIx); -void QEI_SetIndexComp(LPC_QEI_TypeDef *QEIx, uint32_t ulIndexComp); -void QEI_SetTimerReload(LPC_QEI_TypeDef *QEIx, QEI_RELOADCFG_Type *QEIReloadStruct); -uint32_t QEI_GetTimer(LPC_QEI_TypeDef *QEIx); -uint32_t QEI_GetVelocity(LPC_QEI_TypeDef *QEIx); -uint32_t QEI_GetVelocityCap(LPC_QEI_TypeDef *QEIx); -void QEI_SetVelocityComp(LPC_QEI_TypeDef *QEIx, uint32_t ulVelComp); -void QEI_SetDigiFilter(LPC_QEI_TypeDef *QEIx, uint32_t ulSamplingPulse); -FlagStatus QEI_GetIntStatus(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType); -void QEI_IntCmd(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType, FunctionalState NewState); -void QEI_IntSet(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType); -void QEI_IntClear(LPC_QEI_TypeDef *QEIx, uint32_t ulIntType); -uint32_t QEI_CalculateRPM(LPC_QEI_TypeDef *QEIx, uint32_t ulVelCapValue, uint32_t ulPPR); - - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_QEI_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_rit.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_rit.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_rit.h +++ /dev/null @@ -1,122 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_rit.h - * @brief : Contains all macro definitions and function prototypes - * support for RIT firmware library on LPC17xx - * @version : 1.0 - * @date : 07. May. 2009 - * @author : NguyenCao - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup RIT - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_RIT_H_ -#define LPC17XX_RIT_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup RIT_Private_Macros - * @{ - */ - -/** @defgroup RIT_REGISTER_BIT_DEFINITIONS - * @{ - */ - -/*********************************************************************//** - * Macro defines for RIT control register - **********************************************************************/ -/** Set interrupt flag when the counter value equals the masked compare value */ -#define RIT_CTRL_INTEN ((uint32_t) (1)) -/** Set timer enable clear to 0 when the counter value equals the masked compare value */ -#define RIT_CTRL_ENCLR ((uint32_t) _BIT(1)) -/** Set timer enable on break */ -#define RIT_CTRL_ENBR ((uint32_t) _BIT(2)) -/** Set timer enable */ -#define RIT_CTRL_TEN ((uint32_t) _BIT(3)) - -/** - * @} - */ - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup RIT_Public_Types - * @{ - */ - -/** - * @brief RIT compare configuration structure definition - */ -typedef struct -{ - uint32_t CMPVAL; /** Compare Value */ - uint32_t MASKVAL; /** Mask Value */ - uint32_t COUNTVAL; /** Counter Value */ -}RIT_CMP_VAL; - -/*************************** GLOBAL/PUBLIC MACROS ***************************/ -/** Macro to determine if it is valid RIT peripheral */ -#define PARAM_RITx(n) (((uint32_t *)n)==((uint32_t *)LPC_RIT)) - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup RIT_Public_Functions - * @{ - */ - -void RIT_Init(LPC_RIT_TypeDef *RITx); -void RIT_DeInit(LPC_RIT_TypeDef *RITx); -void RIT_TimerConfig(LPC_RIT_TypeDef *RITx, RIT_CMP_VAL *value); -void RIT_Cmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState); -void RIT_TimerClearCmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState); -void RIT_TimerEnableOnBreakCmd(LPC_RIT_TypeDef *RITx, FunctionalState NewState); -IntStatus RIT_GetIntStatus(LPC_RIT_TypeDef *RITx); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_RIT_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_rtc.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_rtc.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_rtc.h +++ /dev/null @@ -1,307 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_rtc.h - * @brief : Contains all macro definitions and function prototypes - * support for RTC firmware library on LPC17xx - * @version : 1.0 - * @date : 23. Apr. 2009 - * @author : HieuNguyen - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup RTC - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_RTC_H_ -#define LPC17XX_RTC_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup RTC_Private_Macros - * @{ - */ - -/** @defgroup RTC_REGISTER_BIT_DEFINITIONS - * @{ - */ - -/* Miscellaneous register group --------------------------------------------- */ - -/********************************************************************** -* ILR register definitions -**********************************************************************/ -/** ILR register mask */ -#define RTC_ILR_BITMASK ((0x00000003)) -/** Bit inform the source interrupt is counter increment*/ -#define RTC_IRL_RTCCIF ((1<<0)) -/** Bit inform the source interrupt is alarm match*/ -#define RTC_IRL_RTCALF ((1<<1)) - - -/********************************************************************** -* CCR register definitions -**********************************************************************/ -/** CCR register mask */ -#define RTC_CCR_BITMASK ((0x00000013)) -/** Clock enable */ -#define RTC_CCR_CLKEN ((1<<0)) -/** Clock reset */ -#define RTC_CCR_CTCRST ((1<<1)) -/** Calibration counter enable */ -#define RTC_CCR_CCALEN ((1<<4)) - - -/********************************************************************** -* CIIR register definitions -**********************************************************************/ -/** Counter Increment Interrupt bit for second */ -#define RTC_CIIR_IMSEC ((1<<0)) -/** Counter Increment Interrupt bit for minute */ -#define RTC_CIIR_IMMIN ((1<<1)) -/** Counter Increment Interrupt bit for hour */ -#define RTC_CIIR_IMHOUR ((1<<2)) -/** Counter Increment Interrupt bit for day of month */ -#define RTC_CIIR_IMDOM ((1<<3)) -/** Counter Increment Interrupt bit for day of week */ -#define RTC_CIIR_IMDOW ((1<<4)) -/** Counter Increment Interrupt bit for day of year */ -#define RTC_CIIR_IMDOY ((1<<5)) -/** Counter Increment Interrupt bit for month */ -#define RTC_CIIR_IMMON ((1<<6)) -/** Counter Increment Interrupt bit for year */ -#define RTC_CIIR_IMYEAR ((1<<7)) -/** CIIR bit mask */ -#define RTC_CIIR_BITMASK ((0xFF)) - -/********************************************************************** -* AMR register definitions -**********************************************************************/ -/** Counter Increment Select Mask bit for second */ -#define RTC_AMR_AMRSEC ((1<<0)) -/** Counter Increment Select Mask bit for minute */ -#define RTC_AMR_AMRMIN ((1<<1)) -/** Counter Increment Select Mask bit for hour */ -#define RTC_AMR_AMRHOUR ((1<<2)) -/** Counter Increment Select Mask bit for day of month */ -#define RTC_AMR_AMRDOM ((1<<3)) -/** Counter Increment Select Mask bit for day of week */ -#define RTC_AMR_AMRDOW ((1<<4)) -/** Counter Increment Select Mask bit for day of year */ -#define RTC_AMR_AMRDOY ((1<<5)) -/** Counter Increment Select Mask bit for month */ -#define RTC_AMR_AMRMON ((1<<6)) -/** Counter Increment Select Mask bit for year */ -#define RTC_AMR_AMRYEAR ((1<<7)) -/** AMR bit mask */ -#define RTC_AMR_BITMASK ((0xFF)) - -/********************************************************************** -* RTC_AUX register definitions -**********************************************************************/ -/** RTC Oscillator Fail detect flag */ -#define RTC_AUX_RTC_OSCF ((1<<4)) - -/********************************************************************** -* RTC_AUXEN register definitions -**********************************************************************/ -/** Oscillator Fail Detect interrupt enable*/ -#define RTC_AUXEN_RTC_OSCFEN ((1<<4)) - - -/* Consolidated time register group ----------------------------------- */ -/** Consolidated Time Register 0 */ -#define RTC_CTIME0_SECONDS_MASK ((0x3F)) -#define RTC_CTIME0_MINUTES_MASK ((0x3F00)) -#define RTC_CTIME0_HOURS_MASK ((0x1F0000)) -#define RTC_CTIME0_DOW_MASK ((0x7000000)) -/** Consolidated Time Register 1 */ -#define RTC_CTIME1_DOM_MASK ((0x1F)) -#define RTC_CTIME1_MONTH_MASK ((0xF00)) -#define RTC_CTIME1_YEAR_MASK ((0xFFF0000)) -/** Consolidated Time Register 2 */ -#define RTC_CTIME2_DOY_MASK ((0xFFF)) - - -/* Time Counter Group and Alarm register group ----------------------------- */ -/** SEC register mask */ -#define RTC_SEC_MASK (0x0000003F) -/** MIN register mask */ -#define RTC_MIN_MASK (0x0000003F) -/** HOUR register mask */ -#define RTC_HOUR_MASK (0x0000001F) -/** DOM register mask */ -#define RTC_DOM_MASK (0x0000001F) -/** DOW register mask */ -#define RTC_DOW_MASK (0x00000007) -/** DOY register mask */ -#define RTC_DOY_MASK (0x000001FF) -/** MONTH register mask */ -#define RTC_MONTH_MASK (0x0000000F) -/** YEAR register mask */ -#define RTC_YEAR_MASK (0x00000FFF) - -#define RTC_SECOND_MAX 59 /*!< Maximum value of second */ -#define RTC_MINUTE_MAX 59 /*!< Maximum value of minute*/ -#define RTC_HOUR_MAX 23 /*!< Maximum value of hour*/ -#define RTC_MONTH_MIN 1 /*!< Minimum value of month*/ -#define RTC_MONTH_MAX 12 /*!< Maximum value of month*/ -#define RTC_DAYOFMONTH_MIN 1 /*!< Minimum value of day of month*/ -#define RTC_DAYOFMONTH_MAX 31 /*!< Maximum value of day of month*/ -#define RTC_DAYOFWEEK_MAX 6 /*!< Maximum value of day of week*/ -#define RTC_DAYOFYEAR_MIN 1 /*!< Minimum value of day of year*/ -#define RTC_DAYOFYEAR_MAX 366 /*!< Maximum value of day of year*/ -#define RTC_YEAR_MAX 4095 /*!< Maximum value of year*/ - -/* Calibration register */ -/** Calibration value */ -#define RTC_CALIBRATION_CALVAL_MASK ((0x1FFFF)) -/** Calibration direction */ -#define RTC_CALIBRATION_LIBDIR ((1<<17)) -/** Calibration max value */ -#define RTC_CALIBRATION_MAX ((0x20000)) - -/** - * @} - */ - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup RTC_Public_Types - * @{ - */ - -/** @brief Time structure definitions for easy manipulate the data */ -typedef struct { - uint32_t SEC; /*!< Seconds Register */ - uint32_t MIN; /*!< Minutes Register */ - uint32_t HOUR; /*!< Hours Register */ - uint32_t DOM; /*!< Day of Month Register */ - uint32_t DOW; /*!< Day of Week Register */ - uint32_t DOY; /*!< Day of Year Register */ - uint32_t MONTH; /*!< Months Register */ - uint32_t YEAR; /*!< Years Register */ -} RTC_TIME_Type; - -/** @brief RTC interrupt source */ -typedef enum { - RTC_INT_COUNTER_INCREASE = RTC_IRL_RTCCIF, /*!< Counter Increment Interrupt */ - RTC_INT_ALARM = RTC_IRL_RTCALF, /*!< The alarm interrupt */ -} RTC_INT_OPT; - -#define PARAM_RTC_INT(n) ((n==RTC_INT_COUNTER_INCREASE) || (n==RTC_INT_ALARM)) - - -/** @brief RTC time type option */ -typedef enum { - RTC_TIMETYPE_SECOND = 0, /*!< Second */ - RTC_TIMETYPE_MINUTE = 1, /*!< Month */ - RTC_TIMETYPE_HOUR = 2, /*!< Hour */ - RTC_TIMETYPE_DAYOFWEEK = 3, /*!< Day of week */ - RTC_TIMETYPE_DAYOFMONTH = 4, /*!< Day of month */ - RTC_TIMETYPE_DAYOFYEAR = 5, /*!< Day of year */ - RTC_TIMETYPE_MONTH = 6, /*!< Month */ - RTC_TIMETYPE_YEAR = 7, /*!< Year */ -} RTC_TIMETYPE_Num; - -#define PARAM_RTC_TIMETYPE(n) ((n==RTC_TIMETYPE_SECOND) || (n==RTC_TIMETYPE_MINUTE) \ -|| (n==RTC_TIMETYPE_HOUR) || (n==RTC_TIMETYPE_DAYOFWEEK) \ -|| (n==RTC_TIMETYPE_DAYOFMONTH) || (n==RTC_TIMETYPE_DAYOFYEAR) \ -|| (n==RTC_TIMETYPE_MONTH) || (n==RTC_TIMETYPE_YEAR)) - - -/** - * @} - */ - - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup RTC_Public_Macros - * @{ - */ - -/** Macro to determine if it is valid RTC peripheral */ -#define PARAM_RTCx(x) (((uint32_t *)x)==((uint32_t *)LPC_RTC)) - -/** Calibration definitions */ -#define RTC_CALIB_DIR_FORWARD ((uint8_t)(0)) -#define RTC_CALIB_DIR_BACKWARD ((uint8_t)(1)) - -#define PARAM_RTC_CALIB_DIR(n) ((n==RTC_CALIB_DIR_FORWARD) || (n==RTC_CALIB_DIR_BACKWARD)) -#define PARAM_RTC_GPREG_CH(n) ((n>=0) && (n<=4)) - -#define PARAM_RTC_CALIBRATION_DIR(n) - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup RTC_Public_Functions - * @{ - */ - -void RTC_Init (LPC_RTC_TypeDef *RTCx); -void RTC_DeInit(LPC_RTC_TypeDef *RTCx); -void RTC_ResetClockTickCounter(LPC_RTC_TypeDef *RTCx); -void RTC_Cmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState); -void RTC_CntIncrIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t CntIncrIntType, \ - FunctionalState NewState); -void RTC_AlarmIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t AlarmTimeType, \ - FunctionalState NewState); -void RTC_SetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t TimeValue); -uint32_t RTC_GetTime(LPC_RTC_TypeDef *RTCx, uint32_t Timetype); -void RTC_SetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime); -void RTC_GetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime); -void RTC_SetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t ALValue); -uint32_t RTC_GetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype); -void RTC_SetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime); -void RTC_GetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime); -IntStatus RTC_GetIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType); -void RTC_ClearIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType); -void RTC_CalibCounterCmd(LPC_RTC_TypeDef *RTCx, FunctionalState NewState); -void RTC_CalibConfig(LPC_RTC_TypeDef *RTCx, uint32_t CalibValue, uint8_t CalibDir); -void RTC_WriteGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel, uint32_t Value); -uint32_t RTC_ReadGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_RTC_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_spi.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_spi.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_spi.h +++ /dev/null @@ -1,314 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_spi.h - * @brief : Contains all macro definitions and function prototypes - * support for SPI firmware library on LPC17xx - * @version : 1.0 - * @date : 3. April. 2009 - * @author : HieuNguyen - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup SPI - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_SPI_H_ -#define LPC17XX_SPI_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup SPI_Private_Macros - * @{ - */ - -/*********************************************************************//** - * Macro defines for SPI Control Register - **********************************************************************/ -/** @defgroup SPI_REGISTER_BIT_DEFINITION - * @{ - */ - -/** Bit enable, the SPI controller sends and receives the number - * of bits selected by bits 11:8 */ -#define SPI_SPCR_BIT_EN ((uint32_t)(1<<2)) -/** Clock phase control bit */ -#define SPI_SPCR_CPHA_SECOND ((uint32_t)(1<<3)) -/** Clock polarity control bit */ -#define SPI_SPCR_CPOL_LOW ((uint32_t)(1<<4)) -/** SPI master mode enable */ -#define SPI_SPCR_MSTR ((uint32_t)(1<<5)) -/** LSB enable bit */ -#define SPI_SPCR_LSBF ((uint32_t)(1<<6)) -/** SPI interrupt enable bit */ -#define SPI_SPCR_SPIE ((uint32_t)(1<<7)) -/** When bit 2 of this register is 1, this field controls the -number of bits per transfer */ -#define SPI_SPCR_BITS(n) ((n==0) ? ((uint32_t)0) : ((uint32_t)((n&0x0F)<<8))) -/** SPI Control bit mask */ -#define SPI_SPCR_BITMASK ((uint32_t)(0xFFC)) - - -/*********************************************************************//** - * Macro defines for SPI Status Register - **********************************************************************/ -/** Slave abort */ -#define SPI_SPSR_ABRT ((uint32_t)(1<<3)) -/** Mode fault */ -#define SPI_SPSR_MODF ((uint32_t)(1<<4)) -/** Read overrun */ -#define SPI_SPSR_ROVR ((uint32_t)(1<<5)) -/** Write collision */ -#define SPI_SPSR_WCOL ((uint32_t)(1<<6)) -/** SPI transfer complete flag */ -#define SPI_SPSR_SPIF ((uint32_t)(1<<7)) -/** SPI Status bit mask */ -#define SPI_SPSR_BITMASK ((uint32_t)(0xF8)) - - -/*********************************************************************//** - * Macro defines for SPI Data Register - **********************************************************************/ -/** SPI Data low bit-mask */ -#define SPI_SPDR_LO_MASK ((uint32_t)(0xFF)) -/** SPI Data high bit-mask */ -#define SPI_SPDR_HI_MASK ((uint32_t)(0xFF00)) -/** SPI Data bit-mask */ -#define SPI_SPDR_BITMASK ((uint32_t)(0xFFFF)) - - -/*********************************************************************//** - * Macro defines for SPI Clock Counter Register - **********************************************************************/ -/** SPI clock counter setting */ -#define SPI_SPCCR_COUNTER(n) ((uint32_t)(n&0xFF)) -/** SPI clock counter bit-mask */ -#define SPI_SPCCR_BITMASK ((uint32_t)(0xFF)) - - -/*********************************************************************** - * Macro defines for SPI Test Control Register - **********************************************************************/ -/** SPI Test bit */ -#define SPI_SPTCR_TEST_MASK ((uint32_t)(0xFE)) -/** SPI Test register bit mask */ -#define SPI_SPTCR_BITMASK ((uint32_t)(0xFE)) - - - -/*********************************************************************//** - * Macro defines for SPI Test Status Register - **********************************************************************/ -/** Slave abort */ -#define SPI_SPTSR_ABRT ((uint32_t)(1<<3)) -/** Mode fault */ -#define SPI_SPTSR_MODF ((uint32_t)(1<<4)) -/** Read overrun */ -#define SPI_SPTSR_ROVR ((uint32_t)(1<<5)) -/** Write collision */ -#define SPI_SPTSR_WCOL ((uint32_t)(1<<6)) -/** SPI transfer complete flag */ -#define SPI_SPTSR_SPIF ((uint32_t)(1<<7)) -/** SPI Status bit mask */ -#define SPI_SPTSR_MASKBIT ((uint32_t)(0xF8)) - - - -/*********************************************************************//** - * Macro defines for SPI Interrupt Register - **********************************************************************/ -/** SPI interrupt flag */ -#define SPI_SPINT_INTFLAG ((uint32_t)(1<<0)) -/** SPI interrupt register bit mask */ -#define SPI_SPINT_BITMASK ((uint32_t)(0x01)) - -/** - * @} - */ - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup SPI_Public_Types - * @{ - */ - -/** @brief SPI configuration structure */ -typedef struct { - uint32_t Databit; /** Databit number, should be SPI_DATABIT_x, - where x is in range from 8 - 16 */ - uint32_t CPHA; /** Clock phase, should be: - - SPI_CPHA_FIRST: first clock edge - - SPI_CPHA_SECOND: second clock edge */ - uint32_t CPOL; /** Clock polarity, should be: - - SPI_CPOL_HI: high level - - SPI_CPOL_LO: low level */ - uint32_t Mode; /** SPI mode, should be: - - SPI_MASTER_MODE: Master mode - - SPI_SLAVE_MODE: Slave mode */ - uint32_t DataOrder; /** Data order, should be: - - SPI_DATA_MSB_FIRST: MSB first - - SPI_DATA_LSB_FIRST: LSB first */ - uint32_t ClockRate; /** Clock rate,in Hz, should not exceed - (SPI peripheral clock)/8 */ -} SPI_CFG_Type; - - -/** - * @brief SPI Transfer Type definitions - */ -typedef enum { - SPI_TRANSFER_POLLING = 0, /**< Polling transfer */ - SPI_TRANSFER_INTERRUPT /**< Interrupt transfer */ -} SPI_TRANSFER_Type; - -/** - * @brief SPI Data configuration structure definitions - */ -typedef struct { - void *tx_data; /**< Pointer to transmit data */ - void *rx_data; /**< Pointer to transmit data */ - uint32_t length; /**< Length of transfer data */ - uint32_t counter; /**< Data counter index */ - uint32_t status; /**< Current status of SPI activity */ - void (*callback)(void); /**< Pointer to Call back function when transmission complete - used in interrupt transfer mode */ -} SPI_DATA_SETUP_Type; - -/** - * @} - */ - - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup SPI_Public_Macros - * @{ - */ - -/** Macro to determine if it is valid SPI port number */ -#define PARAM_SPIx(n) (((uint32_t *)n)==((uint32_t *)LPC_SPI)) - -/*********************************************************************//** - * SPI configuration parameter defines - **********************************************************************/ -/** Clock phase control bit */ -#define SPI_CPHA_FIRST ((uint32_t)(0)) -#define SPI_CPHA_SECOND SPI_SPCR_CPHA_SECOND -#define PARAM_SPI_CPHA(n) ((n==SPI_CPHA_FIRST) || (n==SPI_CPHA_SECOND)) - -/** Clock polarity control bit */ -#define SPI_CPOL_HI ((uint32_t)(0)) -#define SPI_CPOL_LO SPI_SPCR_CPOL_LOW -#define PARAM_SPI_CPOL(n) ((n==SPI_CPOL_HI) || (n==SPI_CPOL_LO)) - -/** SPI master mode enable */ -#define SPI_SLAVE_MODE ((uint32_t)(0)) -#define SPI_MASTER_MODE SPI_SPCR_MSTR -#define PARAM_SPI_MODE(n) ((n==SPI_SLAVE_MODE) || (n==SPI_MASTER_MODE)) - -/** LSB enable bit */ -#define SPI_DATA_MSB_FIRST ((uint32_t)(0)) -#define SPI_DATA_LSB_FIRST SPI_SPCR_LSBF -#define PARAM_SPI_DATA_ORDER(n) ((n==SPI_DATA_MSB_FIRST) || (n==SPI_DATA_LSB_FIRST)) - -/** SPI data bit number defines */ -#define SPI_DATABIT_16 SPI_SPCR_BITS(0) /*!< Databit number = 16 */ -#define SPI_DATABIT_8 SPI_SPCR_BITS(0x08) /*!< Databit number = 8 */ -#define SPI_DATABIT_9 SPI_SPCR_BITS(0x09) /*!< Databit number = 9 */ -#define SPI_DATABIT_10 SPI_SPCR_BITS(0x0A) /*!< Databit number = 10 */ -#define SPI_DATABIT_11 SPI_SPCR_BITS(0x0B) /*!< Databit number = 11 */ -#define SPI_DATABIT_12 SPI_SPCR_BITS(0x0C) /*!< Databit number = 12 */ -#define SPI_DATABIT_13 SPI_SPCR_BITS(0x0D) /*!< Databit number = 13 */ -#define SPI_DATABIT_14 SPI_SPCR_BITS(0x0E) /*!< Databit number = 14 */ -#define SPI_DATABIT_15 SPI_SPCR_BITS(0x0F) /*!< Databit number = 15 */ -#define PARAM_SPI_DATABIT(n) ((n==SPI_DATABIT_16) || (n==SPI_DATABIT_8) \ -|| (n==SPI_DATABIT_9) || (n==SPI_DATABIT_10) \ -|| (n==SPI_DATABIT_11) || (n==SPI_DATABIT_12) \ -|| (n==SPI_DATABIT_13) || (n==SPI_DATABIT_14) \ -|| (n==SPI_DATABIT_15)) - - -/*********************************************************************//** - * SPI Status Flag defines - **********************************************************************/ -/** Slave abort */ -#define SPI_STAT_ABRT SPI_SPSR_ABRT -/** Mode fault */ -#define SPI_STAT_MODF SPI_SPSR_MODF -/** Read overrun */ -#define SPI_STAT_ROVR SPI_SPSR_ROVR -/** Write collision */ -#define SPI_STAT_WCOL SPI_SPSR_WCOL -/** SPI transfer complete flag */ -#define SPI_STAT_SPIF SPI_SPSR_SPIF -#define PARAM_SPI_STAT(n) ((n==SPI_STAT_ABRT) || (n==SPI_STAT_MODF) \ -|| (n==SPI_STAT_ROVR) || (n==SPI_STAT_WCOL) \ -|| (n==SPI_STAT_SPIF)) - - -/* SPI Status Implementation definitions */ -#define SPI_STAT_DONE (1UL<<8) /**< Done */ -#define SPI_STAT_ERROR (1UL<<9) /**< Error */ - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup SPI_Public_Functions - * @{ - */ - -void SPI_SetClock (LPC_SPI_TypeDef *SPIx, uint32_t target_clock); -void SPI_DeInit(LPC_SPI_TypeDef *SPIx); -void SPI_Init(LPC_SPI_TypeDef *SPIx, SPI_CFG_Type *SPI_ConfigStruct); -void SPI_ConfigStructInit(SPI_CFG_Type *SPI_InitStruct); -void SPI_SendData(LPC_SPI_TypeDef *SPIx, uint16_t Data); -uint16_t SPI_ReceiveData(LPC_SPI_TypeDef *SPIx); -int32_t SPI_ReadWrite (LPC_SPI_TypeDef *SPIx, SPI_DATA_SETUP_Type *dataCfg, SPI_TRANSFER_Type xfType); -void SPI_IntCmd(LPC_SPI_TypeDef *SPIx, FunctionalState NewState); -IntStatus SPI_GetIntStatus (LPC_SPI_TypeDef *SPIx); -void SPI_ClearIntPending(LPC_SPI_TypeDef *SPIx); -uint32_t SPI_GetStatus(LPC_SPI_TypeDef *SPIx); -FlagStatus SPI_CheckStatus (uint32_t inputSPIStatus, uint8_t SPIStatus); -void SPI_StdIntHandler(void); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_SPI_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_ssp.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_ssp.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_ssp.h +++ /dev/null @@ -1,457 +0,0 @@ -/***********************************************************************//** - * @file : lpc17xx_ssp.h - * @brief : Contains all macro definitions and function prototypes - * support for SSP firmware library on LPC17xx - * @version : 1.0 - * @date : 9. April. 2009 - * @author : HieuNguyen - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **************************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup SSP - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef LPC17XX_SSP_H_ -#define LPC17XX_SSP_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -#ifdef __cplusplus -extern "C" -{ -#endif - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup SSP_Private_Macros - * @{ - */ - -/*********************************************************************//** - * Macro defines for CR0 register - **********************************************************************/ - -/** @defgroup SSP_REGISTER_BIT_DEFINITION - * @{ - */ - -/** SSP data size select, must be 4 bits to 16 bits */ -#define SSP_CR0_DSS(n) ((uint32_t)((n-1)&0xF)) -/** SSP control 0 Motorola SPI mode */ -#define SSP_CR0_FRF_SPI ((uint32_t)(0<<4)) -/** SSP control 0 TI synchronous serial mode */ -#define SSP_CR0_FRF_TI ((uint32_t)(1<<4)) -/** SSP control 0 National Micro-wire mode */ -#define SSP_CR0_FRF_MICROWIRE ((uint32_t)(2<<4)) -/** SPI clock polarity bit (used in SPI mode only), (1) = maintains the - bus clock high between frames, (0) = low */ -#define SSP_CR0_CPOL_HI ((uint32_t)(1<<6)) -/** SPI clock out phase bit (used in SPI mode only), (1) = captures data - on the second clock transition of the frame, (0) = first */ -#define SSP_CR0_CPHA_SECOND ((uint32_t)(1<<7)) -/** SSP serial clock rate value load macro, divider rate is - PERIPH_CLK / (cpsr * (SCR + 1)) */ -#define SSP_CR0_SCR(n) ((uint32_t)((n&0xFF)<<8)) -/** SSP CR0 bit mask */ -#define SSP_CR0_BITMASK ((uint32_t)(0xFFFF)) - - -/*********************************************************************//** - * Macro defines for CR1 register - **********************************************************************/ -/** SSP control 1 loopback mode enable bit */ -#define SSP_CR1_LBM_EN ((uint32_t)(1<<0)) -/** SSP control 1 enable bit */ -#define SSP_CR1_SSP_EN ((uint32_t)(1<<1)) -/** SSP control 1 slave enable */ -#define SSP_CR1_SLAVE_EN ((uint32_t)(1<<2)) -/** SSP control 1 slave out disable bit, disables transmit line in slave - mode */ -#define SSP_CR1_SO_DISABLE ((uint32_t)(1<<3)) -/** SSP CR1 bit mask */ -#define SSP_CR1_BITMASK ((uint32_t)(0x0F)) - - -/*********************************************************************//** - * Macro defines for DR register - **********************************************************************/ -/** SSP data bit mask */ -#define SSP_DR_BITMASK(n) ((n)&0xFFFF) - -/*********************************************************************//** - * Macro defines for SR register - **********************************************************************/ -/** SSP status TX FIFO Empty bit */ -#define SSP_SR_TFE ((uint32_t)(1<<0)) -/** SSP status TX FIFO not full bit */ -#define SSP_SR_TNF ((uint32_t)(1<<1)) -/** SSP status RX FIFO not empty bit */ -#define SSP_SR_RNE ((uint32_t)(1<<2)) -/** SSP status RX FIFO full bit */ -#define SSP_SR_RFF ((uint32_t)(1<<3)) -/** SSP status SSP Busy bit */ -#define SSP_SR_BSY ((uint32_t)(1<<4)) -/** SSP SR bit mask */ -#define SSP_SR_BITMASK ((uint32_t)(0x1F)) - - -/*********************************************************************//** - * Macro defines for CPSR register - **********************************************************************/ -/** SSP clock prescaler */ -#define SSP_CPSR_CPDVSR(n) ((uint32_t)(n&0xFF)) -/** SSP CPSR bit mask */ -#define SSP_CPSR_BITMASK ((uint32_t)(0xFF)) - - -/*********************************************************************//** - * Macro define for (IMSC) Interrupt Mask Set/Clear registers - **********************************************************************/ -/** Receive Overrun */ -#define SSP_IMSC_ROR ((uint32_t)(1<<0)) -/** Receive TimeOut */ -#define SSP_IMSC_RT ((uint32_t)(1<<1)) -/** Rx FIFO is at least half full */ -#define SSP_IMSC_RX ((uint32_t)(1<<2)) -/** Tx FIFO is at least half empty */ -#define SSP_IMSC_TX ((uint32_t)(1<<3)) -/** IMSC bit mask */ -#define SSP_IMSC_BITMASK ((uint32_t)(0x0F)) - -/*********************************************************************//** - * Macro define for (RIS) Raw Interrupt Status registers - **********************************************************************/ -/** Receive Overrun */ -#define SSP_RIS_ROR ((uint32_t)(1<<0)) -/** Receive TimeOut */ -#define SSP_RIS_RT ((uint32_t)(1<<1)) -/** Rx FIFO is at least half full */ -#define SSP_RIS_RX ((uint32_t)(1<<2)) -/** Tx FIFO is at least half empty */ -#define SSP_RIS_TX ((uint32_t)(1<<3)) -/** RIS bit mask */ -#define SSP_RIS_BITMASK ((uint32_t)(0x0F)) - - -/*********************************************************************//** - * Macro define for (MIS) Masked Interrupt Status registers - **********************************************************************/ -/** Receive Overrun */ -#define SSP_MIS_ROR ((uint32_t)(1<<0)) -/** Receive TimeOut */ -#define SSP_MIS_RT ((uint32_t)(1<<1)) -/** Rx FIFO is at least half full */ -#define SSP_MIS_RX ((uint32_t)(1<<2)) -/** Tx FIFO is at least half empty */ -#define SSP_MIS_TX ((uint32_t)(1<<3)) -/** MIS bit mask */ -#define SSP_MIS_BITMASK ((uint32_t)(0x0F)) - - -/*********************************************************************//** - * Macro define for (ICR) Interrupt Clear registers - **********************************************************************/ -/** Writing a 1 to this bit clears the "frame was received when - * RxFIFO was full" interrupt */ -#define SSP_ICR_ROR ((uint32_t)(1<<0)) -/** Writing a 1 to this bit clears the "Rx FIFO was not empty and - * has not been read for a timeout period" interrupt */ -#define SSP_ICR_RT ((uint32_t)(1<<1)) -/** ICR bit mask */ -#define SSP_ICR_BITMASK ((uint32_t)(0x03)) - - -/*********************************************************************//** - * Macro defines for DMACR register - **********************************************************************/ -/** SSP bit for enabling RX DMA */ -#define SSP_DMA_RXDMA_EN ((uint32_t)(1<<0)) -/** SSP bit for enabling TX DMA */ -#define SSP_DMA_TXDMA_EN ((uint32_t)(1<<1)) -/** DMACR bit mask */ -#define SSP_DMA_BITMASK ((uint32_t)(0x03)) - -/** - * @} - */ - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup SSP_Public_Types - * @{ - */ - -/** @brief SSP configuration structure */ -typedef struct { - uint32_t Databit; /** Databit number, should be SSP_DATABIT_x, - where x is in range from 4 - 16 */ - uint32_t CPHA; /** Clock phase, should be: - - SSP_CPHA_FIRST: first clock edge - - SSP_CPHA_SECOND: second clock edge */ - uint32_t CPOL; /** Clock polarity, should be: - - SSP_CPOL_HI: high level - - SSP_CPOL_LO: low level */ - uint32_t Mode; /** SSP mode, should be: - - SSP_MASTER_MODE: Master mode - - SSP_SLAVE_MODE: Slave mode */ - uint32_t FrameFormat; /** Frame Format: - - SSP_FRAME_SPI: Motorola SPI frame format - - SSP_FRAME_TI: TI frame format - - SSP_FRAME_MICROWIRE: National Microwire frame format */ - uint32_t ClockRate; /** Clock rate,in Hz */ -} SSP_CFG_Type; - -/** - * @brief SSP Transfer Type definitions - */ -typedef enum { - SSP_TRANSFER_POLLING = 0, /**< Polling transfer */ - SSP_TRANSFER_INTERRUPT /**< Interrupt transfer */ -} SSP_TRANSFER_Type; - -/** - * @brief SPI Data configuration structure definitions - */ -typedef struct { - void *tx_data; /**< Pointer to transmit data */ - uint32_t tx_cnt; /**< Transmit counter */ - void *rx_data; /**< Pointer to transmit data */ - uint32_t rx_cnt; /**< Receive counter */ - uint32_t length; /**< Length of transfer data */ - uint32_t status; /**< Current status of SSP activity */ - void (*callback)(void); /**< Pointer to Call back function when transmission complete - used in interrupt transfer mode */ -} SSP_DATA_SETUP_Type; - - -/** - * @} - */ - - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup SSP_Public_Macros - * @{ - */ - -/** Macro to determine if it is valid SSP port number */ -#define PARAM_SSPx(n) ((((uint32_t *)n)==((uint32_t *)LPC_SSP0)) \ -|| (((uint32_t *)n)==((uint32_t *)LPC_SSP1))) - -/*********************************************************************//** - * SSP configuration parameter defines - **********************************************************************/ -/** Clock phase control bit */ -#define SSP_CPHA_FIRST ((uint32_t)(0)) -#define SSP_CPHA_SECOND SSP_CR0_CPHA_SECOND -#define PARAM_SSP_CPHA(n) ((n==SSP_CPHA_FIRST) || (n==SSP_CPHA_SECOND)) - -/** Clock polarity control bit */ -/* There's no bug here!!! - * - If bit[6] in SSPnCR0 is 0: SSP controller maintains the bus clock low between frames. - * That means the active clock is in HI state. - * - If bit[6] in SSPnCR0 is 1 (SSP_CR0_CPOL_HI): SSP controller maintains the bus clock - * high between frames. That means the active clock is in LO state. - */ -#define SSP_CPOL_HI ((uint32_t)(0)) -#define SSP_CPOL_LO SSP_CR0_CPOL_HI -#define PARAM_SSP_CPOL(n) ((n==SSP_CPOL_HI) || (n==SSP_CPOL_LO)) - -/** SSP master mode enable */ -#define SSP_SLAVE_MODE SSP_CR1_SLAVE_EN -#define SSP_MASTER_MODE ((uint32_t)(0)) -#define PARAM_SSP_MODE(n) ((n==SSP_SLAVE_MODE) || (n==SSP_MASTER_MODE)) - -/** SSP data bit number defines */ -#define SSP_DATABIT_4 SSP_CR0_DSS(4) /*!< Databit number = 4 */ -#define SSP_DATABIT_5 SSP_CR0_DSS(5) /*!< Databit number = 5 */ -#define SSP_DATABIT_6 SSP_CR0_DSS(6) /*!< Databit number = 6 */ -#define SSP_DATABIT_7 SSP_CR0_DSS(7) /*!< Databit number = 7 */ -#define SSP_DATABIT_8 SSP_CR0_DSS(8) /*!< Databit number = 8 */ -#define SSP_DATABIT_9 SSP_CR0_DSS(9) /*!< Databit number = 9 */ -#define SSP_DATABIT_10 SSP_CR0_DSS(10) /*!< Databit number = 10 */ -#define SSP_DATABIT_11 SSP_CR0_DSS(11) /*!< Databit number = 11 */ -#define SSP_DATABIT_12 SSP_CR0_DSS(12) /*!< Databit number = 12 */ -#define SSP_DATABIT_13 SSP_CR0_DSS(13) /*!< Databit number = 13 */ -#define SSP_DATABIT_14 SSP_CR0_DSS(14) /*!< Databit number = 14 */ -#define SSP_DATABIT_15 SSP_CR0_DSS(15) /*!< Databit number = 15 */ -#define SSP_DATABIT_16 SSP_CR0_DSS(16) /*!< Databit number = 16 */ -#define PARAM_SSP_DATABIT(n) ((n==SSP_DATABIT_4) || (n==SSP_DATABIT_5) \ -|| (n==SSP_DATABIT_6) || (n==SSP_DATABIT_16) \ -|| (n==SSP_DATABIT_7) || (n==SSP_DATABIT_8) \ -|| (n==SSP_DATABIT_9) || (n==SSP_DATABIT_10) \ -|| (n==SSP_DATABIT_11) || (n==SSP_DATABIT_12) \ -|| (n==SSP_DATABIT_13) || (n==SSP_DATABIT_14) \ -|| (n==SSP_DATABIT_15)) - -/** SSP Frame Format definition */ -/** Motorola SPI mode */ -#define SSP_FRAME_SPI SSP_CR0_FRF_SPI -/** TI synchronous serial mode */ -#define SSP_FRAME_TI SSP_CR0_FRF_TI -/** National Micro-wire mode */ -#define SSP_FRAME_MICROWIRE SSP_CR0_FRF_MICROWIRE - -#define PARAM_SSP_FRAME(n) ((n==SSP_FRAME_SPI) || (n==SSP_FRAME_TI)\ -|| (n==SSP_FRAME_MICROWIRE)) - - -/*********************************************************************//** - * SSP Status defines - **********************************************************************/ -/** SSP status TX FIFO Empty bit */ -#define SSP_STAT_TXFIFO_EMPTY SSP_SR_TFE -/** SSP status TX FIFO not full bit */ -#define SSP_STAT_TXFIFO_NOTFULL SSP_SR_TNF -/** SSP status RX FIFO not empty bit */ -#define SSP_STAT_RXFIFO_NOTEMPTY SSP_SR_RNE -/** SSP status RX FIFO full bit */ -#define SSP_STAT_RXFIFO_FULL SSP_SR_RFF -/** SSP status SSP Busy bit */ -#define SSP_STAT_BUSY SSP_SR_BSY - -#define PARAM_SSP_STAT(n) ((n==SSP_STAT_TXFIFO_EMPTY) || (n==SSP_STAT_TXFIFO_NOTFULL) \ -|| (n==SSP_STAT_RXFIFO_NOTEMPTY) || (n==SSP_STAT_RXFIFO_FULL) \ -|| (n==SSP_STAT_BUSY)) - - -/*********************************************************************//** - * SSP Interrupt Configuration defines - **********************************************************************/ -/** Receive Overrun */ -#define SSP_INTCFG_ROR SSP_IMSC_ROR -/** Receive TimeOut */ -#define SSP_INTCFG_RT SSP_IMSC_RT -/** Rx FIFO is at least half full */ -#define SSP_INTCFG_RX SSP_IMSC_RX -/** Tx FIFO is at least half empty */ -#define SSP_INTCFG_TX SSP_IMSC_TX - -#define PARAM_SSP_INTCFG(n) ((n==SSP_INTCFG_ROR) || (n==SSP_INTCFG_RT) \ -|| (n==SSP_INTCFG_RX) || (n==SSP_INTCFG_TX)) - - -/*********************************************************************//** - * SSP Configured Interrupt Status defines - **********************************************************************/ -/** Receive Overrun */ -#define SSP_INTSTAT_ROR SSP_MIS_ROR -/** Receive TimeOut */ -#define SSP_INTSTAT_RT SSP_MIS_RT -/** Rx FIFO is at least half full */ -#define SSP_INTSTAT_RX SSP_MIS_RX -/** Tx FIFO is at least half empty */ -#define SSP_INTSTAT_TX SSP_MIS_TX - -#define PARAM_SSP_INTSTAT(n) ((n==SSP_INTSTAT_ROR) || (n==SSP_INTSTAT_RT) \ -|| (n==SSP_INTSTAT_RX) || (n==SSP_INTSTAT_TX)) - - -/*********************************************************************//** - * SSP Raw Interrupt Status defines - **********************************************************************/ -/** Receive Overrun */ -#define SSP_INTSTAT_RAW_ROR SSP_RIS_ROR -/** Receive TimeOut */ -#define SSP_INTSTAT_RAW_RT SSP_RIS_RT -/** Rx FIFO is at least half full */ -#define SSP_INTSTAT_RAW_RX SSP_RIS_RX -/** Tx FIFO is at least half empty */ -#define SSP_INTSTAT_RAW_TX SSP_RIS_TX - -#define PARAM_SSP_INTSTAT_RAW(n) ((n==SSP_INTSTAT_RAW_ROR) || (n==SSP_INTSTAT_RAW_RT) \ -|| (n==SSP_INTSTAT_RAW_RX) || (n==SSP_INTSTAT_RAW_TX)) - - -/*********************************************************************//** - * SSP Interrupt Clear defines - **********************************************************************/ -/** Writing a 1 to this bit clears the "frame was received when - * RxFIFO was full" interrupt */ -#define SSP_INTCLR_ROR SSP_ICR_ROR -/** Writing a 1 to this bit clears the "Rx FIFO was not empty and - * has not been read for a timeout period" interrupt */ -#define SSP_INTCLR_RT SSP_ICR_RT - -#define PARAM_SSP_INTCLR(n) ((n==SSP_INTCLR_ROR) || (n==SSP_INTCLR_RT)) - - -/*********************************************************************//** - * SSP DMA defines - **********************************************************************/ -/** SSP bit for enabling RX DMA */ -#define SSP_DMA_TX SSP_DMA_RXDMA_EN -/** SSP bit for enabling TX DMA */ -#define SSP_DMA_RX SSP_DMA_TXDMA_EN - -#define PARAM_SSP_DMA(n) ((n==SSP_DMA_TX) || (n==SSP_DMA_RX)) - -/* SSP Status Implementation definitions */ -#define SSP_STAT_DONE (1UL<<8) /**< Done */ -#define SSP_STAT_ERROR (1UL<<9) /**< Error */ - -/** - * @} - */ - - -/* Public Functions ----------------------------------------------------------- */ -/** @defgroup SSP_Public_Functions - * @{ - */ - -void SSP_SetClock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock); -void SSP_DeInit(LPC_SSP_TypeDef* SSPx); -void SSP_Init(LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct); -void SSP_ConfigStructInit(SSP_CFG_Type *SSP_InitStruct); -void SSP_Cmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState); -void SSP_LoopBackCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState); -void SSP_SlaveOutputCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState); -void SSP_SendData(LPC_SSP_TypeDef* SSPx, uint16_t Data); -uint16_t SSP_ReceiveData(LPC_SSP_TypeDef* SSPx); -int32_t SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, \ - SSP_TRANSFER_Type xfType); -FlagStatus SSP_GetStatus(LPC_SSP_TypeDef* SSPx, uint32_t FlagType); -void SSP_IntConfig(LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState); -IntStatus SSP_GetRawIntStatus(LPC_SSP_TypeDef *SSPx, uint32_t RawIntType); -IntStatus SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType); -void SSP_ClearIntPending(LPC_SSP_TypeDef *SSPx, uint32_t IntType); -void SSP_DMACmd(LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState); -void SSP0_StdIntHandler(void); -void SSP1_StdIntHandler(void); - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* LPC17XX_SSP_H_ */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_timer.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_timer.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/lpc17xx_timer.h +++ /dev/null @@ -1,324 +0,0 @@ -/** - * @file : lpc17xx_timer.h - * @brief : Contains all functions support for Timer firmware library on LPC17xx - * @version : 1.0 - * @date : 14. April. 2009 - * @author : HieuNguyen - ************************************************************************** - * Software that is described herein is for illustrative purposes only - * which provides customers with programming information regarding the - * products. This software is supplied "AS IS" without any warranties. - * NXP Semiconductors assumes no responsibility or liability for the - * use of the software, conveys no license or title under any patent, - * copyright, or mask work right to the product. NXP Semiconductors - * reserves the right to make changes in the software without - * notification. NXP Semiconductors also make no representation or - * warranty that such application will be suitable for the specified - * use without further testing or modification. - **********************************************************************/ - -/* Peripheral group ----------------------------------------------------------- */ -/** @defgroup TIM - * @ingroup LPC1700CMSIS_FwLib_Drivers - * @{ - */ - -#ifndef __LPC17XX_TIMER_H_ -#define __LPC17XX_TIMER_H_ - -/* Includes ------------------------------------------------------------------- */ -#include "LPC17xx.h" -#include "lpc_types.h" - - -/* Private Macros ------------------------------------------------------------- */ -/** @defgroup TIM_Private_Macros - * @{ - */ - -/************************** TIMER/COUNTER Control **************************/ -/** @defgroup TIM_REGISTER_BIT_DEFINITION - * @{ - */ - -/********************************************************************** -** Interrupt information -**********************************************************************/ -/** Macro to clean interrupt pending */ -#define TIM_IR_CLR(n) _BIT(n) - -/********************************************************************** -** Timer interrupt register definitions -**********************************************************************/ -/** Macro for getting a timer match interrupt bit */ -#define TIM_MATCH_INT(n) (_BIT(n & 0x0F)) -/** Macro for getting a capture event interrupt bit */ -#define TIM_CAP_INT(n) (_BIT(((n & 0x0F) + 4))) - -/********************************************************************** -* Timer control register definitions -**********************************************************************/ -/** Timer/counter enable bit */ -#define TIM_ENABLE ((uint32_t)(1<<0)) -/** Timer/counter reset bit */ -#define TIM_RESET ((uint32_t)(1<<1)) -/** Timer control bit mask */ -#define TIM_TCR_MASKBIT ((uint32_t)(3)) - -/********************************************************************** -* Timer match control register definitions -**********************************************************************/ -/** Bit location for interrupt on MRx match, n = 0 to 3 */ -#define TIM_INT_ON_MATCH(n) (_BIT((n * 3))) -/** Bit location for reset on MRx match, n = 0 to 3 */ -#define TIM_RESET_ON_MATCH(n) (_BIT(((n * 3) + 1))) -/** Bit location for stop on MRx match, n = 0 to 3 */ -#define TIM_STOP_ON_MATCH(n) (_BIT(((n * 3) + 2))) -/** Timer Match control bit mask */ -#define TIM_MCR_MASKBIT ((uint32_t)(0x0FFF)) -/** Timer Match control bit mask for specific channel*/ -#define TIM_MCR_CHANNEL_MASKBIT(n) ((uint32_t)(7<> 8) & 0xFF) /**< Macro for loading most significant halfs of divisors */ - - -/* Macro defines for UART interrupt enable register */ -#define UART_IER_RBRINT_EN ((uint32_t)(1<<0)) /*!< RBR Interrupt enable*/ -#define UART_IER_THREINT_EN ((uint32_t)(1<<1)) /*!< THR Interrupt enable*/ -#define UART_IER_RLSINT_EN ((uint32_t)(1<<2)) /*!< RX line status interrupt enable*/ -#define UART1_IER_MSINT_EN ((uint32_t)(1<<3)) /*!< Modem status interrupt enable */ -#define UART1_IER_CTSINT_EN ((uint32_t)(1<<7)) /*!< CTS1 signal transition interrupt enable */ -#define UART_IER_ABEOINT_EN ((uint32_t)(1<<8)) /*!< Enables the end of auto-baud interrupt */ -#define UART_IER_ABTOINT_EN ((uint32_t)(1<<9)) /*!< Enables the auto-baud time-out interrupt */ -#define UART_IER_BITMASK ((uint32_t)(0x307)) /*!< UART interrupt enable register bit mask */ -#define UART1_IER_BITMASK ((uint32_t)(0x38F)) /*!< UART1 interrupt enable register bit mask */ - - -/* UART interrupt identification register defines */ -#define UART_IIR_INTSTAT_PEND ((uint32_t)(1<<0)) /*!>8)&0x0F)) /**< Reflects the current level of the UART transmitter FIFO */ -#define UART_FIFOLVL_BITMASK ((uint32_t)(0x0F0F)) /**< UART FIFO Level Register bit mask */ - -/** - * @} - */ - -/** - * @} - */ - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup UART_Public_Types - * @{ - */ - - -/** - * @brief UART Databit type definitions - */ -typedef enum { - UART_DATABIT_5 = 0, /*!< UART 5 bit data mode */ - UART_DATABIT_6, /*!< UART 6 bit data mode */ - UART_DATABIT_7, /*!< UART 7 bit data mode */ - UART_DATABIT_8 /*!< UART 8 bit data mode */ -} UART_DATABIT_Type; - -/** Macro to check the input UART_DATABIT parameters */ -#define PARAM_UART_DATABIT(databit) ((databit==UART_DATABIT_5) || (databit==UART_DATABIT_6)\ -|| (databit==UART_DATABIT_7) || (databit==UART_DATABIT_8)) - -/** - * @brief UART Stop bit type definitions - */ -typedef enum { - UART_STOPBIT_1 = (0), /*!< UART 1 Stop Bits Select */ - UART_STOPBIT_2, /*!< UART Two Stop Bits Select */ -} UART_STOPBIT_Type; - -/** Macro to check the input UART_STOPBIT parameters */ -#define PARAM_UART_STOPBIT(stopbit) ((stopbit==UART_STOPBIT_1) || (stopbit==UART_STOPBIT_2)) - -/** - * @brief UART Parity type definitions - */ -typedef enum { - UART_PARITY_NONE = 0, /*!< No parity */ - UART_PARITY_ODD, /*!< Odd parity */ - UART_PARITY_EVEN, /*!< Even parity */ - UART_PARITY_SP_1, /*!< Forced "1" stick parity */ - UART_PARITY_SP_0 /*!< Forced "0" stick parity */ -} UART_PARITY_Type; - -/** Macro to check the input UART_PARITY parameters */ -#define PARAM_UART_PARITY(parity) ((parity==UART_PARITY_NONE) || (parity==UART_PARITY_ODD) \ -|| (parity==UART_PARITY_EVEN) || (parity==UART_PARITY_SP_1) \ -|| (parity==UART_PARITY_SP_0)) - -/** - * @brief FIFO Level type definitions - */ -typedef enum { - UART_FIFO_TRGLEV0 = 0, /*!< UART FIFO trigger level 0: 1 character */ - UART_FIFO_TRGLEV1, /*!< UART FIFO trigger level 1: 4 character */ - UART_FIFO_TRGLEV2, /*!< UART FIFO trigger level 2: 8 character */ - UART_FIFO_TRGLEV3 /*!< UART FIFO trigger level 3: 14 character */ -} UART_FITO_LEVEL_Type; - -/** Macro to check the input UART_FIFO parameters */ -#define PARAM_UART_FIFO_LEVEL(fifo) ((fifo==UART_FIFO_TRGLEV0) \ -|| (fifo==UART_FIFO_TRGLEV1) || (fifo==UART_FIFO_TRGLEV2) \ -|| (fifo==UART_FIFO_TRGLEV3)) - -/********************************************************************//** -* @brief UART Interrupt Type definitions -**********************************************************************/ -typedef enum { - UART_INTCFG_RBR = 0, /*!< RBR Interrupt enable*/ - UART_INTCFG_THRE, /*!< THR Interrupt enable*/ - UART_INTCFG_RLS, /*!< RX line status interrupt enable*/ - UART1_INTCFG_MS, /*!< Modem status interrupt enable (UART1 only) */ - UART1_INTCFG_CTS, /*!< CTS1 signal transition interrupt enable (UART1 only) */ - UART_INTCFG_ABEO, /*!< Enables the end of auto-baud interrupt */ - UART_INTCFG_ABTO /*!< Enables the auto-baud time-out interrupt */ -} UART_INT_Type; - -/** Macro to check the input UART_INTCFG parameters */ -#define PARAM_UART_INTCFG(IntCfg) ((IntCfg==UART_INTCFG_RBR) || (IntCfg==UART_INTCFG_THRE) \ -|| (IntCfg==UART_INTCFG_RLS) || (IntCfg==UART_INTCFG_ABEO) \ -|| (IntCfg==UART_INTCFG_ABTO)) - -/** Macro to check the input UART1_INTCFG parameters - expansion input parameter for UART1 */ -#define PARAM_UART1_INTCFG(IntCfg) ((IntCfg==UART1_INTCFG_MS) || (IntCfg==UART1_INTCFG_CTS)) - - -/** - * @brief UART Line Status Type definition - */ -typedef enum { - UART_LINESTAT_RDR = UART_LSR_RDR, /*! - - -/* Public Types --------------------------------------------------------------- */ -/** @defgroup LPC_Types_Public_Types - * @{ - */ - -/** - * @brief Boolean Type definition - */ -typedef enum {FALSE = 0, TRUE = !FALSE} Bool; - -/** - * @brief Flag Status and Interrupt Flag Status type definition - */ -typedef enum {RESET = 0, SET = !RESET} FlagStatus, IntStatus, SetState; -#define PARAM_SETSTATE(State) ((State==RESET) || (State==SET)) - -/** - * @brief Functional State Definition - */ -typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; -#define PARAM_FUNCTIONALSTATE(State) ((State==DISABLE) || (State==ENABLE)) - -/** - * @ Status type definition - */ -typedef enum {ERROR = 0, SUCCESS = !ERROR} Status; - - -/** - * Read/Write transfer type mode (Block or non-block) - */ -typedef enum -{ - NONE_BLOCKING = 0, /**< None Blocking type */ - BLOCKING, /**< Blocking type */ -} TRANSFER_BLOCK_Type; - - -/** Pointer to Function returning Void (any number of parameters) */ -typedef void (*PFV)(); - -/** Pointer to Function returning int32_t (any number of parameters) */ -typedef int32_t(*PFI)(); - -/** - * @} - */ - - -/* Public Macros -------------------------------------------------------------- */ -/** @defgroup LPC_Types_Public_Macros - * @{ - */ - -/* _BIT(n) sets the bit at position "n" - * _BIT(n) is intended to be used in "OR" and "AND" expressions: - * e.g., "(_BIT(3) | _BIT(7))". - */ -#undef _BIT -/* Set bit macro */ -#define _BIT(n) (1< = (any_expression) & _BITMASK(x), where 0 < x <= 32. - * If "any_expression" results in a value that is larger than can be - * contained in 'x' bits, the bits above 'x - 1' are masked off. When - * used with the _SBF example above, the example would be written: - * a_reg = ((_SBF(5,7) | _SBF(12,0xF)) & _BITMASK(16)) - * This ensures that the value written to a_reg is no wider than - * 16 bits, and makes the code easier to read and understand. - */ -#undef _BITMASK -/* Bitmask creation macro */ -#define _BITMASK(field_width) ( _BIT(field_width) - 1) - -/* NULL pointer */ -#ifndef NULL -#define NULL ((void*) 0) -#endif - -/* Number of elements in an array */ -#define NELEMENTS(array) (sizeof (array) / sizeof (array[0])) - -/* Static data/function define */ -#define STATIC static -/* External data/function define */ -#define EXTERN extern - -#define MAX(a, b) (((a) > (b)) ? (a) : (b)) -#define MIN(a, b) (((a) < (b)) ? (a) : (b)) - -/** - * @} - */ - - -/* Old Type Definition compatibility ------------------------------------------ */ -/** @addtogroup LPC_Types_Public_Types - * @{ - */ - -/** SMA type for character type */ -typedef char CHAR; - -/** SMA type for 8 bit unsigned value */ -typedef uint8_t UNS_8; - -/** SMA type for 8 bit signed value */ -typedef int8_t INT_8; - -/** SMA type for 16 bit unsigned value */ -typedef uint16_t UNS_16; - -/** SMA type for 16 bit signed value */ -typedef int16_t INT_16; - -/** SMA type for 32 bit unsigned value */ -typedef uint32_t UNS_32; - -/** SMA type for 32 bit signed value */ -typedef int32_t INT_32; - -/** SMA type for 64 bit signed value */ -typedef int64_t INT_64; - -/** SMA type for 64 bit unsigned value */ -typedef uint64_t UNS_64; - -/** 32 bit boolean type */ -typedef Bool BOOL_32; - -/** 16 bit boolean type */ -typedef Bool BOOL_16; - -/** 8 bit boolean type */ -typedef Bool BOOL_8; - -/** - * @} - */ - - -#endif /* LPC_TYPES_H */ - -/** - * @} - */ - -/* --------------------------------- End Of File ------------------------------ */ diff --git a/lib/includes/lpc17XX-arm-none-eabi-gcc/system_LPC17xx.h b/lib/includes/lpc17XX-arm-none-eabi-gcc/system_LPC17xx.h deleted file mode 100644 --- a/lib/includes/lpc17XX-arm-none-eabi-gcc/system_LPC17xx.h +++ /dev/null @@ -1,63 +0,0 @@ -/**************************************************************************//** - * @file system_LPC17xx.h - * @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File - * for the NXP LPC17xx Device Series - * @version V1.02 - * @date 08. September 2009 - * - * @note - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * @par - * ARM Limited (ARM) is supplying this software for use with Cortex-M - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * @par - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - -#ifndef __SYSTEM_LPC17xx_H -#define __SYSTEM_LPC17xx_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include - -extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ - - -/** - * Initialize the system - * - * @param none - * @return none - * - * @brief Setup the microcontroller system. - * Initialize the System and update the SystemCoreClock variable. - */ -extern void SystemInit (void); - -/** - * Update SystemCoreClock variable - * - * @param none - * @return none - * - * @brief Updates the SystemCoreClock with current core Clock - * retrieved from cpu registers. - */ -extern void SystemCoreClockUpdate (void); -#ifdef __cplusplus -} -#endif - -#endif /* __SYSTEM_LPC17xx_H */ diff --git a/lib/includes/mbr.h b/lib/includes/mbr.h deleted file mode 100644 --- a/lib/includes/mbr.h +++ /dev/null @@ -1,71 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef MBR_H -#define MBR_H -#include -#include - -#define BootFlagoffset 0 -#define TypeCodeoffset 4 -#define LBABeginoffset 8 -#define NumOfSecoffset 12 - -#define MBRBadMbr 1 -#define MBRBabArg 2 -#define MBRReadErr 3 -#define MBRnoErr 0 - -#define isFat32(TypeCode) (((TypeCode)==0x0b)||((TypeCode)==0x0c)) - -typedef struct dikpartition -{ - char TypeCode; - unsigned int LBABegin; - unsigned int NumOfSec; - blkdevice* phy; -}dikpartition; - - -int mbropen(blkdevice* phy,dikpartition* part,char partNum); - - -#endif - - - - - - - - - - - - - - - - - - - - diff --git a/lib/includes/sdcard.h b/lib/includes/sdcard.h deleted file mode 100644 --- a/lib/includes/sdcard.h +++ /dev/null @@ -1,118 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef SDCARD_H -#define SDCARD_H -#include "blkdevice.h" -#include -#include - -/* MMC/SD command */ -#define CMD0 (0) /* GO_IDLE_STATE */ -#define CMD1 (1) /* SEND_OP_COND (MMC) */ -#define ACMD41 (0x80+41) /* SEND_OP_COND (SDC) */ -#define CMD8 (8) /* SEND_IF_COND */ -#define CMD9 (9) /* SEND_CSD */ -#define CMD10 (10) /* SEND_CID */ -#define CMD12 (12) /* STOP_TRANSMISSION */ -#define ACMD13 (0x80+13) /* SD_STATUS (SDC) */ -#define CMD16 (16) /* SET_BLOCKLEN */ -#define CMD17 (17) /* READ_SINGLE_BLOCK */ -#define CMD18 (18) /* READ_MULTIPLE_BLOCK */ -#define CMD23 (23) /* SET_BLOCK_COUNT (MMC) */ -#define ACMD23 (0x80+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */ -#define CMD24 (24) /* WRITE_BLOCK */ -#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */ -#define CMD32 (32) /* ERASE_ER_BLK_START */ -#define CMD33 (33) /* ERASE_ER_BLK_END */ -#define CMD38 (38) /* ERASE */ -#define CMD55 (55) /* APP_CMD */ -#define CMD58 (58) /* READ_OCR */ - -/* Card type flags (CardType) */ -#define CT_MMC 0x01 /* MMC ver 3 */ -#define CT_SD1 0x02 /* SD ver 1 */ -#define CT_SD2 0x04 /* SD ver 2 */ -#define CT_SDC (CT_SD1|CT_SD2) /* SD */ -#define CT_BLOCK 0x08 /* Block addressing */ - -struct sdcard_str -{ - UHANDLE phy; - void (*rcvr_mmc) (UHANDLE phy,char *buff,uint32_t bc); - void (*xmit_mmc) (UHANDLE phy,const char *buff,uint32_t bc); - void (*setspeed) (UHANDLE phy,uint32_t speed); - uint32_t (*getspeed) (UHANDLE phy); - DSTATUS Stat; - char CardType; -}; - -typedef volatile struct sdcard_str sdcardDev; - -extern void sdcardmake(sdcardDev* sdcard,UHANDLE phy,void (*rcvr_mmc) (UHANDLE,char *,uint32_t ),void (*xmit_mmc) (UHANDLE,const char *,uint32_t ),void (*setspeed) (UHANDLE phy,uint32_t speed),uint32_t (*getspeed) (UHANDLE phy)); -extern void sdcardmakeblkdev(blkdevice* dev,sdcardDev* sdcard, blkdevselect_t select,blkdevpower_t power,blkdevdetect_t detect,blkdevwriteprotected_t writeprotected); - -extern int sdcardselect (blkdeviceptr _this); -extern void sdcarddeselect (blkdeviceptr _this); -extern int sdcardwait_ready (sdcardDev* sdcard); -extern int sdcardxmit_datablock (sdcardDev* sdcard,const char *buff,char token); -extern int sdcardrcvr_datablock (sdcardDev* sdcard,char *buff,uint32_t btr); -extern char sdcardsend_cmd (blkdeviceptr _this,char cmd,uint32_t arg); - -extern DSTATUS sdcarddisk_status (blkdeviceptr _this); -extern DSTATUS sdcarddisk_initialize (blkdeviceptr _this); -extern DRESULT sdcarddisk_read (blkdeviceptr _this,char *buff,uint32_t sector,char count); -extern DRESULT sdcarddisk_write (blkdeviceptr _this,const char *buff,uint32_t sector,char count); -extern DRESULT sdcarddisk_ioctl (blkdeviceptr _this,char ctrl,void *buff); - -#endif - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/lib/includes/spi.h b/lib/includes/spi.h deleted file mode 100644 --- a/lib/includes/spi.h +++ /dev/null @@ -1,148 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -/* - TODO: - Add SPI slave mode - Add interrupt interface -*/ - -#ifndef SPI_H -#define SPI_H -#include -#include - -#ifdef __cplusplus - extern "C" { -#endif - -/* -typedef struct spi_t -{ - void* _dev; - int cfg; - int speed; -}spi_t;*/ - -typedef int spi_t; - - #define spi1 0 - #define spi2 1 - #define spi3 2 - #define spi4 3 - #define spi5 4 - #define spi6 5 - #define spi7 6 - #define spi8 7 - #define spi9 8 - - -typedef enum -{ - spi4bits = 0x3, - spi5bits = 0x4, - spi6bits = 0x5, - spi7bits = 0x6, - spi8bits = 0x7, - spi9bits = 0x8, - spi10bits = 0x9, - spi11bits = 0xA, - spi12bits = 0xB, - spi13bits = 0xC, - spi14bits = 0xD, - spi15bits = 0xE, - spi16bits = 0xF -}spibits_t; - -#define SPIBITSMASK 0xF - -typedef enum -{ - spislave = 0x00, - spimaster = 0x10 -}spimode_t; - -#define SPIMODEMASK 0x10 - -typedef enum -{ - spiclkinhlow = 0x00, - spiclkinhhigh = 0x20 -}spiclkinhlvl_t; - -#define SPICLKINHLVLMASK 0x20 - - -typedef enum -{ - spiclkfirstedge = 0x00, - spiclksecondedge = 0x40 -}spiclkphase_t; - -#define SPICLKPHASEMASK 0x40 - -typedef enum -{ - spimsbfirst = 0x00, - spilsbfirst = 0x80 -}spibitorder_t; - -#define SPIBITORDERMASK 0x80 - - -extern spi_t spiopen(int count); -extern spi_t spiopenandconfig(int count,uint32_t cfg,uint32_t speed,uint32_t MOSIpin,uint32_t MISOpin,uint32_t SCKpin,uint32_t SCSpin); -extern int spiclose(spi_t spidev); -extern int spisetpins(spi_t spidev,uint32_t MOSIpin,uint32_t MISOpin,uint32_t SCKpin,uint32_t SCSpin); -extern int spienable(spi_t spidev); -extern int spidisable(spi_t spidev); -extern int spisetconfig(spi_t spidev,uint32_t config,uint32_t speed); -extern int spisetspeed(spi_t spidev, uint32_t speed); -extern int spisetbitorder(spi_t spidev,spibitorder_t order); -extern int spisetdatabits(spi_t spidev,spibits_t bitscnt); -extern int spisetclkinhlevel(spi_t spidev,spiclkinhlvl_t level); -extern int spisetclkphase(spi_t spidev,spiclkphase_t phase); -extern int spiputw(spi_t spidev,uint16_t data); -extern uint16_t spigetw(spi_t spidev); -extern int spiputs(spi_t spidev,char* s); -extern int spigets(spi_t spidev,char* s); -extern int spiputnw(spi_t spidev,uint16_t* w,int n); -extern int spigetnw(spi_t spidev,uint16_t* w,int n); -extern int spiputnc(spi_t spidev,char* c,int n); -extern int spigetnc(spi_t spidev,char* c,int n); -extern int spiavailiabledata(spi_t spidev); - -#ifdef __cplusplus - } -#endif -#endif //SPI_H - - - - - - - - - - - - diff --git a/lib/includes/streamdevices.h b/lib/includes/streamdevices.h deleted file mode 100644 --- a/lib/includes/streamdevices.h +++ /dev/null @@ -1,60 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef STREAMDEVICES_H -#define STREAMDEVICES_H -#include -#include - -typedef struct streamdevice* streamdeviceptr; - -typedef int (*write_t)(streamdeviceptr device,void* data,int size, int n); -typedef int (*read_t)(streamdeviceptr device,void* data,int size, int n); -typedef int (*setpos_t)(streamdeviceptr device,int pos); -typedef int (*close_t)(streamdeviceptr device); - -typedef volatile struct streamdevice -{ - write_t write; - read_t read; - setpos_t setpos; - close_t close; - volatile uint32_t streamPt; - volatile UHANDLE _stream; - volatile uint32_t mode; -}streamdevice; - -#endif - - - - - - - - - - - - - - - diff --git a/lib/includes/uart.h b/lib/includes/uart.h deleted file mode 100644 --- a/lib/includes/uart.h +++ /dev/null @@ -1,118 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef UART_H -#define UART_H -#include -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/* -typedef volatile struct uart_t -{ - volatile void* _dev; - volatile int cfg; - volatile int speed; -}uart_t; - */ - -typedef int uart_t; -#define uart1 0 -#define uart2 1 -#define uart3 2 -#define uart4 3 -#define uart5 4 -#define uart6 5 -#define uart7 6 -#define uart8 7 -#define uart9 8 - - -typedef enum -{ - uartparitynone = 0x1, - uartparityeven = 0x2, - uartparityodd = 0x3 -}uartparity_t; - -#define UARTPARITYMASK 0x3 - -typedef enum -{ - uart7bits = 0x4, - uart8bits = 0x8, - uart9bits = 0xC -}uartbits_t; - -#define UARTBITSMASK 0xC - - -typedef enum -{ - uarthalfstop = 0x10, - uartonestop = 0x20, - uartonehalfstop = 0x30, - uarttwostop = 0x40 -}uartstopbits_t; - -#define UARTSTOPBITSMASK 0x70 - -extern uart_t uartopen(int count); -extern uart_t uartopenandconfig(int count ,uint32_t cfg,uint32_t speed,uint32_t TXpin,uint32_t RXpin,uint32_t RTSpin,uint32_t CTSpin); -extern int uartclose(uart_t uart); -extern int uartsetpins(uart_t uart,uint32_t TXpin,uint32_t RXpin,uint32_t RTSpin,uint32_t CTSpin); -extern int uartenable(uart_t uart); -extern int uartdisable(uart_t uart); -extern int uartsetconfig(uart_t uart,uint32_t cfg,uint32_t speed); -extern int uartsetspeed(uart_t uart,uint32_t speed); -extern int uartsetparity(uart_t uart,uartparity_t parity); -extern int uartsetdatabits(uart_t uart,uartbits_t databits); -extern int uartsetstopbits(uart_t uart,uartstopbits_t stopbits); -extern int uartputc(uart_t uart,char c); -extern char uartgetc(uart_t uart); -extern int uartputs(uart_t uart,char* s); -extern int uartgets(uart_t uart,char* s); -extern int uartputnc(uart_t uart,char* c,int n); -extern int uartgetnc(uart_t uart,char* c,int n); -extern int uartavailiabledata(uart_t uart); - -extern int uartmkstreamdev(uart_t uart,streamdevice* strdev); - -#ifdef __cplusplus -} -#endif -#endif //SPI_H - - - - - - - - - - - - diff --git a/lib/includes/ucdirent.h b/lib/includes/ucdirent.h deleted file mode 100644 --- a/lib/includes/ucdirent.h +++ /dev/null @@ -1,134 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef UCDIRENT_H -#define UCDIRENT_H -#include -#include -#include -#include -//#include - -#define ATTR_READ_ONLY 0x01 -#define ATTR_HIDDEN 0x02 -#define ATTR_SYSTEM 0x04 -#define ATTR_VOLUME_ID 0x08 -#define ATTR_DIRECTORY 0x10 -#define ATTR_ARCHIVE 0x20 -#define ATTR_LONGNAME 0x0F - -#define DIRENT_EndOfDir 1 -#define DIRENT_BabArg 2 -#define DIRENT_ReadErr 3 -#define DIRENT_LastSect 4 -#define DIRENT_BadSect 5 -#define DIRENT_noErr 0 - -typedef struct ucdirent* ucdirentptr; -typedef int (*getrootfirstent_t)(ucdirentptr entry); -typedef int (*nextdirent_t)(ucdirentptr entry); -typedef int (*getname_t)(ucdirentptr entry,char* name); - -typedef struct dirent -{ - unsigned char DIR_Name[16]; - unsigned char DIR_Attr; - unsigned char DIR_CrtTimeTenth; - unsigned short DIR_CrtTime; - unsigned short DIR_CrtDate; - unsigned short DIR_LstAccDate; - unsigned short DIR_FstClusHI; - unsigned short DIR_WrtTime; - unsigned short DIR_WrtDate; - unsigned short DIR_FstClustLO; - unsigned int DIR_FileSize; - unsigned int CurrentSec; - unsigned char Currententry; - UHANDLE fs; - getrootfirstent_t getrootfirstent; - nextdirent_t nextdirent; - getname_t getname; -}dirent; - -typedef struct ucdirent{ - uint8_t DIR_Name[16]; - uint8_t DIR_Attr; - uint8_t DIR_CrtTimeTenth; - uint16_t DIR_CrtTime; - uint16_t DIR_CrtDate; - uint16_t DIR_LstAccDate; - uint16_t DIR_FstClusHI; - uint16_t DIR_WrtTime; - uint16_t DIR_WrtDate; - uint16_t DIR_FstClustLO; - uint32_t DIR_FileSize; - uint32_t CurrentSec; - uint8_t Currententry; - UHANDLE fs; - getrootfirstent_t getrootfirstent; - nextdirent_t nextdirent; - getname_t getname; -}ucdirent; - - - -#define direntgetroot(dirent) (dirent).getrootfirstent(&dirent) -#define direntgetnext(dirent) (dirent).nextdirent(&dirent) - -#endif - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/lib/includes/uhandle.h b/lib/includes/uhandle.h deleted file mode 100644 --- a/lib/includes/uhandle.h +++ /dev/null @@ -1,29 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef UHANDLE_H -#define UHANDLE_H - -typedef volatile void* UHANDLE; - -#define uhandlevalide(HANDLE) ((HANDLE)!=0) - -#endif diff --git a/lib/includes/vs1053.h b/lib/includes/vs1053.h deleted file mode 100644 --- a/lib/includes/vs1053.h +++ /dev/null @@ -1,78 +0,0 @@ -/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ -#ifndef VS1053_H -#define VS1053_H -#include - -#define VSMODE 0 -#define VSSTATUS 1 -#define VSBASS 2 -#define VSCLOCKF 3 -#define VSDECODE_TIME 4 -#define VSAUDATA 5 -#define VSWRAM 6 -#define VSWRAMADDR 7 -#define VSHDAT0 8 -#define VSHDAT1 9 -#define VSAIADDR 0xA -#define VSVOL 0xB -#define VSAICTRL0 0xC -#define VSAICTRL1 0xD -#define VSAICTRL2 0xE -#define VSAICTRL3 0xF - -struct vs1053Regs -{ - sspDev SSP_device; - int a; -}; - -typedef struct vs1053Regs vs1053Dev; - -void vs1053open(vs1053Dev* codec,sspDev dev); -void vs1053softreset(vs1053Dev* dev); -int vs1053cmdread(vs1053Dev* dev,char address); -void vs1053cmdwrite(vs1053Dev* dev,char address,int value); - -extern void vs10XXclearXCS(); -extern void vs10XXsetXCS(); -extern int vs10XXDREQ(); - -#endif - - - - - - - - - - - - - - - - - - diff --git a/lib/src/common/24LCXX/24LC0X/24LC0X.h b/lib/src/common/24LCXX/24LC0X/24LC0X.h deleted file mode 100644 --- a/lib/src/common/24LCXX/24LC0X/24LC0X.h +++ /dev/null @@ -1,57 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2011, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef B24LC0X_H -#define B24LC0X_H - -#include "iic.h" -#include - -struct eeprom24LC0X_str -{ - i2cDev iicdev; - unsigned char devAddress; - unsigned char size; -}; - -typedef struct eeprom24LC0X_str eeprom24lc0xDev; - - -extern void eeprom24lc0xopen(eeprom24lc0xDev* dev,i2cDev iicdev,unsigned char A0_A1_A2_val,unsigned int size); - -extern void eeprom24lc0xpagewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char* page); -extern void eeprom24lc0xpageread(eeprom24lc0xDev dev,unsigned char address,unsigned char* page); -extern void eeprom24lc0xbytewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char data); -extern unsigned char eeprom24lc0xbyteread(eeprom24lc0xDev dev,unsigned char address); -extern void eeprom24lc0xreadn(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count); -extern void eeprom24lc0xwriten(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count); - - - - -#endif - - - - - - - diff --git a/lib/src/common/24LCXX/24LC0X/24LC0X.pro b/lib/src/common/24LCXX/24LC0X/24LC0X.pro --- a/lib/src/common/24LCXX/24LC0X/24LC0X.pro +++ b/lib/src/common/24LCXX/24LC0X/24LC0X.pro @@ -1,13 +1,14 @@ TEMPLATE = lib +OBJECTS_DIR = obj -lpc17XX.ARCH = stm32f4-arm-none-eabi-gcc -lpc17XX.TARGET = lib24lc0X -lpc17XX.TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_24LC0X) -lpc17XX.HEADERSINSTALLPATH = $(LIBUC_INC_DIR_24LC0X) +SOURCES += 24LC0X.c -lpc17XX.LIBS += CORE IIC UHANDLE - -lpc17XX.SOURCES += 24LC0X.c +INCLUDEPATH += ../../includes \ + ../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../CPU/CMSIS/Include -lpc17XX.HEADERS += 24LC0X.h +UCMODEL=stm32f4 + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target diff --git a/lib/src/common/ADS127X/core_cm3.c b/lib/src/common/ADS127X/core_cm3.c deleted file mode 100644 --- a/lib/src/common/ADS127X/core_cm3.c +++ /dev/null @@ -1,339 +0,0 @@ -/**************************************************************************//** - * @file core_cm3.c - * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File - * @version V2.00 - * @date 13. September 2010 - * - * @note - * Copyright (C) 2009-2010 ARM Limited. All rights reserved. - * - * @par - * ARM Limited (ARM) is supplying this software for use with Cortex-M - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * @par - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - -#include - -/* define compiler specific symbols */ -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - -#endif - - -/* ########################## Core Instruction Access ######################### */ - -#if defined ( __CC_ARM ) /*------------------ RealView Compiler ----------------*/ - -/** \brief Reverse byte order (16 bit) - - This function reverses the byte order in two unsigned short values. - - \param [in] value Value to reverse - \return Reversed value - */ -#if (__ARMCC_VERSION < 400677) -__ASM uint32_t __REV16(uint32_t value) -{ - rev16 r0, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Reverse byte order in signed short value - - This function reverses the byte order in a signed short value with sign extension to integer. - - \param [in] value Value to reverse - \return Reversed value - */ -#if (__ARMCC_VERSION < 400677) -__ASM int32_t __REVSH(int32_t value) -{ - revsh r0, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Remove the exclusive lock - - This function removes the exclusive lock which is created by LDREX. - - */ -#if (__ARMCC_VERSION < 400000) -__ASM void __CLREX(void) -{ - clrex -} -#endif /* __ARMCC_VERSION */ - - -#elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/ -/* obsolete */ -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ -/* obsolete */ -#elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/ -/* obsolete */ -#endif - - -/* ########################### Core Function Access ########################### */ - -#if defined ( __CC_ARM ) /*------------------ RealView Compiler ----------------*/ - -/** \brief Get Control Register - - This function returns the content of the Control Register. - - \return Control Register value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_CONTROL(void) -{ - mrs r0, control - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Set Control Register - - This function writes the given value to the Control Register. - - \param [in] control Control Register value to set - */ -#if (__ARMCC_VERSION < 400000) -__ASM void __set_CONTROL(uint32_t control) -{ - msr control, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Get ISPR Register - - This function returns the content of the ISPR Register. - - \return ISPR Register value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_IPSR(void) -{ - mrs r0, ipsr - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Get APSR Register - - This function returns the content of the APSR Register. - - \return APSR Register value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_APSR(void) -{ - mrs r0, apsr - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Get xPSR Register - - This function returns the content of the xPSR Register. - - \return xPSR Register value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_xPSR(void) -{ - mrs r0, xpsr - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Get Process Stack Pointer - - This function returns the current value of the Process Stack Pointer (PSP). - - \return PSP Register value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_PSP(void) -{ - mrs r0, psp - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Set Process Stack Pointer - - This function assigns the given value to the Process Stack Pointer (PSP). - - \param [in] topOfProcStack Process Stack Pointer value to set - */ -#if (__ARMCC_VERSION < 400000) -__ASM void __set_PSP(uint32_t topOfProcStack) -{ - msr psp, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Get Main Stack Pointer - - This function returns the current value of the Main Stack Pointer (MSP). - - \return MSP Register value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_MSP(void) -{ - mrs r0, msp - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Set Main Stack Pointer - - This function assigns the given value to the Main Stack Pointer (MSP). - - \param [in] topOfMainStack Main Stack Pointer value to set - */ -#if (__ARMCC_VERSION < 400000) -__ASM void __set_MSP(uint32_t mainStackPointer) -{ - msr msp, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Get Base Priority - - This function returns the current value of the Base Priority register. - - \return Base Priority register value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_BASEPRI(void) -{ - mrs r0, basepri - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Set Base Priority - - This function assigns the given value to the Base Priority register. - - \param [in] basePri Base Priority value to set - */ -#if (__ARMCC_VERSION < 400000) -__ASM void __set_BASEPRI(uint32_t basePri) -{ - msr basepri, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - -/** \brief Get Priority Mask - - This function returns the current state of the priority mask bit from the Priority Mask Register. - - \return Priority Mask value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_PRIMASK(void) -{ - mrs r0, primask - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Set Priority Mask - - This function assigns the given value to the Priority Mask Register. - - \param [in] priMask Priority Mask - */ -#if (__ARMCC_VERSION < 400000) -__ASM void __set_PRIMASK(uint32_t priMask) -{ - msr primask, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Get Fault Mask - - This function returns the current value of the Fault Mask Register. - - \return Fault Mask value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_FAULTMASK(void) -{ - mrs r0, faultmask - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Set the Fault Mask - - This function assigns the given value to the Fault Mask Register. - - \param [in] faultMask Fault Mask value value to set - */ -#if (__ARMCC_VERSION < 400000) -__ASM void __set_FAULTMASK(uint32_t faultMask) -{ - msr faultmask, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - - - -#elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/ -/* obsolete */ -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ -/* obsolete */ -#elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/ -/* obsolete */ -#endif diff --git a/lib/src/common/ADS127X/lpc17XX.mk b/lib/src/common/ADS127X/lpc17XX.mk deleted file mode 100644 --- a/lib/src/common/ADS127X/lpc17XX.mk +++ /dev/null @@ -1,29 +0,0 @@ -PROJECTDIR = `pwd` -LIBUC = /opt/libuc2 - -HEADERSINSTALLPATH = $(LIBUC_INC_DIR_ADS127X) -HEADERS += ads1278.h -LIBSOURCES += ads1278.c -OBJDIR = obj -BINDIR = bin -OBJECTFILES = $(LIBSOURCES:.c=.o) -OBJECTFILES := $(addprefix $(OBJDIR)/,$(OBJECTFILES)) -ARCH = lpc17XX-arm-none-eabi-gcc -ARCHFOLDER = $(LIBUC)/rules/lpc17XX-arm-none-eabi-gcc -TARGET=libads127X -LIBUC_INCLUDES=$(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_UHANDLE_CMD) -LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_UHANDLE_CMD) $(LIBUC_LIBS_UHANDLE) -TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_ADS127X) -HEADERSINSTALLPATH=$(LIBUC_INC_DIR_ADS127X) -BSP=generic -include $(ARCHFOLDER)/rules.mk - - - - -all:lib - @echo Code compiled - -libclean: - rm -f $(TARGETINSTALLPATH)/*.a - rm -f $(HEADERSINSTALLPATH)/*.h diff --git a/lib/src/common/ADS127X/startup_LPC17xx.c b/lib/src/common/ADS127X/startup_LPC17xx.c deleted file mode 100644 --- a/lib/src/common/ADS127X/startup_LPC17xx.c +++ /dev/null @@ -1,299 +0,0 @@ -/****************************************************************************//** - * @file : startup_LPC17xx.c - * @brief : CMSIS Cortex-M3 Core Device Startup File - * @version : V1.01 - * @date : 4. Feb. 2009 - * - *---------------------------------------------------------------------------- - * - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-Mx - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - -// Mod by nio for the .fastcode part - -#include "LPC17xx.h" - -#define WEAK __attribute__ ((weak)) -//***************************************************************************** -// -// Forward declaration of the default fault handlers. -// -//***************************************************************************** -/* System exception vector handler */ -void WEAK Reset_Handler(void); /* Reset Handler */ -void WEAK NMI_Handler(void); /* NMI Handler */ -void WEAK HardFault_Handler(void); /* Hard Fault Handler */ -void WEAK MemManage_Handler(void); /* MPU Fault Handler */ -void WEAK BusFault_Handler(void); /* Bus Fault Handler */ -void WEAK UsageFault_Handler(void); /* Usage Fault Handler */ -void WEAK SVC_Handler(void); /* SVCall Handler */ -void WEAK DebugMon_Handler(void); /* Debug Monitor Handler */ -void WEAK PendSV_Handler(void); /* PendSV Handler */ -void WEAK SysTick_Handler(void); /* SysTick Handler */ - -/* External interrupt vector handler */ -void WEAK WDT_IRQHandler(void); /* Watchdog Timer */ -void WEAK TIMER0_IRQHandler(void); /* Timer0 */ -void WEAK TIMER1_IRQHandler(void); /* Timer1 */ -void WEAK TIMER2_IRQHandler(void); /* Timer2 */ -void WEAK TIMER3_IRQHandler(void); /* Timer3 */ -void WEAK UART0_IRQHandler(void); /* UART0 */ -void WEAK UART1_IRQHandler(void); /* UART1 */ -void WEAK UART2_IRQHandler(void); /* UART2 */ -void WEAK UART3_IRQHandler(void); /* UART3 */ -void WEAK PWM1_IRQHandler(void); /* PWM1 */ -void WEAK I2C0_IRQHandler(void); /* I2C0 */ -void WEAK I2C1_IRQHandler(void); /* I2C1 */ -void WEAK I2C2_IRQHandler(void); /* I2C2 */ -void WEAK SPI_IRQHandler(void); /* SPI */ -void WEAK SSP0_IRQHandler(void); /* SSP0 */ -void WEAK SSP1_IRQHandler(void); /* SSP1 */ -void WEAK PLL0_IRQHandler(void); /* PLL0 (Main PLL) */ -void WEAK RTC_IRQHandler(void); /* Real Time Clock */ -void WEAK EINT0_IRQHandler(void); /* External Interrupt 0 */ -void WEAK EINT1_IRQHandler(void); /* External Interrupt 1 */ -void WEAK EINT2_IRQHandler(void); /* External Interrupt 2 */ -void WEAK EINT3_IRQHandler(void); /* External Interrupt 3 */ -void WEAK ADC_IRQHandler(void); /* A/D Converter */ -void WEAK BOD_IRQHandler(void); /* Brown Out Detect */ -void WEAK USB_IRQHandler(void); /* USB */ -void WEAK CAN_IRQHandler(void); /* CAN */ -void WEAK DMA_IRQHandler(void); /* GP DMA */ -void WEAK I2S_IRQHandler(void); /* I2S */ -void WEAK ENET_IRQHandler(void); /* Ethernet */ -void WEAK RIT_IRQHandler(void); /* Repetitive Interrupt Timer */ -void WEAK MCPWM_IRQHandler(void); /* Motor Control PWM */ -void WEAK QEI_IRQHandler(void); /* Quadrature Encoder Interface */ -void WEAK PLL1_IRQHandler(void); /* PLL1 (USB PLL) */ - - - -/* Exported types --------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -extern unsigned long _etext; -extern unsigned long _sidata; /* start address for the initialization values of the .data section. defined in linker script */ -extern unsigned long _sdata; /* start address for the .data section. defined in linker script */ -extern unsigned long _edata; /* end address for the .data section. defined in linker script */ -extern unsigned long _sitestdata; /* start address for the initialization values of the .data section. defined in linker script */ -extern unsigned long _stestdata; /* start address for the .data section. defined in linker script */ -extern unsigned long _etestdata; - - -extern unsigned long _sifastcode; /* start address for the initialization values of the .fastcode section. defined in linker script */ -extern unsigned long _sfastcode; /* start address for the .fastcode section. defined in linker script */ -extern unsigned long _efastcode; /* end address for the .fastcode section. defined in linker script */ - -extern unsigned long _sbss; /* start address for the .bss section. defined in linker script */ -extern unsigned long _ebss; /* end address for the .bss section. defined in linker script */ - -extern void _estack; /* init value for the stack pointer. defined in linker script */ - -extern int bsp_init(); - -/* Private typedef -----------------------------------------------------------*/ -/* function prototypes ------------------------------------------------------*/ -void Reset_Handler(void) __attribute__((__interrupt__)); -extern int main(void); - - -/****************************************************************************** -* -* The minimal vector table for a Cortex M3. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -******************************************************************************/ -#define STACK_SIZE 0x00000800 /*2kO*/ - -__attribute__ ((section(".stackarea"))) -/* static */ unsigned long pulStack[STACK_SIZE]; - - -__attribute__ ((section(".isr_vector"))) -void (* const g_pfnVectors[])(void) = -{ - /* &_estack, // The initial stack pointer */ - (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), // The initial stack pointer - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* NMI Handler */ - HardFault_Handler, /* Hard Fault Handler */ - MemManage_Handler, /* MPU Fault Handler */ - BusFault_Handler, /* Bus Fault Handler */ - UsageFault_Handler, /* Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* SVCall Handler */ - DebugMon_Handler, /* Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* PendSV Handler */ - SysTick_Handler, /* SysTick Handler */ - - // External Interrupts - WDT_IRQHandler, /* Watchdog Timer */ - TIMER0_IRQHandler, /* Timer0 */ - TIMER1_IRQHandler, /* Timer1 */ - TIMER2_IRQHandler, /* Timer2 */ - TIMER3_IRQHandler, /* Timer3 */ - UART0_IRQHandler, /* UART0 */ - UART1_IRQHandler, /* UART1 */ - UART2_IRQHandler, /* UART2 */ - UART3_IRQHandler, /* UART3 */ - PWM1_IRQHandler, /* PWM1 */ - I2C0_IRQHandler, /* I2C0 */ - I2C1_IRQHandler, /* I2C1 */ - I2C2_IRQHandler, /* I2C2 */ - SPI_IRQHandler, /* SPI */ - SSP0_IRQHandler, /* SSP0 */ - SSP1_IRQHandler, /* SSP1 */ - PLL0_IRQHandler, /* PLL0 (Main PLL) */ - RTC_IRQHandler, /* Real Time Clock */ - EINT0_IRQHandler, /* External Interrupt 0 */ - EINT1_IRQHandler, /* External Interrupt 1 */ - EINT2_IRQHandler, /* External Interrupt 2 */ - EINT3_IRQHandler, /* External Interrupt 3 */ - ADC_IRQHandler, /* A/D Converter */ - BOD_IRQHandler, /* Brown Out Detect */ - USB_IRQHandler, /* USB */ - CAN_IRQHandler, /* CAN */ - DMA_IRQHandler, /* GP DMA */ - I2S_IRQHandler, /* I2S */ - ENET_IRQHandler, /* Ethernet */ - RIT_IRQHandler, /* Repetitive Interrupt Timer */ - MCPWM_IRQHandler, /* Motor Control PWM */ - QEI_IRQHandler, /* Quadrature Encoder Interface */ - PLL1_IRQHandler, /* PLL1 (USB PLL) */ -}; - -/******************************************************************************* -* Function Name : Reset_Handler -* Description : This is the code that gets called when the processor first starts execution -* following a reset event. Only the absolutely necessary set is performed, -* after which the application supplied main() routine is called. -* Input : -* Output : -* Return : -*******************************************************************************/ -void Reset_Handler(void) -{ - SystemInit(); - - unsigned long *pulDest; - unsigned long *pulSrc; - - // - // Copy the data segment initializers from flash to SRAM in ROM mode - // - - if (&_sidata != &_sdata) { // only if needed - pulSrc = &_sidata; - for(pulDest = &_sdata; pulDest < &_edata; ) { - *(pulDest++) = *(pulSrc++); - } - } - if (&_sitestdata != &_stestdata) { // only if needed - pulSrc = &_sitestdata; - for(pulDest = &_stestdata; pulDest < &_etestdata; ) { - *(pulDest++) = *(pulSrc++); - } - } - - // Copy the .fastcode code from ROM to SRAM - - if (&_sifastcode != &_sfastcode) { // only if needed - pulSrc = &_sifastcode; - for(pulDest = &_sfastcode; pulDest < &_efastcode; ) { - *(pulDest++) = *(pulSrc++); - } - } - - // - // Zero fill the bss segment. - // - for(pulDest = &_sbss; pulDest < &_ebss; ) - { - *(pulDest++) = 0; - } - - // - // Call the application's entry point. - // - bsp_init(); - main(); -} - -//***************************************************************************** -// -// Provide weak aliases for each Exception handler to the Default_Handler. -// As they are weak aliases, any function with the same name will override -// this definition. -// -//***************************************************************************** -#pragma weak MemManage_Handler = Default_Handler /* MPU Fault Handler */ -#pragma weak BusFault_Handler = Default_Handler /* Bus Fault Handler */ -#pragma weak UsageFault_Handler = Default_Handler /* Usage Fault Handler */ -#pragma weak SVC_Handler = Default_Handler /* SVCall Handler */ -#pragma weak DebugMon_Handler = Default_Handler /* Debug Monitor Handler */ -#pragma weak PendSV_Handler = Default_Handler /* PendSV Handler */ -#pragma weak SysTick_Handler = Default_Handler /* SysTick Handler */ - -/* External interrupt vector handler */ -#pragma weak WDT_IRQHandler = Default_Handler /* Watchdog Timer */ -#pragma weak TIMER0_IRQHandler = Default_Handler /* Timer0 */ -#pragma weak TIMER1_IRQHandler = Default_Handler /* Timer1 */ -#pragma weak TIMER2_IRQHandler = Default_Handler /* Timer2 */ -#pragma weak TIMER3_IRQHandler = Default_Handler /* Timer3 */ -#pragma weak UART0_IRQHandler = Default_Handler /* UART0 */ -#pragma weak UART1_IRQHandler = Default_Handler /* UART1 */ -#pragma weak UART2_IRQHandler = Default_Handler /* UART2 */ -#pragma weak UART3_IRQHandler = Default_Handler /* UART3 */ -#pragma weak PWM1_IRQHandler = Default_Handler /* PWM1 */ -#pragma weak I2C0_IRQHandler = Default_Handler /* I2C0 */ -#pragma weak I2C1_IRQHandler = Default_Handler /* I2C1 */ -#pragma weak I2C2_IRQHandler = Default_Handler /* I2C2 */ -#pragma weak SPI_IRQHandler = Default_Handler /* SPI */ -#pragma weak SSP0_IRQHandler = Default_Handler /* SSP0 */ -#pragma weak SSP1_IRQHandler = Default_Handler /* SSP1 */ -#pragma weak PLL0_IRQHandler = Default_Handler /* PLL0 (Main PLL) */ -#pragma weak RTC_IRQHandler = Default_Handler /* Real Time Clock */ -#pragma weak EINT0_IRQHandler = Default_Handler /* External Interrupt 0 */ -#pragma weak EINT1_IRQHandler = Default_Handler /* External Interrupt 1 */ -#pragma weak EINT2_IRQHandler = Default_Handler /* External Interrupt 2 */ -#pragma weak EINT3_IRQHandler = Default_Handler /* External Interrupt 3 */ -#pragma weak ADC_IRQHandler = Default_Handler /* A/D Converter */ -#pragma weak BOD_IRQHandler = Default_Handler /* Brown Out Detect */ -#pragma weak USB_IRQHandler = Default_Handler /* USB */ -#pragma weak CAN_IRQHandler = Default_Handler /* CAN */ -#pragma weak DMA_IRQHandler = Default_Handler /* GP DMA */ -#pragma weak I2S_IRQHandler = Default_Handler /* I2S */ -#pragma weak ENET_IRQHandler = Default_Handler /* Ethernet */ -#pragma weak RIT_IRQHandler = Default_Handler /* Repetitive Interrupt Timer */ -#pragma weak MCPWM_IRQHandler = Default_Handler /* Motor Control PWM */ -#pragma weak QEI_IRQHandler = Default_Handler /* Quadrature Encoder Interface */ -#pragma weak PLL1_IRQHandler = Default_Handler /* PLL1 (USB PLL) */ - -//***************************************************************************** -// -// This is the code that gets called when the processor receives an unexpected -// interrupt. This simply enters an infinite loop, preserving the system state -// for examination by a debugger. -// -//***************************************************************************** -void Default_Handler(void) { - // Go into an infinite loop. - // - while (1) { - } -} diff --git a/lib/src/common/ADS127X/stm32f4XX.mk b/lib/src/common/ADS127X/stm32f4XX.mk deleted file mode 100644 --- a/lib/src/common/ADS127X/stm32f4XX.mk +++ /dev/null @@ -1,98 +0,0 @@ -PROJECTDIR = `pwd` -LIBUC = /opt/libuc2 - -HEADERSINSTALLPATH = $(LIBUC_INC_DIR_ADS127X) -HEADERS += ads1278.h -SOURCES += ads1278.c -OBJDIR = obj -BINDIR = bin -OBJECTFILES = obj/ads1278.o \ - -ARCH = stm32f4-arm-none-eabi-gcc -ARCHFOLDER = $(LIBUC)/rules/stm32f4-arm-none-eabi-gcc -TARGET=libads127X -LIBUC_INCLUDES=$(LIBUC_INC_DIR_CORE_CMD) $(LIBUC_INC_DIR_SSP_CMD) $(LIBUC_INC_DIR_UHANDLE_CMD) -LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_CORE_CMD) $(LIBUC_LIBS_CORE) $(LIBUC_LIBS_DIR_SSP_CMD) $(LIBUC_LIBS_SSP) $(LIBUC_LIBS_DIR_UHANDLE_CMD) $(LIBUC_LIBS_UHANDLE) -TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_ADS127X) -HEADERSINSTALLPATH=$(LIBUC_INC_DIR_ADS127X) -BSP=generic -include $(ARCHFOLDER)/rules.mk -INCLUDES += -I ./ - - - - -all:lib - @echo Code compiled - -.SUFFIXES: .o .c .s - -.c.o: - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - -.s.o: - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - -bin: $(BINDIR)/$(TARGET).elf $(BINDIR)/$(TARGET).bin $(BINDIR)/$(TARGET).hex - @echo "compile bin" - -lib: $(BINDIR)/$(TARGET).a - @echo "compile lib" - - -$(BINDIR)/$(TARGET).a: $(OBJECTFILES) - mkdir -p $(BINDIR) - $(LIBUC_AR) rcs $@ $(OBJECTFILES) - -$(OBJDIR): - mkdir -p $(OBJDIR) - -%.elf: $(LINKER_SCRIPT) $(OBJECTFILES) - mkdir -p $(BINDIR) - $(LIBUC_CC) $(LIBUC_LDFLAGS) $(LIBUC_CFLAGS) -T $^ -o $@ $(LIBUC_BSP) $(LIBUC_LIBRARIES) - $(LIBUC_OBJDUMP) $(LIBUC_ODFLAGS) $@ > $(@:.elf=.dump) - $(LIBUC_SIZE) $@ - - -%.bin: %.elf $(BIN_LIBS_DEPS) - $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O binary $< $*.bin - @echo "BIN_LIBS_DEPS" - @echo $(BIN_LIBS_DEPS) - - -%.hex: %.elf - $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O ihex $< $*.hex - -$(TARGETINSTALLPATH)/$(TARGET).a: $(BINDIR)/$(TARGET).a - mkdir -p $(TARGETINSTALLPATH) - cp $(BINDIR)/$(TARGET).a $(TARGETINSTALLPATH)/$(TARGET).a - -libinstall: $(TARGETINSTALLPATH)/$(TARGET).a - @if [ -z $(HEADERSINSTALLPATH) ] ; then echo "No headers to install" ; else mkdir -p $(HEADERSINSTALLPATH) ; fi - @if [ -z "$(HEADERS)" ] ; then echo "No headers to install" ; else echo "cp -f $(HEADERS) $(HEADERSINSTALLPATH)/" ; cp -f $(HEADERS) $(HEADERSINSTALLPATH)/ ; fi - -clean: - rm -f *.o *.d *.bin *.hex *.dump *.map *.a *.elf - rm -f $(OBJECTFILES) - rm -f $(BINDIR)/*.bin - rm -f $(BINDIR)/*.hex - rm -f $(BINDIR)/*.dump - rm -f $(BINDIR)/*.map - rm -f $(BINDIR)/*.a - rm -f $(BINDIR)/*.elf - rm -f $(DEVSOURCESND) - rm -f $(ASMDEVSOURCESND) - -distclean: clean libclean - rm -f $(TARGETINSTALLPATH)/*.bin - rm -f $(TARGETINSTALLPATH)/*.a - rm -f Makefile - -obj/ads1278.o: ads1278.c $(OBJDIR) - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - -install:libinstall - - -libclean: - rm -f $(TARGETINSTALLPATH)/$(TARGET).a diff --git a/lib/src/common/ADS127X/system_LPC17xx.c b/lib/src/common/ADS127X/system_LPC17xx.c deleted file mode 100644 --- a/lib/src/common/ADS127X/system_LPC17xx.c +++ /dev/null @@ -1,541 +0,0 @@ -/**************************************************************************//** - * @file system_LPC17xx.c - * @brief CMSIS Cortex-M3 Device Peripheral Access Layer Source File - * for the NXP LPC17xx Device Series - * @version V1.08 - * @date 12. May 2010 - * - * @note - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * @par - * ARM Limited (ARM) is supplying this software for use with Cortex-M - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * @par - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - -#include -#include "LPC17xx.h" - -/* -//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ -*/ - -/*--------------------- Clock Configuration ---------------------------------- -// -// Clock Configuration -// System Controls and Status Register (SCS) -// OSCRANGE: Main Oscillator Range Select -// <0=> 1 MHz to 20 MHz -// <1=> 15 MHz to 24 MHz -// OSCEN: Main Oscillator Enable -// -// -// -// Clock Source Select Register (CLKSRCSEL) -// CLKSRC: PLL Clock Source Selection -// <0=> Internal RC oscillator -// <1=> Main oscillator -// <2=> RTC oscillator -// -// -// PLL0 Configuration (Main PLL) -// PLL0 Configuration Register (PLL0CFG) -// F_cco0 = (2 * M * F_in) / N -// F_in must be in the range of 32 kHz to 50 MHz -// F_cco0 must be in the range of 275 MHz to 550 MHz -// MSEL: PLL Multiplier Selection -// <6-32768><#-1> -// M Value -// NSEL: PLL Divider Selection -// <1-256><#-1> -// N Value -// -// -// -// PLL1 Configuration (USB PLL) -// PLL1 Configuration Register (PLL1CFG) -// F_usb = M * F_osc or F_usb = F_cco1 / (2 * P) -// F_cco1 = F_osc * M * 2 * P -// F_cco1 must be in the range of 156 MHz to 320 MHz -// MSEL: PLL Multiplier Selection -// <1-32><#-1> -// M Value (for USB maximum value is 4) -// PSEL: PLL Divider Selection -// <0=> 1 -// <1=> 2 -// <2=> 4 -// <3=> 8 -// P Value -// -// -// -// CPU Clock Configuration Register (CCLKCFG) -// CCLKSEL: Divide Value for CPU Clock from PLL0 -// <1-256><#-1> -// -// -// USB Clock Configuration Register (USBCLKCFG) -// USBSEL: Divide Value for USB Clock from PLL0 -// <0-15> -// Divide is USBSEL + 1 -// -// -// Peripheral Clock Selection Register 0 (PCLKSEL0) -// PCLK_WDT: Peripheral Clock Selection for WDT -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_TIMER0: Peripheral Clock Selection for TIMER0 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_TIMER1: Peripheral Clock Selection for TIMER1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_UART0: Peripheral Clock Selection for UART0 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_UART1: Peripheral Clock Selection for UART1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_PWM1: Peripheral Clock Selection for PWM1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_I2C0: Peripheral Clock Selection for I2C0 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_SPI: Peripheral Clock Selection for SPI -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_SSP1: Peripheral Clock Selection for SSP1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_DAC: Peripheral Clock Selection for DAC -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_ADC: Peripheral Clock Selection for ADC -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_CAN1: Peripheral Clock Selection for CAN1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 6 -// PCLK_CAN2: Peripheral Clock Selection for CAN2 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 6 -// PCLK_ACF: Peripheral Clock Selection for ACF -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 6 -// -// -// Peripheral Clock Selection Register 1 (PCLKSEL1) -// PCLK_QEI: Peripheral Clock Selection for the Quadrature Encoder Interface -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_GPIO: Peripheral Clock Selection for GPIOs -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_PCB: Peripheral Clock Selection for the Pin Connect Block -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_I2C1: Peripheral Clock Selection for I2C1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_SSP0: Peripheral Clock Selection for SSP0 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_TIMER2: Peripheral Clock Selection for TIMER2 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_TIMER3: Peripheral Clock Selection for TIMER3 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_UART2: Peripheral Clock Selection for UART2 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_UART3: Peripheral Clock Selection for UART3 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_I2C2: Peripheral Clock Selection for I2C2 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_I2S: Peripheral Clock Selection for I2S -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_RIT: Peripheral Clock Selection for the Repetitive Interrupt Timer -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_SYSCON: Peripheral Clock Selection for the System Control Block -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_MC: Peripheral Clock Selection for the Motor Control PWM -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// -// -// Power Control for Peripherals Register (PCONP) -// PCTIM0: Timer/Counter 0 power/clock enable -// PCTIM1: Timer/Counter 1 power/clock enable -// PCUART0: UART 0 power/clock enable -// PCUART1: UART 1 power/clock enable -// PCPWM1: PWM 1 power/clock enable -// PCI2C0: I2C interface 0 power/clock enable -// PCSPI: SPI interface power/clock enable -// PCRTC: RTC power/clock enable -// PCSSP1: SSP interface 1 power/clock enable -// PCAD: A/D converter power/clock enable -// PCCAN1: CAN controller 1 power/clock enable -// PCCAN2: CAN controller 2 power/clock enable -// PCGPIO: GPIOs power/clock enable -// PCRIT: Repetitive interrupt timer power/clock enable -// PCMC: Motor control PWM power/clock enable -// PCQEI: Quadrature encoder interface power/clock enable -// PCI2C1: I2C interface 1 power/clock enable -// PCSSP0: SSP interface 0 power/clock enable -// PCTIM2: Timer 2 power/clock enable -// PCTIM3: Timer 3 power/clock enable -// PCUART2: UART 2 power/clock enable -// PCUART3: UART 3 power/clock enable -// PCI2C2: I2C interface 2 power/clock enable -// PCI2S: I2S interface power/clock enable -// PCGPDMA: GP DMA function power/clock enable -// PCENET: Ethernet block power/clock enable -// PCUSB: USB interface power/clock enable -// -// -// Clock Output Configuration Register (CLKOUTCFG) -// CLKOUTSEL: Selects clock source for CLKOUT -// <0=> CPU clock -// <1=> Main oscillator -// <2=> Internal RC oscillator -// <3=> USB clock -// <4=> RTC oscillator -// CLKOUTDIV: Selects clock divider for CLKOUT -// <1-16><#-1> -// CLKOUT_EN: CLKOUT enable control -// -// -// -*/ -#define CLOCK_SETUP 1 -#define SCS_Val 0x00000000 -#define CLKSRCSEL_Val 0x00000000 -#define PLL0_SETUP 0 -#define PLL0CFG_Val 0x00050063 -#define PLL1_SETUP 0 -#define PLL1CFG_Val 0x00000023 -#define CCLKCFG_Val 0x00000003 -#define USBCLKCFG_Val 0x00000000 -#define PCLKSEL0_Val 0x00000000 -#define PCLKSEL1_Val 0x00000000 -#define PCONP_Val 0x042887DE -#define CLKOUTCFG_Val 0x00000000 - - -/*--------------------- Flash Accelerator Configuration ---------------------- -// -// Flash Accelerator Configuration -// FLASHTIM: Flash Access Time -// <0=> 1 CPU clock (for CPU clock up to 20 MHz) -// <1=> 2 CPU clocks (for CPU clock up to 40 MHz) -// <2=> 3 CPU clocks (for CPU clock up to 60 MHz) -// <3=> 4 CPU clocks (for CPU clock up to 80 MHz) -// <4=> 5 CPU clocks (for CPU clock up to 100 MHz) -// <5=> 6 CPU clocks (for any CPU clock) -// -*/ -#define FLASH_SETUP 1 -#define FLASHCFG_Val 0x00005000 - -/* -//-------- <<< end of configuration section >>> ------------------------------ -*/ - -/*---------------------------------------------------------------------------- - Check the register settings - *----------------------------------------------------------------------------*/ -#define CHECK_RANGE(val, min, max) ((val < min) || (val > max)) -#define CHECK_RSVD(val, mask) (val & mask) - -/* Clock Configuration -------------------------------------------------------*/ -#if (CHECK_RSVD((SCS_Val), ~0x00000030)) - #error "SCS: Invalid values of reserved bits!" -#endif - -#if (CHECK_RANGE((CLKSRCSEL_Val), 0, 2)) - #error "CLKSRCSEL: Value out of range!" -#endif - -#if (CHECK_RSVD((PLL0CFG_Val), ~0x00FF7FFF)) - #error "PLL0CFG: Invalid values of reserved bits!" -#endif - -#if (CHECK_RSVD((PLL1CFG_Val), ~0x0000007F)) - #error "PLL1CFG: Invalid values of reserved bits!" -#endif - -#if (PLL0_SETUP) /* if PLL0 is used */ - #if (CCLKCFG_Val < 2) /* CCLKSEL must be greater then 1 */ - #error "CCLKCFG: CCLKSEL must be greater then 1 if PLL0 is used!" - #endif -#endif - -#if (CHECK_RANGE((CCLKCFG_Val), 2, 255)) - #error "CCLKCFG: Value out of range!" -#endif - -#if (CHECK_RSVD((USBCLKCFG_Val), ~0x0000000F)) - #error "USBCLKCFG: Invalid values of reserved bits!" -#endif - -#if (CHECK_RSVD((PCLKSEL0_Val), 0x000C0C00)) - #error "PCLKSEL0: Invalid values of reserved bits!" -#endif - -#if (CHECK_RSVD((PCLKSEL1_Val), 0x03000300)) - #error "PCLKSEL1: Invalid values of reserved bits!" -#endif - -#if (CHECK_RSVD((PCONP_Val), 0x10100821)) - #error "PCONP: Invalid values of reserved bits!" -#endif - -#if (CHECK_RSVD((CLKOUTCFG_Val), ~0x000001FF)) - #error "CLKOUTCFG: Invalid values of reserved bits!" -#endif - -/* Flash Accelerator Configuration -------------------------------------------*/ -#if (CHECK_RSVD((FLASHCFG_Val), ~0x0000F000)) - #error "FLASHCFG: Invalid values of reserved bits!" -#endif - - -/*---------------------------------------------------------------------------- - DEFINES - *----------------------------------------------------------------------------*/ - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (12000000UL) /* Oscillator frequency */ -#define OSC_CLK ( IRC_OSC) /* Main oscillator frequency */ -//#define OSC_CLK ( XTAL) /* Main oscillator frequency */ -#define RTC_CLK ( 32000UL) /* RTC oscillator frequency */ -#define IRC_OSC ( 4000000UL) /* Internal RC oscillator frequency */ - - -/* F_cco0 = (2 * M * F_in) / N */ -#define __M (((PLL0CFG_Val ) & 0x7FFF) + 1) -#define __N (((PLL0CFG_Val >> 16) & 0x00FF) + 1) -#define __FCCO(__F_IN) ((2ULL * __M * __F_IN) / __N) -#define __CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1) - -/* Determine core clock frequency according to settings */ - #if (PLL0_SETUP) - #if ((CLKSRCSEL_Val & 0x03) == 1) - #define __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV) - #elif ((CLKSRCSEL_Val & 0x03) == 2) - #define __CORE_CLK (__FCCO(RTC_CLK) / __CCLK_DIV) - #else - #define __CORE_CLK (__FCCO(IRC_OSC) / __CCLK_DIV) - #endif - #else - #if ((CLKSRCSEL_Val & 0x03) == 1) - #define __CORE_CLK (OSC_CLK / __CCLK_DIV) - #elif ((CLKSRCSEL_Val & 0x03) == 2) - #define __CORE_CLK (RTC_CLK / __CCLK_DIV) - #else - #define __CORE_CLK (IRC_OSC / __CCLK_DIV) - #endif - #endif - - -/*---------------------------------------------------------------------------- - Clock Variable definitions - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = __CORE_CLK;/*!< System Clock Frequency (Core Clock)*/ - - -/*---------------------------------------------------------------------------- - Clock functions - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ -{ - /* Determine clock frequency according to clock register values */ - if (((LPC_SC->PLL0STAT >> 24) & 3) == 3) { /* If PLL0 enabled and connected */ - switch (LPC_SC->CLKSRCSEL & 0x03) { - case 0: /* Int. RC oscillator => PLL0 */ - case 3: /* Reserved, default to Int. RC */ - SystemCoreClock = (IRC_OSC * - ((2ULL * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) / - (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1) / - ((LPC_SC->CCLKCFG & 0xFF)+ 1)); - break; - case 1: /* Main oscillator => PLL0 */ - SystemCoreClock = (OSC_CLK * - ((2ULL * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) / - (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1) / - ((LPC_SC->CCLKCFG & 0xFF)+ 1)); - break; - case 2: /* RTC oscillator => PLL0 */ - SystemCoreClock = (RTC_CLK * - ((2ULL * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) / - (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1) / - ((LPC_SC->CCLKCFG & 0xFF)+ 1)); - break; - } - } else { - switch (LPC_SC->CLKSRCSEL & 0x03) { - case 0: /* Int. RC oscillator => PLL0 */ - case 3: /* Reserved, default to Int. RC */ - SystemCoreClock = IRC_OSC / ((LPC_SC->CCLKCFG & 0xFF)+ 1); - break; - case 1: /* Main oscillator => PLL0 */ - SystemCoreClock = OSC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1); - break; - case 2: /* RTC oscillator => PLL0 */ - SystemCoreClock = RTC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1); - break; - } - } - -} - -/** - * Initialize the system - * - * @param none - * @return none - * - * @brief Setup the microcontroller system. - * Initialize the System. - */ -void SystemInit (void) -{ - -#if (CLOCK_SETUP) /* Clock Setup */ - LPC_SC->SCS = SCS_Val; - if (SCS_Val & (1 << 5)) { /* If Main Oscillator is enabled */ - while ((LPC_SC->SCS & (1<<6)) == 0);/* Wait for Oscillator to be ready */ - } - - - - LPC_SC->CCLKCFG = CCLKCFG_Val; /* Setup Clock Divider */ - - LPC_SC->PCLKSEL0 = PCLKSEL0_Val; /* Peripheral Clock Selection */ - LPC_SC->PCLKSEL1 = PCLKSEL1_Val; - - LPC_SC->CLKSRCSEL = CLKSRCSEL_Val; /* Select Clock Source for PLL0 */ - -#if (PLL0_SETUP) -// LPC_SC->PLL0CFG = PLL0CFG_Val; /* configure PLL0 */ -// LPC_SC->PLL0FEED = 0xAA; -// LPC_SC->PLL0FEED = 0x55; - -// LPC_SC->PLL0CON = 0x01; /* PLL0 Enable */ -// LPC_SC->PLL0FEED = 0xAA; -// LPC_SC->PLL0FEED = 0x55; -// while (!(LPC_SC->PLL0STAT & (1<<26)));/* Wait for PLOCK0 */ - -// LPC_SC->PLL0CON = 0x03; /* PLL0 Enable & Connect */ -// LPC_SC->PLL0FEED = 0xAA; -// LPC_SC->PLL0FEED = 0x55; -// while (!(LPC_SC->PLL0STAT & ((1<<25) | (1<<24))));/* Wait for PLLC0_STAT & PLLE0_STAT */ -#endif - - - -#if (PLL1_SETUP) -// LPC_SC->PLL1CFG = PLL1CFG_Val; -// LPC_SC->PLL1FEED = 0xAA; -// LPC_SC->PLL1FEED = 0x55; - -// LPC_SC->PLL1CON = 0x01; /* PLL1 Enable */ -// LPC_SC->PLL1FEED = 0xAA; -// LPC_SC->PLL1FEED = 0x55; -// while (!(LPC_SC->PLL1STAT & (1<<10)));/* Wait for PLOCK1 */ - -// LPC_SC->PLL1CON = 0x03; /* PLL1 Enable & Connect */ -// LPC_SC->PLL1FEED = 0xAA; -// LPC_SC->PLL1FEED = 0x55; -// while (!(LPC_SC->PLL1STAT & ((1<< 9) | (1<< 8))));/* Wait for PLLC1_STAT & PLLE1_STAT */ -#else - LPC_SC->USBCLKCFG = USBCLKCFG_Val; /* Setup USB Clock Divider */ -#endif - - LPC_SC->PCONP = PCONP_Val; /* Power Control for Peripherals */ - - LPC_SC->CLKOUTCFG = CLKOUTCFG_Val; /* Clock Output Configuration */ -#endif - -#if (FLASH_SETUP == 1) /* Flash Accelerator Setup */ - LPC_SC->FLASHCFG = (LPC_SC->FLASHCFG & ~0x0000F000) | FLASHCFG_Val; -#endif - - - -} diff --git a/lib/src/common/AUDIO/CS43L22/CS43L22_STM32F4.pro b/lib/src/common/AUDIO/CS43L22/CS43L22_STM32F4.pro --- a/lib/src/common/AUDIO/CS43L22/CS43L22_STM32F4.pro +++ b/lib/src/common/AUDIO/CS43L22/CS43L22_STM32F4.pro @@ -1,11 +1,17 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt +OBJECTS_DIR = obj TARGET = CS43L22 -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) + +SOURCES += CS43L22.c -SOURCES += \ - CS43L22.c +INCLUDEPATH += ../../../includes \ + ../../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../../CPU/CMSIS/Include + -HEADERS += \ - $$(libuc2)/lib/includes/CS43L22.h +UCMODEL=stm32f4 + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target + + diff --git a/lib/src/common/AUDIO/VS10XX/core_cm3.c b/lib/src/common/AUDIO/VS10XX/core_cm3.c deleted file mode 100644 --- a/lib/src/common/AUDIO/VS10XX/core_cm3.c +++ /dev/null @@ -1,339 +0,0 @@ -/**************************************************************************//** - * @file core_cm3.c - * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File - * @version V2.00 - * @date 13. September 2010 - * - * @note - * Copyright (C) 2009-2010 ARM Limited. All rights reserved. - * - * @par - * ARM Limited (ARM) is supplying this software for use with Cortex-M - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * @par - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - -#include - -/* define compiler specific symbols */ -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - -#endif - - -/* ########################## Core Instruction Access ######################### */ - -#if defined ( __CC_ARM ) /*------------------ RealView Compiler ----------------*/ - -/** \brief Reverse byte order (16 bit) - - This function reverses the byte order in two unsigned short values. - - \param [in] value Value to reverse - \return Reversed value - */ -#if (__ARMCC_VERSION < 400677) -__ASM uint32_t __REV16(uint32_t value) -{ - rev16 r0, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Reverse byte order in signed short value - - This function reverses the byte order in a signed short value with sign extension to integer. - - \param [in] value Value to reverse - \return Reversed value - */ -#if (__ARMCC_VERSION < 400677) -__ASM int32_t __REVSH(int32_t value) -{ - revsh r0, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Remove the exclusive lock - - This function removes the exclusive lock which is created by LDREX. - - */ -#if (__ARMCC_VERSION < 400000) -__ASM void __CLREX(void) -{ - clrex -} -#endif /* __ARMCC_VERSION */ - - -#elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/ -/* obsolete */ -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ -/* obsolete */ -#elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/ -/* obsolete */ -#endif - - -/* ########################### Core Function Access ########################### */ - -#if defined ( __CC_ARM ) /*------------------ RealView Compiler ----------------*/ - -/** \brief Get Control Register - - This function returns the content of the Control Register. - - \return Control Register value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_CONTROL(void) -{ - mrs r0, control - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Set Control Register - - This function writes the given value to the Control Register. - - \param [in] control Control Register value to set - */ -#if (__ARMCC_VERSION < 400000) -__ASM void __set_CONTROL(uint32_t control) -{ - msr control, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Get ISPR Register - - This function returns the content of the ISPR Register. - - \return ISPR Register value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_IPSR(void) -{ - mrs r0, ipsr - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Get APSR Register - - This function returns the content of the APSR Register. - - \return APSR Register value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_APSR(void) -{ - mrs r0, apsr - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Get xPSR Register - - This function returns the content of the xPSR Register. - - \return xPSR Register value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_xPSR(void) -{ - mrs r0, xpsr - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Get Process Stack Pointer - - This function returns the current value of the Process Stack Pointer (PSP). - - \return PSP Register value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_PSP(void) -{ - mrs r0, psp - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Set Process Stack Pointer - - This function assigns the given value to the Process Stack Pointer (PSP). - - \param [in] topOfProcStack Process Stack Pointer value to set - */ -#if (__ARMCC_VERSION < 400000) -__ASM void __set_PSP(uint32_t topOfProcStack) -{ - msr psp, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Get Main Stack Pointer - - This function returns the current value of the Main Stack Pointer (MSP). - - \return MSP Register value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_MSP(void) -{ - mrs r0, msp - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Set Main Stack Pointer - - This function assigns the given value to the Main Stack Pointer (MSP). - - \param [in] topOfMainStack Main Stack Pointer value to set - */ -#if (__ARMCC_VERSION < 400000) -__ASM void __set_MSP(uint32_t mainStackPointer) -{ - msr msp, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Get Base Priority - - This function returns the current value of the Base Priority register. - - \return Base Priority register value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_BASEPRI(void) -{ - mrs r0, basepri - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Set Base Priority - - This function assigns the given value to the Base Priority register. - - \param [in] basePri Base Priority value to set - */ -#if (__ARMCC_VERSION < 400000) -__ASM void __set_BASEPRI(uint32_t basePri) -{ - msr basepri, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - -/** \brief Get Priority Mask - - This function returns the current state of the priority mask bit from the Priority Mask Register. - - \return Priority Mask value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_PRIMASK(void) -{ - mrs r0, primask - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Set Priority Mask - - This function assigns the given value to the Priority Mask Register. - - \param [in] priMask Priority Mask - */ -#if (__ARMCC_VERSION < 400000) -__ASM void __set_PRIMASK(uint32_t priMask) -{ - msr primask, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Get Fault Mask - - This function returns the current value of the Fault Mask Register. - - \return Fault Mask value - */ -#if (__ARMCC_VERSION < 400000) -__ASM uint32_t __get_FAULTMASK(void) -{ - mrs r0, faultmask - bx lr -} -#endif /* __ARMCC_VERSION */ - - -/** \brief Set the Fault Mask - - This function assigns the given value to the Fault Mask Register. - - \param [in] faultMask Fault Mask value value to set - */ -#if (__ARMCC_VERSION < 400000) -__ASM void __set_FAULTMASK(uint32_t faultMask) -{ - msr faultmask, r0 - bx lr -} -#endif /* __ARMCC_VERSION */ - - - -#elif (defined (__ICCARM__)) /*---------------- ICC Compiler ---------------------*/ -/* obsolete */ -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ -/* obsolete */ -#elif (defined (__TASKING__)) /*--------------- TASKING Compiler -----------------*/ -/* obsolete */ -#endif diff --git a/lib/src/common/AUDIO/VS10XX/startup_LPC17xx.c b/lib/src/common/AUDIO/VS10XX/startup_LPC17xx.c deleted file mode 100644 --- a/lib/src/common/AUDIO/VS10XX/startup_LPC17xx.c +++ /dev/null @@ -1,299 +0,0 @@ -/****************************************************************************//** - * @file : startup_LPC17xx.c - * @brief : CMSIS Cortex-M3 Core Device Startup File - * @version : V1.01 - * @date : 4. Feb. 2009 - * - *---------------------------------------------------------------------------- - * - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * ARM Limited (ARM) is supplying this software for use with Cortex-Mx - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - -// Mod by nio for the .fastcode part - -#include "LPC17xx.h" - -#define WEAK __attribute__ ((weak)) -//***************************************************************************** -// -// Forward declaration of the default fault handlers. -// -//***************************************************************************** -/* System exception vector handler */ -void WEAK Reset_Handler(void); /* Reset Handler */ -void WEAK NMI_Handler(void); /* NMI Handler */ -void WEAK HardFault_Handler(void); /* Hard Fault Handler */ -void WEAK MemManage_Handler(void); /* MPU Fault Handler */ -void WEAK BusFault_Handler(void); /* Bus Fault Handler */ -void WEAK UsageFault_Handler(void); /* Usage Fault Handler */ -void WEAK SVC_Handler(void); /* SVCall Handler */ -void WEAK DebugMon_Handler(void); /* Debug Monitor Handler */ -void WEAK PendSV_Handler(void); /* PendSV Handler */ -void WEAK SysTick_Handler(void); /* SysTick Handler */ - -/* External interrupt vector handler */ -void WEAK WDT_IRQHandler(void); /* Watchdog Timer */ -void WEAK TIMER0_IRQHandler(void); /* Timer0 */ -void WEAK TIMER1_IRQHandler(void); /* Timer1 */ -void WEAK TIMER2_IRQHandler(void); /* Timer2 */ -void WEAK TIMER3_IRQHandler(void); /* Timer3 */ -void WEAK UART0_IRQHandler(void); /* UART0 */ -void WEAK UART1_IRQHandler(void); /* UART1 */ -void WEAK UART2_IRQHandler(void); /* UART2 */ -void WEAK UART3_IRQHandler(void); /* UART3 */ -void WEAK PWM1_IRQHandler(void); /* PWM1 */ -void WEAK I2C0_IRQHandler(void); /* I2C0 */ -void WEAK I2C1_IRQHandler(void); /* I2C1 */ -void WEAK I2C2_IRQHandler(void); /* I2C2 */ -void WEAK SPI_IRQHandler(void); /* SPI */ -void WEAK SSP0_IRQHandler(void); /* SSP0 */ -void WEAK SSP1_IRQHandler(void); /* SSP1 */ -void WEAK PLL0_IRQHandler(void); /* PLL0 (Main PLL) */ -void WEAK RTC_IRQHandler(void); /* Real Time Clock */ -void WEAK EINT0_IRQHandler(void); /* External Interrupt 0 */ -void WEAK EINT1_IRQHandler(void); /* External Interrupt 1 */ -void WEAK EINT2_IRQHandler(void); /* External Interrupt 2 */ -void WEAK EINT3_IRQHandler(void); /* External Interrupt 3 */ -void WEAK ADC_IRQHandler(void); /* A/D Converter */ -void WEAK BOD_IRQHandler(void); /* Brown Out Detect */ -void WEAK USB_IRQHandler(void); /* USB */ -void WEAK CAN_IRQHandler(void); /* CAN */ -void WEAK DMA_IRQHandler(void); /* GP DMA */ -void WEAK I2S_IRQHandler(void); /* I2S */ -void WEAK ENET_IRQHandler(void); /* Ethernet */ -void WEAK RIT_IRQHandler(void); /* Repetitive Interrupt Timer */ -void WEAK MCPWM_IRQHandler(void); /* Motor Control PWM */ -void WEAK QEI_IRQHandler(void); /* Quadrature Encoder Interface */ -void WEAK PLL1_IRQHandler(void); /* PLL1 (USB PLL) */ - - - -/* Exported types --------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -extern unsigned long _etext; -extern unsigned long _sidata; /* start address for the initialization values of the .data section. defined in linker script */ -extern unsigned long _sdata; /* start address for the .data section. defined in linker script */ -extern unsigned long _edata; /* end address for the .data section. defined in linker script */ -extern unsigned long _sitestdata; /* start address for the initialization values of the .data section. defined in linker script */ -extern unsigned long _stestdata; /* start address for the .data section. defined in linker script */ -extern unsigned long _etestdata; - - -extern unsigned long _sifastcode; /* start address for the initialization values of the .fastcode section. defined in linker script */ -extern unsigned long _sfastcode; /* start address for the .fastcode section. defined in linker script */ -extern unsigned long _efastcode; /* end address for the .fastcode section. defined in linker script */ - -extern unsigned long _sbss; /* start address for the .bss section. defined in linker script */ -extern unsigned long _ebss; /* end address for the .bss section. defined in linker script */ - -extern void _estack; /* init value for the stack pointer. defined in linker script */ - -extern int bsp_init(); - -/* Private typedef -----------------------------------------------------------*/ -/* function prototypes ------------------------------------------------------*/ -void Reset_Handler(void) __attribute__((__interrupt__)); -extern int main(void); - - -/****************************************************************************** -* -* The minimal vector table for a Cortex M3. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -******************************************************************************/ -#define STACK_SIZE 0x00000800 /*2kO*/ - -__attribute__ ((section(".stackarea"))) -/* static */ unsigned long pulStack[STACK_SIZE]; - - -__attribute__ ((section(".isr_vector"))) -void (* const g_pfnVectors[])(void) = -{ - /* &_estack, // The initial stack pointer */ - (void (*)(void))((unsigned long)pulStack + sizeof(pulStack)), // The initial stack pointer - Reset_Handler, /* Reset Handler */ - NMI_Handler, /* NMI Handler */ - HardFault_Handler, /* Hard Fault Handler */ - MemManage_Handler, /* MPU Fault Handler */ - BusFault_Handler, /* Bus Fault Handler */ - UsageFault_Handler, /* Usage Fault Handler */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - SVC_Handler, /* SVCall Handler */ - DebugMon_Handler, /* Debug Monitor Handler */ - 0, /* Reserved */ - PendSV_Handler, /* PendSV Handler */ - SysTick_Handler, /* SysTick Handler */ - - // External Interrupts - WDT_IRQHandler, /* Watchdog Timer */ - TIMER0_IRQHandler, /* Timer0 */ - TIMER1_IRQHandler, /* Timer1 */ - TIMER2_IRQHandler, /* Timer2 */ - TIMER3_IRQHandler, /* Timer3 */ - UART0_IRQHandler, /* UART0 */ - UART1_IRQHandler, /* UART1 */ - UART2_IRQHandler, /* UART2 */ - UART3_IRQHandler, /* UART3 */ - PWM1_IRQHandler, /* PWM1 */ - I2C0_IRQHandler, /* I2C0 */ - I2C1_IRQHandler, /* I2C1 */ - I2C2_IRQHandler, /* I2C2 */ - SPI_IRQHandler, /* SPI */ - SSP0_IRQHandler, /* SSP0 */ - SSP1_IRQHandler, /* SSP1 */ - PLL0_IRQHandler, /* PLL0 (Main PLL) */ - RTC_IRQHandler, /* Real Time Clock */ - EINT0_IRQHandler, /* External Interrupt 0 */ - EINT1_IRQHandler, /* External Interrupt 1 */ - EINT2_IRQHandler, /* External Interrupt 2 */ - EINT3_IRQHandler, /* External Interrupt 3 */ - ADC_IRQHandler, /* A/D Converter */ - BOD_IRQHandler, /* Brown Out Detect */ - USB_IRQHandler, /* USB */ - CAN_IRQHandler, /* CAN */ - DMA_IRQHandler, /* GP DMA */ - I2S_IRQHandler, /* I2S */ - ENET_IRQHandler, /* Ethernet */ - RIT_IRQHandler, /* Repetitive Interrupt Timer */ - MCPWM_IRQHandler, /* Motor Control PWM */ - QEI_IRQHandler, /* Quadrature Encoder Interface */ - PLL1_IRQHandler, /* PLL1 (USB PLL) */ -}; - -/******************************************************************************* -* Function Name : Reset_Handler -* Description : This is the code that gets called when the processor first starts execution -* following a reset event. Only the absolutely necessary set is performed, -* after which the application supplied main() routine is called. -* Input : -* Output : -* Return : -*******************************************************************************/ -void Reset_Handler(void) -{ - SystemInit(); - - unsigned long *pulDest; - unsigned long *pulSrc; - - // - // Copy the data segment initializers from flash to SRAM in ROM mode - // - - if (&_sidata != &_sdata) { // only if needed - pulSrc = &_sidata; - for(pulDest = &_sdata; pulDest < &_edata; ) { - *(pulDest++) = *(pulSrc++); - } - } - if (&_sitestdata != &_stestdata) { // only if needed - pulSrc = &_sitestdata; - for(pulDest = &_stestdata; pulDest < &_etestdata; ) { - *(pulDest++) = *(pulSrc++); - } - } - - // Copy the .fastcode code from ROM to SRAM - - if (&_sifastcode != &_sfastcode) { // only if needed - pulSrc = &_sifastcode; - for(pulDest = &_sfastcode; pulDest < &_efastcode; ) { - *(pulDest++) = *(pulSrc++); - } - } - - // - // Zero fill the bss segment. - // - for(pulDest = &_sbss; pulDest < &_ebss; ) - { - *(pulDest++) = 0; - } - - // - // Call the application's entry point. - // - bsp_init(); - main(); -} - -//***************************************************************************** -// -// Provide weak aliases for each Exception handler to the Default_Handler. -// As they are weak aliases, any function with the same name will override -// this definition. -// -//***************************************************************************** -#pragma weak MemManage_Handler = Default_Handler /* MPU Fault Handler */ -#pragma weak BusFault_Handler = Default_Handler /* Bus Fault Handler */ -#pragma weak UsageFault_Handler = Default_Handler /* Usage Fault Handler */ -#pragma weak SVC_Handler = Default_Handler /* SVCall Handler */ -#pragma weak DebugMon_Handler = Default_Handler /* Debug Monitor Handler */ -#pragma weak PendSV_Handler = Default_Handler /* PendSV Handler */ -#pragma weak SysTick_Handler = Default_Handler /* SysTick Handler */ - -/* External interrupt vector handler */ -#pragma weak WDT_IRQHandler = Default_Handler /* Watchdog Timer */ -#pragma weak TIMER0_IRQHandler = Default_Handler /* Timer0 */ -#pragma weak TIMER1_IRQHandler = Default_Handler /* Timer1 */ -#pragma weak TIMER2_IRQHandler = Default_Handler /* Timer2 */ -#pragma weak TIMER3_IRQHandler = Default_Handler /* Timer3 */ -#pragma weak UART0_IRQHandler = Default_Handler /* UART0 */ -#pragma weak UART1_IRQHandler = Default_Handler /* UART1 */ -#pragma weak UART2_IRQHandler = Default_Handler /* UART2 */ -#pragma weak UART3_IRQHandler = Default_Handler /* UART3 */ -#pragma weak PWM1_IRQHandler = Default_Handler /* PWM1 */ -#pragma weak I2C0_IRQHandler = Default_Handler /* I2C0 */ -#pragma weak I2C1_IRQHandler = Default_Handler /* I2C1 */ -#pragma weak I2C2_IRQHandler = Default_Handler /* I2C2 */ -#pragma weak SPI_IRQHandler = Default_Handler /* SPI */ -#pragma weak SSP0_IRQHandler = Default_Handler /* SSP0 */ -#pragma weak SSP1_IRQHandler = Default_Handler /* SSP1 */ -#pragma weak PLL0_IRQHandler = Default_Handler /* PLL0 (Main PLL) */ -#pragma weak RTC_IRQHandler = Default_Handler /* Real Time Clock */ -#pragma weak EINT0_IRQHandler = Default_Handler /* External Interrupt 0 */ -#pragma weak EINT1_IRQHandler = Default_Handler /* External Interrupt 1 */ -#pragma weak EINT2_IRQHandler = Default_Handler /* External Interrupt 2 */ -#pragma weak EINT3_IRQHandler = Default_Handler /* External Interrupt 3 */ -#pragma weak ADC_IRQHandler = Default_Handler /* A/D Converter */ -#pragma weak BOD_IRQHandler = Default_Handler /* Brown Out Detect */ -#pragma weak USB_IRQHandler = Default_Handler /* USB */ -#pragma weak CAN_IRQHandler = Default_Handler /* CAN */ -#pragma weak DMA_IRQHandler = Default_Handler /* GP DMA */ -#pragma weak I2S_IRQHandler = Default_Handler /* I2S */ -#pragma weak ENET_IRQHandler = Default_Handler /* Ethernet */ -#pragma weak RIT_IRQHandler = Default_Handler /* Repetitive Interrupt Timer */ -#pragma weak MCPWM_IRQHandler = Default_Handler /* Motor Control PWM */ -#pragma weak QEI_IRQHandler = Default_Handler /* Quadrature Encoder Interface */ -#pragma weak PLL1_IRQHandler = Default_Handler /* PLL1 (USB PLL) */ - -//***************************************************************************** -// -// This is the code that gets called when the processor receives an unexpected -// interrupt. This simply enters an infinite loop, preserving the system state -// for examination by a debugger. -// -//***************************************************************************** -void Default_Handler(void) { - // Go into an infinite loop. - // - while (1) { - } -} diff --git a/lib/src/common/AUDIO/VS10XX/system_LPC17xx.c b/lib/src/common/AUDIO/VS10XX/system_LPC17xx.c deleted file mode 100644 --- a/lib/src/common/AUDIO/VS10XX/system_LPC17xx.c +++ /dev/null @@ -1,541 +0,0 @@ -/**************************************************************************//** - * @file system_LPC17xx.c - * @brief CMSIS Cortex-M3 Device Peripheral Access Layer Source File - * for the NXP LPC17xx Device Series - * @version V1.08 - * @date 12. May 2010 - * - * @note - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * @par - * ARM Limited (ARM) is supplying this software for use with Cortex-M - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * @par - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - - -#include -#include "LPC17xx.h" - -/* -//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ -*/ - -/*--------------------- Clock Configuration ---------------------------------- -// -// Clock Configuration -// System Controls and Status Register (SCS) -// OSCRANGE: Main Oscillator Range Select -// <0=> 1 MHz to 20 MHz -// <1=> 15 MHz to 24 MHz -// OSCEN: Main Oscillator Enable -// -// -// -// Clock Source Select Register (CLKSRCSEL) -// CLKSRC: PLL Clock Source Selection -// <0=> Internal RC oscillator -// <1=> Main oscillator -// <2=> RTC oscillator -// -// -// PLL0 Configuration (Main PLL) -// PLL0 Configuration Register (PLL0CFG) -// F_cco0 = (2 * M * F_in) / N -// F_in must be in the range of 32 kHz to 50 MHz -// F_cco0 must be in the range of 275 MHz to 550 MHz -// MSEL: PLL Multiplier Selection -// <6-32768><#-1> -// M Value -// NSEL: PLL Divider Selection -// <1-256><#-1> -// N Value -// -// -// -// PLL1 Configuration (USB PLL) -// PLL1 Configuration Register (PLL1CFG) -// F_usb = M * F_osc or F_usb = F_cco1 / (2 * P) -// F_cco1 = F_osc * M * 2 * P -// F_cco1 must be in the range of 156 MHz to 320 MHz -// MSEL: PLL Multiplier Selection -// <1-32><#-1> -// M Value (for USB maximum value is 4) -// PSEL: PLL Divider Selection -// <0=> 1 -// <1=> 2 -// <2=> 4 -// <3=> 8 -// P Value -// -// -// -// CPU Clock Configuration Register (CCLKCFG) -// CCLKSEL: Divide Value for CPU Clock from PLL0 -// <1-256><#-1> -// -// -// USB Clock Configuration Register (USBCLKCFG) -// USBSEL: Divide Value for USB Clock from PLL0 -// <0-15> -// Divide is USBSEL + 1 -// -// -// Peripheral Clock Selection Register 0 (PCLKSEL0) -// PCLK_WDT: Peripheral Clock Selection for WDT -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_TIMER0: Peripheral Clock Selection for TIMER0 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_TIMER1: Peripheral Clock Selection for TIMER1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_UART0: Peripheral Clock Selection for UART0 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_UART1: Peripheral Clock Selection for UART1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_PWM1: Peripheral Clock Selection for PWM1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_I2C0: Peripheral Clock Selection for I2C0 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_SPI: Peripheral Clock Selection for SPI -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_SSP1: Peripheral Clock Selection for SSP1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_DAC: Peripheral Clock Selection for DAC -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_ADC: Peripheral Clock Selection for ADC -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_CAN1: Peripheral Clock Selection for CAN1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 6 -// PCLK_CAN2: Peripheral Clock Selection for CAN2 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 6 -// PCLK_ACF: Peripheral Clock Selection for ACF -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 6 -// -// -// Peripheral Clock Selection Register 1 (PCLKSEL1) -// PCLK_QEI: Peripheral Clock Selection for the Quadrature Encoder Interface -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_GPIO: Peripheral Clock Selection for GPIOs -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_PCB: Peripheral Clock Selection for the Pin Connect Block -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_I2C1: Peripheral Clock Selection for I2C1 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_SSP0: Peripheral Clock Selection for SSP0 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_TIMER2: Peripheral Clock Selection for TIMER2 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_TIMER3: Peripheral Clock Selection for TIMER3 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_UART2: Peripheral Clock Selection for UART2 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_UART3: Peripheral Clock Selection for UART3 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_I2C2: Peripheral Clock Selection for I2C2 -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_I2S: Peripheral Clock Selection for I2S -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_RIT: Peripheral Clock Selection for the Repetitive Interrupt Timer -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_SYSCON: Peripheral Clock Selection for the System Control Block -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// PCLK_MC: Peripheral Clock Selection for the Motor Control PWM -// <0=> Pclk = Cclk / 4 -// <1=> Pclk = Cclk -// <2=> Pclk = Cclk / 2 -// <3=> Pclk = Hclk / 8 -// -// -// Power Control for Peripherals Register (PCONP) -// PCTIM0: Timer/Counter 0 power/clock enable -// PCTIM1: Timer/Counter 1 power/clock enable -// PCUART0: UART 0 power/clock enable -// PCUART1: UART 1 power/clock enable -// PCPWM1: PWM 1 power/clock enable -// PCI2C0: I2C interface 0 power/clock enable -// PCSPI: SPI interface power/clock enable -// PCRTC: RTC power/clock enable -// PCSSP1: SSP interface 1 power/clock enable -// PCAD: A/D converter power/clock enable -// PCCAN1: CAN controller 1 power/clock enable -// PCCAN2: CAN controller 2 power/clock enable -// PCGPIO: GPIOs power/clock enable -// PCRIT: Repetitive interrupt timer power/clock enable -// PCMC: Motor control PWM power/clock enable -// PCQEI: Quadrature encoder interface power/clock enable -// PCI2C1: I2C interface 1 power/clock enable -// PCSSP0: SSP interface 0 power/clock enable -// PCTIM2: Timer 2 power/clock enable -// PCTIM3: Timer 3 power/clock enable -// PCUART2: UART 2 power/clock enable -// PCUART3: UART 3 power/clock enable -// PCI2C2: I2C interface 2 power/clock enable -// PCI2S: I2S interface power/clock enable -// PCGPDMA: GP DMA function power/clock enable -// PCENET: Ethernet block power/clock enable -// PCUSB: USB interface power/clock enable -// -// -// Clock Output Configuration Register (CLKOUTCFG) -// CLKOUTSEL: Selects clock source for CLKOUT -// <0=> CPU clock -// <1=> Main oscillator -// <2=> Internal RC oscillator -// <3=> USB clock -// <4=> RTC oscillator -// CLKOUTDIV: Selects clock divider for CLKOUT -// <1-16><#-1> -// CLKOUT_EN: CLKOUT enable control -// -// -// -*/ -#define CLOCK_SETUP 1 -#define SCS_Val 0x00000000 -#define CLKSRCSEL_Val 0x00000000 -#define PLL0_SETUP 0 -#define PLL0CFG_Val 0x00050063 -#define PLL1_SETUP 0 -#define PLL1CFG_Val 0x00000023 -#define CCLKCFG_Val 0x00000003 -#define USBCLKCFG_Val 0x00000000 -#define PCLKSEL0_Val 0x00000000 -#define PCLKSEL1_Val 0x00000000 -#define PCONP_Val 0x042887DE -#define CLKOUTCFG_Val 0x00000000 - - -/*--------------------- Flash Accelerator Configuration ---------------------- -// -// Flash Accelerator Configuration -// FLASHTIM: Flash Access Time -// <0=> 1 CPU clock (for CPU clock up to 20 MHz) -// <1=> 2 CPU clocks (for CPU clock up to 40 MHz) -// <2=> 3 CPU clocks (for CPU clock up to 60 MHz) -// <3=> 4 CPU clocks (for CPU clock up to 80 MHz) -// <4=> 5 CPU clocks (for CPU clock up to 100 MHz) -// <5=> 6 CPU clocks (for any CPU clock) -// -*/ -#define FLASH_SETUP 1 -#define FLASHCFG_Val 0x00005000 - -/* -//-------- <<< end of configuration section >>> ------------------------------ -*/ - -/*---------------------------------------------------------------------------- - Check the register settings - *----------------------------------------------------------------------------*/ -#define CHECK_RANGE(val, min, max) ((val < min) || (val > max)) -#define CHECK_RSVD(val, mask) (val & mask) - -/* Clock Configuration -------------------------------------------------------*/ -#if (CHECK_RSVD((SCS_Val), ~0x00000030)) - #error "SCS: Invalid values of reserved bits!" -#endif - -#if (CHECK_RANGE((CLKSRCSEL_Val), 0, 2)) - #error "CLKSRCSEL: Value out of range!" -#endif - -#if (CHECK_RSVD((PLL0CFG_Val), ~0x00FF7FFF)) - #error "PLL0CFG: Invalid values of reserved bits!" -#endif - -#if (CHECK_RSVD((PLL1CFG_Val), ~0x0000007F)) - #error "PLL1CFG: Invalid values of reserved bits!" -#endif - -#if (PLL0_SETUP) /* if PLL0 is used */ - #if (CCLKCFG_Val < 2) /* CCLKSEL must be greater then 1 */ - #error "CCLKCFG: CCLKSEL must be greater then 1 if PLL0 is used!" - #endif -#endif - -#if (CHECK_RANGE((CCLKCFG_Val), 2, 255)) - #error "CCLKCFG: Value out of range!" -#endif - -#if (CHECK_RSVD((USBCLKCFG_Val), ~0x0000000F)) - #error "USBCLKCFG: Invalid values of reserved bits!" -#endif - -#if (CHECK_RSVD((PCLKSEL0_Val), 0x000C0C00)) - #error "PCLKSEL0: Invalid values of reserved bits!" -#endif - -#if (CHECK_RSVD((PCLKSEL1_Val), 0x03000300)) - #error "PCLKSEL1: Invalid values of reserved bits!" -#endif - -#if (CHECK_RSVD((PCONP_Val), 0x10100821)) - #error "PCONP: Invalid values of reserved bits!" -#endif - -#if (CHECK_RSVD((CLKOUTCFG_Val), ~0x000001FF)) - #error "CLKOUTCFG: Invalid values of reserved bits!" -#endif - -/* Flash Accelerator Configuration -------------------------------------------*/ -#if (CHECK_RSVD((FLASHCFG_Val), ~0x0000F000)) - #error "FLASHCFG: Invalid values of reserved bits!" -#endif - - -/*---------------------------------------------------------------------------- - DEFINES - *----------------------------------------------------------------------------*/ - -/*---------------------------------------------------------------------------- - Define clocks - *----------------------------------------------------------------------------*/ -#define XTAL (12000000UL) /* Oscillator frequency */ -#define OSC_CLK ( IRC_OSC) /* Main oscillator frequency */ -//#define OSC_CLK ( XTAL) /* Main oscillator frequency */ -#define RTC_CLK ( 32000UL) /* RTC oscillator frequency */ -#define IRC_OSC ( 4000000UL) /* Internal RC oscillator frequency */ - - -/* F_cco0 = (2 * M * F_in) / N */ -#define __M (((PLL0CFG_Val ) & 0x7FFF) + 1) -#define __N (((PLL0CFG_Val >> 16) & 0x00FF) + 1) -#define __FCCO(__F_IN) ((2ULL * __M * __F_IN) / __N) -#define __CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1) - -/* Determine core clock frequency according to settings */ - #if (PLL0_SETUP) - #if ((CLKSRCSEL_Val & 0x03) == 1) - #define __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV) - #elif ((CLKSRCSEL_Val & 0x03) == 2) - #define __CORE_CLK (__FCCO(RTC_CLK) / __CCLK_DIV) - #else - #define __CORE_CLK (__FCCO(IRC_OSC) / __CCLK_DIV) - #endif - #else - #if ((CLKSRCSEL_Val & 0x03) == 1) - #define __CORE_CLK (OSC_CLK / __CCLK_DIV) - #elif ((CLKSRCSEL_Val & 0x03) == 2) - #define __CORE_CLK (RTC_CLK / __CCLK_DIV) - #else - #define __CORE_CLK (IRC_OSC / __CCLK_DIV) - #endif - #endif - - -/*---------------------------------------------------------------------------- - Clock Variable definitions - *----------------------------------------------------------------------------*/ -uint32_t SystemCoreClock = __CORE_CLK;/*!< System Clock Frequency (Core Clock)*/ - - -/*---------------------------------------------------------------------------- - Clock functions - *----------------------------------------------------------------------------*/ -void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */ -{ - /* Determine clock frequency according to clock register values */ - if (((LPC_SC->PLL0STAT >> 24) & 3) == 3) { /* If PLL0 enabled and connected */ - switch (LPC_SC->CLKSRCSEL & 0x03) { - case 0: /* Int. RC oscillator => PLL0 */ - case 3: /* Reserved, default to Int. RC */ - SystemCoreClock = (IRC_OSC * - ((2ULL * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) / - (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1) / - ((LPC_SC->CCLKCFG & 0xFF)+ 1)); - break; - case 1: /* Main oscillator => PLL0 */ - SystemCoreClock = (OSC_CLK * - ((2ULL * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) / - (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1) / - ((LPC_SC->CCLKCFG & 0xFF)+ 1)); - break; - case 2: /* RTC oscillator => PLL0 */ - SystemCoreClock = (RTC_CLK * - ((2ULL * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) / - (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1) / - ((LPC_SC->CCLKCFG & 0xFF)+ 1)); - break; - } - } else { - switch (LPC_SC->CLKSRCSEL & 0x03) { - case 0: /* Int. RC oscillator => PLL0 */ - case 3: /* Reserved, default to Int. RC */ - SystemCoreClock = IRC_OSC / ((LPC_SC->CCLKCFG & 0xFF)+ 1); - break; - case 1: /* Main oscillator => PLL0 */ - SystemCoreClock = OSC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1); - break; - case 2: /* RTC oscillator => PLL0 */ - SystemCoreClock = RTC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1); - break; - } - } - -} - -/** - * Initialize the system - * - * @param none - * @return none - * - * @brief Setup the microcontroller system. - * Initialize the System. - */ -void SystemInit (void) -{ - -#if (CLOCK_SETUP) /* Clock Setup */ - LPC_SC->SCS = SCS_Val; - if (SCS_Val & (1 << 5)) { /* If Main Oscillator is enabled */ - while ((LPC_SC->SCS & (1<<6)) == 0);/* Wait for Oscillator to be ready */ - } - - - - LPC_SC->CCLKCFG = CCLKCFG_Val; /* Setup Clock Divider */ - - LPC_SC->PCLKSEL0 = PCLKSEL0_Val; /* Peripheral Clock Selection */ - LPC_SC->PCLKSEL1 = PCLKSEL1_Val; - - LPC_SC->CLKSRCSEL = CLKSRCSEL_Val; /* Select Clock Source for PLL0 */ - -#if (PLL0_SETUP) -// LPC_SC->PLL0CFG = PLL0CFG_Val; /* configure PLL0 */ -// LPC_SC->PLL0FEED = 0xAA; -// LPC_SC->PLL0FEED = 0x55; - -// LPC_SC->PLL0CON = 0x01; /* PLL0 Enable */ -// LPC_SC->PLL0FEED = 0xAA; -// LPC_SC->PLL0FEED = 0x55; -// while (!(LPC_SC->PLL0STAT & (1<<26)));/* Wait for PLOCK0 */ - -// LPC_SC->PLL0CON = 0x03; /* PLL0 Enable & Connect */ -// LPC_SC->PLL0FEED = 0xAA; -// LPC_SC->PLL0FEED = 0x55; -// while (!(LPC_SC->PLL0STAT & ((1<<25) | (1<<24))));/* Wait for PLLC0_STAT & PLLE0_STAT */ -#endif - - - -#if (PLL1_SETUP) -// LPC_SC->PLL1CFG = PLL1CFG_Val; -// LPC_SC->PLL1FEED = 0xAA; -// LPC_SC->PLL1FEED = 0x55; - -// LPC_SC->PLL1CON = 0x01; /* PLL1 Enable */ -// LPC_SC->PLL1FEED = 0xAA; -// LPC_SC->PLL1FEED = 0x55; -// while (!(LPC_SC->PLL1STAT & (1<<10)));/* Wait for PLOCK1 */ - -// LPC_SC->PLL1CON = 0x03; /* PLL1 Enable & Connect */ -// LPC_SC->PLL1FEED = 0xAA; -// LPC_SC->PLL1FEED = 0x55; -// while (!(LPC_SC->PLL1STAT & ((1<< 9) | (1<< 8))));/* Wait for PLLC1_STAT & PLLE1_STAT */ -#else - LPC_SC->USBCLKCFG = USBCLKCFG_Val; /* Setup USB Clock Divider */ -#endif - - LPC_SC->PCONP = PCONP_Val; /* Power Control for Peripherals */ - - LPC_SC->CLKOUTCFG = CLKOUTCFG_Val; /* Clock Output Configuration */ -#endif - -#if (FLASH_SETUP == 1) /* Flash Accelerator Setup */ - LPC_SC->FLASHCFG = (LPC_SC->FLASHCFG & ~0x0000F000) | FLASHCFG_Val; -#endif - - - -} diff --git a/lib/src/common/AUDIO/VS10XX/vs1053.h b/lib/src/common/AUDIO/VS10XX/vs1053.h deleted file mode 100644 --- a/lib/src/common/AUDIO/VS10XX/vs1053.h +++ /dev/null @@ -1,78 +0,0 @@ -/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ -#ifndef VS1053_H -#define VS1053_H -#include - -#define VSMODE 0 -#define VSSTATUS 1 -#define VSBASS 2 -#define VSCLOCKF 3 -#define VSDECODE_TIME 4 -#define VSAUDATA 5 -#define VSWRAM 6 -#define VSWRAMADDR 7 -#define VSHDAT0 8 -#define VSHDAT1 9 -#define VSAIADDR 0xA -#define VSVOL 0xB -#define VSAICTRL0 0xC -#define VSAICTRL1 0xD -#define VSAICTRL2 0xE -#define VSAICTRL3 0xF - -struct vs1053Regs -{ - sspDev SSP_device; - int a; -}; - -typedef struct vs1053Regs vs1053Dev; - -void vs1053open(vs1053Dev* codec,sspDev dev); -void vs1053softreset(vs1053Dev* dev); -int vs1053cmdread(vs1053Dev* dev,char address); -void vs1053cmdwrite(vs1053Dev* dev,char address,int value); - -extern void vs10XXclearXCS(); -extern void vs10XXsetXCS(); -extern int vs10XXDREQ(); - -#endif - - - - - - - - - - - - - - - - - - diff --git a/lib/src/common/AUDIO/VS10XX/vs1053.pro b/lib/src/common/AUDIO/VS10XX/vs1053.pro --- a/lib/src/common/AUDIO/VS10XX/vs1053.pro +++ b/lib/src/common/AUDIO/VS10XX/vs1053.pro @@ -1,12 +1,16 @@ TEMPLATE = lib -ARCH = stm32f4-arm-none-eabi-gcc -TARGET = libvs10XX -TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_VS10XX) -HEADERSINSTALLPATH = $(LIBUC_INC_DIR_VS10XX) - -LIBS += CORE SSP UHANDLE +OBJECTS_DIR = obj +TARGET = vs10XX SOURCES += vs1053.c +INCLUDEPATH += ../../includes \ + ../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../CPU/CMSIS/Include -HEADERS += vs1053.h + +UCMODEL=stm32f4 + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target + diff --git a/lib/src/common/FILE_SYSTEM/DIRENT/dirent_STM32F4.pro b/lib/src/common/FILE_SYSTEM/DIRENT/dirent_STM32F4.pro --- a/lib/src/common/FILE_SYSTEM/DIRENT/dirent_STM32F4.pro +++ b/lib/src/common/FILE_SYSTEM/DIRENT/dirent_STM32F4.pro @@ -1,11 +1,17 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt +OBJECTS_DIR = obj TARGET = ucdirent -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) SOURCES += \ ucdirent.c -HEADERS += \ - $$(libuc2)/lib/includes/ucdirent.h +INCLUDEPATH += ../../includes \ + ../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../CPU/CMSIS/Include + + +UCMODEL=stm32f4 + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target + diff --git a/lib/src/common/FILE_SYSTEM/FAT32/fat32_STM32F4.pro b/lib/src/common/FILE_SYSTEM/FAT32/fat32_STM32F4.pro --- a/lib/src/common/FILE_SYSTEM/FAT32/fat32_STM32F4.pro +++ b/lib/src/common/FILE_SYSTEM/FAT32/fat32_STM32F4.pro @@ -1,11 +1,17 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt +OBJECTS_DIR = obj TARGET = fat32 -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) SOURCES += \ fat32.c -HEADERS += \ - $$(libuc2)/lib/includes/fat32.h +INCLUDEPATH += ../../../includes \ + ../../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../../CPU/CMSIS/Include + + +UCMODEL=stm32f4 + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target + diff --git a/lib/src/common/FILE_SYSTEM/MBR/mbr_STM32F4.pro b/lib/src/common/FILE_SYSTEM/MBR/mbr_STM32F4.pro --- a/lib/src/common/FILE_SYSTEM/MBR/mbr_STM32F4.pro +++ b/lib/src/common/FILE_SYSTEM/MBR/mbr_STM32F4.pro @@ -1,11 +1,17 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt +OBJECTS_DIR = obj TARGET = mbr -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) SOURCES += \ mbr.c -HEADERS += \ - $$(libuc2)/lib/includes/mbr.h +INCLUDEPATH += ../../../includes \ + ../../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../../CPU/CMSIS/Include + + +UCMODEL=stm32f4 + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target + diff --git a/lib/src/common/FILE_SYSTEM/SDCARD/sdcard_STM32F4.pro b/lib/src/common/FILE_SYSTEM/SDCARD/sdcard_STM32F4.pro --- a/lib/src/common/FILE_SYSTEM/SDCARD/sdcard_STM32F4.pro +++ b/lib/src/common/FILE_SYSTEM/SDCARD/sdcard_STM32F4.pro @@ -1,11 +1,17 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt +OBJECTS_DIR = obj TARGET = sdcard -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) SOURCES += \ sdcard.c -HEADERS += \ - $$(libuc2)/lib/includes/sdcard.h +INCLUDEPATH += ../../../includes \ + ../../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../../CPU/CMSIS/Include + + +UCMODEL=stm32f4 + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target + diff --git a/lib/src/common/GRAPHIC/CONTROLERS/ILI9328/ili9328.c b/lib/src/common/GRAPHIC/CONTROLERS/ILI9328/ili9328.c --- a/lib/src/common/GRAPHIC/CONTROLERS/ILI9328/ili9328.c +++ b/lib/src/common/GRAPHIC/CONTROLERS/ILI9328/ili9328.c @@ -34,15 +34,73 @@ #define ilipaintLine(LCD,X,Y,W,buffer,buffsize) \ for(int l=0;l<1;l++)\ {\ - ili9328setFrame(LCD,X,Y,W,1);\ - int rem=(W)%buffsize;\ - if(rem)LCD->interface->writeGRAM(buffer,rem);\ - for(int i=rem;i<(W);i+=buffsize)\ - {\ - LCD->interface->writeGRAM(buffer,buffsize);\ - }\ + ili9328setFrame(LCD,X,Y,W,1);\ + int rem=(W)%buffsize;\ + if(rem)LCD->interface->writeGRAM(buffer,rem);\ + for(int i=rem;i<(W);i+=buffsize)\ + {\ + LCD->interface->writeGRAM(buffer,buffsize);\ + }\ } +#define ilipaintHLineWithCont(LCD,X,Y,W,ContSz,bufferInt,buffIntsize,bufferCont,buffContsize) \ + for(int l=0;l<1;l++)\ + {\ + ili9328setFrame(LCD,X,Y,W,1);\ + int rem=(ContSz)%buffContsize;\ + if(rem)LCD->interface->writeGRAM(bufferCont,rem);\ + for(int i=rem;i<(ContSz);i+=buffContsize)\ + {\ + LCD->interface->writeGRAM(bufferCont,buffContsize);\ + }\ + if((2*ContSz)interface->writeGRAM(bufferInt,rem);\ + for(int i=rem;i<(W-(2*ContSz));i+=buffIntsize)\ + {\ + LCD->interface->writeGRAM(bufferInt,buffIntsize);\ + }\ + }\ + rem=(ContSz)%buffContsize;\ + if(rem)LCD->interface->writeGRAM(bufferCont,rem);\ + for(int i=rem;i<(ContSz);i+=buffContsize)\ + {\ + LCD->interface->writeGRAM(bufferCont,buffContsize);\ + }\ + }\ + + +#define ilipaintVLineWithCont(LCD,X,Y,H,ContSz,bufferInt,buffIntsize,bufferCont,buffContsize) \ + for(int l=0;l<1;l++)\ + {\ + ili9328setFrame(LCD,X,Y,1,H);\ + int rem=(ContSz)%buffContsize;\ + if(rem)LCD->interface->writeGRAM(bufferCont,rem);\ + for(int i=rem;i<(ContSz);i+=buffContsize)\ + {\ + LCD->interface->writeGRAM(bufferCont,buffContsize);\ + }\ + if((2*ContSz)interface->writeGRAM(bufferInt,rem);\ + for(int i=rem;i<(H-(2*ContSz));i+=buffIntsize)\ + {\ + LCD->interface->writeGRAM(bufferInt,buffIntsize);\ + }\ + }\ + rem=(ContSz)%buffContsize;\ + if(rem)LCD->interface->writeGRAM(bufferCont,rem);\ + for(int i=rem;i<(ContSz);i+=buffContsize)\ + {\ + LCD->interface->writeGRAM(bufferCont,buffContsize);\ + }\ + }\ + + + + void ili9328setGRAMaddress(LCD_t* LCD,uint16_t Haddress,uint16_t Vaddress) { LCD->interface->writereg(ILI9328_REGISTER_HORIZONTALGRAMADDRESSSET,Haddress); @@ -85,26 +143,41 @@ void ili9328paintFilCircMidPoint(LCD_t* { //Based on the mid point circle algorithm from Wikipedia //http://en.wikipedia.org/wiki/Midpoint_circle_algorithm - + uint16_t tmp1[16]; + uint16_t tmp2[16]; + for(int i=0;i<16;i++)tmp1[i]=fillColor; + for(int i=0;i<16;i++)tmp2[i]=contColor; if(contSz= y) + { + ilipaintHLineWithCont(LCD,(Xpos-x),(Ypos+y),(2*x),(x-x_int),tmp1,16,tmp2,16); + ilipaintHLineWithCont(LCD,(Xpos-x),(Ypos-y),(2*x),(x-x_int),tmp2,16,tmp1,16); + ilipaintVLineWithCont(LCD,(Xpos+y),(Ypos-x),(2*y),(x-x_int),tmp1,16,tmp2,16); + //ilipaintVSymLineWithCont(LCD,(Xpos-y),(Ypos+x),(2*y),(x-x_int),tmp2,16,tmp1,16); + error += y; + ++y; + error += y; + error_int += y_int; + ++y_int; + error_int += y_int; + if(error >= 0) + { + error -= x; + --x; + error -= x; + } + if(error_int >= 0) + { + error_int -= x_int; + --x_int; + error_int -= x_int; + } + } + } diff --git a/lib/src/common/GRAPHIC/CONTROLERS/ILI9328/ili9328_STM32F4.pro b/lib/src/common/GRAPHIC/CONTROLERS/ILI9328/ili9328_STM32F4.pro --- a/lib/src/common/GRAPHIC/CONTROLERS/ILI9328/ili9328_STM32F4.pro +++ b/lib/src/common/GRAPHIC/CONTROLERS/ILI9328/ili9328_STM32F4.pro @@ -1,11 +1,22 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt +OBJECTS_DIR = obj TARGET = ili9328 -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) -SOURCES += \ +SOURCES += \ ili9328.c -HEADERS += \ - $$(libuc2)/lib/includes/GRAPHIC/CONTROLERS/ili9328.h +DEFINES -= __OPTIMIZED_MATH + +INCLUDEPATH += ../../../../includes \ + ../../../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../../../CPU/CMSIS/Include \ + ../../../../includes/GRAPHIC/CONTROLERS \ + ../../../../includes/GRAPHIC/GUI/FONTS \ + ../../../../includes/GRAPHIC/GUI/Widgets + + +UCMODEL=stm32f4 + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target + diff --git a/lib/src/common/GRAPHIC/GUI/FONTS/FONTS_STM32F4.pro b/lib/src/common/GRAPHIC/GUI/FONTS/FONTS_STM32F4.pro --- a/lib/src/common/GRAPHIC/GUI/FONTS/FONTS_STM32F4.pro +++ b/lib/src/common/GRAPHIC/GUI/FONTS/FONTS_STM32F4.pro @@ -1,14 +1,21 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt +OBJECTS_DIR = obj TARGET = fonts -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) SOURCES += \ fonts8pts.c -HEADERS += \ - $$(libuc2)/lib/includes/GRAPHIC/GUI/FONTS/fonts.h + +INCLUDEPATH += ../../../../includes \ + ../../../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../../../CPU/CMSIS/Include \ + ../../../../includes/GRAPHIC/CONTROLERS \ + ../../../../includes/GRAPHIC/GUI/FONTS \ + ../../../../includes/GRAPHIC/GUI/Widgets +UCMODEL=stm32f4 +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target + diff --git a/lib/src/common/GRAPHIC/GUI/Widgets/Terminal/Terminal_STM32F4.pro b/lib/src/common/GRAPHIC/GUI/Widgets/Terminal/Terminal_STM32F4.pro --- a/lib/src/common/GRAPHIC/GUI/Widgets/Terminal/Terminal_STM32F4.pro +++ b/lib/src/common/GRAPHIC/GUI/Widgets/Terminal/Terminal_STM32F4.pro @@ -1,14 +1,22 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt +OBJECTS_DIR = obj TARGET = terminal -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) SOURCES += \ Terminal.c -HEADERS += \ - $$(libuc2)/lib/includes/GRAPHIC/GUI/Widgets/terminal.h + +INCLUDEPATH += ../../../../includes \ + ../../../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../../../CPU/CMSIS/Include \ + ../../../../includes/GRAPHIC/CONTROLERS \ + ../../../../includes/GRAPHIC/GUI/FONTS \ + ../../../../includes/GRAPHIC/GUI/Widgets +UCMODEL=stm32f4 + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target + diff --git a/lib/src/common/POWER/ina226/ina226_STM32F4.pro b/lib/src/common/POWER/ina226/ina226_STM32F4.pro --- a/lib/src/common/POWER/ina226/ina226_STM32F4.pro +++ b/lib/src/common/POWER/ina226/ina226_STM32F4.pro @@ -1,11 +1,16 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt +OBJECTS_DIR = obj TARGET = ina226 -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) + +SOURCES += ina226.c -SOURCES += \ - ina226.c +INCLUDEPATH += ../../../includes \ + ../../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../../CPU/CMSIS/Include + -HEADERS += \ - $$(libuc2)/lib/includes/ina226.h +UCMODEL=stm32f4 + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target + diff --git a/lib/src/common/STRINGS/libucstrings.c b/lib/src/common/STRINGS/libucstrings.c deleted file mode 100644 --- a/lib/src/common/STRINGS/libucstrings.c +++ /dev/null @@ -1,434 +0,0 @@ -/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ -#include -#include "libucstrings.h" -extern void consoleputc(char); -extern char consolegetc(); - -#define _x_prtconv_(a) printhexfromint((a),39) -#define _X_prtconv_(a) printhexfromint((a),7) -#define _d_prtconv_(a) printdecfromint((a)) - -#define _x_scnconv_() scanintfromhex() -#define _d_scnconv_() scanintfromdec() - -void clearch(char* a) -{ - while((*a)) - *a++=' '; - a--; - *a='\n'; -} - - -int scanintfromdec() -{ - char c[8]=" "; - int e=0; - int result=0; - do - { - c[e] = consolegetc(); - consoleputc(c[e]); - if(((c[e] & 0xF0) == 0x30)) - e++; - }while( (c[e]!='\n') && (e<8)); - libucprintf("\n%d number(s) read\n",e); - int i=0; - while((i0) - consoleputc(c[e]); -} - - -int convhexfromint(int a,char* c, int caseoffset) -{ - //char c[8]=" "; - int e=0; - while(e<8) - { - c[e] = a & 0xF; - if(c[e]>9) - { - c[e] = c[e]+caseoffset; - } - c[e] = c[e] + 0x30; - a=a>>4; - e++; - } - while(c[--e]=='0'); - e++; - return e; - /*while(e-->0) - consoleputc(c[e]);*/ -} - -void printdecfromint(int a) -{ - char c[10]=" "; - int e=convdecfromint(a,c); - while(e-->0) - consoleputc(c[e]); -} - - -int convdecfromint(int a,char* c) -{ - //char c[10]=" "; - int e=0; - int d=a; - if((d & 0x80000000) == 0x80000000) - { - d ^= -1; - d++; - consoleputc('-'); - } - while(d>0 && e<10) - { - c[e++] = 0x30 + (d % 10); - d = d / 10; - } - return e; -} - - -void int2hex(unsigned long a,char*b) -{ - char*d = b; - char c[16]=" "; - int e=0; - while(e<8) - { - c[e] = a & 0xF; - if(c[e]>9) - { - c[e] = c[e]+7; - } - c[e] = c[e] + 0x30; - a=a>>4; - e++; - } - for(e=(e-1);e>=0;e--) - { - *d=c[e]; - d = d +1; - } -} - -/// Partialy implemented printf function capable to compute %d,x,X conversions -int libucprintf(const char* format,...) -{ - //return libucfprintf(stdo,format); - /* int nout=0; - va_list ap; - va_start(ap,format); - while(*format) - { - if(*format!='%') - { - consoleputc(*format++); - nout++; - } - else - { - format++; - if(*format!='%') - { - switch(*format) - { - case 'c': - consoleputc((char)(0x7f & va_arg(ap,int))); - format++; - break; - case 'd': - _d_prtconv_(va_arg(ap,int)); - format++; - break; - case 'e': - va_arg(ap,int); - format++; - break; - case 'E': - va_arg(ap,int); - format++; - break; - case 'f': - va_arg(ap,int); - format++; - break; - case 's': - va_arg(ap,int); - format++; - break; - case 'x': - _x_prtconv_(va_arg(ap,int)) ; - format++; - break; - case 'X': - _X_prtconv_(va_arg(ap,int)) ; - format++; - break; - case '%': - consoleputc(*format++); - break; - default: - va_arg(ap,int); - format++; - break; - } - } - else - { - consoleputc(*format++); - nout++; - } - } - } - va_end(ap); - return nout;*/ -} - -/*int libucprintf(const char* format,...) -{ - return libucfprintf(stdo,format,...); -}*/ - - -int libucfprintf(streamdevice* device,const char* format,...) -{ - int nout=0; - va_list ap; - va_start(ap,format); - char c[10]=" "; - char val; - int e; - while(*format) - { - if(*format!='%') - { - device->write(device,format++,1,1); - nout++; - } - else - { - format++; - if(*format!='%') - { - switch(*format) - { - case 'c': - //consoleputc((char)(0x7f & va_arg(ap,int))); - val = ((char)(0x7f & va_arg(ap,int))); - device->write(device,&val,1,1); - format++; - break; - case 'd': - e=convdecfromint(va_arg(ap,int),c); - while(e-->0) - device->write(device,c+e,1,1); - format++; - break; - case 'e': - va_arg(ap,int); - format++; - break; - case 'E': - va_arg(ap,int); - format++; - break; - case 'f': - va_arg(ap,int); - format++; - break; - case 's': - va_arg(ap,int); - format++; - break; - case 'x': - e=convhexfromint(va_arg(ap,int),c,39); - while(e-->0) - device->write(device,c+e,1,1); - format++; - break; - case 'X': - e=convhexfromint(va_arg(ap,int),c,7); - while(e-->0) - device->write(device,c+e,1,1); - format++; - break; - case '%': - device->write(device,format++,1,1); - break; - default: - va_arg(ap,int); - format++; - break; - } - } - else - { - device->write(device,format++,1,1); - nout++; - } - } - } - va_end(ap); - return nout; -} - - -int libucscanf(const char* format,...) -{ - int nin=0; - int* value; - va_list ap; - va_start(ap,format); - while(*format) - { - while(*format!='%')format++; - format++; - libucprintf("find %%%c\n",*format); - switch(*format) - { - case 'c': - va_arg(ap,int*); - format++; - break; - case 'd': - value = (int*)va_arg(ap,int*); - *value=_d_scnconv_() ; - format++; - break; - case 'e': - va_arg(ap,int*); - format++; - break; - case 'E': - va_arg(ap,int*); - format++; - break; - case 'f': - va_arg(ap,int*); - format++; - break; - case 's': - va_arg(ap,int*); - format++; - break; - case 'u': - va_arg(ap,int*); - format++; - break; - case 'x': - value = (int*)va_arg(ap,int*); - *value = _x_scnconv_(); - format++; - break; - case 'X': - value = (int*)va_arg(ap,int*); - *value = _x_scnconv_(); - format++; - break; - default: - va_arg(ap,int*); - format++; - break; - } - - } - va_end(ap); - return nin; -} - - - - -void libucprintchartable(char* table,int size,const char* format,const char* separator) -{ - int i =0; - for(i=0;i - -extern streamdevice* stdo; - -void clearstr(char* a); -void int2hex(unsigned long a,char*b); -int libucprintf(const char* format,...); -int libucfprintf(streamdevice* device,const char* format,...); -int libucscanf(const char*,...); -void libucprintchartable(char* table,int size,const char* format,const char* separator); diff --git a/lib/src/common/STRINGS/stm32F4.mk b/lib/src/common/STRINGS/stm32F4.mk deleted file mode 100644 --- a/lib/src/common/STRINGS/stm32F4.mk +++ /dev/null @@ -1,119 +0,0 @@ -PROJECTDIR = `pwd` -LIBUC = /opt/libuc2 - -HEADERSINSTALLPATH = $(LIBUC_INC_DIR_UCSTRINGS) -HEADERS += libucstrings.h -SOURCES += libucstrings.c -OBJDIR = obj -BINDIR = bin -OBJECTFILES = obj/libucstrings.o \ - -ARCH = stm32f4-arm-none-eabi-gcc -CPUMODEL = -ARCHFOLDER = $(LIBUC)/rules/stm32f4-arm-none-eabi-gcc -TARGET=libucstrings -LIBUC_INCLUDES=$(LIBUC_INC_DIR_STREAMDEVICES_CMD) $(LIBUC_INC_DIR_UHANDLE_CMD) -LIBUC_LIBRARIES=$(LIBUC_LIBS_DIR_STREAMDEVICES_CMD) $(LIBUC_LIBS_STREAMDEVICES) $(LIBUC_LIBS_DIR_UHANDLE_CMD) $(LIBUC_LIBS_UHANDLE) -TARGETINSTALLPATH=$(LIBUC_LIBS_DIR_UCSTRINGS) -HEADERSINSTALLPATH=$(LIBUC_INC_DIR_UCSTRINGS) -BSP=generic - -#--------------------------------------------------------------------------------- -# LIBRARY DEFINITIONS -#--------------------------------------------------------------------------------- - -LIBUC_LIBS_DIR = $(LIBUC)/lib/bin/$(ARCH) -LIBUC_INC_DIR = $(LIBUC)/lib/includes -LIBUC_CFG_DIR = $(LIBUC)/lib/cfg -include $(LIBUC)/rules/common/libsrules.mk - -#--------------------------------------------------------------------------------- -# BOARD SUPORT PACKAGES -#--------------------------------------------------------------------------------- -LIBUC_BSP_DIR=$(LIBUC)/bsp -LIBUC_BSP_BIN_DIR= $(LIBUC_BSP_DIR)/bin -LIBUC_BSP_INC_DIR= $(LIBUC_BSP_DIR)/includes -LIBUC_BSP_CFG_DIR= $(LIBUC_BSP_DIR)/cfg -LIBUC_BSP = -L $(LIBUC_BSP_BIN_DIR)/$(BSP) -static -lbsp -LIBUC_BSP_INC = -I $(LIBUC_BSP_INC_DIR)/$(BSP) - -include $(ARCHFOLDER)/rules.mk -INCLUDES += -I ./ -I $(LIBUC_INC_DIR) $(LIBUC_INCLUDES) $(LIBUC_BSP_INC) - - - - -all:lib - @echo Code compiled - -.SUFFIXES: .o .c .s - -.c.o: - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - -.s.o: - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - -bin: $(BINDIR)/$(TARGET).elf $(BINDIR)/$(TARGET).bin $(BINDIR)/$(TARGET).hex - @echo "compile bin" - -lib: $(BINDIR)/$(TARGET).a - @echo "compile lib" - - -$(BINDIR)/$(TARGET).a: $(OBJECTFILES) - mkdir -p $(BINDIR) - $(LIBUC_AR) rcs $@ $(OBJECTFILES) - -$(OBJDIR): - mkdir -p $(OBJDIR) - -%.elf: $(LINKER_SCRIPT) $(APPOBJECTFILES) $(OBJECTFILES) - mkdir -p $(BINDIR) - $(LIBUC_CC) $(LIBUC_LDFLAGS) $(LIBUC_CFLAGS) -T $^ -o $@ $(LIBUC_BSP) $(LIBUC_LIBRARIES) - $(LIBUC_OBJDUMP) $(LIBUC_ODFLAGS) $@ > $(@:.elf=.dump) - $(LIBUC_SIZE) $@ - - -%.bin: %.elf $(BIN_LIBS_DEPS) - $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O binary $< $*.bin - @echo "BIN_LIBS_DEPS" - @echo $(BIN_LIBS_DEPS) - - -%.hex: %.elf - $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O ihex $< $*.hex - -$(TARGETINSTALLPATH)/$(TARGET).a: $(BINDIR)/$(TARGET).a - mkdir -p $(TARGETINSTALLPATH) - cp $(BINDIR)/$(TARGET).a $(TARGETINSTALLPATH)/$(TARGET).a - -libinstall: $(TARGETINSTALLPATH)/$(TARGET).a - @if [ -z $(HEADERSINSTALLPATH) ] ; then echo "No headers to install" ; else mkdir -p $(HEADERSINSTALLPATH) ; fi - @if [ -z "$(HEADERS)" ] ; then echo "No headers to install" ; else echo "cp -f $(HEADERS) $(HEADERSINSTALLPATH)/" ; cp -f $(HEADERS) $(HEADERSINSTALLPATH)/ ; fi - -clean: - rm -f *.o *.d *.bin *.hex *.dump *.map *.a *.elf - rm -f $(OBJECTFILES) - rm -f $(BINDIR)/*.bin - rm -f $(BINDIR)/*.hex - rm -f $(BINDIR)/*.dump - rm -f $(BINDIR)/*.map - rm -f $(BINDIR)/*.a - rm -f $(BINDIR)/*.elf - rm -f $(DEVSOURCESND) - rm -f $(ASMDEVSOURCESND) - -distclean: clean libclean - rm -f $(TARGETINSTALLPATH)/*.bin - rm -f $(TARGETINSTALLPATH)/*.a - rm -f Makefile - -obj/libucstrings.o: libucstrings.c $(OBJDIR) - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - -install:libinstall - - -libclean: - rm -f $(TARGETINSTALLPATH)/$(TARGET).a diff --git a/lib/src/common/STRINGS/strings.pro b/lib/src/common/STRINGS/strings.pro deleted file mode 100644 --- a/lib/src/common/STRINGS/strings.pro +++ /dev/null @@ -1,18 +0,0 @@ -TEMPLATE = lib -stm32F4.ARCH = stm32f4-arm-none-eabi-gcc -stm32F4.TARGET = libucstrings - -*.TARGETINSTALLPATH = $(LIBUC_LIBS_DIR_UCSTRINGS) -*.HEADERSINSTALLPATH = $(LIBUC_INC_DIR_UCSTRINGS) - -*.LIBS += STREAMDEVICES UHANDLE - -*.SOURCES += libucstrings.c - - -*.HEADERS += libucstrings.h - - - - - diff --git a/lib/src/includes/24LC0X.h b/lib/src/includes/24LC0X.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/24LC0X.h @@ -0,0 +1,57 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2011, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef B24LC0X_H +#define B24LC0X_H + +#include "iic.h" +#include + +struct eeprom24LC0X_str +{ + i2cDev iicdev; + unsigned char devAddress; + unsigned char size; +}; + +typedef struct eeprom24LC0X_str eeprom24lc0xDev; + + +extern void eeprom24lc0xopen(eeprom24lc0xDev* dev,i2cDev iicdev,unsigned char A0_A1_A2_val,unsigned int size); + +extern void eeprom24lc0xpagewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char* page); +extern void eeprom24lc0xpageread(eeprom24lc0xDev dev,unsigned char address,unsigned char* page); +extern void eeprom24lc0xbytewrite(eeprom24lc0xDev dev,unsigned char address,unsigned char data); +extern unsigned char eeprom24lc0xbyteread(eeprom24lc0xDev dev,unsigned char address); +extern void eeprom24lc0xreadn(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count); +extern void eeprom24lc0xwriten(eeprom24lc0xDev dev,unsigned char address,unsigned char* data, unsigned int count); + + + + +#endif + + + + + + + diff --git a/lib/src/includes/CS43L22.h b/lib/src/includes/CS43L22.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/CS43L22.h @@ -0,0 +1,87 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2011, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef CS43L22_H +#define CS43L22_H + +#include +#include + +typedef struct CS43L22_t +{ + i2c_t i2cdev; + uint8_t devAddress; +}CS43L22_t; + +extern int cs43l22open(CS43L22_t* dev,i2c_t i2cdev,uint8_t A0); +extern uint8_t cs43l22getID(CS43L22_t* dev); + +#define CS43L22_I2C_ADDRESS 0x4a + + +#define CS43L22_MAP_ID 1 +#define CS43L22_MAP_Power_Ctl_1 2 +#define CS43L22_MAP_Power_Ctl_2 4 +#define CS43L22_MAP_Clocking_Ctl 5 +#define CS43L22_MAP_Interface_Ctl_1 6 +#define CS43L22_MAP_Interface_Ctl_2 7 +#define CS43L22_MAP_Passthrough_A 8 +#define CS43L22_MAP_Passthrough_B 9 +#define CS43L22_MAP_Analog_ZC_SR 0xA +#define CS43L22_MAP_Passthrough 0xC +#define CS43L22_MAP_Playback_Ctl_1 0xD +#define CS43L22_MAP_Misc_Ctl 0xE +#define CS43L22_MAP_Playback_Ctl_2 0xF +#define CS43L22_MAP_Passthrough_A_Vol 0x14 +#define CS43L22_MAP_Passthrough_B_Vol 0x15 +#define CS43L22_MAP_PCMA_Vol 0x1A +#define CS43L22_MAP_PCMB_Vol 0x1B +#define CS43L22_MAP_BEEP_Freq 0x1C +#define CS43L22_MAP_BEEP_Vol 0x1d +#define CS43L22_MAP_BEEP_Tone_Cfg 0x1E +#define CS43L22_MAP_Tone_Ctl 0x1F +#define CS43L22_MAP_Master_A_Vol 0x20 +#define CS43L22_MAP_Master_B_Vol 0x21 +#define CS43L22_MAP_Headphone_A_Vol 0x22 +#define CS43L22_MAP_Headphone_B_Vol 0x23 +#define CS43L22_MAP_Speaker_A_Vol 0x24 +#define CS43L22_MAP_Speaker_B_Vol 0x25 +#define CS43L22_MAP_Channel_Mixer 0x26 +#define CS43L22_MAP_Limit_Ctl_1 0x27 +#define CS43L22_MAP_Limit Ctl_2 0x28 +#define CS43L22_MAP_Limiter_Attack 0x29 +#define CS43L22_MAP_Overflow_And_Clock_Status 0x2E +#define CS43L22_MAP_Battery_Compensation 0x2F +#define CS43L22_MAP_VP_Battery_Level 0x30 +#define CS43L22_MAP_Speaker_Status 0x31 +#define CS43L22_MAP_Temperature_Monitor_Control 0x32 +#define CS43L22_MAP_Thermal_Foldback 0x33 +#define CS43L22_MAP_Charge_Pump_Frequency 0x34 + + +#endif + + + + + + + diff --git a/lib/src/includes/GRAPHIC/CONTROLERS/genericLCD_Controler.h b/lib/src/includes/GRAPHIC/CONTROLERS/genericLCD_Controler.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/GRAPHIC/CONTROLERS/genericLCD_Controler.h @@ -0,0 +1,57 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef GENERICLCD_CONTROLER_H +#define GENERICLCD_CONTROLER_H + +#include +#include +#include + + +typedef struct LCD_IF_t +{ + int (*init)(); + void (*writereg)(uint32_t reg,uint32_t data); + uint32_t (*readreg)(uint32_t reg); + void (*writeGRAM)(void* buffer,uint32_t count); + void (*readGRAM)(void* buffer,uint32_t count); +}LCD_IF_t; + +typedef struct LCD_t +{ + LCD_IF_t* interface; + int (*init)(struct LCD_t* LCD); + void (*paint)(struct LCD_t* LCD,void* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t Width,uint16_t Height); + void (*paintText)(struct LCD_t* LCD,char* buffer,uint16_t Xpos,uint16_t Ypos,sFONT *font,uint32_t color); + void (*paintFilRect)(struct LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor); + void (*refreshenable)(struct LCD_t* LCD,int enable); + uint16_t width; + uint16_t height; +}LCD_t; + + +#endif /*GENERICLCD_CONTROLER_H*/ + + + + + diff --git a/lib/src/includes/GRAPHIC/CONTROLERS/ili9328.h b/lib/src/includes/GRAPHIC/CONTROLERS/ili9328.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/GRAPHIC/CONTROLERS/ili9328.h @@ -0,0 +1,97 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef ILI9328_H +#define ILI9328_H + +#include +#include +#include +#include + +extern int ili9328init(struct LCD_t* LCD); +extern void ili9328setFrame(LCD_t* LCD,uint16_t X,uint16_t Y,uint16_t W,uint16_t H); +extern void ili9328setGRAMaddress(LCD_t* LCD,uint16_t Haddress,uint16_t Vaddress); +extern void ili9328paint(LCD_t* LCD,void* buffer,uint16_t Xpos,uint16_t Ypos,uint16_t Width,uint16_t Height); +extern void ili9328paintText(LCD_t* LCD,char* buffer,uint16_t Xpos,uint16_t Ypos,sFONT *font,uint32_t color); +extern void ili9328paintFilRect(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t w,uint16_t h,uint32_t contColor,uint16_t contSz,uint32_t fillColor); +extern void ili9328paintFilCirc(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor); +extern void ili9328paintFilCircMidPoint(LCD_t* LCD,uint16_t Xpos,uint16_t Ypos,uint16_t r,uint32_t contColor,uint16_t contSz,uint32_t fillColor); +extern void ili9328refreshenable(struct LCD_t* LCD,int enable); + +#define ILI9328_REGISTER_DRIVERCODEREAD ((uint32_t) 0x0000 ) +#define ILI9328_REGISTER_DRIVEROUTPUTCONTROL1 ((uint32_t) 0x0001 ) +#define ILI9328_REGISTER_LCDDRIVINGCONTROL ((uint32_t) 0x0002 ) +#define ILI9328_REGISTER_ENTRYMODE ((uint32_t) 0x0003 ) +#define ILI9328_REGISTER_RESIZECONTROL ((uint32_t) 0x0004 ) +#define ILI9328_REGISTER_DISPLAYCONTROL1 ((uint32_t) 0x0007 ) +#define ILI9328_REGISTER_DISPLAYCONTROL2 ((uint32_t) 0x0008 ) +#define ILI9328_REGISTER_DISPLAYCONTROL3 ((uint32_t) 0x0009 ) +#define ILI9328_REGISTER_DISPLAYCONTROL4 ((uint32_t) 0x000A ) +#define ILI9328_REGISTER_RGBDISPLAYINTERFACECONTROL1 ((uint32_t) 0x000C ) +#define ILI9328_REGISTER_FRAMEMAKERPOSITION ((uint32_t) 0x000D ) +#define ILI9328_REGISTER_RGBDISPLAYINTERFACECONTROL2 ((uint32_t) 0x000F ) +#define ILI9328_REGISTER_POWERCONTROL1 ((uint32_t) 0x0010 ) +#define ILI9328_REGISTER_POWERCONTROL2 ((uint32_t) 0x0011 ) +#define ILI9328_REGISTER_POWERCONTROL3 ((uint32_t) 0x0012 ) +#define ILI9328_REGISTER_POWERCONTROL4 ((uint32_t) 0x0013 ) +#define ILI9328_REGISTER_HORIZONTALGRAMADDRESSSET ((uint32_t) 0x0020 ) +#define ILI9328_REGISTER_VERTICALGRAMADDRESSSET ((uint32_t) 0x0021 ) +#define ILI9328_REGISTER_WRITEDATATOGRAM ((uint32_t) 0x0022 ) +#define ILI9328_REGISTER_POWERCONTROL7 ((uint32_t) 0x0029 ) +#define ILI9328_REGISTER_FRAMERATEANDCOLORCONTROL ((uint32_t) 0x002B ) +#define ILI9328_REGISTER_GAMMACONTROL1 ((uint32_t) 0x0030 ) +#define ILI9328_REGISTER_GAMMACONTROL2 ((uint32_t) 0x0031 ) +#define ILI9328_REGISTER_GAMMACONTROL3 ((uint32_t) 0x0032 ) +#define ILI9328_REGISTER_GAMMACONTROL4 ((uint32_t) 0x0035 ) +#define ILI9328_REGISTER_GAMMACONTROL5 ((uint32_t) 0x0036 ) +#define ILI9328_REGISTER_GAMMACONTROL6 ((uint32_t) 0x0037 ) +#define ILI9328_REGISTER_GAMMACONTROL7 ((uint32_t) 0x0038 ) +#define ILI9328_REGISTER_GAMMACONTROL8 ((uint32_t) 0x0039 ) +#define ILI9328_REGISTER_GAMMACONTROL9 ((uint32_t) 0x003C ) +#define ILI9328_REGISTER_GAMMACONTROL10 ((uint32_t) 0x003D ) +#define ILI9328_REGISTER_HORIZONTALADDRESSSTARTPOSITION ((uint32_t) 0x0050 ) +#define ILI9328_REGISTER_HORIZONTALADDRESSENDPOSITION ((uint32_t) 0x0051 ) +#define ILI9328_REGISTER_VERTICALADDRESSSTARTPOSITION ((uint32_t) 0x0052 ) +#define ILI9328_REGISTER_VERTICALADDRESSENDPOSITION ((uint32_t) 0x0053 ) +#define ILI9328_REGISTER_DRIVEROUTPUTCONTROL2 ((uint32_t) 0x0060 ) +#define ILI9328_REGISTER_BASEIMAGEDISPLAYCONTROL ((uint32_t) 0x0061 ) +#define ILI9328_REGISTER_VERTICALSCROLLCONTROL ((uint32_t) 0x006A ) +#define ILI9328_REGISTER_PARTIALIMAGE1DISPLAYPOSITION ((uint32_t) 0x0080 ) +#define ILI9328_REGISTER_PARTIALIMAGE1AREASTARTLINE ((uint32_t) 0x0081 ) +#define ILI9328_REGISTER_PARTIALIMAGE1AREAENDLINE ((uint32_t) 0x0082 ) +#define ILI9328_REGISTER_PARTIALIMAGE2DISPLAYPOSITION ((uint32_t) 0x0083 ) +#define ILI9328_REGISTER_PARTIALIMAGE2AREASTARTLINE ((uint32_t) 0x0084 ) +#define ILI9328_REGISTER_PARTIALIMAGE2AREAENDLINE ((uint32_t) 0x0085 ) +#define ILI9328_REGISTER_PANELINTERFACECONTROL1 ((uint32_t) 0x0090 ) +#define ILI9328_REGISTER_PANELINTERFACECONTROL2 ((uint32_t) 0x0092 ) +#define ILI9328_REGISTER_PANELINTERFACECONTROL4 ((uint32_t) 0x0095 ) +#define ILI9328_REGISTER_OTPVCMPROGRAMMINGCONTROL ((uint32_t) 0x00A1 ) +#define ILI9328_REGISTER_OTPVCMSTATUSANDENABLE ((uint32_t) 0x00A2 ) +#define ILI9328_REGISTER_OTPPROGRAMMINGIDKEY ((uint32_t) 0x00A5 ) + + +#endif + + + + + diff --git a/lib/src/includes/GRAPHIC/GUI/FONTS/fonts.h b/lib/src/includes/GRAPHIC/GUI/FONTS/fonts.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/GRAPHIC/GUI/FONTS/fonts.h @@ -0,0 +1,57 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef FONTS_H +#define FONTS_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include + + +typedef struct _tFont +{ + const uint8_t *table; + uint16_t Width; + uint16_t Height; + uint8_t bytesPerLine; + +} sFONT; + +extern sFONT ComicSansMS_24; +extern sFONT ComicSansMS_18; +extern sFONT Monk_24; + +#ifdef __cplusplus +} +#endif + +#endif + + + + + + + + diff --git a/lib/src/includes/GRAPHIC/GUI/Widgets/terminal.h b/lib/src/includes/GRAPHIC/GUI/Widgets/terminal.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/GRAPHIC/GUI/Widgets/terminal.h @@ -0,0 +1,26 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef TERMINAL_H +#define TERMINAL_H +#include + +#endif diff --git a/lib/src/includes/GRAPHIC/GUI/Widgets/widget.h b/lib/src/includes/GRAPHIC/GUI/Widgets/widget.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/GRAPHIC/GUI/Widgets/widget.h @@ -0,0 +1,42 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef WIDGET_H +#define WIDGET_H +#include + +typedef struct widget +{ + uint16_t Width; + uint16_t Height; + uint16_t Xpos; + uint16_t Ypos; + void (*paint)(); +} widget; + + + + + + +#endif + + diff --git a/lib/src/includes/adc.h b/lib/src/includes/adc.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/adc.h @@ -0,0 +1,139 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +/* +*/ + +#ifndef ADC_H +#define ADC_H +#include +#include + +#ifdef __cplusplus + extern "C" { +#endif + + +typedef struct adc_t +{ + void* _dev; + int cfg; + int rate; +}adc_t; + + +typedef enum +{ + adc6bits = 0x1, + adc7bits = 0x2, + adc8bits = 0x3, + adc9bits = 0x4, + adc10bits = 0x5, + adc11bits = 0x6, + adc12bits = 0x7, + adc13bits = 0x8, + adc14bits = 0x9, + adc15bits = 0xA, + adc16bits = 0xB, + adc17bits = 0xC, + adc18bits = 0xD, + adc19bits = 0xE, + adc20bits = 0xF, + adc21bits = 0x10, + adc22bits = 0x11, + adc23bits = 0x12, + adc24bits = 0x13 +}adcbits_t; + +#define ADCBITSMASK 0xF + +typedef enum +{ + adcsingle = 0x00, + adcmaster = 0x10 +}adcconvmode_t; + +#define ADCCONVMODEMASK 0x10 + +typedef enum +{ + spiclkinhlow = 0x00, + spiclkinhhigh = 0x20 +}spiclkinhlvl_t; + +#define SPICLKINHLVLMASK 0x20 + + +typedef enum +{ + spiclkfirstedge = 0x00, + spiclksecondedge = 0x40 +}spiclkphase_t; + +#define SPICLKPHASEMASK 0x40 + +typedef enum +{ + spimsbfirst = 0x00, + spilsbfirst = 0x80 +}spibitorder_t; + +#define SPIBITORDERMASK 0x80 + + +extern int spiopen(int count,spi_t* spidev); +extern int spiopenandconfig(int count,spi_t* spidev,uint32_t cfg,uint32_t speed,uint32_t MOSIpin,uint32_t MISOpin,uint32_t SCKpin,uint32_t SCSpin); +extern int spiclose(spi_t* spidev); +extern int spisetpins(spi_t* spidev,uint32_t MOSIpin,uint32_t MISOpin,uint32_t SCKpin,uint32_t SCSpin); +extern int spienable(spi_t* spidev); +extern int spidisable(spi_t* spidev); +extern int spisetconfig(spi_t* spidev); +extern int spisetspeed(spi_t* spidev, uint32_t speed); +extern int spisetbitorder(spi_t* spidev,spibitorder_t order); +extern int spisetdatabits(spi_t* spidev,spibits_t bitscnt); +extern int spisetclkinhlevel(spi_t* spidev,spiclkinhlvl_t level); +extern int spisetclkphase(spi_t* spidev,spiclkphase_t phase); +extern int spiputw(spi_t* spidev,uint16_t data); +extern uint16_t spigetw(spi_t* spidev); +extern int spiputs(spi_t* spidev,char* s); +extern int spigets(spi_t* spidev,char* s); +extern int spiputnw(spi_t* spidev,uint16_t* w,int n); +extern int spigetnw(spi_t* spidev,uint16_t* w,int n); +extern int spiputnc(spi_t* spidev,char* c,int n); +extern int spigetnc(spi_t* spidev,char* c,int n); +extern int spiavailiabledata(spi_t* spidev); + +#ifdef __cplusplus + } +#endif +#endif //ADC_H + + + + + + + + + + + + diff --git a/lib/src/includes/ads1278.h b/lib/src/includes/ads1278.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/ads1278.h @@ -0,0 +1,72 @@ +/*------------------------------------------------------------------------------ +#-- This file is a part of the libuc, microcontroler library +#-- Copyright (C) 2011, Alexis Jeandet +#-- +#-- This program is free software; you can redistribute it and/or modify +#-- it under the terms of the GNU General Public License as published by +#-- the Free Software Foundation; either version 3 of the License, or +#-- (at your option) any later version. +#-- +#-- This program is distributed in the hope that it will be useful, +#-- but WITHOUT ANY WARRANTY; without even the implied warranty of +#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +#-- GNU General Public License for more details. +#-- +#-- You should have received a copy of the GNU General Public License +#-- along with this program; if not, write to the Free Software +#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +#------------------------------------------------------------------------------- +#-- Author : Alexis Jeandet +#-- Mail : alexis.jeandet@gmail.com +#-------------------------------------------------------------------------------*/ +#ifndef ADS1278_H +#define ADS1278_H +#include + +typedef void (*set_clkdiv_t)(int val); +typedef void (*set_sync_t)(int val); +typedef void (*set_mode0_t)(int val); +typedef void (*set_mode1_t)(int val); +typedef void (*set_fsync_t)(int val); +typedef int (*ready_t)(); + +struct ads1278Regs +{ + sspDev SSP_device; + set_clkdiv_t set_clkdiv; + set_sync_t set_sync; + set_mode0_t set_mode0; + set_mode1_t set_mode1; + set_fsync_t set_fsync; + ready_t ready; +}; + +typedef struct ads1278Regs ads1278Dev; + +void ads1278open(ads1278Dev* codec,sspDev dev); +void ads1278sample(ads1278Dev* dev); +void ads1278readresult(ads1278Dev* dev,unsigned int* CH1,unsigned int* CH2,unsigned int* CH3,unsigned int* CH4,unsigned int* CH5,unsigned int* CH6,unsigned int* CH7,unsigned int* CH8); + +extern void bsp_ads1278_Sample(); +extern int bsp_ads1278_Ready(); +extern void bsp_ads1278_Synch(); + +#endif + + + + + + + + + + + + + + + + + + diff --git a/lib/src/includes/blkdevice.h b/lib/src/includes/blkdevice.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/blkdevice.h @@ -0,0 +1,128 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef BLKDEVICE_H +#define BLKDEVICE_H +#include +/* Disk Status Bits (DSTATUS) */ + +#define STA_NOINIT 0x01 /* Drive not initialized */ +#define STA_NODISK 0x02 /* No medium in the drive */ +#define STA_PROTECT 0x04 /* Write protected */ + + +/* Command code for disk_ioctrl fucntion */ +/* Generic ioctl command (defined for FatFs) */ +#define CTRL_SYNC 0 /* Flush disk cache (for write functions) */ +#define GET_SECTOR_COUNT 1 /* Get media size (for only f_mkfs()) */ +#define GET_SECTOR_SIZE 2 /* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */ +#define GET_BLOCK_SIZE 3 /* Get erase block size (for only f_mkfs()) */ +#define CTRL_ERASE_SECTOR 4 /* Force erased a block of sectors (for only _USE_ERASE) */ + +/* Generic ioctl command */ +#define CTRL_POWER 5 /* Get/Set power status */ +#define CTRL_LOCK 6 /* Lock/Unlock media removal */ +#define CTRL_EJECT 7 /* Eject media */ + +/* MMC/SDC specific ioctl command */ +#define MMC_GET_TYPE 10 /* Get card type */ +#define MMC_GET_CSD 11 /* Get CSD */ +#define MMC_GET_CID 12 /* Get CID */ +#define MMC_GET_OCR 13 /* Get OCR */ +#define MMC_GET_SDSTAT 14 /* Get SD status */ + +/* ATA/CF specific ioctl command */ +#define ATA_GET_REV 20 /* Get F/W revision */ +#define ATA_GET_MODEL 21 /* Get model name */ +#define ATA_GET_SN 22 /* Get serial number */ + +/* NAND specific ioctl command */ +#define NAND_FORMAT 30 /* Create physical format */ + +/* Status of Disk Functions */ +typedef unsigned char DSTATUS; + +/* Results of Disk Functions */ +typedef enum { + RES_OK = 0, /* 0: Successful */ + RES_ERROR, /* 1: R/W Error */ + RES_WRPRT, /* 2: Write Protected */ + RES_NOTRDY, /* 3: Not Ready */ + RES_PARERR /* 4: Invalid Parameter */ +} DRESULT; + +typedef volatile struct blkdevice* blkdeviceptr; + +typedef void (*blkdevselect_t)(char) ; +typedef void (*blkdevpower_t)(char) ; +typedef char (*blkdevdetect_t)() ; +typedef char (*blkdevwriteprotected_t)() ; +typedef DRESULT (*blkdevwrite_t)(blkdeviceptr _this,const char *buff,unsigned long sector,char count) ; +typedef DRESULT (*blkdevread_t)(blkdeviceptr _this,char *buff,unsigned long sector,char count) ; +typedef DRESULT (*blkdevioctl_t)(blkdeviceptr _this,char ctrl,void *buff) ; +typedef DSTATUS (*blkdevinitialize_t)(blkdeviceptr _this) ; +typedef DSTATUS (*blkdevstatus_t) (blkdeviceptr _this) ; + +typedef struct blkdevice +{ + UHANDLE phy; + unsigned int size; + unsigned int MaxSpeed; + unsigned char Version; + blkdevselect_t select; + blkdevpower_t power; + blkdevdetect_t detect; + blkdevwriteprotected_t writeprotected; + blkdevwrite_t write; + blkdevread_t read; + blkdevioctl_t ioctl; + blkdevinitialize_t initialize; + blkdevstatus_t status; +}blkdevice; + + + + + + +#endif + + + + + + + + + + + + + + + + + + + + + + diff --git a/lib/src/includes/core.h b/lib/src/includes/core.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/core.h @@ -0,0 +1,56 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2011, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#include +#ifdef __cplusplus + extern "C" { +#endif +extern volatile uint32_t tickCounter; +extern uint32_t getAPB1Freq(); +extern uint32_t getAPB2Freq(); +extern uint32_t getCpuFreq(); +extern int setCpuFreq(uint32_t freq); +extern int optimizePLLcfg(uint32_t freq, uint32_t srcfreq,uint32_t PLLM,uint32_t* PLLP, uint32_t* PLLN,uint8_t* AHBPRindx); +extern int setPll(uint32_t freq); +extern void enable_FPU(); +extern void reset_AHB1(); +extern void reset_AHB2(); +extern void reset_APB1(); +extern void reset_APB2(); +extern void configureSysTick(); +extern void delay_100us(uint32_t value); +extern void SysTick_Handler(void); + +#ifdef __cplusplus + } +#endif + + + + + + + + + + + + diff --git a/lib/src/includes/fat32.h b/lib/src/includes/fat32.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/fat32.h @@ -0,0 +1,176 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef FAT32_H +#define FAT32_H +#include +#include +#include +#include +#include +/*BPB (Boot Sector) Offsets */ + +#define BS_jmpBootoff 0 +#define BS_OEMNameoff 3 +#define BPB_BytsPerSecoff 11 +#define BPB_SecPerClusoff 13 +#define BPB_RsvdSecCntoff 14 +#define BPB_NumFATsoff 16 +#define BPB_RootEntCntoff 17 +#define BPB_TotSec16off 19 +#define BPB_Mediaoff 21 +#define BPB_FATSz16off 22 +#define BPB_SecPerTrkoff 24 +#define BPB_NumHeadsoff 26 +#define BPB_HiddSecoff 28 +#define BPB_TotSec32off 32 +/*FAT16*/ +#define BS_DrvNumFAT16off 36 +#define BS_Reserved1FAT16off 37 +#define BS_BootSigFAT16off 38 +#define BS_VolIDFAT16off 39 +#define BS_VolLabFAT16off 43 +#define BS_FilSysTypeFAT16off 54 +/*FAT32*/ +#define BPB_FATSz32off 36 +#define BPB_ExtFlagsoff 40 +#define BPB_FSVeroff 42 +#define BPB_RootClusoff 44 +#define BPB_FSInfooff 48 +#define BPB_BkBootSecoff 50 +#define BPB_Reservedoff 52 +#define BS_DrvNumFAT32off 64 +#define BS_Reserved1FAT32off 65 +#define BS_BootSigFAT32off 66 +#define BS_VolIDFAT32off 67 +#define BS_VolLabFAT32off 71 +#define BS_FilSysTypeFAT32off 82 + + +#define DIR_Nameoff 0 +#define DIR_Attroff 0xb +#define DIR_FstClusHIoff 0x14 +#define DIR_FstClusLOoff 0x1A +#define DIR_FileSizeoff 0x1c +#define DIR_CrtTimeTenthoff 13 +#define DIR_CrtTimeoff 14 +#define DIR_CrtDateoff 16 +#define DIR_LstAccDateoff 18 +#define DIR_WrtTimeoff 22 +#define DIR_WrtDateoff 24 + + + +#define FATBadpart 1 +#define FATBabArg 2 +#define FATReadErr 3 +#define FATnoErr 0 + +typedef struct FAT32fs +{ + uint16_t BPB_BytsPerSec; + uint16_t BPB_RsvdSecCnt; + uint32_t BPB_FATSz32; + uint32_t BPB_RootClus; + uint32_t fat_begin_lba; + uint32_t cluster_begin_lba; + uint8_t BPB_SecPerClus; + uint8_t BPB_NumFATs; + dikpartition* part; +}FAT32fs; + + +#define castUI64(val) ((uint64_t)(val)) +#define castUI32(val) ((uint32_t)(val)) +#define castUI16(val) ((uint16_t)(val)) +#define castUI8(val) ((uint8_t)(val)) + +#define castI64(val) ((int64_t)(val)) +#define castI32(val) ((int32_t)(val)) +#define castI16(val) ((int16_t)(val)) +#define castI8(val) ((int8_t)(val)) + +#define fat32Ui8_2_Ui32(table,lsBindex) ((uint32_t)((0xFF&(table[lsBindex]))+(0xFF00&(((uint32_t)table[lsBindex+1])<<8))+(0xFF0000&(((uint32_t)table[lsBindex+2])<<16))+(0xFF000000&(((uint32_t)table[lsBindex+3])<<24)))) +#define fat32Ui8_2_Ui16(table,lsBindex) ((uint16_t)((0xFF&(table[lsBindex]))+(0xFF00&(((uint16_t)table[lsBindex+1])<<8)))) + +/* Get the first sector lba of given cluster number*/ +#define clusterlba(fs,cluster_number) ((uint32_t)fs->cluster_begin_lba + (((uint32_t)cluster_number) - (2)) * (uint32_t)fs->BPB_SecPerClus) + +//#define fat32clusterinfatsect(fs,cluster_number) ((((uint32_t)(cluster_number))>>6) + fs->fat_begin_lba) +#define fat32clusterinfatsect(fs,cluster_number) ((((uint32_t)(cluster_number))>>7) + fs->fat_begin_lba) +#define fat32clusterinfatoff(cluster_number) (((cluster_number)&0x3F)*4) + +/*Get cluster index in FAT Table from sector address*/ +#define fat32masksectorlba(sectorlba,fs) (sectorlba & (castUI32(-1)^castUI32(fs->BPB_SecPerClus-1))) +#define fat32sectorlbatoclusternum(fs,sectorlba) (((fat32masksectorlba(castUI32(sectorlba),fs) -(castUI32(fs->cluster_begin_lba)))/castUI32(fs->BPB_SecPerClus))+castUI32(2)) + +#define fat32extract16b(table, LSBOffset) (uint16_t)(( (uint16_t) ((uint8_t)table[(LSBOffset)]) ) + (uint16_t)( ((uint8_t)table[(LSBOffset)+1]) << 8 )) +#define fat32extract32b(table, LSBOffset) (uint32_t)(( (uint32_t) ((uint8_t)table[(LSBOffset)]) ) + (uint32_t)( ((uint8_t)table[(LSBOffset)+1]) << 8 )+ (uint32_t)( ((uint8_t)table[(LSBOffset)+2]) << 16 )+ (uint32_t)( ((uint8_t)table[(LSBOffset)+3]) << 24 )) + +#ifdef FAT32_PRIVATE +#define fat32sectorreadout(fs,fatsec) \ + if((lastSecAddrs!=(fatsec)) || (lastFATFS!=(fs))) /*Check if sector already buffered*/ \ + {\ + if((fs)->part->phy->read((fs)->part->phy,fat32buff,(fatsec),1)!=RES_OK) \ + {\ + return DIRENT_ReadErr;\ + }\ + }\ + lastSecAddrs=(fatsec);\ + lastFATFS=(fs); +#endif + +extern int fat32open(FAT32fs* fs,dikpartition* part); +extern int fat32mkdirent(FAT32fs* fs,ucdirent* dirent); +extern int fat32getVolName(FAT32fs* fs,char* Name); +extern int fat32getrootfirstent(ucdirent* entry); +extern int fat32nextdirent(ucdirent* entry); +extern int fat32nextsectorlba(FAT32fs* fs,uint32_t lastsector_lba,uint32_t* nextsector_lba); +extern int fat32prevsectorlba(FAT32fs* fs,uint32_t lastsector_lba,uint32_t *nextsector_lba); +extern uint32_t fat32getdirentlba(ucdirent* entry); +extern int fat32getdirentname(ucdirent* entry,char* nameBuffer); + +#endif + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/lib/src/includes/gpio.h b/lib/src/includes/gpio.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/gpio.h @@ -0,0 +1,557 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef GPIO_H +#define GPIO_H +#include +#ifdef __cplusplus + extern "C" { +#endif + + +typedef uint32_t gpio_t; + +typedef enum +{ + gpiolowspeed = 0x00000, + gpiomediumspeed = 0x10000, + gpiofastspeed = 0x20000, + gpiohighspeed = 0x30000 +}gpiospeed_t; + +#define GPIOSPEEDMASK 0x30000 + +typedef enum gpiodir_t +{ + gpioindir = 0x00000, + gpiooutdir = 0x40000, + gpioaf = 0x80000, + gpioan = 0xC0000 +}gpiodir_t; + +#define GPIODIRMASK 0xC0000 + + +typedef enum +{ + gpiopushpulltype = 0x000000, + gpioopendraintype = 0x100000 +}gpioouttype_t; + +#define GPIOOUTTYPEMASK 0x100000 + +typedef enum +{ + gpionopulltype = 0x000000, + gpiopulluptype = 0x200000, + gpiopulldowntype = 0x400000 +}gpiopulltype_t; + +#define GPIOPULLTYPEMASK 0x600000 + +extern gpio_t gpioopen(uint32_t gpio); +extern void gpioclose(gpio_t gpio); +extern void gpiosetconfig(gpio_t* gpio); +extern void gpiosetdir(gpio_t* gpio,gpiodir_t dir); +extern void gpiosetouttype(gpio_t* gpio, gpioouttype_t outtype); +extern void gpiosetpulltype(gpio_t* gpio,gpiopulltype_t pulltype); +extern void gpiosetspeed(gpio_t* gpio,gpiospeed_t speed); +extern void gpioset(gpio_t gpio); +extern void gpioclr(gpio_t gpio); +extern void gpiosetval(gpio_t gpio,int val); +extern int gpiogetval(gpio_t gpio); + +#define GPIOISINPUT(gpio) (((gpio) & GPIODIRMASK)==gpioindir) +#define GPIOISOUTPUT(gpio) (((gpio) & GPIOSPEEDMASK)==gpiooutdir) + +#define GPIOISLOWSPEED(gpio) (((gpio) & GPIOSPEEDMASK)==gpiolowspeed) +#define GPIOISMEDIUMSPEED(gpio) (((gpio) & GPIOSPEEDMASK)==gpiomediumspeed) +#define GPIOISFASTPEED(gpio) (((gpio) & GPIOSPEEDMASK)==gpiofastspeed) +#define GPIOISHIGHSPEED(gpio) (((gpio) & GPIOSPEEDMASK)==gpiohighspeeds) + +#define GPIOISPUSHPULL(gpio) (((gpio) & GPIOOUTTYPEMASK)==gpiopushpulltype) +#define GPIOISOPENDRAIN(gpio) (((gpio) & GPIOOUTTYPEMASK)==gpioopendraintype) + +#define GPIOISNOPULL(GPIO) (((gpio) & GPIOPULLTYPEMASK)==gpionopulltype) +#define GPIOISPULLUP(GPIO) (((gpio) & GPIOPULLTYPEMASK)==gpiopulluptype) +#define GPIOISPULLDOWN(GPIO) (((gpio) & GPIOPULLTYPEMASK)==gpiopulldowntype) + + +#define PA0 ((0<<8)+0) +#define PA1 ((0<<8)+1) +#define PA2 ((0<<8)+2) +#define PA3 ((0<<8)+3) +#define PA4 ((0<<8)+4) +#define PA5 ((0<<8)+5) +#define PA6 ((0<<8)+6) +#define PA7 ((0<<8)+7) +#define PA8 ((0<<8)+8) +#define PA9 ((0<<8)+9) +#define PA10 ((0<<8)+10) +#define PA11 ((0<<8)+11) +#define PA12 ((0<<8)+12) +#define PA13 ((0<<8)+13) +#define PA14 ((0<<8)+14) +#define PA15 ((0<<8)+15) +#define PAX ((0<<8)+255) +#define PB0 ((1<<8)+0) +#define PB1 ((1<<8)+1) +#define PB2 ((1<<8)+2) +#define PB3 ((1<<8)+3) +#define PB4 ((1<<8)+4) +#define PB5 ((1<<8)+5) +#define PB6 ((1<<8)+6) +#define PB7 ((1<<8)+7) +#define PB8 ((1<<8)+8) +#define PB9 ((1<<8)+9) +#define PB10 ((1<<8)+10) +#define PB11 ((1<<8)+11) +#define PB12 ((1<<8)+12) +#define PB13 ((1<<8)+13) +#define PB14 ((1<<8)+14) +#define PB15 ((1<<8)+15) +#define PBX ((1<<8)+255) +#define PC0 ((2<<8)+0) +#define PC1 ((2<<8)+1) +#define PC2 ((2<<8)+2) +#define PC3 ((2<<8)+3) +#define PC4 ((2<<8)+4) +#define PC5 ((2<<8)+5) +#define PC6 ((2<<8)+6) +#define PC7 ((2<<8)+7) +#define PC8 ((2<<8)+8) +#define PC9 ((2<<8)+9) +#define PC10 ((2<<8)+10) +#define PC11 ((2<<8)+11) +#define PC12 ((2<<8)+12) +#define PC13 ((2<<8)+13) +#define PC14 ((2<<8)+14) +#define PC15 ((2<<8)+15) +#define PCX ((2<<8)+255) +#define PD0 ((3<<8)+0) +#define PD1 ((3<<8)+1) +#define PD2 ((3<<8)+2) +#define PD3 ((3<<8)+3) +#define PD4 ((3<<8)+4) +#define PD5 ((3<<8)+5) +#define PD6 ((3<<8)+6) +#define PD7 ((3<<8)+7) +#define PD8 ((3<<8)+8) +#define PD9 ((3<<8)+9) +#define PD10 ((3<<8)+10) +#define PD11 ((3<<8)+11) +#define PD12 ((3<<8)+12) +#define PD13 ((3<<8)+13) +#define PD14 ((3<<8)+14) +#define PD15 ((3<<8)+15) +#define PDX ((3<<8)+255) +#define PE0 ((4<<8)+0) +#define PE1 ((4<<8)+1) +#define PE2 ((4<<8)+2) +#define PE3 ((4<<8)+3) +#define PE4 ((4<<8)+4) +#define PE5 ((4<<8)+5) +#define PE6 ((4<<8)+6) +#define PE7 ((4<<8)+7) +#define PE8 ((4<<8)+8) +#define PE9 ((4<<8)+9) +#define PE10 ((4<<8)+10) +#define PE11 ((4<<8)+11) +#define PE12 ((4<<8)+12) +#define PE13 ((4<<8)+13) +#define PE14 ((4<<8)+14) +#define PE15 ((4<<8)+15) +#define PEX ((4<<8)+255) +#define PF0 ((5<<8)+0) +#define PF1 ((5<<8)+1) +#define PF2 ((5<<8)+2) +#define PF3 ((5<<8)+3) +#define PF4 ((5<<8)+4) +#define PF5 ((5<<8)+5) +#define PF6 ((5<<8)+6) +#define PF7 ((5<<8)+7) +#define PF8 ((5<<8)+8) +#define PF9 ((5<<8)+9) +#define PF10 ((5<<8)+10) +#define PF11 ((5<<8)+11) +#define PF12 ((5<<8)+12) +#define PF13 ((5<<8)+13) +#define PF14 ((5<<8)+14) +#define PF15 ((5<<8)+15) +#define PFX ((5<<8)+255) +#define PG0 ((6<<8)+0) +#define PG1 ((6<<8)+1) +#define PG2 ((6<<8)+2) +#define PG3 ((6<<8)+3) +#define PG4 ((6<<8)+4) +#define PG5 ((6<<8)+5) +#define PG6 ((6<<8)+6) +#define PG7 ((6<<8)+7) +#define PG8 ((6<<8)+8) +#define PG9 ((6<<8)+9) +#define PG10 ((6<<8)+10) +#define PG11 ((6<<8)+11) +#define PG12 ((6<<8)+12) +#define PG13 ((6<<8)+13) +#define PG14 ((6<<8)+14) +#define PG15 ((6<<8)+15) +#define PGX ((6<<8)+255) +#define PH0 ((7<<8)+0) +#define PH1 ((7<<8)+1) +#define PH2 ((7<<8)+2) +#define PH3 ((7<<8)+3) +#define PH4 ((7<<8)+4) +#define PH5 ((7<<8)+5) +#define PH6 ((7<<8)+6) +#define PH7 ((7<<8)+7) +#define PH8 ((7<<8)+8) +#define PH9 ((7<<8)+9) +#define PH10 ((7<<8)+10) +#define PH11 ((7<<8)+11) +#define PH12 ((7<<8)+12) +#define PH13 ((7<<8)+13) +#define PH14 ((7<<8)+14) +#define PH15 ((7<<8)+15) +#define PHX ((7<<8)+255) +#define PI0 ((8<<8)+0) +#define PI1 ((8<<8)+1) +#define PI2 ((8<<8)+2) +#define PI3 ((8<<8)+3) +#define PI4 ((8<<8)+4) +#define PI5 ((8<<8)+5) +#define PI6 ((8<<8)+6) +#define PI7 ((8<<8)+7) +#define PI8 ((8<<8)+8) +#define PI9 ((8<<8)+9) +#define PI10 ((8<<8)+10) +#define PI11 ((8<<8)+11) +#define PI12 ((8<<8)+12) +#define PI13 ((8<<8)+13) +#define PI14 ((8<<8)+14) +#define PI15 ((8<<8)+15) +#define PIX ((8<<8)+255) +#define PJ0 ((9<<8)+0) +#define PJ1 ((9<<8)+1) +#define PJ2 ((9<<8)+2) +#define PJ3 ((9<<8)+3) +#define PJ4 ((9<<8)+4) +#define PJ5 ((9<<8)+5) +#define PJ6 ((9<<8)+6) +#define PJ7 ((9<<8)+7) +#define PJ8 ((9<<8)+8) +#define PJ9 ((9<<8)+9) +#define PJ10 ((9<<8)+10) +#define PJ11 ((9<<8)+11) +#define PJ12 ((9<<8)+12) +#define PJ13 ((9<<8)+13) +#define PJ14 ((9<<8)+14) +#define PJ15 ((9<<8)+15) +#define PJX ((9<<8)+255) +#define PK0 ((10<<8)+0) +#define PK1 ((10<<8)+1) +#define PK2 ((10<<8)+2) +#define PK3 ((10<<8)+3) +#define PK4 ((10<<8)+4) +#define PK5 ((10<<8)+5) +#define PK6 ((10<<8)+6) +#define PK7 ((10<<8)+7) +#define PK8 ((10<<8)+8) +#define PK9 ((10<<8)+9) +#define PK10 ((10<<8)+10) +#define PK11 ((10<<8)+11) +#define PK12 ((10<<8)+12) +#define PK13 ((10<<8)+13) +#define PK14 ((10<<8)+14) +#define PK15 ((10<<8)+15) +#define PKX ((10<<8)+255) +#define PL0 ((11<<8)+0) +#define PL1 ((11<<8)+1) +#define PL2 ((11<<8)+2) +#define PL3 ((11<<8)+3) +#define PL4 ((11<<8)+4) +#define PL5 ((11<<8)+5) +#define PL6 ((11<<8)+6) +#define PL7 ((11<<8)+7) +#define PL8 ((11<<8)+8) +#define PL9 ((11<<8)+9) +#define PL10 ((11<<8)+10) +#define PL11 ((11<<8)+11) +#define PL12 ((11<<8)+12) +#define PL13 ((11<<8)+13) +#define PL14 ((11<<8)+14) +#define PL15 ((11<<8)+15) +#define PLX ((11<<8)+255) +#define PM0 ((12<<8)+0) +#define PM1 ((12<<8)+1) +#define PM2 ((12<<8)+2) +#define PM3 ((12<<8)+3) +#define PM4 ((12<<8)+4) +#define PM5 ((12<<8)+5) +#define PM6 ((12<<8)+6) +#define PM7 ((12<<8)+7) +#define PM8 ((12<<8)+8) +#define PM9 ((12<<8)+9) +#define PM10 ((12<<8)+10) +#define PM11 ((12<<8)+11) +#define PM12 ((12<<8)+12) +#define PM13 ((12<<8)+13) +#define PM14 ((12<<8)+14) +#define PM15 ((12<<8)+15) +#define PMX ((12<<8)+255) +#define PN0 ((13<<8)+0) +#define PN1 ((13<<8)+1) +#define PN2 ((13<<8)+2) +#define PN3 ((13<<8)+3) +#define PN4 ((13<<8)+4) +#define PN5 ((13<<8)+5) +#define PN6 ((13<<8)+6) +#define PN7 ((13<<8)+7) +#define PN8 ((13<<8)+8) +#define PN9 ((13<<8)+9) +#define PN10 ((13<<8)+10) +#define PN11 ((13<<8)+11) +#define PN12 ((13<<8)+12) +#define PN13 ((13<<8)+13) +#define PN14 ((13<<8)+14) +#define PN15 ((13<<8)+15) +#define PNX ((13<<8)+255) +#define PO0 ((14<<8)+0) +#define PO1 ((14<<8)+1) +#define PO2 ((14<<8)+2) +#define PO3 ((14<<8)+3) +#define PO4 ((14<<8)+4) +#define PO5 ((14<<8)+5) +#define PO6 ((14<<8)+6) +#define PO7 ((14<<8)+7) +#define PO8 ((14<<8)+8) +#define PO9 ((14<<8)+9) +#define PO10 ((14<<8)+10) +#define PO11 ((14<<8)+11) +#define PO12 ((14<<8)+12) +#define PO13 ((14<<8)+13) +#define PO14 ((14<<8)+14) +#define PO15 ((14<<8)+15) +#define POX ((14<<8)+255) +#define PP0 ((15<<8)+0) +#define PP1 ((15<<8)+1) +#define PP2 ((15<<8)+2) +#define PP3 ((15<<8)+3) +#define PP4 ((15<<8)+4) +#define PP5 ((15<<8)+5) +#define PP6 ((15<<8)+6) +#define PP7 ((15<<8)+7) +#define PP8 ((15<<8)+8) +#define PP9 ((15<<8)+9) +#define PP10 ((15<<8)+10) +#define PP11 ((15<<8)+11) +#define PP12 ((15<<8)+12) +#define PP13 ((15<<8)+13) +#define PP14 ((15<<8)+14) +#define PP15 ((15<<8)+15) +#define PPX ((15<<8)+255) +#define PQ0 ((16<<8)+0) +#define PQ1 ((16<<8)+1) +#define PQ2 ((16<<8)+2) +#define PQ3 ((16<<8)+3) +#define PQ4 ((16<<8)+4) +#define PQ5 ((16<<8)+5) +#define PQ6 ((16<<8)+6) +#define PQ7 ((16<<8)+7) +#define PQ8 ((16<<8)+8) +#define PQ9 ((16<<8)+9) +#define PQ10 ((16<<8)+10) +#define PQ11 ((16<<8)+11) +#define PQ12 ((16<<8)+12) +#define PQ13 ((16<<8)+13) +#define PQ14 ((16<<8)+14) +#define PQ15 ((16<<8)+15) +#define PQX ((16<<8)+255) +#define PR0 ((17<<8)+0) +#define PR1 ((17<<8)+1) +#define PR2 ((17<<8)+2) +#define PR3 ((17<<8)+3) +#define PR4 ((17<<8)+4) +#define PR5 ((17<<8)+5) +#define PR6 ((17<<8)+6) +#define PR7 ((17<<8)+7) +#define PR8 ((17<<8)+8) +#define PR9 ((17<<8)+9) +#define PR10 ((17<<8)+10) +#define PR11 ((17<<8)+11) +#define PR12 ((17<<8)+12) +#define PR13 ((17<<8)+13) +#define PR14 ((17<<8)+14) +#define PR15 ((17<<8)+15) +#define PRX ((17<<8)+255) +#define PS0 ((18<<8)+0) +#define PS1 ((18<<8)+1) +#define PS2 ((18<<8)+2) +#define PS3 ((18<<8)+3) +#define PS4 ((18<<8)+4) +#define PS5 ((18<<8)+5) +#define PS6 ((18<<8)+6) +#define PS7 ((18<<8)+7) +#define PS8 ((18<<8)+8) +#define PS9 ((18<<8)+9) +#define PS10 ((18<<8)+10) +#define PS11 ((18<<8)+11) +#define PS12 ((18<<8)+12) +#define PS13 ((18<<8)+13) +#define PS14 ((18<<8)+14) +#define PS15 ((18<<8)+15) +#define PSX ((18<<8)+255) +#define PT0 ((19<<8)+0) +#define PT1 ((19<<8)+1) +#define PT2 ((19<<8)+2) +#define PT3 ((19<<8)+3) +#define PT4 ((19<<8)+4) +#define PT5 ((19<<8)+5) +#define PT6 ((19<<8)+6) +#define PT7 ((19<<8)+7) +#define PT8 ((19<<8)+8) +#define PT9 ((19<<8)+9) +#define PT10 ((19<<8)+10) +#define PT11 ((19<<8)+11) +#define PT12 ((19<<8)+12) +#define PT13 ((19<<8)+13) +#define PT14 ((19<<8)+14) +#define PT15 ((19<<8)+15) +#define PTX ((19<<8)+255) +#define PU0 ((20<<8)+0) +#define PU1 ((20<<8)+1) +#define PU2 ((20<<8)+2) +#define PU3 ((20<<8)+3) +#define PU4 ((20<<8)+4) +#define PU5 ((20<<8)+5) +#define PU6 ((20<<8)+6) +#define PU7 ((20<<8)+7) +#define PU8 ((20<<8)+8) +#define PU9 ((20<<8)+9) +#define PU10 ((20<<8)+10) +#define PU11 ((20<<8)+11) +#define PU12 ((20<<8)+12) +#define PU13 ((20<<8)+13) +#define PU14 ((20<<8)+14) +#define PU15 ((20<<8)+15) +#define PUX ((20<<8)+255) +#define PV0 ((21<<8)+0) +#define PV1 ((21<<8)+1) +#define PV2 ((21<<8)+2) +#define PV3 ((21<<8)+3) +#define PV4 ((21<<8)+4) +#define PV5 ((21<<8)+5) +#define PV6 ((21<<8)+6) +#define PV7 ((21<<8)+7) +#define PV8 ((21<<8)+8) +#define PV9 ((21<<8)+9) +#define PV10 ((21<<8)+10) +#define PV11 ((21<<8)+11) +#define PV12 ((21<<8)+12) +#define PV13 ((21<<8)+13) +#define PV14 ((21<<8)+14) +#define PV15 ((21<<8)+15) +#define PVX ((21<<8)+255) +#define PW0 ((22<<8)+0) +#define PW1 ((22<<8)+1) +#define PW2 ((22<<8)+2) +#define PW3 ((22<<8)+3) +#define PW4 ((22<<8)+4) +#define PW5 ((22<<8)+5) +#define PW6 ((22<<8)+6) +#define PW7 ((22<<8)+7) +#define PW8 ((22<<8)+8) +#define PW9 ((22<<8)+9) +#define PW10 ((22<<8)+10) +#define PW11 ((22<<8)+11) +#define PW12 ((22<<8)+12) +#define PW13 ((22<<8)+13) +#define PW14 ((22<<8)+14) +#define PW15 ((22<<8)+15) +#define PWX ((22<<8)+255) +#define PX0 ((23<<8)+0) +#define PX1 ((23<<8)+1) +#define PX2 ((23<<8)+2) +#define PX3 ((23<<8)+3) +#define PX4 ((23<<8)+4) +#define PX5 ((23<<8)+5) +#define PX6 ((23<<8)+6) +#define PX7 ((23<<8)+7) +#define PX8 ((23<<8)+8) +#define PX9 ((23<<8)+9) +#define PX10 ((23<<8)+10) +#define PX11 ((23<<8)+11) +#define PX12 ((23<<8)+12) +#define PX13 ((23<<8)+13) +#define PX14 ((23<<8)+14) +#define PX15 ((23<<8)+15) +#define PXX ((23<<8)+255) +#define PY0 ((24<<8)+0) +#define PY1 ((24<<8)+1) +#define PY2 ((24<<8)+2) +#define PY3 ((24<<8)+3) +#define PY4 ((24<<8)+4) +#define PY5 ((24<<8)+5) +#define PY6 ((24<<8)+6) +#define PY7 ((24<<8)+7) +#define PY8 ((24<<8)+8) +#define PY9 ((24<<8)+9) +#define PY10 ((24<<8)+10) +#define PY11 ((24<<8)+11) +#define PY12 ((24<<8)+12) +#define PY13 ((24<<8)+13) +#define PY14 ((24<<8)+14) +#define PY15 ((24<<8)+15) +#define PYX ((24<<8)+255) +#define PZ0 ((25<<8)+0) +#define PZ1 ((25<<8)+1) +#define PZ2 ((25<<8)+2) +#define PZ3 ((25<<8)+3) +#define PZ4 ((25<<8)+4) +#define PZ5 ((25<<8)+5) +#define PZ6 ((25<<8)+6) +#define PZ7 ((25<<8)+7) +#define PZ8 ((25<<8)+8) +#define PZ9 ((25<<8)+9) +#define PZ10 ((25<<8)+10) +#define PZ11 ((25<<8)+11) +#define PZ12 ((25<<8)+12) +#define PZ13 ((25<<8)+13) +#define PZ14 ((25<<8)+14) +#define PZ15 ((25<<8)+15) +#define PZX ((25<<8)+255) + + +#ifdef __cplusplus + } +#endif +#endif //GPIO_H + + + + + + + + + + + + diff --git a/lib/src/includes/hexviewer.h b/lib/src/includes/hexviewer.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/hexviewer.h @@ -0,0 +1,52 @@ +/*------------------------------------------------------------------------------ +#-- This file is a part of the libuc, microcontroler library +#-- Copyright (C) 2011, Alexis Jeandet +#-- +#-- This program is free software; you can redistribute it and/or modify +#-- it under the terms of the GNU General Public License as published by +#-- the Free Software Foundation; either version 3 of the License, or +#-- (at your option) any later version. +#-- +#-- This program is distributed in the hope that it will be useful, +#-- but WITHOUT ANY WARRANTY; without even the implied warranty of +#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +#-- GNU General Public License for more details. +#-- +#-- You should have received a copy of the GNU General Public License +#-- along with this program; if not, write to the Free Software +#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +#------------------------------------------------------------------------------- +#-- Author : Alexis Jeandet +#-- Mail : alexis.jeandet@gmail.com +#-------------------------------------------------------------------------------*/ +#ifndef HEXVIEWER_H +#define HEXVIEWER_H + +#include + + + + +extern void hexviewershow(const char* table,unsigned int size,unsigned int offset); + + +#endif + + + + + + + + + + + + + + + + + + + diff --git a/lib/src/includes/i2c.h b/lib/src/includes/i2c.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/i2c.h @@ -0,0 +1,74 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef I2C_H +#define I2C_H +#include +#include +#include + +#ifdef __cplusplus + extern "C" { +#endif + +typedef int i2c_t; + +#define i2c1 0 +#define i2c2 1 +#define i2c3 2 +#define i2c4 3 +#define i2c5 4 +#define i2c6 5 +#define i2c7 6 +#define i2c8 7 +#define i2c9 8 + +extern int i2ctimeout; + +extern i2c_t i2copen(int count); +extern i2c_t i2copenandconfig(int count ,uint32_t cfg,uint32_t speed,uint32_t SDA,uint32_t SCL); +extern int i2cclose(i2c_t dev); +extern int i2csetpins(i2c_t dev,uint32_t SDA,uint32_t SCL); +extern int i2cenable(i2c_t dev); +extern int i2cdisable(i2c_t dev); +//extern int i2csetconfig(i2c_t dev); +extern int i2csetspeed(i2c_t dev,uint32_t speed); +//extern int i2csetdatabits(i2c_t* dev,uartbits_t databits); +extern int i2cwrite(i2c_t dev,char address,char* data,int count); +extern int i2cread(i2c_t dev,char address,char* data,int count); +extern int i2cbusy(i2c_t dev); +extern int i2cStatusCheck(i2c_t dev,int32_t flagMask); +#ifdef __cplusplus + } +#endif +#endif //I2C_H + + + + + + + + + + + + diff --git a/lib/src/includes/ina226.h b/lib/src/includes/ina226.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/ina226.h @@ -0,0 +1,104 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2011, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef INA226_H +#define INA226_H + +#include +#include + +typedef struct INA226_t +{ + i2c_t i2cdev; + uint8_t devAddress; + uint32_t shuntmOhm; + uint32_t CurrentRangeuAmp; +}INA226_t; + +extern int ina226open(INA226_t* dev,i2c_t i2cdev,uint16_t config,uint8_t A0,uint8_t A1,uint32_t shuntmOhm, uint32_t CurrentRangeuAmp); +extern uint16_t ina226getID(INA226_t* dev); +extern int ina226calibrate(INA226_t* dev,uint32_t shuntmOhm, uint32_t CurrentRangeuAmp); +extern uint32_t ina226getBusVoltage(INA226_t* dev); +extern uint32_t ina226getPower(INA226_t* dev); +extern int32_t ina226getCurrent(INA226_t* dev); +extern uint16_t ina226getReg(INA226_t* dev,char reg); +extern int ina226setReg(INA226_t* dev,char reg,int16_t value); + + +#define INA226_I2C_ADDRESS 0x40 + + +#define INA226_Die_ID_Reg 0xFF +#define INA226_Configuration_Reg 0 +#define INA226_Shunt_Voltage_Reg 1 +#define INA226_Bus_Voltage_Reg 2 +#define INA226_Power_Reg 3 +#define INA226_Current_Reg 4 +#define INA226_Calibration_Reg 5 +#define INA226_Mask_Enable_Reg 6 +#define INA226_Alert_Limit_Reg 7 + +#define INA226_AVERAGES_1 0 +#define INA226_AVERAGES_4 (1<<9) +#define INA226_AVERAGES_16 (2<<9) +#define INA226_AVERAGES_64 (3<<9) +#define INA226_AVERAGES_128 (4<<9) +#define INA226_AVERAGES_256 (5<<9) +#define INA226_AVERAGES_512 (6<<9) +#define INA226_AVERAGES_1024 (7<<9) + +#define INA226_BUS_CONV_140us 0 +#define INA226_BUS_CONV_204us (1<<6) +#define INA226_BUS_CONV_332us (2<<6) +#define INA226_BUS_CONV_588us (3<<6) +#define INA226_BUS_CONV_1100us (4<<6) +#define INA226_BUS_CONV_2116us (5<<6) +#define INA226_BUS_CONV_4156us (6<<6) +#define INA226_BUS_CONV_8244us (7<<6) + +#define INA226_SHUNT_CONV_140us 0 +#define INA226_SHUNT_CONV_204us (1<<3) +#define INA226_SHUNT_CONV_332us (2<<3) +#define INA226_SHUNT_CONV_588us (3<<3) +#define INA226_SHUNT_CONV_1100us (4<<3) +#define INA226_SHUNT_CONV_2116us (5<<3) +#define INA226_SHUNT_CONV_4156us (6<<3) +#define INA226_SHUNT_CONV_8244us (7<<3) + +#define INA226_MODE_POWER_DOWN 0 +#define INA226_MODE_SHUNT_VOLTAGE_TRIGGERRED 1 +#define INA226_MODE_BUS_VOLTAGE_TRIGGERRED 2 +#define INA226_MODE_SHUNT_AND_BUS_TRIGGERRED 3 +#define INA226_MODE_SHUNT_VOLTAGE_CONTINUOUS 5 +#define INA226_MODE_BUS_VOLTAGE_CONTINUOUS 6 +#define INA226_MODE_SHUNT_AND_BUS_CONTINUOUS 7 + + + + +#endif + + + + + + + diff --git a/lib/src/includes/libucfs.h b/lib/src/includes/libucfs.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/libucfs.h @@ -0,0 +1,78 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef FS_H +#define FS_H +#include +#include + +struct fs_str +{ + UHANDLE fat; +}; + +typedef struct fs_str filesys_t; + + + +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/lib/src/includes/libucstrings.h b/lib/src/includes/libucstrings.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/libucstrings.h @@ -0,0 +1,32 @@ +/*------------------------------------------------------------------------------ +#-- This file is a part of the libuc, microcontroler library +#-- Copyright (C) 2011, Alexis Jeandet +#-- +#-- This program is free software; you can redistribute it and/or modify +#-- it under the terms of the GNU General Public License as published by +#-- the Free Software Foundation; either version 3 of the License, or +#-- (at your option) any later version. +#-- +#-- This program is distributed in the hope that it will be useful, +#-- but WITHOUT ANY WARRANTY; without even the implied warranty of +#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +#-- GNU General Public License for more details. +#-- +#-- You should have received a copy of the GNU General Public License +#-- along with this program; if not, write to the Free Software +#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +#------------------------------------------------------------------------------- +#-- Author : Alexis Jeandet +#-- Mail : alexis.jeandet@gmail.com +#-------------------------------------------------------------------------------*/ + +#include + +extern streamdevice* stdo; + +void clearstr(char* a); +void int2hex(unsigned long a,char*b); +int libucprintf(const char* format,...); +int libucfprintf(streamdevice* device,const char* format,...); +int libucscanf(const char*,...); +void libucprintchartable(char* table,int size,const char* format,const char* separator); diff --git a/lib/src/includes/mbr.h b/lib/src/includes/mbr.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/mbr.h @@ -0,0 +1,71 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef MBR_H +#define MBR_H +#include +#include + +#define BootFlagoffset 0 +#define TypeCodeoffset 4 +#define LBABeginoffset 8 +#define NumOfSecoffset 12 + +#define MBRBadMbr 1 +#define MBRBabArg 2 +#define MBRReadErr 3 +#define MBRnoErr 0 + +#define isFat32(TypeCode) (((TypeCode)==0x0b)||((TypeCode)==0x0c)) + +typedef struct dikpartition +{ + char TypeCode; + unsigned int LBABegin; + unsigned int NumOfSec; + blkdevice* phy; +}dikpartition; + + +int mbropen(blkdevice* phy,dikpartition* part,char partNum); + + +#endif + + + + + + + + + + + + + + + + + + + + diff --git a/lib/src/includes/sdcard.h b/lib/src/includes/sdcard.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/sdcard.h @@ -0,0 +1,118 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef SDCARD_H +#define SDCARD_H +#include "blkdevice.h" +#include +#include + +/* MMC/SD command */ +#define CMD0 (0) /* GO_IDLE_STATE */ +#define CMD1 (1) /* SEND_OP_COND (MMC) */ +#define ACMD41 (0x80+41) /* SEND_OP_COND (SDC) */ +#define CMD8 (8) /* SEND_IF_COND */ +#define CMD9 (9) /* SEND_CSD */ +#define CMD10 (10) /* SEND_CID */ +#define CMD12 (12) /* STOP_TRANSMISSION */ +#define ACMD13 (0x80+13) /* SD_STATUS (SDC) */ +#define CMD16 (16) /* SET_BLOCKLEN */ +#define CMD17 (17) /* READ_SINGLE_BLOCK */ +#define CMD18 (18) /* READ_MULTIPLE_BLOCK */ +#define CMD23 (23) /* SET_BLOCK_COUNT (MMC) */ +#define ACMD23 (0x80+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */ +#define CMD24 (24) /* WRITE_BLOCK */ +#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */ +#define CMD32 (32) /* ERASE_ER_BLK_START */ +#define CMD33 (33) /* ERASE_ER_BLK_END */ +#define CMD38 (38) /* ERASE */ +#define CMD55 (55) /* APP_CMD */ +#define CMD58 (58) /* READ_OCR */ + +/* Card type flags (CardType) */ +#define CT_MMC 0x01 /* MMC ver 3 */ +#define CT_SD1 0x02 /* SD ver 1 */ +#define CT_SD2 0x04 /* SD ver 2 */ +#define CT_SDC (CT_SD1|CT_SD2) /* SD */ +#define CT_BLOCK 0x08 /* Block addressing */ + +struct sdcard_str +{ + UHANDLE phy; + void (*rcvr_mmc) (UHANDLE phy,char *buff,uint32_t bc); + void (*xmit_mmc) (UHANDLE phy,const char *buff,uint32_t bc); + void (*setspeed) (UHANDLE phy,uint32_t speed); + uint32_t (*getspeed) (UHANDLE phy); + DSTATUS Stat; + char CardType; +}; + +typedef volatile struct sdcard_str sdcardDev; + +extern void sdcardmake(sdcardDev* sdcard,UHANDLE phy,void (*rcvr_mmc) (UHANDLE,char *,uint32_t ),void (*xmit_mmc) (UHANDLE,const char *,uint32_t ),void (*setspeed) (UHANDLE phy,uint32_t speed),uint32_t (*getspeed) (UHANDLE phy)); +extern void sdcardmakeblkdev(blkdevice* dev,sdcardDev* sdcard, blkdevselect_t select,blkdevpower_t power,blkdevdetect_t detect,blkdevwriteprotected_t writeprotected); + +extern int sdcardselect (blkdeviceptr _this); +extern void sdcarddeselect (blkdeviceptr _this); +extern int sdcardwait_ready (sdcardDev* sdcard); +extern int sdcardxmit_datablock (sdcardDev* sdcard,const char *buff,char token); +extern int sdcardrcvr_datablock (sdcardDev* sdcard,char *buff,uint32_t btr); +extern char sdcardsend_cmd (blkdeviceptr _this,char cmd,uint32_t arg); + +extern DSTATUS sdcarddisk_status (blkdeviceptr _this); +extern DSTATUS sdcarddisk_initialize (blkdeviceptr _this); +extern DRESULT sdcarddisk_read (blkdeviceptr _this,char *buff,uint32_t sector,char count); +extern DRESULT sdcarddisk_write (blkdeviceptr _this,const char *buff,uint32_t sector,char count); +extern DRESULT sdcarddisk_ioctl (blkdeviceptr _this,char ctrl,void *buff); + +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/lib/src/includes/spi.h b/lib/src/includes/spi.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/spi.h @@ -0,0 +1,148 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +/* + TODO: + Add SPI slave mode + Add interrupt interface +*/ + +#ifndef SPI_H +#define SPI_H +#include +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/* +typedef struct spi_t +{ + void* _dev; + int cfg; + int speed; +}spi_t;*/ + +typedef int spi_t; + + #define spi1 0 + #define spi2 1 + #define spi3 2 + #define spi4 3 + #define spi5 4 + #define spi6 5 + #define spi7 6 + #define spi8 7 + #define spi9 8 + + +typedef enum +{ + spi4bits = 0x3, + spi5bits = 0x4, + spi6bits = 0x5, + spi7bits = 0x6, + spi8bits = 0x7, + spi9bits = 0x8, + spi10bits = 0x9, + spi11bits = 0xA, + spi12bits = 0xB, + spi13bits = 0xC, + spi14bits = 0xD, + spi15bits = 0xE, + spi16bits = 0xF +}spibits_t; + +#define SPIBITSMASK 0xF + +typedef enum +{ + spislave = 0x00, + spimaster = 0x10 +}spimode_t; + +#define SPIMODEMASK 0x10 + +typedef enum +{ + spiclkinhlow = 0x00, + spiclkinhhigh = 0x20 +}spiclkinhlvl_t; + +#define SPICLKINHLVLMASK 0x20 + + +typedef enum +{ + spiclkfirstedge = 0x00, + spiclksecondedge = 0x40 +}spiclkphase_t; + +#define SPICLKPHASEMASK 0x40 + +typedef enum +{ + spimsbfirst = 0x00, + spilsbfirst = 0x80 +}spibitorder_t; + +#define SPIBITORDERMASK 0x80 + + +extern spi_t spiopen(int count); +extern spi_t spiopenandconfig(int count,uint32_t cfg,uint32_t speed,uint32_t MOSIpin,uint32_t MISOpin,uint32_t SCKpin,uint32_t SCSpin); +extern int spiclose(spi_t spidev); +extern int spisetpins(spi_t spidev,uint32_t MOSIpin,uint32_t MISOpin,uint32_t SCKpin,uint32_t SCSpin); +extern int spienable(spi_t spidev); +extern int spidisable(spi_t spidev); +extern int spisetconfig(spi_t spidev,uint32_t config,uint32_t speed); +extern int spisetspeed(spi_t spidev, uint32_t speed); +extern int spisetbitorder(spi_t spidev,spibitorder_t order); +extern int spisetdatabits(spi_t spidev,spibits_t bitscnt); +extern int spisetclkinhlevel(spi_t spidev,spiclkinhlvl_t level); +extern int spisetclkphase(spi_t spidev,spiclkphase_t phase); +extern int spiputw(spi_t spidev,uint16_t data); +extern uint16_t spigetw(spi_t spidev); +extern int spiputs(spi_t spidev,char* s); +extern int spigets(spi_t spidev,char* s); +extern int spiputnw(spi_t spidev,uint16_t* w,int n); +extern int spigetnw(spi_t spidev,uint16_t* w,int n); +extern int spiputnc(spi_t spidev,char* c,int n); +extern int spigetnc(spi_t spidev,char* c,int n); +extern int spiavailiabledata(spi_t spidev); + +#ifdef __cplusplus + } +#endif +#endif //SPI_H + + + + + + + + + + + + diff --git a/lib/src/includes/streamdevices.h b/lib/src/includes/streamdevices.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/streamdevices.h @@ -0,0 +1,60 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef STREAMDEVICES_H +#define STREAMDEVICES_H +#include +#include + +typedef struct streamdevice* streamdeviceptr; + +typedef int (*write_t)(streamdeviceptr device,void* data,int size, int n); +typedef int (*read_t)(streamdeviceptr device,void* data,int size, int n); +typedef int (*setpos_t)(streamdeviceptr device,int pos); +typedef int (*close_t)(streamdeviceptr device); + +typedef volatile struct streamdevice +{ + write_t write; + read_t read; + setpos_t setpos; + close_t close; + volatile uint32_t streamPt; + volatile UHANDLE _stream; + volatile uint32_t mode; +}streamdevice; + +#endif + + + + + + + + + + + + + + + diff --git a/lib/src/includes/uart.h b/lib/src/includes/uart.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/uart.h @@ -0,0 +1,118 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef UART_H +#define UART_H +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* +typedef volatile struct uart_t +{ + volatile void* _dev; + volatile int cfg; + volatile int speed; +}uart_t; + */ + +typedef int uart_t; +#define uart1 0 +#define uart2 1 +#define uart3 2 +#define uart4 3 +#define uart5 4 +#define uart6 5 +#define uart7 6 +#define uart8 7 +#define uart9 8 + + +typedef enum +{ + uartparitynone = 0x1, + uartparityeven = 0x2, + uartparityodd = 0x3 +}uartparity_t; + +#define UARTPARITYMASK 0x3 + +typedef enum +{ + uart7bits = 0x4, + uart8bits = 0x8, + uart9bits = 0xC +}uartbits_t; + +#define UARTBITSMASK 0xC + + +typedef enum +{ + uarthalfstop = 0x10, + uartonestop = 0x20, + uartonehalfstop = 0x30, + uarttwostop = 0x40 +}uartstopbits_t; + +#define UARTSTOPBITSMASK 0x70 + +extern uart_t uartopen(int count); +extern uart_t uartopenandconfig(int count ,uint32_t cfg,uint32_t speed,uint32_t TXpin,uint32_t RXpin,uint32_t RTSpin,uint32_t CTSpin); +extern int uartclose(uart_t uart); +extern int uartsetpins(uart_t uart,uint32_t TXpin,uint32_t RXpin,uint32_t RTSpin,uint32_t CTSpin); +extern int uartenable(uart_t uart); +extern int uartdisable(uart_t uart); +extern int uartsetconfig(uart_t uart,uint32_t cfg,uint32_t speed); +extern int uartsetspeed(uart_t uart,uint32_t speed); +extern int uartsetparity(uart_t uart,uartparity_t parity); +extern int uartsetdatabits(uart_t uart,uartbits_t databits); +extern int uartsetstopbits(uart_t uart,uartstopbits_t stopbits); +extern int uartputc(uart_t uart,char c); +extern char uartgetc(uart_t uart); +extern int uartputs(uart_t uart,char* s); +extern int uartgets(uart_t uart,char* s); +extern int uartputnc(uart_t uart,char* c,int n); +extern int uartgetnc(uart_t uart,char* c,int n); +extern int uartavailiabledata(uart_t uart); + +extern int uartmkstreamdev(uart_t uart,streamdevice* strdev); + +#ifdef __cplusplus +} +#endif +#endif //SPI_H + + + + + + + + + + + + diff --git a/lib/src/includes/ucdirent.h b/lib/src/includes/ucdirent.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/ucdirent.h @@ -0,0 +1,134 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef UCDIRENT_H +#define UCDIRENT_H +#include +#include +#include +#include +//#include + +#define ATTR_READ_ONLY 0x01 +#define ATTR_HIDDEN 0x02 +#define ATTR_SYSTEM 0x04 +#define ATTR_VOLUME_ID 0x08 +#define ATTR_DIRECTORY 0x10 +#define ATTR_ARCHIVE 0x20 +#define ATTR_LONGNAME 0x0F + +#define DIRENT_EndOfDir 1 +#define DIRENT_BabArg 2 +#define DIRENT_ReadErr 3 +#define DIRENT_LastSect 4 +#define DIRENT_BadSect 5 +#define DIRENT_noErr 0 + +typedef struct ucdirent* ucdirentptr; +typedef int (*getrootfirstent_t)(ucdirentptr entry); +typedef int (*nextdirent_t)(ucdirentptr entry); +typedef int (*getname_t)(ucdirentptr entry,char* name); + +typedef struct dirent +{ + unsigned char DIR_Name[16]; + unsigned char DIR_Attr; + unsigned char DIR_CrtTimeTenth; + unsigned short DIR_CrtTime; + unsigned short DIR_CrtDate; + unsigned short DIR_LstAccDate; + unsigned short DIR_FstClusHI; + unsigned short DIR_WrtTime; + unsigned short DIR_WrtDate; + unsigned short DIR_FstClustLO; + unsigned int DIR_FileSize; + unsigned int CurrentSec; + unsigned char Currententry; + UHANDLE fs; + getrootfirstent_t getrootfirstent; + nextdirent_t nextdirent; + getname_t getname; +}dirent; + +typedef struct ucdirent{ + uint8_t DIR_Name[16]; + uint8_t DIR_Attr; + uint8_t DIR_CrtTimeTenth; + uint16_t DIR_CrtTime; + uint16_t DIR_CrtDate; + uint16_t DIR_LstAccDate; + uint16_t DIR_FstClusHI; + uint16_t DIR_WrtTime; + uint16_t DIR_WrtDate; + uint16_t DIR_FstClustLO; + uint32_t DIR_FileSize; + uint32_t CurrentSec; + uint8_t Currententry; + UHANDLE fs; + getrootfirstent_t getrootfirstent; + nextdirent_t nextdirent; + getname_t getname; +}ucdirent; + + + +#define direntgetroot(dirent) (dirent).getrootfirstent(&dirent) +#define direntgetnext(dirent) (dirent).nextdirent(&dirent) + +#endif + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/lib/src/includes/uhandle.h b/lib/src/includes/uhandle.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/uhandle.h @@ -0,0 +1,29 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef UHANDLE_H +#define UHANDLE_H + +typedef volatile void* UHANDLE; + +#define uhandlevalide(HANDLE) ((HANDLE)!=0) + +#endif diff --git a/lib/src/includes/vs1053.h b/lib/src/includes/vs1053.h new file mode 100644 --- /dev/null +++ b/lib/src/includes/vs1053.h @@ -0,0 +1,78 @@ +/*------------------------------------------------------------------------------ +#-- This file is a part of the libuc, microcontroler library +#-- Copyright (C) 2011, Alexis Jeandet +#-- +#-- This program is free software; you can redistribute it and/or modify +#-- it under the terms of the GNU General Public License as published by +#-- the Free Software Foundation; either version 3 of the License, or +#-- (at your option) any later version. +#-- +#-- This program is distributed in the hope that it will be useful, +#-- but WITHOUT ANY WARRANTY; without even the implied warranty of +#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +#-- GNU General Public License for more details. +#-- +#-- You should have received a copy of the GNU General Public License +#-- along with this program; if not, write to the Free Software +#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +#------------------------------------------------------------------------------- +#-- Author : Alexis Jeandet +#-- Mail : alexis.jeandet@gmail.com +#-------------------------------------------------------------------------------*/ +#ifndef VS1053_H +#define VS1053_H +#include + +#define VSMODE 0 +#define VSSTATUS 1 +#define VSBASS 2 +#define VSCLOCKF 3 +#define VSDECODE_TIME 4 +#define VSAUDATA 5 +#define VSWRAM 6 +#define VSWRAMADDR 7 +#define VSHDAT0 8 +#define VSHDAT1 9 +#define VSAIADDR 0xA +#define VSVOL 0xB +#define VSAICTRL0 0xC +#define VSAICTRL1 0xD +#define VSAICTRL2 0xE +#define VSAICTRL3 0xF + +struct vs1053Regs +{ + sspDev SSP_device; + int a; +}; + +typedef struct vs1053Regs vs1053Dev; + +void vs1053open(vs1053Dev* codec,sspDev dev); +void vs1053softreset(vs1053Dev* dev); +int vs1053cmdread(vs1053Dev* dev,char address); +void vs1053cmdwrite(vs1053Dev* dev,char address,int value); + +extern void vs10XXclearXCS(); +extern void vs10XXsetXCS(); +extern int vs10XXDREQ(); + +#endif + + + + + + + + + + + + + + + + + + diff --git a/lib/src/lib.pro b/lib/src/lib.pro --- a/lib/src/lib.pro +++ b/lib/src/lib.pro @@ -5,8 +5,11 @@ SUBDIRS += stm32f4 SUBDIRS += common -# common/STREAMDEVICES \ -# common/STRINGS \ -# stm32f4 \ -# common +headers.files = includes/*.h \ + includes/GRAPHIC/CONTROLERS/*.h \ + includes/GRAPHIC/GUI/FONTS/*.h \ + includes/GRAPHIC/GUI/Widgets/*.h + +headers.path = $$[QT_INSTALL_HEADERS] +INSTALLS += headers diff --git a/lib/src/stm32f4/CORE/core.c b/lib/src/stm32f4/CORE/core.c --- a/lib/src/stm32f4/CORE/core.c +++ b/lib/src/stm32f4/CORE/core.c @@ -44,13 +44,13 @@ void delay_us(uint32_t value) if(value) { uint32_t tickperus=currentCpuFreq/(1000*10); - uint32_t SysTickSnap = SysTick->VAL+((value%100)*tickperus); + uint32_t tickCounterSnap = SysTick->VAL+((value%100)*tickperus); uint32_t targetVal=tickCounterSnap +(value/100); if(targetVal < tickCounterSnap) { while(tickCounter > targetVal); } - while((tickCounter < targetVal) | (SysTick->VALVAL - -/* -#define pll0useInternal 0 -#define pll0useMainOsc 1 -#define pll0useRTC 2 -*/ - -//#define pll0setClksrc(src) if((unsigned int)(src)<3) LPC_SC->CLKSRCSEL=(src) -//#define pll0getClksrc (LPC_SC->CLKSRCSEL & 3) -#ifdef __cplusplus - extern "C" { -#endif - -extern void coresetCpuFreq(unsigned int freq); -extern unsigned int coregetCpuFreq(); - - -#ifdef __cplusplus - } -#endif - - - - - - - - - - - - diff --git a/lib/src/stm32f4/CORE/core.pro b/lib/src/stm32f4/CORE/core.pro --- a/lib/src/stm32f4/CORE/core.pro +++ b/lib/src/stm32f4/CORE/core.pro @@ -1,10 +1,15 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) +OBJECTS_DIR = obj SOURCES += \ core.c -HEADERS += \ - $$(libuc2)/lib/includes/core.h +INCLUDEPATH += ../../includes \ + ../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../CPU/CMSIS/Include + + +UCMODEL=stm32f4 + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target diff --git a/lib/src/stm32f4/CPU/CMSIS/CMSIS.pri b/lib/src/stm32f4/CPU/CMSIS/CMSIS.pri --- a/lib/src/stm32f4/CPU/CMSIS/CMSIS.pri +++ b/lib/src/stm32f4/CPU/CMSIS/CMSIS.pri @@ -1,3 +1,13 @@ +CMSISHEADERS.files += \ + ../../../includes/stm32f4-arm-none-eabi-gcc/arm_common_tables.h \ + ../../../includes/stm32f4-arm-none-eabi-gcc/arm_math.h \ + ../../../includes/stm32f4-arm-none-eabi-gcc/core_cm0.h \ + ../../../includes/stm32f4-arm-none-eabi-gcc/core_cm3.h \ + ../../../includes/stm32f4-arm-none-eabi-gcc/core_cm4.h \ + ../../../includes/stm32f4-arm-none-eabi-gcc/core_cm4_simd.h \ + ../../../includes/stm32f4-arm-none-eabi-gcc/core_cmFunc.h \ + ../../../includes/stm32f4-arm-none-eabi-gcc/core_cmInstr.h \ + CMSIS/Include/*.h SOURCES += \ CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c \ @@ -242,21 +252,5 @@ SOURCES += \ CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c -HEADERS += \ - ../../../includes/stm32f4-arm-none-eabi-gcc/arm_common_tables.h \ - ../../../includes/stm32f4-arm-none-eabi-gcc/arm_math.h \ - ../../../includes/stm32f4-arm-none-eabi-gcc/core_cm0.h \ - ../../../includes/stm32f4-arm-none-eabi-gcc/core_cm3.h \ - ../../../includes/stm32f4-arm-none-eabi-gcc/core_cm4.h \ - ../../../includes/stm32f4-arm-none-eabi-gcc/core_cm4_simd.h \ - ../../../includes/stm32f4-arm-none-eabi-gcc/core_cmFunc.h \ - ../../../includes/stm32f4-arm-none-eabi-gcc/core_cmInstr.h \ - CMSIS/Include/core_cmInstr.h \ - CMSIS/Include/core_cmFunc.h \ - CMSIS/Include/core_cm4_simd.h \ - CMSIS/Include/core_cm4.h \ - CMSIS/Include/core_cm3.h \ - CMSIS/Include/core_cm0.h \ - CMSIS/Include/arm_math.h \ - CMSIS/Include/arm_common_tables.h + diff --git a/lib/src/stm32f4/CPU/CMSIS/Include/optimised_math.h b/lib/src/stm32f4/CPU/CMSIS/Include/optimised_math.h new file mode 100644 --- /dev/null +++ b/lib/src/stm32f4/CPU/CMSIS/Include/optimised_math.h @@ -0,0 +1,30 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef OPTIMISED_MATH_H +#define OPTIMISED_MATH_H +#include + +extern float32_t optimised_sqrt(float32_t value); + +extern float optimised_sin(float32_t x); + +#endif diff --git a/lib/src/stm32f4/CPU/Makefile b/lib/src/stm32f4/CPU/Makefile new file mode 100644 --- /dev/null +++ b/lib/src/stm32f4/CPU/Makefile @@ -0,0 +1,1671 @@ +############################################################################# +# Makefile for building: libcpu.a +# Generated by qmake (2.01a) (Qt 4.8.4) on: jeu. f�vr. 14 21:51:56 2013 +# Project: cpu.pro +# Template: lib +# Command: /opt/testlibuc2/libuc2/bin/qmake-libuc2 -o Makefile cpu.pro +############################################################################# + +####### Compiler, tools and options + +CC = arm-none-eabi-gcc +CXX = arm-none-eabi-g++ +DEFINES = -D__OPTIMIZED_MATH -D"assert_param(expr)=((void)0)" -D__FPU_PRESENT=1 -DARM_MATH_CM4 +CFLAGS = -mlittle-endian -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -std=c99 $(DEFINES) +CXXFLAGS = -mlittle-endian -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -std=c99 s $(DEFINES) +INCPATH = -I/opt/testlibuc2/libuc2/mkspecs/default -I. -I../../includes -ISTM32F4xx_StdPeriph_Driver/inc -ICMSIS/Include -I/opt/testlibuc2/libuc2/mkspecs/stm32f4 -I/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver -I/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS -I/opt/testlibuc2/libuc2/include -I/opt/testlibuc2/libuc2/include/GRAPHIC/CONTROLERS -I/opt/testlibuc2/libuc2/include/GRAPHIC/GUI/FONTS -I/opt/testlibuc2/libuc2/include/GRAPHIC/GUI/Widgets -I/opt/testlibuc2/libuc2/include +AR = arm-none-eabi-ar -ru +RANLIB = +QMAKE = /opt/testlibuc2/libuc2/bin/qmake-libuc2 +TAR = tar -cf +COMPRESS = gzip -9f +COPY = cp -f +SED = sed +COPY_FILE = $(COPY) +COPY_DIR = $(COPY) -r +STRIP = strip +INSTALL_FILE = install -m 644 -p +INSTALL_DIR = $(COPY_DIR) +INSTALL_PROGRAM = install -m 755 -p +DEL_FILE = rm -f +SYMLINK = ln -f -s +DEL_DIR = rmdir +MOVE = mv -f +CHK_DIR_EXISTS= test -d +MKDIR = mkdir -p + +####### Output directory + +OBJECTS_DIR = obj/ + +####### Files + +SOURCES = CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c \ + CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c \ + CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c \ + CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c \ + CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c \ + CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c \ + CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c \ + CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c \ + CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c \ + CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c \ + CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c \ + CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c \ + CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c \ + CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c \ + CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c \ + CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c \ + CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c \ + CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c \ + CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c \ + CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c \ + CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c \ + CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c \ + CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c \ + CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c \ + CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_wwdg.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_usart.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_tim.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_syscfg.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_spi.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_sdio.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_rtc.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_rng.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_rcc.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_pwr.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_iwdg.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_i2c.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash_sha1.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash_md5.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_gpio.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_fsmc.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_flash.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_exti.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dma.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dcmi.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dbgmcu.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dac.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_tdes.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_des.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_aes.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_crc.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_can.c \ + STM32F4xx_StdPeriph_Driver/src/stm32f4xx_adc.c \ + STM32F4xx_StdPeriph_Driver/src/misc.c +OBJECTS = obj/arm_cfft_radix4_f32.o \ + obj/arm_cfft_radix4_init_f32.o \ + obj/arm_cfft_radix4_init_q15.o \ + obj/arm_cfft_radix4_init_q31.o \ + obj/arm_cfft_radix4_q15.o \ + obj/arm_cfft_radix4_q31.o \ + obj/arm_dct4_f32.o \ + obj/arm_dct4_init_f32.o \ + obj/arm_dct4_init_q15.o \ + obj/arm_dct4_init_q31.o \ + obj/arm_dct4_q15.o \ + obj/arm_dct4_q31.o \ + obj/arm_rfft_f32.o \ + obj/arm_rfft_init_f32.o \ + obj/arm_rfft_init_q15.o \ + obj/arm_rfft_init_q31.o \ + obj/arm_rfft_q15.o \ + obj/arm_rfft_q31.o \ + obj/arm_copy_f32.o \ + obj/arm_copy_q15.o \ + obj/arm_copy_q31.o \ + obj/arm_copy_q7.o \ + obj/arm_fill_f32.o \ + obj/arm_fill_q15.o \ + obj/arm_fill_q31.o \ + obj/arm_fill_q7.o \ + obj/arm_float_to_q15.o \ + obj/arm_float_to_q31.o \ + obj/arm_float_to_q7.o \ + obj/arm_q15_to_float.o \ + obj/arm_q15_to_q31.o \ + obj/arm_q15_to_q7.o \ + obj/arm_q31_to_float.o \ + obj/arm_q31_to_q15.o \ + obj/arm_q31_to_q7.o \ + obj/arm_q7_to_float.o \ + obj/arm_q7_to_q15.o \ + obj/arm_q7_to_q31.o \ + obj/arm_max_f32.o \ + obj/arm_max_q15.o \ + obj/arm_max_q31.o \ + obj/arm_max_q7.o \ + obj/arm_mean_f32.o \ + obj/arm_mean_q15.o \ + obj/arm_mean_q31.o \ + obj/arm_mean_q7.o \ + obj/arm_min_f32.o \ + obj/arm_min_q15.o \ + obj/arm_min_q31.o \ + obj/arm_min_q7.o \ + obj/arm_power_f32.o \ + obj/arm_power_q15.o \ + obj/arm_power_q31.o \ + obj/arm_power_q7.o \ + obj/arm_rms_f32.o \ + obj/arm_rms_q15.o \ + obj/arm_rms_q31.o \ + obj/arm_std_f32.o \ + obj/arm_std_q15.o \ + obj/arm_std_q31.o \ + obj/arm_var_f32.o \ + obj/arm_var_q15.o \ + obj/arm_var_q31.o \ + obj/arm_mat_add_f32.o \ + obj/arm_mat_add_q15.o \ + obj/arm_mat_add_q31.o \ + obj/arm_mat_init_f32.o \ + obj/arm_mat_init_q15.o \ + obj/arm_mat_init_q31.o \ + obj/arm_mat_inverse_f32.o \ + obj/arm_mat_mult_f32.o \ + obj/arm_mat_mult_fast_q15.o \ + obj/arm_mat_mult_fast_q31.o \ + obj/arm_mat_mult_q15.o \ + obj/arm_mat_mult_q31.o \ + obj/arm_mat_scale_f32.o \ + obj/arm_mat_scale_q15.o \ + obj/arm_mat_scale_q31.o \ + obj/arm_mat_sub_f32.o \ + obj/arm_mat_sub_q15.o \ + obj/arm_mat_sub_q31.o \ + obj/arm_mat_trans_f32.o \ + obj/arm_mat_trans_q15.o \ + obj/arm_mat_trans_q31.o \ + obj/arm_biquad_cascade_df1_32x64_init_q31.o \ + obj/arm_biquad_cascade_df1_32x64_q31.o \ + obj/arm_biquad_cascade_df1_f32.o \ + obj/arm_biquad_cascade_df1_fast_q15.o \ + obj/arm_biquad_cascade_df1_fast_q31.o \ + obj/arm_biquad_cascade_df1_init_f32.o \ + obj/arm_biquad_cascade_df1_init_q15.o \ + obj/arm_biquad_cascade_df1_init_q31.o \ + obj/arm_biquad_cascade_df1_q15.o \ + obj/arm_biquad_cascade_df1_q31.o \ + obj/arm_biquad_cascade_df2T_f32.o \ + obj/arm_biquad_cascade_df2T_init_f32.o \ + obj/arm_conv_f32.o \ + obj/arm_conv_fast_q15.o \ + obj/arm_conv_fast_q31.o \ + obj/arm_conv_partial_f32.o \ + obj/arm_conv_partial_fast_q15.o \ + obj/arm_conv_partial_fast_q31.o \ + obj/arm_conv_partial_q15.o \ + obj/arm_conv_partial_q31.o \ + obj/arm_conv_partial_q7.o \ + obj/arm_conv_q15.o \ + obj/arm_conv_q31.o \ + obj/arm_conv_q7.o \ + obj/arm_correlate_f32.o \ + obj/arm_correlate_fast_q15.o \ + obj/arm_correlate_fast_q31.o \ + obj/arm_correlate_q15.o \ + obj/arm_correlate_q31.o \ + obj/arm_correlate_q7.o \ + obj/arm_fir_decimate_f32.o \ + obj/arm_fir_decimate_fast_q15.o \ + obj/arm_fir_decimate_fast_q31.o \ + obj/arm_fir_decimate_init_f32.o \ + obj/arm_fir_decimate_init_q15.o \ + obj/arm_fir_decimate_init_q31.o \ + obj/arm_fir_decimate_q15.o \ + obj/arm_fir_decimate_q31.o \ + obj/arm_fir_f32.o \ + obj/arm_fir_fast_q15.o \ + obj/arm_fir_fast_q31.o \ + obj/arm_fir_init_f32.o \ + obj/arm_fir_init_q15.o \ + obj/arm_fir_init_q31.o \ + obj/arm_fir_init_q7.o \ + obj/arm_fir_interpolate_f32.o \ + obj/arm_fir_interpolate_init_f32.o \ + obj/arm_fir_interpolate_init_q15.o \ + obj/arm_fir_interpolate_init_q31.o \ + obj/arm_fir_interpolate_q15.o \ + obj/arm_fir_interpolate_q31.o \ + obj/arm_fir_lattice_f32.o \ + obj/arm_fir_lattice_init_f32.o \ + obj/arm_fir_lattice_init_q15.o \ + obj/arm_fir_lattice_init_q31.o \ + obj/arm_fir_lattice_q15.o \ + obj/arm_fir_lattice_q31.o \ + obj/arm_fir_q15.o \ + obj/arm_fir_q31.o \ + obj/arm_fir_q7.o \ + obj/arm_fir_sparse_f32.o \ + obj/arm_fir_sparse_init_f32.o \ + obj/arm_fir_sparse_init_q15.o \ + obj/arm_fir_sparse_init_q31.o \ + obj/arm_fir_sparse_init_q7.o \ + obj/arm_fir_sparse_q15.o \ + obj/arm_fir_sparse_q31.o \ + obj/arm_fir_sparse_q7.o \ + obj/arm_iir_lattice_f32.o \ + obj/arm_iir_lattice_init_f32.o \ + obj/arm_iir_lattice_init_q15.o \ + obj/arm_iir_lattice_init_q31.o \ + obj/arm_iir_lattice_q15.o \ + obj/arm_iir_lattice_q31.o \ + obj/arm_lms_f32.o \ + obj/arm_lms_init_f32.o \ + obj/arm_lms_init_q15.o \ + obj/arm_lms_init_q31.o \ + obj/arm_lms_norm_f32.o \ + obj/arm_lms_norm_init_f32.o \ + obj/arm_lms_norm_init_q15.o \ + obj/arm_lms_norm_init_q31.o \ + obj/arm_lms_norm_q15.o \ + obj/arm_lms_norm_q31.o \ + obj/arm_lms_q15.o \ + obj/arm_lms_q31.o \ + obj/arm_cos_f32.o \ + obj/arm_cos_q15.o \ + obj/arm_cos_q31.o \ + obj/arm_sin_f32.o \ + obj/arm_sin_q15.o \ + obj/arm_sin_q31.o \ + obj/arm_sqrt_q15.o \ + obj/arm_sqrt_q31.o \ + obj/arm_pid_init_f32.o \ + obj/arm_pid_init_q15.o \ + obj/arm_pid_init_q31.o \ + obj/arm_pid_reset_f32.o \ + obj/arm_pid_reset_q15.o \ + obj/arm_pid_reset_q31.o \ + obj/arm_sin_cos_f32.o \ + obj/arm_sin_cos_q31.o \ + obj/arm_cmplx_conj_f32.o \ + obj/arm_cmplx_conj_q15.o \ + obj/arm_cmplx_conj_q31.o \ + obj/arm_cmplx_dot_prod_f32.o \ + obj/arm_cmplx_dot_prod_q15.o \ + obj/arm_cmplx_dot_prod_q31.o \ + obj/arm_cmplx_mag_f32.o \ + obj/arm_cmplx_mag_q15.o \ + obj/arm_cmplx_mag_q31.o \ + obj/arm_cmplx_mag_squared_f32.o \ + obj/arm_cmplx_mag_squared_q15.o \ + obj/arm_cmplx_mag_squared_q31.o \ + obj/arm_cmplx_mult_cmplx_f32.o \ + obj/arm_cmplx_mult_cmplx_q15.o \ + obj/arm_cmplx_mult_cmplx_q31.o \ + obj/arm_cmplx_mult_real_f32.o \ + obj/arm_cmplx_mult_real_q15.o \ + obj/arm_cmplx_mult_real_q31.o \ + obj/arm_common_tables.o \ + obj/arm_abs_f32.o \ + obj/arm_abs_q15.o \ + obj/arm_abs_q31.o \ + obj/arm_abs_q7.o \ + obj/arm_add_f32.o \ + obj/arm_add_q15.o \ + obj/arm_add_q31.o \ + obj/arm_add_q7.o \ + obj/arm_dot_prod_f32.o \ + obj/arm_dot_prod_q15.o \ + obj/arm_dot_prod_q31.o \ + obj/arm_dot_prod_q7.o \ + obj/arm_mult_f32.o \ + obj/arm_mult_q15.o \ + obj/arm_mult_q31.o \ + obj/arm_mult_q7.o \ + obj/arm_negate_f32.o \ + obj/arm_negate_q15.o \ + obj/arm_negate_q31.o \ + obj/arm_negate_q7.o \ + obj/arm_offset_f32.o \ + obj/arm_offset_q15.o \ + obj/arm_offset_q31.o \ + obj/arm_offset_q7.o \ + obj/arm_scale_f32.o \ + obj/arm_scale_q15.o \ + obj/arm_scale_q31.o \ + obj/arm_scale_q7.o \ + obj/arm_shift_q15.o \ + obj/arm_shift_q31.o \ + obj/arm_shift_q7.o \ + obj/arm_sub_f32.o \ + obj/arm_sub_q15.o \ + obj/arm_sub_q31.o \ + obj/arm_sub_q7.o \ + obj/stm32f4xx_wwdg.o \ + obj/stm32f4xx_usart.o \ + obj/stm32f4xx_tim.o \ + obj/stm32f4xx_syscfg.o \ + obj/stm32f4xx_spi.o \ + obj/stm32f4xx_sdio.o \ + obj/stm32f4xx_rtc.o \ + obj/stm32f4xx_rng.o \ + obj/stm32f4xx_rcc.o \ + obj/stm32f4xx_pwr.o \ + obj/stm32f4xx_iwdg.o \ + obj/stm32f4xx_i2c.o \ + obj/stm32f4xx_hash_sha1.o \ + obj/stm32f4xx_hash_md5.o \ + obj/stm32f4xx_hash.o \ + obj/stm32f4xx_gpio.o \ + obj/stm32f4xx_fsmc.o \ + obj/stm32f4xx_flash.o \ + obj/stm32f4xx_exti.o \ + obj/stm32f4xx_dma.o \ + obj/stm32f4xx_dcmi.o \ + obj/stm32f4xx_dbgmcu.o \ + obj/stm32f4xx_dac.o \ + obj/stm32f4xx_cryp_tdes.o \ + obj/stm32f4xx_cryp_des.o \ + obj/stm32f4xx_cryp_aes.o \ + obj/stm32f4xx_cryp.o \ + obj/stm32f4xx_crc.o \ + obj/stm32f4xx_can.o \ + obj/stm32f4xx_adc.o \ + obj/misc.o +DIST = /opt/testlibuc2/libuc2/mkspecs/common/unix.conf \ + /opt/testlibuc2/libuc2/mkspecs/common/linux.conf \ + /opt/testlibuc2/libuc2/mkspecs/qconfig.pri \ + /opt/testlibuc2/libuc2/mkspecs/features/qt_functions.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/qt_config.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/exclusive_builds.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/default_pre.prf \ + CMSIS/CMSIS.pri \ + USB/USB.pri \ + STM32F4xx_StdPeriph_Driver/STM32F4xx_StdPeriph_Driver.pri \ + /opt/testlibuc2/libuc2/mkspecs/features/release.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/default_post.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/warn_on.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/libuc2.prf \ + /opt/testlibuc2/libuc2/mkspecs/common/arm-none-eabi.conf \ + /opt/testlibuc2/libuc2/mkspecs/common/libuc2libs.conf \ + /opt/testlibuc2/libuc2/mkspecs/stm32f4/qmake.conf \ + /opt/testlibuc2/libuc2/mkspecs/features/ucswitch.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/staticlib.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/static.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/resources.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/uic.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/yacc.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/lex.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/include_source_dir.prf \ + cpu.pro +QMAKE_TARGET = cpu +DESTDIR = +TARGET = libcpu.a + +first: all +####### Implicit rules + +.SUFFIXES: .o .c .cpp .cc .cxx .C + +.cpp.o: + $(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$@" "$<" + +.cc.o: + $(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$@" "$<" + +.cxx.o: + $(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$@" "$<" + +.C.o: + $(CXX) -c $(CXXFLAGS) $(INCPATH) -o "$@" "$<" + +.c.o: + $(CC) -c $(CFLAGS) $(INCPATH) -o "$@" "$<" + +####### Build rules + +all: Makefile $(TARGET) + +staticlib: $(TARGET) + +$(TARGET): $(OBJECTS) $(OBJCOMP) + -$(DEL_FILE) $(TARGET) + $(AR) $(TARGET) $(OBJECTS) + + +Makefile: cpu.pro /opt/testlibuc2/libuc2/mkspecs/default/qmake.conf /opt/testlibuc2/libuc2/mkspecs/common/unix.conf \ + /opt/testlibuc2/libuc2/mkspecs/common/linux.conf \ + /opt/testlibuc2/libuc2/mkspecs/qconfig.pri \ + /opt/testlibuc2/libuc2/mkspecs/features/qt_functions.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/qt_config.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/exclusive_builds.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/default_pre.prf \ + CMSIS/CMSIS.pri \ + USB/USB.pri \ + STM32F4xx_StdPeriph_Driver/STM32F4xx_StdPeriph_Driver.pri \ + /opt/testlibuc2/libuc2/mkspecs/features/release.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/default_post.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/warn_on.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/libuc2.prf \ + /opt/testlibuc2/libuc2/mkspecs/common/arm-none-eabi.conf \ + /opt/testlibuc2/libuc2/mkspecs/common/libuc2libs.conf \ + /opt/testlibuc2/libuc2/mkspecs/stm32f4/qmake.conf \ + /opt/testlibuc2/libuc2/mkspecs/features/ucswitch.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/staticlib.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/static.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/resources.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/uic.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/yacc.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/lex.prf \ + /opt/testlibuc2/libuc2/mkspecs/features/include_source_dir.prf + $(QMAKE) -o Makefile cpu.pro +/opt/testlibuc2/libuc2/mkspecs/common/unix.conf: +/opt/testlibuc2/libuc2/mkspecs/common/linux.conf: +/opt/testlibuc2/libuc2/mkspecs/qconfig.pri: +/opt/testlibuc2/libuc2/mkspecs/features/qt_functions.prf: +/opt/testlibuc2/libuc2/mkspecs/features/qt_config.prf: +/opt/testlibuc2/libuc2/mkspecs/features/exclusive_builds.prf: +/opt/testlibuc2/libuc2/mkspecs/features/default_pre.prf: +CMSIS/CMSIS.pri: +USB/USB.pri: +STM32F4xx_StdPeriph_Driver/STM32F4xx_StdPeriph_Driver.pri: +/opt/testlibuc2/libuc2/mkspecs/features/release.prf: +/opt/testlibuc2/libuc2/mkspecs/features/default_post.prf: +/opt/testlibuc2/libuc2/mkspecs/features/warn_on.prf: +/opt/testlibuc2/libuc2/mkspecs/features/libuc2.prf: +/opt/testlibuc2/libuc2/mkspecs/common/arm-none-eabi.conf: +/opt/testlibuc2/libuc2/mkspecs/common/libuc2libs.conf: +/opt/testlibuc2/libuc2/mkspecs/stm32f4/qmake.conf: +/opt/testlibuc2/libuc2/mkspecs/features/ucswitch.prf: +/opt/testlibuc2/libuc2/mkspecs/features/staticlib.prf: +/opt/testlibuc2/libuc2/mkspecs/features/static.prf: +/opt/testlibuc2/libuc2/mkspecs/features/resources.prf: +/opt/testlibuc2/libuc2/mkspecs/features/uic.prf: +/opt/testlibuc2/libuc2/mkspecs/features/yacc.prf: +/opt/testlibuc2/libuc2/mkspecs/features/lex.prf: +/opt/testlibuc2/libuc2/mkspecs/features/include_source_dir.prf: +qmake: FORCE + @$(QMAKE) -o Makefile cpu.pro + +dist: + @$(CHK_DIR_EXISTS) obj/cpu1.0.0 || $(MKDIR) obj/cpu1.0.0 + $(COPY_FILE) --parents $(SOURCES) $(DIST) obj/cpu1.0.0/ && (cd `dirname obj/cpu1.0.0` && $(TAR) cpu1.0.0.tar cpu1.0.0 && $(COMPRESS) cpu1.0.0.tar) && $(MOVE) `dirname obj/cpu1.0.0`/cpu1.0.0.tar.gz . && $(DEL_FILE) -r obj/cpu1.0.0 + + +clean:compiler_clean + -$(DEL_FILE) $(OBJECTS) + -$(DEL_FILE) *~ core *.core + + +####### Sub-libraries + +distclean: clean + -$(DEL_FILE) $(TARGET) + -$(DEL_FILE) Makefile + + +check: first + +compiler_rcc_make_all: +compiler_rcc_clean: +compiler_uic_make_all: +compiler_uic_clean: +compiler_image_collection_make_all: qmake_image_collection.cpp +compiler_image_collection_clean: + -$(DEL_FILE) qmake_image_collection.cpp +compiler_yacc_decl_make_all: +compiler_yacc_decl_clean: +compiler_yacc_impl_make_all: +compiler_yacc_impl_clean: +compiler_lex_make_all: +compiler_lex_clean: +compiler_clean: + +####### Compile + +obj/arm_cfft_radix4_f32.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_cfft_radix4_f32.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c + +obj/arm_cfft_radix4_init_f32.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_cfft_radix4_init_f32.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c + +obj/arm_cfft_radix4_init_q15.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_cfft_radix4_init_q15.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c + +obj/arm_cfft_radix4_init_q31.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_cfft_radix4_init_q31.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c + +obj/arm_cfft_radix4_q15.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_cfft_radix4_q15.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c + +obj/arm_cfft_radix4_q31.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_cfft_radix4_q31.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c + +obj/arm_dct4_f32.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_dct4_f32.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c + +obj/arm_dct4_init_f32.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_dct4_init_f32.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c + +obj/arm_dct4_init_q15.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_dct4_init_q15.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c + +obj/arm_dct4_init_q31.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_dct4_init_q31.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c + +obj/arm_dct4_q15.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_dct4_q15.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c + +obj/arm_dct4_q31.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_dct4_q31.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c + +obj/arm_rfft_f32.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_rfft_f32.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c + +obj/arm_rfft_init_f32.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_rfft_init_f32.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c + +obj/arm_rfft_init_q15.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_rfft_init_q15.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c + +obj/arm_rfft_init_q31.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_rfft_init_q31.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c + +obj/arm_rfft_q15.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_rfft_q15.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c + +obj/arm_rfft_q31.o: CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_rfft_q31.o CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c + +obj/arm_copy_f32.o: CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_copy_f32.o CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c + +obj/arm_copy_q15.o: CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_copy_q15.o CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c + +obj/arm_copy_q31.o: CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_copy_q31.o CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c + +obj/arm_copy_q7.o: CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_copy_q7.o CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c + +obj/arm_fill_f32.o: CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_fill_f32.o CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c + +obj/arm_fill_q15.o: CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_fill_q15.o CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c + +obj/arm_fill_q31.o: CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_fill_q31.o CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c + +obj/arm_fill_q7.o: CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_fill_q7.o CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c + +obj/arm_float_to_q15.o: CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_float_to_q15.o CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c + +obj/arm_float_to_q31.o: CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_float_to_q31.o CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c + +obj/arm_float_to_q7.o: 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$(INCPATH) -o obj/arm_pid_reset_q31.o CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c + +obj/arm_sin_cos_f32.o: CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_sin_cos_f32.o CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c + +obj/arm_sin_cos_q31.o: CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_sin_cos_q31.o CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c + +obj/arm_cmplx_conj_f32.o: CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_cmplx_conj_f32.o CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c + +obj/arm_cmplx_conj_q15.o: CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_cmplx_conj_q15.o CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c + +obj/arm_cmplx_conj_q31.o: CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_cmplx_conj_q31.o CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c + +obj/arm_cmplx_dot_prod_f32.o: CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_cmplx_dot_prod_f32.o CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c + +obj/arm_cmplx_dot_prod_q15.o: CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_cmplx_dot_prod_q15.o CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c + +obj/arm_cmplx_dot_prod_q31.o: CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_cmplx_dot_prod_q31.o CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c + +obj/arm_cmplx_mag_f32.o: CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c + $(CC) -c $(CFLAGS) $(INCPATH) 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CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_cmplx_mult_real_f32.o CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c + +obj/arm_cmplx_mult_real_q15.o: CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_cmplx_mult_real_q15.o CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c + +obj/arm_cmplx_mult_real_q31.o: CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_cmplx_mult_real_q31.o CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c + +obj/arm_common_tables.o: CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_common_tables.o CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c + +obj/arm_abs_f32.o: CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_abs_f32.o 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CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_add_q31.o CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c + +obj/arm_add_q7.o: CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_add_q7.o CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c + +obj/arm_dot_prod_f32.o: CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_dot_prod_f32.o CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c + +obj/arm_dot_prod_q15.o: CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_dot_prod_q15.o CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c + +obj/arm_dot_prod_q31.o: CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/arm_dot_prod_q31.o CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c + +obj/arm_dot_prod_q7.o: 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$(INCPATH) -o obj/stm32f4xx_tim.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_tim.c + +obj/stm32f4xx_syscfg.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_syscfg.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_syscfg.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_syscfg.c + +obj/stm32f4xx_spi.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_spi.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_spi.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_spi.c + +obj/stm32f4xx_sdio.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_sdio.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_sdio.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_sdio.c + +obj/stm32f4xx_rtc.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_rtc.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_rtc.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_rtc.c + +obj/stm32f4xx_rng.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_rng.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_rng.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_rng.c + +obj/stm32f4xx_rcc.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_rcc.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_rcc.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_rcc.c + +obj/stm32f4xx_pwr.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_pwr.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_pwr.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_pwr.c + +obj/stm32f4xx_iwdg.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_iwdg.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_iwdg.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_iwdg.c + +obj/stm32f4xx_i2c.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_i2c.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_i2c.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_i2c.c + +obj/stm32f4xx_hash_sha1.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash_sha1.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_hash_sha1.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash_sha1.c + +obj/stm32f4xx_hash_md5.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash_md5.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_hash_md5.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash_md5.c + +obj/stm32f4xx_hash.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_hash.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_hash.c + +obj/stm32f4xx_gpio.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_gpio.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_gpio.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_gpio.c + +obj/stm32f4xx_fsmc.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_fsmc.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_fsmc.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_fsmc.c + +obj/stm32f4xx_flash.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_flash.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_flash.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_flash.c + +obj/stm32f4xx_exti.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_exti.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_exti.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_exti.c + +obj/stm32f4xx_dma.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dma.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_dma.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dma.c + +obj/stm32f4xx_dcmi.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dcmi.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_dcmi.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dcmi.c + +obj/stm32f4xx_dbgmcu.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dbgmcu.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_dbgmcu.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dbgmcu.c + +obj/stm32f4xx_dac.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dac.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_dac.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_dac.c + +obj/stm32f4xx_cryp_tdes.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_tdes.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_cryp_tdes.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_tdes.c + +obj/stm32f4xx_cryp_des.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_des.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_cryp_des.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_des.c + +obj/stm32f4xx_cryp_aes.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_aes.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_cryp_aes.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp_aes.c + +obj/stm32f4xx_cryp.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_cryp.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_cryp.c + +obj/stm32f4xx_crc.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_crc.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_crc.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_crc.c + +obj/stm32f4xx_can.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_can.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_can.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_can.c + +obj/stm32f4xx_adc.o: STM32F4xx_StdPeriph_Driver/src/stm32f4xx_adc.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/stm32f4xx_adc.o STM32F4xx_StdPeriph_Driver/src/stm32f4xx_adc.c + +obj/misc.o: STM32F4xx_StdPeriph_Driver/src/misc.c + $(CC) -c $(CFLAGS) $(INCPATH) -o obj/misc.o STM32F4xx_StdPeriph_Driver/src/misc.c + +####### Install + +install_target: first FORCE + @$(CHK_DIR_EXISTS) $(INSTALL_ROOT)/opt/testlibuc2/libuc2/lib/stm32f4/ || $(MKDIR) $(INSTALL_ROOT)/opt/testlibuc2/libuc2/lib/stm32f4/ + -$(INSTALL_FILE) "$(TARGET)" "$(INSTALL_ROOT)/opt/testlibuc2/libuc2/lib/stm32f4/$(TARGET)" + +uninstall_target: FORCE + -$(DEL_FILE) "$(INSTALL_ROOT)/opt/testlibuc2/libuc2/lib/stm32f4/$(TARGET)" + -$(DEL_DIR) $(INSTALL_ROOT)/opt/testlibuc2/libuc2/lib/stm32f4/ + + +install_CMSISHEADERS: first FORCE + @$(CHK_DIR_EXISTS) $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/ || $(MKDIR) $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/CMSIS/Include/core_cmInstr.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/CMSIS/Include/core_cmFunc.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/CMSIS/Include/core_cm4_simd.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/CMSIS/Include/core_cm4.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/CMSIS/Include/core_cm3.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/CMSIS/Include/core_cm0.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/CMSIS/Include/arm_math.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/CMSIS/Include/arm_common_tables.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/ + + +uninstall_CMSISHEADERS: FORCE + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/core_cmInstr.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/core_cmFunc.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/core_cm4_simd.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/core_cm4.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/core_cm3.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/core_cm0.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/arm_math.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/arm_common_tables.h + -$(DEL_DIR) $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_CMSIS/ + + +install_STLIBHEADERS: first FORCE + @$(CHK_DIR_EXISTS) $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ || $(MKDIR) $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_wwdg.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_usart.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_tim.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_syscfg.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_spi.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_sdio.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_rtc.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_rng.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_rcc.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_pwr.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_iwdg.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_i2c.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_hash.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_gpio.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_fsmc.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_flash.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_exti.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_dma.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_dcmi.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_dbgmcu.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_dac.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_cryp.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_crc.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_can.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_adc.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/misc.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx.h $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + + +uninstall_STLIBHEADERS: FORCE + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_wwdg.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_usart.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_tim.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_syscfg.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_spi.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_sdio.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_rtc.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_rng.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_rcc.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_pwr.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_iwdg.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_i2c.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_hash.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_gpio.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_fsmc.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_flash.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_exti.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_dma.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_dcmi.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_dbgmcu.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_dac.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_cryp.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_crc.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_can.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx_adc.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/misc.h + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/stm32f4xx.h + -$(DEL_DIR) $(INSTALL_ROOT)/opt/testlibuc2/libuc2/include/STM32F4xx_StdPeriph_Driver/ + + +install_prifile: first FORCE + @$(CHK_DIR_EXISTS) $(INSTALL_ROOT)/opt/testlibuc2/libuc2/mkspecs/features/stm32f4/ || $(MKDIR) $(INSTALL_ROOT)/opt/testlibuc2/libuc2/mkspecs/features/stm32f4/ + -$(INSTALL_FILE) /opt/libuc2/lib/src/stm32f4/CPU/cpu.pri $(INSTALL_ROOT)/opt/testlibuc2/libuc2/mkspecs/features/stm32f4/ + + +uninstall_prifile: FORCE + -$(DEL_FILE) -r $(INSTALL_ROOT)/opt/testlibuc2/libuc2/mkspecs/features/stm32f4/cpu.pri + -$(DEL_DIR) $(INSTALL_ROOT)/opt/testlibuc2/libuc2/mkspecs/features/stm32f4/ + + +install_target: first FORCE + @$(CHK_DIR_EXISTS) $(INSTALL_ROOT)/opt/testlibuc2/libuc2/lib/stm32f4/ || $(MKDIR) $(INSTALL_ROOT)/opt/testlibuc2/libuc2/lib/stm32f4/ + -$(INSTALL_FILE) "$(TARGET)" "$(INSTALL_ROOT)/opt/testlibuc2/libuc2/lib/stm32f4/$(TARGET)" + +uninstall_target: FORCE + -$(DEL_FILE) "$(INSTALL_ROOT)/opt/testlibuc2/libuc2/lib/stm32f4/$(TARGET)" + -$(DEL_FILE) "$(INSTALL_ROOT)/opt/testlibuc2/libuc2/lib/stm32f4/$(TARGET)" + -$(DEL_DIR) $(INSTALL_ROOT)/opt/testlibuc2/libuc2/lib/stm32f4/ + + +install: install_target install_CMSISHEADERS install_STLIBHEADERS install_prifile install_target FORCE + +uninstall: uninstall_target uninstall_CMSISHEADERS uninstall_STLIBHEADERS uninstall_prifile uninstall_target FORCE + +FORCE: + diff --git a/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/STM32F4xx_StdPeriph_Driver.pri b/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/STM32F4xx_StdPeriph_Driver.pri --- a/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/STM32F4xx_StdPeriph_Driver.pri +++ b/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/STM32F4xx_StdPeriph_Driver.pri @@ -1,4 +1,5 @@ -HEADERS += \ + +STLIBHEADERS.files += \ STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_wwdg.h \ STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_usart.h \ STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_tim.h \ @@ -25,7 +26,8 @@ HEADERS += \ STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_can.h \ STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_adc.h \ STM32F4xx_StdPeriph_Driver/inc/misc.h \ - STM32F4xx_StdPeriph_Driver/inc/stm32f4xx.h + STM32F4xx_StdPeriph_Driver/inc/stm32f4xx.h \ + STM32F4xx_StdPeriph_Driver/inc/system_stm32f4xx.h SOURCES += \ STM32F4xx_StdPeriph_Driver/src/stm32f4xx_wwdg.c \ diff --git a/lib/src/stm32f4/CPU/cpu.c b/lib/src/stm32f4/CPU/cpu.c new file mode 100644 --- /dev/null +++ b/lib/src/stm32f4/CPU/cpu.c @@ -0,0 +1,22 @@ +#include +float32_t optimised_sqrt(float32_t value) +{ + float32_t out; + arm_sqrt_f32(value,&out); + return out; +} + +float optimised_sin(float32_t x) +{ + return arm_sin_f32(x); +} + + + + + + + + + + diff --git a/lib/src/stm32f4/CPU/cpu.pri b/lib/src/stm32f4/CPU/cpu.pri new file mode 100644 --- /dev/null +++ b/lib/src/stm32f4/CPU/cpu.pri @@ -0,0 +1,18 @@ + +INCLUDEPATH += $$[QT_INSTALL_HEADERS]/STM32F4xx_StdPeriph_Driver +INCLUDEPATH += $$[QT_INSTALL_HEADERS]/STM32F4xx_CMSIS + +LIBS += -L$$[QT_INSTALL_LIBS]/$$UCMODEL +LIBS += -lcpu + + + + + + + + + + + + diff --git a/lib/src/stm32f4/CPU/cpu.pro b/lib/src/stm32f4/CPU/cpu.pro --- a/lib/src/stm32f4/CPU/cpu.pro +++ b/lib/src/stm32f4/CPU/cpu.pro @@ -1,11 +1,28 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) + +OBJECTS_DIR = obj + include(CMSIS/CMSIS.pri) include(USB/USB.pri) include(STM32F4xx_StdPeriph_Driver/STM32F4xx_StdPeriph_Driver.pri) +UCMODEL=stm32f4 + +prifile.files = cpu.pri stm32_flash.ld startup.s cpuinit.c fs.c syscalls.c +prifile.path = $$[QT_INSTALL_PREFIX]/mkspecs/features/$$UCMODEL + +INCLUDEPATH += ../../includes \ + STM32F4xx_StdPeriph_Driver/inc \ + CMSIS/Include + +SOURCES += cpu.c + +CMSISHEADERS.path = $$[QT_INSTALL_HEADERS]/STM32F4xx_CMSIS +STLIBHEADERS.path = $$[QT_INSTALL_HEADERS]/STM32F4xx_StdPeriph_Driver + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target CMSISHEADERS STLIBHEADERS prifile + @@ -16,5 +33,3 @@ include(STM32F4xx_StdPeriph_Driver/STM32 - - diff --git a/lib/src/stm32f4/CPU/cpuinit.c b/lib/src/stm32f4/CPU/cpuinit.c new file mode 100644 --- /dev/null +++ b/lib/src/stm32f4/CPU/cpuinit.c @@ -0,0 +1,60 @@ +#include "stm32f4xx.h" +#include +#include +#include +#include +#include +#include +extern int main(); + + + +void cpu_init() +{ + extern uint32_t currentCpuFreq; + currentCpuFreq = 16*1000*1000; + enable_FPU(); + RCC->CR |= (uint32_t)0x00000001; + FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS; + reset_AHB1(); + reset_AHB2(); + reset_APB1(); + reset_APB2(); + RCC->CR |= (uint32_t)0x00000001; + FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS; + RCC->CFGR = 0x00000000; + RCC->CIR = 0x00000000; + SCB->VTOR = FLASH_BASE; + RCC->APB1ENR |= RCC_APB1ENR_PWREN; + PWR->CR |= PWR_CR_PMODE; + currentCpuFreq=setCpuFreq(currentCpuFreq); + currentCpuFreq=getCpuFreq(); + configureSysTick(); + bsp_init(); + printf("SysTick Configured to reach 100us period\n\r"); + RCC_ClocksTypeDef RCC_ClocksStatus; + RCC_GetClocksFreq(&RCC_ClocksStatus); + printf("PLL Configured got:\n\r SYS=%uHz\n\r CPU=%uHz\n\r APB1=%uHz\n\r APB2=%uHz\n\r",(unsigned int)RCC_ClocksStatus.SYSCLK_Frequency,(unsigned int)RCC_ClocksStatus.HCLK_Frequency,(unsigned int)RCC_ClocksStatus.PCLK1_Frequency,(unsigned int)RCC_ClocksStatus.PCLK2_Frequency); + printf("Enter Main\n\r"); + int res=main(); + printf("\n\rprogram exited with code "); + printf("%u",res); + printf("\n\r"); + while(1) + { + delay_100us(10000); + gpioset(LED1); + delay_100us(10000); + gpioclr(LED1); + } +} + + + + + + + + + + diff --git a/lib/src/stm32f4/CPU/fs.c b/lib/src/stm32f4/CPU/fs.c new file mode 100644 --- /dev/null +++ b/lib/src/stm32f4/CPU/fs.c @@ -0,0 +1,25 @@ +#include +#include +#include +#include + +const int32_t __max_opened_files__ = __MAX_OPENED_FILES__; +__IO streamdevice* __opnfiles__[__MAX_OPENED_FILES__]; +const int32_t __fs_root_size__ = __FS_ROOT_SIZE__; +int32_t __fs_root__[__FS_ROOT_SIZE__]; + + +/* +void __init_fs() +{ + int i=0; + for(i=0;i<__fs_root_size__;i++) + { + __fs_root__[i]=(int32_t)NULL; + } + for(i=0;i<__max_opened_files__ ;i++) + { + __opnfiles__[i]._stream=NULL; + } +} +*/ diff --git a/lib/src/stm32f4/CPU/startup.s b/lib/src/stm32f4/CPU/startup.s new file mode 100644 --- /dev/null +++ b/lib/src/stm32f4/CPU/startup.s @@ -0,0 +1,454 @@ + + .syntax unified + .cpu cortex-m4 + /*.fpu softvfp*/ + .fpu fpv4-sp-d16 + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + + bl cpu_init + bx lr +.size Reset_Handler, .-Reset_Handler + + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler + + + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word CAN1_TX_IRQHandler /* CAN1 TX */ + .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ + .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /* CAN1 SCE */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_IRQHandler /* USART3 */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word FSMC_IRQHandler /* FSMC */ + .word SDIO_IRQHandler /* SDIO */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word UART4_IRQHandler /* UART4 */ + .word UART5_IRQHandler /* UART5 */ + .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ + .word TIM7_IRQHandler /* TIM7 */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word ETH_IRQHandler /* Ethernet */ + .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ + .word CAN2_TX_IRQHandler /* CAN2 TX */ + .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ + .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ + .word CAN2_SCE_IRQHandler /* CAN2 SCE */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ + .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ + .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ + .word OTG_HS_IRQHandler /* USB OTG HS */ + .word DCMI_IRQHandler /* DCMI */ + .word CRYP_IRQHandler /* CRYP crypto */ + .word HASH_RNG_IRQHandler /* Hash and Rng */ + .word FPU_IRQHandler /* FPU */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FSMC_IRQHandler + .thumb_set FSMC_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak ETH_IRQHandler + .thumb_set ETH_IRQHandler,Default_Handler + + .weak ETH_WKUP_IRQHandler + .thumb_set ETH_WKUP_IRQHandler,Default_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Default_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Default_Handler + + .weak CRYP_IRQHandler + .thumb_set CRYP_IRQHandler,Default_Handler + + .weak HASH_RNG_IRQHandler + .thumb_set HASH_RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler diff --git a/lib/src/stm32f4/CPU/stm32_flash.ld b/lib/src/stm32f4/CPU/stm32_flash.ld new file mode 100644 --- /dev/null +++ b/lib/src/stm32f4/CPU/stm32_flash.ld @@ -0,0 +1,171 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F407VG Device with +** 1024KByte FLASH, 192KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed �as is,� without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20020000; /* end of 128K RAM on AHB bus*/ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x1000; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024k + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112k + CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64k + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/lib/src/stm32f4/CPU/stm32f4xxxC/fs.c b/lib/src/stm32f4/CPU/stm32f4xxxC/fs.c deleted file mode 100644 --- a/lib/src/stm32f4/CPU/stm32f4xxxC/fs.c +++ /dev/null @@ -1,25 +0,0 @@ -#include -#include -#include -#define __MAX_OPENED_FILES__ 32 -#define __FS_ROOT_SIZE__ 32 -const int32_t __max_opened_files__ = __MAX_OPENED_FILES__; -streamdevice* __files__[__MAX_OPENED_FILES__]; -const int32_t __fs_root_size__ = __FS_ROOT_SIZE__; -int32_t __fs_root__[__FS_ROOT_SIZE__]; - - - - -void __init_fs() -{ - int i=0; - for(i=0;i<__fs_root_size__;i++) - { - __fs_root__[i]=NULL; - } - for(i=0;i<__max_opened_files__ ;i++) - { - __files__[i]=NULL; - } -} diff --git a/lib/src/stm32f4/CPU/stm32f4xxxC/startup_stm32f4xx.s b/lib/src/stm32f4/CPU/stm32f4xxxC/startup_stm32f4xx.s deleted file mode 100644 --- a/lib/src/stm32f4/CPU/stm32f4xxxC/startup_stm32f4xx.s +++ /dev/null @@ -1,511 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f4xx.s - * @author MCD Application Team - * @version V1.0.0 - * @date 30-September-2011 - * @brief STM32F4xx Devices vector table for RIDE7 toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Configure the clock system and the external SRAM mounted on - * STM324xG-EVAL board to be used as data memory (optional, - * to be enabled by user) - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M4 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m3 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss -/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ - -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss - -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call the application's entry point.*/ - bl __init_fs - bl bsp_init - bl main - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M3. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -*******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - - /* External Interrupts */ - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_IRQHandler /* PVD through EXTI Line detection */ - .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ - .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line0 */ - .word EXTI1_IRQHandler /* EXTI Line1 */ - .word EXTI2_IRQHandler /* EXTI Line2 */ - .word EXTI3_IRQHandler /* EXTI Line3 */ - .word EXTI4_IRQHandler /* EXTI Line4 */ - .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ - .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ - .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ - .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ - .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ - .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ - .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ - .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ - .word CAN1_TX_IRQHandler /* CAN1 TX */ - .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ - .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .word CAN1_SCE_IRQHandler /* CAN1 SCE */ - .word EXTI9_5_IRQHandler /* External Line[9:5]s */ - .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ - .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ - .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_IRQHandler /* USART3 */ - .word EXTI15_10_IRQHandler /* External Line[15:10]s */ - .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ - .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ - .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ - .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ - .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ - .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ - .word FSMC_IRQHandler /* FSMC */ - .word SDIO_IRQHandler /* SDIO */ - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ - .word UART4_IRQHandler /* UART4 */ - .word UART5_IRQHandler /* UART5 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ - .word TIM7_IRQHandler /* TIM7 */ - .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ - .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ - .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ - .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ - .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ - .word ETH_IRQHandler /* Ethernet */ - .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ - .word CAN2_TX_IRQHandler /* CAN2 TX */ - .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ - .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ - .word CAN2_SCE_IRQHandler /* CAN2 SCE */ - .word OTG_FS_IRQHandler /* USB OTG FS */ - .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ - .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ - .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ - .word USART6_IRQHandler /* USART6 */ - .word I2C3_EV_IRQHandler /* I2C3 event */ - .word I2C3_ER_IRQHandler /* I2C3 error */ - .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ - .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ - .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ - .word OTG_HS_IRQHandler /* USB OTG HS */ - .word DCMI_IRQHandler /* DCMI */ - .word CRYP_IRQHandler /* CRYP crypto */ - .word HASH_RNG_IRQHandler /* Hash and Rng */ - .word FPU_IRQHandler /* FPU */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMP_STAMP_IRQHandler - .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler - .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Stream0_IRQHandler - .thumb_set DMA1_Stream0_IRQHandler,Default_Handler - - .weak DMA1_Stream1_IRQHandler - .thumb_set DMA1_Stream1_IRQHandler,Default_Handler - - .weak DMA1_Stream2_IRQHandler - .thumb_set DMA1_Stream2_IRQHandler,Default_Handler - - .weak DMA1_Stream3_IRQHandler - .thumb_set DMA1_Stream3_IRQHandler,Default_Handler - - .weak DMA1_Stream4_IRQHandler - .thumb_set DMA1_Stream4_IRQHandler,Default_Handler - - .weak DMA1_Stream5_IRQHandler - .thumb_set DMA1_Stream5_IRQHandler,Default_Handler - - .weak DMA1_Stream6_IRQHandler - .thumb_set DMA1_Stream6_IRQHandler,Default_Handler - - .weak ADC_IRQHandler - .thumb_set ADC_IRQHandler,Default_Handler - - .weak CAN1_TX_IRQHandler - .thumb_set CAN1_TX_IRQHandler,Default_Handler - - .weak CAN1_RX0_IRQHandler - .thumb_set CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM9_IRQHandler - .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM10_IRQHandler - .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM11_IRQHandler - .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler - .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak OTG_FS_WKUP_IRQHandler - .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler - - .weak TIM8_BRK_TIM12_IRQHandler - .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler - - .weak TIM8_UP_TIM13_IRQHandler - .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_TIM14_IRQHandler - .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler - - .weak TIM8_CC_IRQHandler - .thumb_set TIM8_CC_IRQHandler,Default_Handler - - .weak DMA1_Stream7_IRQHandler - .thumb_set DMA1_Stream7_IRQHandler,Default_Handler - - .weak FSMC_IRQHandler - .thumb_set FSMC_IRQHandler,Default_Handler - - .weak SDIO_IRQHandler - .thumb_set SDIO_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Stream0_IRQHandler - .thumb_set DMA2_Stream0_IRQHandler,Default_Handler - - .weak DMA2_Stream1_IRQHandler - .thumb_set DMA2_Stream1_IRQHandler,Default_Handler - - .weak DMA2_Stream2_IRQHandler - .thumb_set DMA2_Stream2_IRQHandler,Default_Handler - - .weak DMA2_Stream3_IRQHandler - .thumb_set DMA2_Stream3_IRQHandler,Default_Handler - - .weak DMA2_Stream4_IRQHandler - .thumb_set DMA2_Stream4_IRQHandler,Default_Handler - - .weak ETH_IRQHandler - .thumb_set ETH_IRQHandler,Default_Handler - - .weak ETH_WKUP_IRQHandler - .thumb_set ETH_WKUP_IRQHandler,Default_Handler - - .weak CAN2_TX_IRQHandler - .thumb_set CAN2_TX_IRQHandler,Default_Handler - - .weak CAN2_RX0_IRQHandler - .thumb_set CAN2_RX0_IRQHandler,Default_Handler - - .weak CAN2_RX1_IRQHandler - .thumb_set CAN2_RX1_IRQHandler,Default_Handler - - .weak CAN2_SCE_IRQHandler - .thumb_set CAN2_SCE_IRQHandler,Default_Handler - - .weak OTG_FS_IRQHandler - .thumb_set OTG_FS_IRQHandler,Default_Handler - - .weak DMA2_Stream5_IRQHandler - .thumb_set DMA2_Stream5_IRQHandler,Default_Handler - - .weak DMA2_Stream6_IRQHandler - .thumb_set DMA2_Stream6_IRQHandler,Default_Handler - - .weak DMA2_Stream7_IRQHandler - .thumb_set DMA2_Stream7_IRQHandler,Default_Handler - - .weak USART6_IRQHandler - .thumb_set USART6_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler - .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler - .thumb_set I2C3_ER_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_OUT_IRQHandler - .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_IN_IRQHandler - .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler - - .weak OTG_HS_WKUP_IRQHandler - .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler - - .weak OTG_HS_IRQHandler - .thumb_set OTG_HS_IRQHandler,Default_Handler - - .weak DCMI_IRQHandler - .thumb_set DCMI_IRQHandler,Default_Handler - - .weak CRYP_IRQHandler - .thumb_set CRYP_IRQHandler,Default_Handler - - .weak HASH_RNG_IRQHandler - .thumb_set HASH_RNG_IRQHandler,Default_Handler - - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/lib/src/stm32f4/CPU/stm32f4xxxC/stm32_flash.ld b/lib/src/stm32f4/CPU/stm32f4xxxC/stm32_flash.ld deleted file mode 100644 --- a/lib/src/stm32f4/CPU/stm32f4xxxC/stm32_flash.ld +++ /dev/null @@ -1,171 +0,0 @@ -/* -***************************************************************************** -** -** File : stm32_flash.ld -** -** Abstract : Linker script for STM32F207IG Device with -** 1024KByte FLASH, 112KByte RAM -** -** Set heap size, stack size and stack location according -** to application requirements. -** -** Set memory bank area and size if external memory is used. -** -** Target : STMicroelectronics STM32 -** -** Environment : Atollic TrueSTUDIO(R) -** -** Distribution: The file is distributed �as is,� without any warranty -** of any kind. -** -** (c)Copyright Atollic AB. -** You may use this file as-is or modify it according to the needs of your -** project. Distribution of this file (unmodified or modified) is not -** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the -** rights to distribute the assembled, compiled & linked contents of this -** file as part of an application binary file, provided that it is built -** using the Atollic TrueSTUDIO(R) toolchain. -** -***************************************************************************** -*/ - -/* Entry Point */ -ENTRY(Reset_Handler) - -/* Highest address of the user mode stack */ -_estack = 0x2001c000; /* end of 112K RAM */ - -/* Generate a link error if heap and stack don't fit into RAM */ -_Min_Heap_Size = 0; /* required amount of heap */ -_Min_Stack_Size = 0x400; /* required amount of stack */ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112K - MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K -} - -/* Define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } >FLASH - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - *(.glue_7) /* glue arm to thumb code */ - *(.glue_7t) /* glue thumb to arm code */ - *(.eh_frame) - - KEEP (*(.init)) - KEEP (*(.fini)) - - . = ALIGN(4); - _etext = .; /* define a global symbols at end of code */ - } >FLASH - - - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH - .ARM : { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } >FLASH - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array*)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >FLASH - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array*)) - PROVIDE_HIDDEN (__init_array_end = .); - } >FLASH - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(.fini_array*)) - KEEP (*(SORT(.fini_array.*))) - PROVIDE_HIDDEN (__fini_array_end = .); - } >FLASH - - /* used by the startup to initialize data */ - _sidata = .; - - /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end */ - } >RAM - - /* Uninitialized data section */ - . = ALIGN(4); - .bss : - { - /* This is used by the startup in order to initialize the .bss secion */ - _sbss = .; /* define a global symbol at bss start */ - __bss_start__ = _sbss; - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end */ - __bss_end__ = _ebss; - } >RAM - - /* User_heap_stack section, used to check that there is enough RAM left */ - ._user_heap_stack : - { - . = ALIGN(4); - PROVIDE ( end = . ); - PROVIDE ( _end = . ); - . = . + _Min_Heap_Size; - . = . + _Min_Stack_Size; - . = ALIGN(4); - } >RAM - - /* MEMORY_bank1 section, code must be located here explicitly */ - /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ - .memory_b1_text : - { - *(.mb1text) /* .mb1text sections (code) */ - *(.mb1text*) /* .mb1text* sections (code) */ - *(.mb1rodata) /* read-only data (constants) */ - *(.mb1rodata*) - } >MEMORY_B1 - - /* Remove information from the standard libraries */ - /DISCARD/ : - { - libc.a ( * ) - libm.a ( * ) - libgcc.a ( * ) - } - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/lib/src/stm32f4/CPU/stm32f4xxxE/fs.c b/lib/src/stm32f4/CPU/stm32f4xxxE/fs.c deleted file mode 100644 --- a/lib/src/stm32f4/CPU/stm32f4xxxE/fs.c +++ /dev/null @@ -1,25 +0,0 @@ -#include -#include -#include -#define __MAX_OPENED_FILES__ 32 -#define __FS_ROOT_SIZE__ 32 -const int32_t __max_opened_files__ = __MAX_OPENED_FILES__; -streamdevice* __files__[__MAX_OPENED_FILES__]; -const int32_t __fs_root_size__ = __FS_ROOT_SIZE__; -int32_t __fs_root__[__FS_ROOT_SIZE__]; - - - - -void __init_fs() -{ - int i=0; - for(i=0;i<__fs_root_size__;i++) - { - __fs_root__[i]=NULL; - } - for(i=0;i<__max_opened_files__ ;i++) - { - __files__[i]=NULL; - } -} diff --git a/lib/src/stm32f4/CPU/stm32f4xxxE/startup_stm32f4xx.s b/lib/src/stm32f4/CPU/stm32f4xxxE/startup_stm32f4xx.s deleted file mode 100644 --- a/lib/src/stm32f4/CPU/stm32f4xxxE/startup_stm32f4xx.s +++ /dev/null @@ -1,511 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f4xx.s - * @author MCD Application Team - * @version V1.0.0 - * @date 30-September-2011 - * @brief STM32F4xx Devices vector table for RIDE7 toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Configure the clock system and the external SRAM mounted on - * STM324xG-EVAL board to be used as data memory (optional, - * to be enabled by user) - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M4 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m3 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss -/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ - -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss - -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call the application's entry point.*/ - bl __init_fs - bl bsp_init - bl main - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M3. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -*******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - - /* External Interrupts */ - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_IRQHandler /* PVD through EXTI Line detection */ - .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ - .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line0 */ - .word EXTI1_IRQHandler /* EXTI Line1 */ - .word EXTI2_IRQHandler /* EXTI Line2 */ - .word EXTI3_IRQHandler /* EXTI Line3 */ - .word EXTI4_IRQHandler /* EXTI Line4 */ - .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ - .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ - .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ - .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ - .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ - .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ - .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ - .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ - .word CAN1_TX_IRQHandler /* CAN1 TX */ - .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ - .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .word CAN1_SCE_IRQHandler /* CAN1 SCE */ - .word EXTI9_5_IRQHandler /* External Line[9:5]s */ - .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ - .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ - .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_IRQHandler /* USART3 */ - .word EXTI15_10_IRQHandler /* External Line[15:10]s */ - .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ - .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ - .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ - .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ - .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ - .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ - .word FSMC_IRQHandler /* FSMC */ - .word SDIO_IRQHandler /* SDIO */ - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ - .word UART4_IRQHandler /* UART4 */ - .word UART5_IRQHandler /* UART5 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ - .word TIM7_IRQHandler /* TIM7 */ - .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ - .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ - .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ - .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ - .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ - .word ETH_IRQHandler /* Ethernet */ - .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ - .word CAN2_TX_IRQHandler /* CAN2 TX */ - .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ - .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ - .word CAN2_SCE_IRQHandler /* CAN2 SCE */ - .word OTG_FS_IRQHandler /* USB OTG FS */ - .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ - .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ - .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ - .word USART6_IRQHandler /* USART6 */ - .word I2C3_EV_IRQHandler /* I2C3 event */ - .word I2C3_ER_IRQHandler /* I2C3 error */ - .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ - .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ - .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ - .word OTG_HS_IRQHandler /* USB OTG HS */ - .word DCMI_IRQHandler /* DCMI */ - .word CRYP_IRQHandler /* CRYP crypto */ - .word HASH_RNG_IRQHandler /* Hash and Rng */ - .word FPU_IRQHandler /* FPU */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMP_STAMP_IRQHandler - .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler - .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Stream0_IRQHandler - .thumb_set DMA1_Stream0_IRQHandler,Default_Handler - - .weak DMA1_Stream1_IRQHandler - .thumb_set DMA1_Stream1_IRQHandler,Default_Handler - - .weak DMA1_Stream2_IRQHandler - .thumb_set DMA1_Stream2_IRQHandler,Default_Handler - - .weak DMA1_Stream3_IRQHandler - .thumb_set DMA1_Stream3_IRQHandler,Default_Handler - - .weak DMA1_Stream4_IRQHandler - .thumb_set DMA1_Stream4_IRQHandler,Default_Handler - - .weak DMA1_Stream5_IRQHandler - .thumb_set DMA1_Stream5_IRQHandler,Default_Handler - - .weak DMA1_Stream6_IRQHandler - .thumb_set DMA1_Stream6_IRQHandler,Default_Handler - - .weak ADC_IRQHandler - .thumb_set ADC_IRQHandler,Default_Handler - - .weak CAN1_TX_IRQHandler - .thumb_set CAN1_TX_IRQHandler,Default_Handler - - .weak CAN1_RX0_IRQHandler - .thumb_set CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM9_IRQHandler - .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM10_IRQHandler - .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM11_IRQHandler - .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler - .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak OTG_FS_WKUP_IRQHandler - .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler - - .weak TIM8_BRK_TIM12_IRQHandler - .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler - - .weak TIM8_UP_TIM13_IRQHandler - .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_TIM14_IRQHandler - .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler - - .weak TIM8_CC_IRQHandler - .thumb_set TIM8_CC_IRQHandler,Default_Handler - - .weak DMA1_Stream7_IRQHandler - .thumb_set DMA1_Stream7_IRQHandler,Default_Handler - - .weak FSMC_IRQHandler - .thumb_set FSMC_IRQHandler,Default_Handler - - .weak SDIO_IRQHandler - .thumb_set SDIO_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Stream0_IRQHandler - .thumb_set DMA2_Stream0_IRQHandler,Default_Handler - - .weak DMA2_Stream1_IRQHandler - .thumb_set DMA2_Stream1_IRQHandler,Default_Handler - - .weak DMA2_Stream2_IRQHandler - .thumb_set DMA2_Stream2_IRQHandler,Default_Handler - - .weak DMA2_Stream3_IRQHandler - .thumb_set DMA2_Stream3_IRQHandler,Default_Handler - - .weak DMA2_Stream4_IRQHandler - .thumb_set DMA2_Stream4_IRQHandler,Default_Handler - - .weak ETH_IRQHandler - .thumb_set ETH_IRQHandler,Default_Handler - - .weak ETH_WKUP_IRQHandler - .thumb_set ETH_WKUP_IRQHandler,Default_Handler - - .weak CAN2_TX_IRQHandler - .thumb_set CAN2_TX_IRQHandler,Default_Handler - - .weak CAN2_RX0_IRQHandler - .thumb_set CAN2_RX0_IRQHandler,Default_Handler - - .weak CAN2_RX1_IRQHandler - .thumb_set CAN2_RX1_IRQHandler,Default_Handler - - .weak CAN2_SCE_IRQHandler - .thumb_set CAN2_SCE_IRQHandler,Default_Handler - - .weak OTG_FS_IRQHandler - .thumb_set OTG_FS_IRQHandler,Default_Handler - - .weak DMA2_Stream5_IRQHandler - .thumb_set DMA2_Stream5_IRQHandler,Default_Handler - - .weak DMA2_Stream6_IRQHandler - .thumb_set DMA2_Stream6_IRQHandler,Default_Handler - - .weak DMA2_Stream7_IRQHandler - .thumb_set DMA2_Stream7_IRQHandler,Default_Handler - - .weak USART6_IRQHandler - .thumb_set USART6_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler - .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler - .thumb_set I2C3_ER_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_OUT_IRQHandler - .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_IN_IRQHandler - .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler - - .weak OTG_HS_WKUP_IRQHandler - .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler - - .weak OTG_HS_IRQHandler - .thumb_set OTG_HS_IRQHandler,Default_Handler - - .weak DCMI_IRQHandler - .thumb_set DCMI_IRQHandler,Default_Handler - - .weak CRYP_IRQHandler - .thumb_set CRYP_IRQHandler,Default_Handler - - .weak HASH_RNG_IRQHandler - .thumb_set HASH_RNG_IRQHandler,Default_Handler - - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/lib/src/stm32f4/CPU/stm32f4xxxE/stm32_flash.ld b/lib/src/stm32f4/CPU/stm32f4xxxE/stm32_flash.ld deleted file mode 100644 --- a/lib/src/stm32f4/CPU/stm32f4xxxE/stm32_flash.ld +++ /dev/null @@ -1,171 +0,0 @@ -/* -***************************************************************************** -** -** File : stm32_flash.ld -** -** Abstract : Linker script for STM32F207IG Device with -** 1024KByte FLASH, 112KByte RAM -** -** Set heap size, stack size and stack location according -** to application requirements. -** -** Set memory bank area and size if external memory is used. -** -** Target : STMicroelectronics STM32 -** -** Environment : Atollic TrueSTUDIO(R) -** -** Distribution: The file is distributed �as is,� without any warranty -** of any kind. -** -** (c)Copyright Atollic AB. -** You may use this file as-is or modify it according to the needs of your -** project. Distribution of this file (unmodified or modified) is not -** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the -** rights to distribute the assembled, compiled & linked contents of this -** file as part of an application binary file, provided that it is built -** using the Atollic TrueSTUDIO(R) toolchain. -** -***************************************************************************** -*/ - -/* Entry Point */ -ENTRY(Reset_Handler) - -/* Highest address of the user mode stack */ -_estack = 0x2001c000; /* end of 112K RAM */ - -/* Generate a link error if heap and stack don't fit into RAM */ -_Min_Heap_Size = 0; /* required amount of heap */ -_Min_Stack_Size = 0x400; /* required amount of stack */ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112K - MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K -} - -/* Define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } >FLASH - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - *(.glue_7) /* glue arm to thumb code */ - *(.glue_7t) /* glue thumb to arm code */ - *(.eh_frame) - - KEEP (*(.init)) - KEEP (*(.fini)) - - . = ALIGN(4); - _etext = .; /* define a global symbols at end of code */ - } >FLASH - - - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH - .ARM : { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } >FLASH - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array*)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >FLASH - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array*)) - PROVIDE_HIDDEN (__init_array_end = .); - } >FLASH - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(.fini_array*)) - KEEP (*(SORT(.fini_array.*))) - PROVIDE_HIDDEN (__fini_array_end = .); - } >FLASH - - /* used by the startup to initialize data */ - _sidata = .; - - /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end */ - } >RAM - - /* Uninitialized data section */ - . = ALIGN(4); - .bss : - { - /* This is used by the startup in order to initialize the .bss secion */ - _sbss = .; /* define a global symbol at bss start */ - __bss_start__ = _sbss; - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end */ - __bss_end__ = _ebss; - } >RAM - - /* User_heap_stack section, used to check that there is enough RAM left */ - ._user_heap_stack : - { - . = ALIGN(4); - PROVIDE ( end = . ); - PROVIDE ( _end = . ); - . = . + _Min_Heap_Size; - . = . + _Min_Stack_Size; - . = ALIGN(4); - } >RAM - - /* MEMORY_bank1 section, code must be located here explicitly */ - /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ - .memory_b1_text : - { - *(.mb1text) /* .mb1text sections (code) */ - *(.mb1text*) /* .mb1text* sections (code) */ - *(.mb1rodata) /* read-only data (constants) */ - *(.mb1rodata*) - } >MEMORY_B1 - - /* Remove information from the standard libraries */ - /DISCARD/ : - { - libc.a ( * ) - libm.a ( * ) - libgcc.a ( * ) - } - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/lib/src/stm32f4/CPU/stm32f4xxxF/fs.c b/lib/src/stm32f4/CPU/stm32f4xxxF/fs.c deleted file mode 100644 --- a/lib/src/stm32f4/CPU/stm32f4xxxF/fs.c +++ /dev/null @@ -1,25 +0,0 @@ -#include -#include -#include -#define __MAX_OPENED_FILES__ 32 -#define __FS_ROOT_SIZE__ 32 -const int32_t __max_opened_files__ = __MAX_OPENED_FILES__; -streamdevice* __files__[__MAX_OPENED_FILES__]; -const int32_t __fs_root_size__ = __FS_ROOT_SIZE__; -int32_t __fs_root__[__FS_ROOT_SIZE__]; - - - - -void __init_fs() -{ - int i=0; - for(i=0;i<__fs_root_size__;i++) - { - __fs_root__[i]=NULL; - } - for(i=0;i<__max_opened_files__ ;i++) - { - __files__[i]=NULL; - } -} diff --git a/lib/src/stm32f4/CPU/stm32f4xxxF/startup_stm32f4xx.s b/lib/src/stm32f4/CPU/stm32f4xxxF/startup_stm32f4xx.s deleted file mode 100644 --- a/lib/src/stm32f4/CPU/stm32f4xxxF/startup_stm32f4xx.s +++ /dev/null @@ -1,511 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f4xx.s - * @author MCD Application Team - * @version V1.0.0 - * @date 30-September-2011 - * @brief STM32F4xx Devices vector table for RIDE7 toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Configure the clock system and the external SRAM mounted on - * STM324xG-EVAL board to be used as data memory (optional, - * to be enabled by user) - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M4 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m3 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss -/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ - -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss - -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call the application's entry point.*/ - bl __init_fs - bl bsp_init - bl main - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M3. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -*******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - - /* External Interrupts */ - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_IRQHandler /* PVD through EXTI Line detection */ - .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ - .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line0 */ - .word EXTI1_IRQHandler /* EXTI Line1 */ - .word EXTI2_IRQHandler /* EXTI Line2 */ - .word EXTI3_IRQHandler /* EXTI Line3 */ - .word EXTI4_IRQHandler /* EXTI Line4 */ - .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ - .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ - .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ - .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ - .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ - .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ - .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ - .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ - .word CAN1_TX_IRQHandler /* CAN1 TX */ - .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ - .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .word CAN1_SCE_IRQHandler /* CAN1 SCE */ - .word EXTI9_5_IRQHandler /* External Line[9:5]s */ - .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ - .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ - .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_IRQHandler /* USART3 */ - .word EXTI15_10_IRQHandler /* External Line[15:10]s */ - .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ - .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ - .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ - .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ - .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ - .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ - .word FSMC_IRQHandler /* FSMC */ - .word SDIO_IRQHandler /* SDIO */ - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ - .word UART4_IRQHandler /* UART4 */ - .word UART5_IRQHandler /* UART5 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ - .word TIM7_IRQHandler /* TIM7 */ - .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ - .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ - .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ - .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ - .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ - .word ETH_IRQHandler /* Ethernet */ - .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ - .word CAN2_TX_IRQHandler /* CAN2 TX */ - .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ - .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ - .word CAN2_SCE_IRQHandler /* CAN2 SCE */ - .word OTG_FS_IRQHandler /* USB OTG FS */ - .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ - .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ - .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ - .word USART6_IRQHandler /* USART6 */ - .word I2C3_EV_IRQHandler /* I2C3 event */ - .word I2C3_ER_IRQHandler /* I2C3 error */ - .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ - .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ - .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ - .word OTG_HS_IRQHandler /* USB OTG HS */ - .word DCMI_IRQHandler /* DCMI */ - .word CRYP_IRQHandler /* CRYP crypto */ - .word HASH_RNG_IRQHandler /* Hash and Rng */ - .word FPU_IRQHandler /* FPU */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMP_STAMP_IRQHandler - .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler - .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Stream0_IRQHandler - .thumb_set DMA1_Stream0_IRQHandler,Default_Handler - - .weak DMA1_Stream1_IRQHandler - .thumb_set DMA1_Stream1_IRQHandler,Default_Handler - - .weak DMA1_Stream2_IRQHandler - .thumb_set DMA1_Stream2_IRQHandler,Default_Handler - - .weak DMA1_Stream3_IRQHandler - .thumb_set DMA1_Stream3_IRQHandler,Default_Handler - - .weak DMA1_Stream4_IRQHandler - .thumb_set DMA1_Stream4_IRQHandler,Default_Handler - - .weak DMA1_Stream5_IRQHandler - .thumb_set DMA1_Stream5_IRQHandler,Default_Handler - - .weak DMA1_Stream6_IRQHandler - .thumb_set DMA1_Stream6_IRQHandler,Default_Handler - - .weak ADC_IRQHandler - .thumb_set ADC_IRQHandler,Default_Handler - - .weak CAN1_TX_IRQHandler - .thumb_set CAN1_TX_IRQHandler,Default_Handler - - .weak CAN1_RX0_IRQHandler - .thumb_set CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM9_IRQHandler - .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM10_IRQHandler - .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM11_IRQHandler - .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler - .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak OTG_FS_WKUP_IRQHandler - .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler - - .weak TIM8_BRK_TIM12_IRQHandler - .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler - - .weak TIM8_UP_TIM13_IRQHandler - .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_TIM14_IRQHandler - .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler - - .weak TIM8_CC_IRQHandler - .thumb_set TIM8_CC_IRQHandler,Default_Handler - - .weak DMA1_Stream7_IRQHandler - .thumb_set DMA1_Stream7_IRQHandler,Default_Handler - - .weak FSMC_IRQHandler - .thumb_set FSMC_IRQHandler,Default_Handler - - .weak SDIO_IRQHandler - .thumb_set SDIO_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Stream0_IRQHandler - .thumb_set DMA2_Stream0_IRQHandler,Default_Handler - - .weak DMA2_Stream1_IRQHandler - .thumb_set DMA2_Stream1_IRQHandler,Default_Handler - - .weak DMA2_Stream2_IRQHandler - .thumb_set DMA2_Stream2_IRQHandler,Default_Handler - - .weak DMA2_Stream3_IRQHandler - .thumb_set DMA2_Stream3_IRQHandler,Default_Handler - - .weak DMA2_Stream4_IRQHandler - .thumb_set DMA2_Stream4_IRQHandler,Default_Handler - - .weak ETH_IRQHandler - .thumb_set ETH_IRQHandler,Default_Handler - - .weak ETH_WKUP_IRQHandler - .thumb_set ETH_WKUP_IRQHandler,Default_Handler - - .weak CAN2_TX_IRQHandler - .thumb_set CAN2_TX_IRQHandler,Default_Handler - - .weak CAN2_RX0_IRQHandler - .thumb_set CAN2_RX0_IRQHandler,Default_Handler - - .weak CAN2_RX1_IRQHandler - .thumb_set CAN2_RX1_IRQHandler,Default_Handler - - .weak CAN2_SCE_IRQHandler - .thumb_set CAN2_SCE_IRQHandler,Default_Handler - - .weak OTG_FS_IRQHandler - .thumb_set OTG_FS_IRQHandler,Default_Handler - - .weak DMA2_Stream5_IRQHandler - .thumb_set DMA2_Stream5_IRQHandler,Default_Handler - - .weak DMA2_Stream6_IRQHandler - .thumb_set DMA2_Stream6_IRQHandler,Default_Handler - - .weak DMA2_Stream7_IRQHandler - .thumb_set DMA2_Stream7_IRQHandler,Default_Handler - - .weak USART6_IRQHandler - .thumb_set USART6_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler - .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler - .thumb_set I2C3_ER_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_OUT_IRQHandler - .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_IN_IRQHandler - .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler - - .weak OTG_HS_WKUP_IRQHandler - .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler - - .weak OTG_HS_IRQHandler - .thumb_set OTG_HS_IRQHandler,Default_Handler - - .weak DCMI_IRQHandler - .thumb_set DCMI_IRQHandler,Default_Handler - - .weak CRYP_IRQHandler - .thumb_set CRYP_IRQHandler,Default_Handler - - .weak HASH_RNG_IRQHandler - .thumb_set HASH_RNG_IRQHandler,Default_Handler - - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/lib/src/stm32f4/CPU/stm32f4xxxF/stm32_flash.ld b/lib/src/stm32f4/CPU/stm32f4xxxF/stm32_flash.ld deleted file mode 100644 --- a/lib/src/stm32f4/CPU/stm32f4xxxF/stm32_flash.ld +++ /dev/null @@ -1,171 +0,0 @@ -/* -***************************************************************************** -** -** File : stm32_flash.ld -** -** Abstract : Linker script for STM32F207IG Device with -** 1024KByte FLASH, 112KByte RAM -** -** Set heap size, stack size and stack location according -** to application requirements. -** -** Set memory bank area and size if external memory is used. -** -** Target : STMicroelectronics STM32 -** -** Environment : Atollic TrueSTUDIO(R) -** -** Distribution: The file is distributed �as is,� without any warranty -** of any kind. -** -** (c)Copyright Atollic AB. -** You may use this file as-is or modify it according to the needs of your -** project. Distribution of this file (unmodified or modified) is not -** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the -** rights to distribute the assembled, compiled & linked contents of this -** file as part of an application binary file, provided that it is built -** using the Atollic TrueSTUDIO(R) toolchain. -** -***************************************************************************** -*/ - -/* Entry Point */ -ENTRY(Reset_Handler) - -/* Highest address of the user mode stack */ -_estack = 0x2001c000; /* end of 112K RAM */ - -/* Generate a link error if heap and stack don't fit into RAM */ -_Min_Heap_Size = 0; /* required amount of heap */ -_Min_Stack_Size = 0x400; /* required amount of stack */ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 768K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112K - MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K -} - -/* Define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } >FLASH - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - *(.glue_7) /* glue arm to thumb code */ - *(.glue_7t) /* glue thumb to arm code */ - *(.eh_frame) - - KEEP (*(.init)) - KEEP (*(.fini)) - - . = ALIGN(4); - _etext = .; /* define a global symbols at end of code */ - } >FLASH - - - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH - .ARM : { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } >FLASH - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array*)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >FLASH - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array*)) - PROVIDE_HIDDEN (__init_array_end = .); - } >FLASH - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(.fini_array*)) - KEEP (*(SORT(.fini_array.*))) - PROVIDE_HIDDEN (__fini_array_end = .); - } >FLASH - - /* used by the startup to initialize data */ - _sidata = .; - - /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end */ - } >RAM - - /* Uninitialized data section */ - . = ALIGN(4); - .bss : - { - /* This is used by the startup in order to initialize the .bss secion */ - _sbss = .; /* define a global symbol at bss start */ - __bss_start__ = _sbss; - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end */ - __bss_end__ = _ebss; - } >RAM - - /* User_heap_stack section, used to check that there is enough RAM left */ - ._user_heap_stack : - { - . = ALIGN(4); - PROVIDE ( end = . ); - PROVIDE ( _end = . ); - . = . + _Min_Heap_Size; - . = . + _Min_Stack_Size; - . = ALIGN(4); - } >RAM - - /* MEMORY_bank1 section, code must be located here explicitly */ - /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ - .memory_b1_text : - { - *(.mb1text) /* .mb1text sections (code) */ - *(.mb1text*) /* .mb1text* sections (code) */ - *(.mb1rodata) /* read-only data (constants) */ - *(.mb1rodata*) - } >MEMORY_B1 - - /* Remove information from the standard libraries */ - /DISCARD/ : - { - libc.a ( * ) - libm.a ( * ) - libgcc.a ( * ) - } - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/lib/src/stm32f4/CPU/stm32f4xxxG/cpuinit.c b/lib/src/stm32f4/CPU/stm32f4xxxG/cpuinit.c deleted file mode 100644 --- a/lib/src/stm32f4/CPU/stm32f4xxxG/cpuinit.c +++ /dev/null @@ -1,60 +0,0 @@ -#include "stm32f4xx.h" -#include -#include -#include -#include -#include -#include -extern int main(); - - - -void cpu_init() -{ - extern uint32_t currentCpuFreq; - currentCpuFreq = 16*1000*1000; - enable_FPU(); - RCC->CR |= (uint32_t)0x00000001; - FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS; - reset_AHB1(); - reset_AHB2(); - reset_APB1(); - reset_APB2(); - RCC->CR |= (uint32_t)0x00000001; - FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS; - RCC->CFGR = 0x00000000; - RCC->CIR = 0x00000000; - SCB->VTOR = FLASH_BASE; - RCC->APB1ENR |= RCC_APB1ENR_PWREN; - PWR->CR |= PWR_CR_PMODE; - currentCpuFreq=setCpuFreq(currentCpuFreq); - currentCpuFreq=getCpuFreq(); - configureSysTick(); - bsp_init(); - printf("SysTick Configured to reach 100us period\n\r"); - RCC_ClocksTypeDef RCC_ClocksStatus; - RCC_GetClocksFreq(&RCC_ClocksStatus); - printf("PLL Configured got:\n\r SYS=%uHz\n\r CPU=%uHz\n\r APB1=%uHz\n\r APB2=%uHz\n\r",(unsigned int)RCC_ClocksStatus.SYSCLK_Frequency,(unsigned int)RCC_ClocksStatus.HCLK_Frequency,(unsigned int)RCC_ClocksStatus.PCLK1_Frequency,(unsigned int)RCC_ClocksStatus.PCLK2_Frequency); - printf("Enter Main\n\r"); - int res=main(); - printf("\n\rprogram exited with code "); - printf("%u",res); - printf("\n\r"); - while(1) - { - delay_100us(10000); - gpioset(LED1); - delay_100us(10000); - gpioclr(LED1); - } -} - - - - - - - - - - diff --git a/lib/src/stm32f4/CPU/stm32f4xxxG/fs.c b/lib/src/stm32f4/CPU/stm32f4xxxG/fs.c deleted file mode 100644 --- a/lib/src/stm32f4/CPU/stm32f4xxxG/fs.c +++ /dev/null @@ -1,25 +0,0 @@ -#include -#include -#include -#include - -const int32_t __max_opened_files__ = __MAX_OPENED_FILES__; -__IO streamdevice* __opnfiles__[__MAX_OPENED_FILES__]; -const int32_t __fs_root_size__ = __FS_ROOT_SIZE__; -int32_t __fs_root__[__FS_ROOT_SIZE__]; - - -/* -void __init_fs() -{ - int i=0; - for(i=0;i<__fs_root_size__;i++) - { - __fs_root__[i]=(int32_t)NULL; - } - for(i=0;i<__max_opened_files__ ;i++) - { - __opnfiles__[i]._stream=NULL; - } -} -*/ diff --git a/lib/src/stm32f4/CPU/stm32f4xxxG/startup.s b/lib/src/stm32f4/CPU/stm32f4xxxG/startup.s deleted file mode 100644 --- a/lib/src/stm32f4/CPU/stm32f4xxxG/startup.s +++ /dev/null @@ -1,454 +0,0 @@ - - .syntax unified - .cpu cortex-m4 - /*.fpu softvfp*/ - .fpu fpv4-sp-d16 - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss -/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ - - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss - - bl cpu_init - bx lr -.size Reset_Handler, .-Reset_Handler - - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler - - - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - - /* External Interrupts */ - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_IRQHandler /* PVD through EXTI Line detection */ - .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ - .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line0 */ - .word EXTI1_IRQHandler /* EXTI Line1 */ - .word EXTI2_IRQHandler /* EXTI Line2 */ - .word EXTI3_IRQHandler /* EXTI Line3 */ - .word EXTI4_IRQHandler /* EXTI Line4 */ - .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ - .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ - .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ - .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ - .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ - .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ - .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ - .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ - .word CAN1_TX_IRQHandler /* CAN1 TX */ - .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ - .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .word CAN1_SCE_IRQHandler /* CAN1 SCE */ - .word EXTI9_5_IRQHandler /* External Line[9:5]s */ - .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ - .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ - .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_IRQHandler /* USART3 */ - .word EXTI15_10_IRQHandler /* External Line[15:10]s */ - .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ - .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ - .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ - .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ - .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ - .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ - .word FSMC_IRQHandler /* FSMC */ - .word SDIO_IRQHandler /* SDIO */ - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ - .word UART4_IRQHandler /* UART4 */ - .word UART5_IRQHandler /* UART5 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ - .word TIM7_IRQHandler /* TIM7 */ - .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ - .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ - .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ - .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ - .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ - .word ETH_IRQHandler /* Ethernet */ - .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ - .word CAN2_TX_IRQHandler /* CAN2 TX */ - .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ - .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ - .word CAN2_SCE_IRQHandler /* CAN2 SCE */ - .word OTG_FS_IRQHandler /* USB OTG FS */ - .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ - .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ - .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ - .word USART6_IRQHandler /* USART6 */ - .word I2C3_EV_IRQHandler /* I2C3 event */ - .word I2C3_ER_IRQHandler /* I2C3 error */ - .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ - .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ - .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ - .word OTG_HS_IRQHandler /* USB OTG HS */ - .word DCMI_IRQHandler /* DCMI */ - .word CRYP_IRQHandler /* CRYP crypto */ - .word HASH_RNG_IRQHandler /* Hash and Rng */ - .word FPU_IRQHandler /* FPU */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMP_STAMP_IRQHandler - .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler - .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Stream0_IRQHandler - .thumb_set DMA1_Stream0_IRQHandler,Default_Handler - - .weak DMA1_Stream1_IRQHandler - .thumb_set DMA1_Stream1_IRQHandler,Default_Handler - - .weak DMA1_Stream2_IRQHandler - .thumb_set DMA1_Stream2_IRQHandler,Default_Handler - - .weak DMA1_Stream3_IRQHandler - .thumb_set DMA1_Stream3_IRQHandler,Default_Handler - - .weak DMA1_Stream4_IRQHandler - .thumb_set DMA1_Stream4_IRQHandler,Default_Handler - - .weak DMA1_Stream5_IRQHandler - .thumb_set DMA1_Stream5_IRQHandler,Default_Handler - - .weak DMA1_Stream6_IRQHandler - .thumb_set DMA1_Stream6_IRQHandler,Default_Handler - - .weak ADC_IRQHandler - .thumb_set ADC_IRQHandler,Default_Handler - - .weak CAN1_TX_IRQHandler - .thumb_set CAN1_TX_IRQHandler,Default_Handler - - .weak CAN1_RX0_IRQHandler - .thumb_set CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM9_IRQHandler - .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM10_IRQHandler - .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM11_IRQHandler - .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler - .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak OTG_FS_WKUP_IRQHandler - .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler - - .weak TIM8_BRK_TIM12_IRQHandler - .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler - - .weak TIM8_UP_TIM13_IRQHandler - .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_TIM14_IRQHandler - .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler - - .weak TIM8_CC_IRQHandler - .thumb_set TIM8_CC_IRQHandler,Default_Handler - - .weak DMA1_Stream7_IRQHandler - .thumb_set DMA1_Stream7_IRQHandler,Default_Handler - - .weak FSMC_IRQHandler - .thumb_set FSMC_IRQHandler,Default_Handler - - .weak SDIO_IRQHandler - .thumb_set SDIO_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Stream0_IRQHandler - .thumb_set DMA2_Stream0_IRQHandler,Default_Handler - - .weak DMA2_Stream1_IRQHandler - .thumb_set DMA2_Stream1_IRQHandler,Default_Handler - - .weak DMA2_Stream2_IRQHandler - .thumb_set DMA2_Stream2_IRQHandler,Default_Handler - - .weak DMA2_Stream3_IRQHandler - .thumb_set DMA2_Stream3_IRQHandler,Default_Handler - - .weak DMA2_Stream4_IRQHandler - .thumb_set DMA2_Stream4_IRQHandler,Default_Handler - - .weak ETH_IRQHandler - .thumb_set ETH_IRQHandler,Default_Handler - - .weak ETH_WKUP_IRQHandler - .thumb_set ETH_WKUP_IRQHandler,Default_Handler - - .weak CAN2_TX_IRQHandler - .thumb_set CAN2_TX_IRQHandler,Default_Handler - - .weak CAN2_RX0_IRQHandler - .thumb_set CAN2_RX0_IRQHandler,Default_Handler - - .weak CAN2_RX1_IRQHandler - .thumb_set CAN2_RX1_IRQHandler,Default_Handler - - .weak CAN2_SCE_IRQHandler - .thumb_set CAN2_SCE_IRQHandler,Default_Handler - - .weak OTG_FS_IRQHandler - .thumb_set OTG_FS_IRQHandler,Default_Handler - - .weak DMA2_Stream5_IRQHandler - .thumb_set DMA2_Stream5_IRQHandler,Default_Handler - - .weak DMA2_Stream6_IRQHandler - .thumb_set DMA2_Stream6_IRQHandler,Default_Handler - - .weak DMA2_Stream7_IRQHandler - .thumb_set DMA2_Stream7_IRQHandler,Default_Handler - - .weak USART6_IRQHandler - .thumb_set USART6_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler - .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler - .thumb_set I2C3_ER_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_OUT_IRQHandler - .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_IN_IRQHandler - .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler - - .weak OTG_HS_WKUP_IRQHandler - .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler - - .weak OTG_HS_IRQHandler - .thumb_set OTG_HS_IRQHandler,Default_Handler - - .weak DCMI_IRQHandler - .thumb_set DCMI_IRQHandler,Default_Handler - - .weak CRYP_IRQHandler - .thumb_set CRYP_IRQHandler,Default_Handler - - .weak HASH_RNG_IRQHandler - .thumb_set HASH_RNG_IRQHandler,Default_Handler - - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler diff --git a/lib/src/stm32f4/CPU/stm32f4xxxG/startup_stm32f4xx.s b/lib/src/stm32f4/CPU/stm32f4xxxG/startup_stm32f4xx.s deleted file mode 100644 --- a/lib/src/stm32f4/CPU/stm32f4xxxG/startup_stm32f4xx.s +++ /dev/null @@ -1,510 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f4xx.s - * @author MCD Application Team - * @version V1.0.0 - * @date 30-September-2011 - * @brief STM32F4xx Devices vector table for RIDE7 toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Configure the clock system and the external SRAM mounted on - * STM324xG-EVAL board to be used as data memory (optional, - * to be enabled by user) - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M4 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m3 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss -/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ - -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss - -/* Call the clock system intitialization function.*/ - bl SystemInit - bl bsp_init -/* Call the application's entry point.*/ - bl main - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M3. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -*******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - - /* External Interrupts */ - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_IRQHandler /* PVD through EXTI Line detection */ - .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ - .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line0 */ - .word EXTI1_IRQHandler /* EXTI Line1 */ - .word EXTI2_IRQHandler /* EXTI Line2 */ - .word EXTI3_IRQHandler /* EXTI Line3 */ - .word EXTI4_IRQHandler /* EXTI Line4 */ - .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ - .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ - .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ - .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ - .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ - .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ - .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ - .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ - .word CAN1_TX_IRQHandler /* CAN1 TX */ - .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ - .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .word CAN1_SCE_IRQHandler /* CAN1 SCE */ - .word EXTI9_5_IRQHandler /* External Line[9:5]s */ - .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ - .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ - .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_IRQHandler /* USART3 */ - .word EXTI15_10_IRQHandler /* External Line[15:10]s */ - .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ - .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ - .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ - .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ - .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ - .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ - .word FSMC_IRQHandler /* FSMC */ - .word SDIO_IRQHandler /* SDIO */ - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ - .word UART4_IRQHandler /* UART4 */ - .word UART5_IRQHandler /* UART5 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ - .word TIM7_IRQHandler /* TIM7 */ - .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ - .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ - .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ - .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ - .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ - .word ETH_IRQHandler /* Ethernet */ - .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ - .word CAN2_TX_IRQHandler /* CAN2 TX */ - .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ - .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ - .word CAN2_SCE_IRQHandler /* CAN2 SCE */ - .word OTG_FS_IRQHandler /* USB OTG FS */ - .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ - .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ - .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ - .word USART6_IRQHandler /* USART6 */ - .word I2C3_EV_IRQHandler /* I2C3 event */ - .word I2C3_ER_IRQHandler /* I2C3 error */ - .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ - .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ - .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ - .word OTG_HS_IRQHandler /* USB OTG HS */ - .word DCMI_IRQHandler /* DCMI */ - .word CRYP_IRQHandler /* CRYP crypto */ - .word HASH_RNG_IRQHandler /* Hash and Rng */ - .word FPU_IRQHandler /* FPU */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMP_STAMP_IRQHandler - .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler - .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Stream0_IRQHandler - .thumb_set DMA1_Stream0_IRQHandler,Default_Handler - - .weak DMA1_Stream1_IRQHandler - .thumb_set DMA1_Stream1_IRQHandler,Default_Handler - - .weak DMA1_Stream2_IRQHandler - .thumb_set DMA1_Stream2_IRQHandler,Default_Handler - - .weak DMA1_Stream3_IRQHandler - .thumb_set DMA1_Stream3_IRQHandler,Default_Handler - - .weak DMA1_Stream4_IRQHandler - .thumb_set DMA1_Stream4_IRQHandler,Default_Handler - - .weak DMA1_Stream5_IRQHandler - .thumb_set DMA1_Stream5_IRQHandler,Default_Handler - - .weak DMA1_Stream6_IRQHandler - .thumb_set DMA1_Stream6_IRQHandler,Default_Handler - - .weak ADC_IRQHandler - .thumb_set ADC_IRQHandler,Default_Handler - - .weak CAN1_TX_IRQHandler - .thumb_set CAN1_TX_IRQHandler,Default_Handler - - .weak CAN1_RX0_IRQHandler - .thumb_set CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM9_IRQHandler - .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM10_IRQHandler - .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM11_IRQHandler - .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler - .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak OTG_FS_WKUP_IRQHandler - .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler - - .weak TIM8_BRK_TIM12_IRQHandler - .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler - - .weak TIM8_UP_TIM13_IRQHandler - .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_TIM14_IRQHandler - .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler - - .weak TIM8_CC_IRQHandler - .thumb_set TIM8_CC_IRQHandler,Default_Handler - - .weak DMA1_Stream7_IRQHandler - .thumb_set DMA1_Stream7_IRQHandler,Default_Handler - - .weak FSMC_IRQHandler - .thumb_set FSMC_IRQHandler,Default_Handler - - .weak SDIO_IRQHandler - .thumb_set SDIO_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Stream0_IRQHandler - .thumb_set DMA2_Stream0_IRQHandler,Default_Handler - - .weak DMA2_Stream1_IRQHandler - .thumb_set DMA2_Stream1_IRQHandler,Default_Handler - - .weak DMA2_Stream2_IRQHandler - .thumb_set DMA2_Stream2_IRQHandler,Default_Handler - - .weak DMA2_Stream3_IRQHandler - .thumb_set DMA2_Stream3_IRQHandler,Default_Handler - - .weak DMA2_Stream4_IRQHandler - .thumb_set DMA2_Stream4_IRQHandler,Default_Handler - - .weak ETH_IRQHandler - .thumb_set ETH_IRQHandler,Default_Handler - - .weak ETH_WKUP_IRQHandler - .thumb_set ETH_WKUP_IRQHandler,Default_Handler - - .weak CAN2_TX_IRQHandler - .thumb_set CAN2_TX_IRQHandler,Default_Handler - - .weak CAN2_RX0_IRQHandler - .thumb_set CAN2_RX0_IRQHandler,Default_Handler - - .weak CAN2_RX1_IRQHandler - .thumb_set CAN2_RX1_IRQHandler,Default_Handler - - .weak CAN2_SCE_IRQHandler - .thumb_set CAN2_SCE_IRQHandler,Default_Handler - - .weak OTG_FS_IRQHandler - .thumb_set OTG_FS_IRQHandler,Default_Handler - - .weak DMA2_Stream5_IRQHandler - .thumb_set DMA2_Stream5_IRQHandler,Default_Handler - - .weak DMA2_Stream6_IRQHandler - .thumb_set DMA2_Stream6_IRQHandler,Default_Handler - - .weak DMA2_Stream7_IRQHandler - .thumb_set DMA2_Stream7_IRQHandler,Default_Handler - - .weak USART6_IRQHandler - .thumb_set USART6_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler - .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler - .thumb_set I2C3_ER_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_OUT_IRQHandler - .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_IN_IRQHandler - .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler - - .weak OTG_HS_WKUP_IRQHandler - .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler - - .weak OTG_HS_IRQHandler - .thumb_set OTG_HS_IRQHandler,Default_Handler - - .weak DCMI_IRQHandler - .thumb_set DCMI_IRQHandler,Default_Handler - - .weak CRYP_IRQHandler - .thumb_set CRYP_IRQHandler,Default_Handler - - .weak HASH_RNG_IRQHandler - .thumb_set HASH_RNG_IRQHandler,Default_Handler - - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/lib/src/stm32f4/CPU/stm32f4xxxG/stm32_flash.ld b/lib/src/stm32f4/CPU/stm32f4xxxG/stm32_flash.ld deleted file mode 100644 --- a/lib/src/stm32f4/CPU/stm32f4xxxG/stm32_flash.ld +++ /dev/null @@ -1,171 +0,0 @@ -/* -***************************************************************************** -** -** File : stm32_flash.ld -** -** Abstract : Linker script for STM32F407VG Device with -** 1024KByte FLASH, 192KByte RAM -** -** Set heap size, stack size and stack location according -** to application requirements. -** -** Set memory bank area and size if external memory is used. -** -** Target : STMicroelectronics STM32 -** -** Environment : Atollic TrueSTUDIO(R) -** -** Distribution: The file is distributed �as is,� without any warranty -** of any kind. -** -** (c)Copyright Atollic AB. -** You may use this file as-is or modify it according to the needs of your -** project. Distribution of this file (unmodified or modified) is not -** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the -** rights to distribute the assembled, compiled & linked contents of this -** file as part of an application binary file, provided that it is built -** using the Atollic TrueSTUDIO(R) toolchain. -** -***************************************************************************** -*/ - -/* Entry Point */ -ENTRY(Reset_Handler) - -/* Highest address of the user mode stack */ -_estack = 0x20020000; /* end of 128K RAM on AHB bus*/ - -/* Generate a link error if heap and stack don't fit into RAM */ -_Min_Heap_Size = 0; /* required amount of heap */ -_Min_Stack_Size = 0x1000; /* required amount of stack */ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K - MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K -} - -/* Define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } >FLASH - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - *(.glue_7) /* glue arm to thumb code */ - *(.glue_7t) /* glue thumb to arm code */ - *(.eh_frame) - - KEEP (*(.init)) - KEEP (*(.fini)) - - . = ALIGN(4); - _etext = .; /* define a global symbols at end of code */ - } >FLASH - - - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH - .ARM : { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } >FLASH - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array*)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >FLASH - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array*)) - PROVIDE_HIDDEN (__init_array_end = .); - } >FLASH - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(.fini_array*)) - KEEP (*(SORT(.fini_array.*))) - PROVIDE_HIDDEN (__fini_array_end = .); - } >FLASH - - /* used by the startup to initialize data */ - _sidata = .; - - /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end */ - } >RAM - - /* Uninitialized data section */ - . = ALIGN(4); - .bss : - { - /* This is used by the startup in order to initialize the .bss secion */ - _sbss = .; /* define a global symbol at bss start */ - __bss_start__ = _sbss; - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end */ - __bss_end__ = _ebss; - } >RAM - - /* User_heap_stack section, used to check that there is enough RAM left */ - ._user_heap_stack : - { - . = ALIGN(4); - PROVIDE ( end = . ); - PROVIDE ( _end = . ); - . = . + _Min_Heap_Size; - . = . + _Min_Stack_Size; - . = ALIGN(4); - } >RAM - - /* MEMORY_bank1 section, code must be located here explicitly */ - /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ - .memory_b1_text : - { - *(.mb1text) /* .mb1text sections (code) */ - *(.mb1text*) /* .mb1text* sections (code) */ - *(.mb1rodata) /* read-only data (constants) */ - *(.mb1rodata*) - } >MEMORY_B1 - - /* Remove information from the standard libraries */ - /DISCARD/ : - { - libc.a ( * ) - libm.a ( * ) - libgcc.a ( * ) - } - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/lib/src/stm32f4/CPU/syscalls.c b/lib/src/stm32f4/CPU/syscalls.c new file mode 100644 --- /dev/null +++ b/lib/src/stm32f4/CPU/syscalls.c @@ -0,0 +1,261 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#undef errno + + + +#ifdef __cplusplus +extern "C" { +#endif +extern int errno; +extern int32_t __max_opened_files__; +extern streamdevice* __opnfiles__[]; +extern int32_t* __fs_root__; +extern int32_t __fs_root_size__; + +char *__env[1] = { 0 }; +char **environ = __env; + +int _exit() +{ + while(1); +} + +int _close(int file) +{ + if(file<__max_opened_files__ && __opnfiles__[file]!=NULL) + { + return __opnfiles__[file]->close((streamdeviceptr) __opnfiles__[file]); + } + return 0; +} + + +int _write(int file, char *ptr, int len) +{ + if(file<__max_opened_files__ && __opnfiles__[file]!=NULL) + { + if(__opnfiles__[file]->write((streamdeviceptr)__opnfiles__[file],ptr,1,len)) return len; + } + return 0; +} + +int _execve(char *name, char **argv, char **env) { + errno = ENOMEM; + return -1; +} + + +int _fork(void) { + errno = EAGAIN; + return -1; +} + +int _fstat(int file, struct stat *st) { + st->st_mode = S_IFCHR; + return 0; +} + + +int _getpid(void) { + return 1; +} + + +int _isatty(int file) { + return 1; +} + + +int _kill(int pid, int sig) { + errno = EINVAL; + return -1; +} + + +int _link(char *old, char *_new) { + errno = EMLINK; + return -1; +} + + +int _lseek(int file, int ptr, int dir) { + return 0; +} + +#include + +int _open(const char *name, int flags, int mode) +{ + if(!strncmp("UART", name, 4) && ((name[4] & 0x30)==0x30)) + { + //uart_t* uart1 = malloc(sizeof(uart_t)); + streamdevice* fd1 = malloc(sizeof(streamdevice)); + uart_t uart=uartopen((name[4] & 0xF)-1); + if(uart!=-1); + { + uartmkstreamdev(uart,fd1); + int i=2; + while(i<__max_opened_files__ && __opnfiles__[i]!=NULL)i++; + if(i!=__max_opened_files__) + { + __opnfiles__[i] = fd1; + return i; + } + else printf("Too much files opened\n\r"); + } + } + return -1; +} + +int _read(int file, char *ptr, int len) { + if(file<__max_opened_files__ && __opnfiles__[file]!=NULL) + { + if(__opnfiles__[file]->read((streamdeviceptr)__opnfiles__[file],ptr,1,len)) return len; + } + return 0; +} + + + +caddr_t _sbrk(int incr) { + register char * stack_ptr __asm__ ("sp"); + extern char _end; /* Defined by the linker */ + static char *heap_end; + char *prev_heap_end; + if (heap_end == 0) { + heap_end = &_end; + } + prev_heap_end = heap_end; + if (heap_end + incr > stack_ptr) { + _write (1, "Heap and stack collision\n", 25); + abort (); + } + heap_end += incr; + return (caddr_t) prev_heap_end; +} + + + +int _stat(char *file, struct stat *st) { + st->st_mode = S_IFCHR; + return 0; +} + + +int _times(struct tms *buf) { + return -1; +} + + +int _unlink(char *name) { + errno = ENOENT; + return -1; +} + +int _wait(int *status) { + errno = ECHILD; + return -1; +} + + +int _read_r (struct _reent *r, int file, char * ptr, int len) +{ + r = r; + file = file; + ptr = ptr; + len = len; + _read(file,ptr,len); + errno = EINVAL; + return -1; +} + +/***************************************************************************/ + +int _lseek_r (struct _reent *r, int file, int ptr, int dir) +{ + r = r; + file = file; + ptr = ptr; + dir = dir; + + return 0; +} + +/***************************************************************************/ + +int _write_r (struct _reent *r, int file, char * ptr, int len) +{ + return _write(file, ptr, len); +} + +/***************************************************************************/ + +int _close_r (struct _reent *r, int file) +{ + return 0; +} + +/***************************************************************************/ + +caddr_t _sbrk_r (struct _reent *r, int incr) +{ + register char * stack_ptr __asm__ ("sp"); + extern char _end; /* Defined by the linker */ + static char *heap_end; + char *prev_heap_end; + if (heap_end == 0) { + heap_end = &_end; + } + prev_heap_end = heap_end; + if (heap_end + incr > stack_ptr) { + _write (1, "Heap and stack collision\n", 25); + abort (); + } + heap_end += incr; + return (caddr_t) prev_heap_end; +} + +/***************************************************************************/ + +int _fstat_r (struct _reent *r, int file, struct stat * st) +{ + r = r; + file = file; + + memset (st, 0, sizeof (* st)); + st->st_mode = S_IFCHR; + return 0; +} + +/***************************************************************************/ +int _open_r(struct _reent *r,const char *name, int flags, int mode) +{ + return _open(name, flags, mode); +} + +int _isatty_r(struct _reent *r, int fd) +{ + r = r; + fd = fd; + + return 1; +} + + +#ifdef __cplusplus +} +#endif + + diff --git a/lib/src/stm32f4/GPIO/gpio.pro b/lib/src/stm32f4/GPIO/gpio.pro --- a/lib/src/stm32f4/GPIO/gpio.pro +++ b/lib/src/stm32f4/GPIO/gpio.pro @@ -1,12 +1,16 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) +OBJECTS_DIR = obj SOURCES += gpio.c - -HEADERS += \ - $$(libuc2)/lib/includes/gpio.h +INCLUDEPATH += ../../includes \ + ../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../CPU/CMSIS/Include +UCMODEL=stm32f4 + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target + + diff --git a/lib/src/stm32f4/I2C/i2c.pro b/lib/src/stm32f4/I2C/i2c.pro --- a/lib/src/stm32f4/I2C/i2c.pro +++ b/lib/src/stm32f4/I2C/i2c.pro @@ -1,13 +1,16 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) +OBJECTS_DIR = obj + +SOURCES += i2c.c -SOURCES += \ - i2c.c +INCLUDEPATH += ../../includes \ + ../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../CPU/CMSIS/Include -HEADERS += \ - $$(libuc2)/lib/includes/i2c.h +UCMODEL=stm32f4 + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target diff --git a/lib/src/stm32f4/SPI/spi.pro b/lib/src/stm32f4/SPI/spi.pro --- a/lib/src/stm32f4/SPI/spi.pro +++ b/lib/src/stm32f4/SPI/spi.pro @@ -1,13 +1,16 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) - +OBJECTS_DIR = obj SOURCES += spi.c - -HEADERS += \ - $$(libuc2)/lib/includes/spi.h +INCLUDEPATH += ../../includes \ + ../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../CPU/CMSIS/Include +UCMODEL=stm32f4 + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target + + diff --git a/lib/src/stm32f4/UART/uart.pro b/lib/src/stm32f4/UART/uart.pro --- a/lib/src/stm32f4/UART/uart.pro +++ b/lib/src/stm32f4/UART/uart.pro @@ -1,13 +1,16 @@ TEMPLATE = lib -CONFIG += console -CONFIG -= qt -include($$(libuc2)/rules/stm32f4-arm-none-eabi-gcc/rules.pri) +OBJECTS_DIR = obj + +SOURCES += uart.c -SOURCES += \ - uart.c +INCLUDEPATH += ../../includes \ + ../CPU/STM32F4xx_StdPeriph_Driver/inc \ + ../CPU/CMSIS/Include -HEADERS += \ - $$(libuc2)/lib/includes/uart.h +UCMODEL=stm32f4 + +target.path = $$[QT_INSTALL_LIBS]/$$UCMODEL +INSTALLS += target diff --git a/mkspecs/common/arm-none-eabi.conf b/mkspecs/common/arm-none-eabi.conf new file mode 100644 --- /dev/null +++ b/mkspecs/common/arm-none-eabi.conf @@ -0,0 +1,41 @@ +# +# qmake configuration for arm-none-eabi +# + +CONFIG += +QMAKE_CC = arm-none-eabi-gcc +QMAKE_CFLAGS += +QMAKE_CFLAGS_DEPS += -M +QMAKE_CFLAGS_WARN_ON += -Wall +QMAKE_CFLAGS_WARN_OFF += -w +QMAKE_CFLAGS_RELEASE += -O2 +QMAKE_CFLAGS_DEBUG += -g -O0 + +QMAKE_CXX = arm-none-eabi-g++ +QMAKE_CXXFLAGS += $$QMAKE_CFLAGS s +QMAKE_CXXFLAGS_DEPS += $$QMAKE_CFLAGS_DEPS +QMAKE_CXXFLAGS_WARN_ON += $$QMAKE_CFLAGS_WARN_ON +QMAKE_CXXFLAGS_WARN_OFF += $$QMAKE_CFLAGS_WARN_OFF +QMAKE_CXXFLAGS_RELEASE += $$QMAKE_CFLAGS_RELEASE +QMAKE_CXXFLAGS_DEBUG += $$QMAKE_CFLAGS_DEBUG +QMAKE_CXXFLAGS_SHLIB += $$QMAKE_CFLAGS_SHLIB +QMAKE_CXXFLAGS_STATIC_LIB += $$QMAKE_CFLAGS_STATIC_LIB +QMAKE_CXXFLAGS_YACC += $$QMAKE_CFLAGS_YACC +QMAKE_CXXFLAGS_HIDESYMS += $$QMAKE_CFLAGS_HIDESYMS + +QMAKE_LINK = arm-none-eabi-gcc +QMAKE_LINK_SHLIB = arm-none-eabi-gcc +QMAKE_LINK_C = arm-none-eabi-gcc +QMAKE_LINK_C_SHLIB = arm-none-eabi-gcc +QMAKE_LFLAGS += +QMAKE_LFLAGS_RELEASE += +QMAKE_LFLAGS_DEBUG += +QMAKE_LFLAGS_APP += +QMAKE_LFLAGS_SHLIB += +QMAKE_LFLAGS_PLUGIN += $$QMAKE_LFLAGS_SHLIB +QMAKE_LFLAGS_THREAD += + +QMAKE_AR = arm-none-eabi-ar -ru +QMAKE_LIB = arm-none-eabi-ar -ru +QMAKE_RANLIB = + diff --git a/mkspecs/common/libuc2libs.conf b/mkspecs/common/libuc2libs.conf new file mode 100644 --- /dev/null +++ b/mkspecs/common/libuc2libs.conf @@ -0,0 +1,13 @@ + +INCLUDEPATH += $$[QT_INSTALL_HEADERS] \ + $$[QT_INSTALL_HEADERS]/GRAPHIC/CONTROLERS \ + $$[QT_INSTALL_HEADERS]/GRAPHIC/GUI/FONTS \ + $$[QT_INSTALL_HEADERS]/GRAPHIC/GUI/Widgets \ + $$[QT_INSTALL_HEADERS]/$$ARCH + + +LIBS += -L$$[QT_INSTALL_LIBS]/$$ARCH -lCS43L22 -lina226 -lili9328 -lfonts -lsdcard -lfat32 -lmbr -luart -li2c -lgpio -lspi -lcpu -lcore -lm + + + + diff --git a/mkspecs/common/linux.conf b/mkspecs/common/linux.conf new file mode 100644 --- /dev/null +++ b/mkspecs/common/linux.conf @@ -0,0 +1,67 @@ +# +# qmake configuration for common linux +# + +QMAKE_CFLAGS_THREAD += -D_REENTRANT +QMAKE_CXXFLAGS_THREAD += $$QMAKE_CFLAGS_THREAD + +QMAKE_INCDIR = +QMAKE_LIBDIR = +QMAKE_INCDIR_X11 = /usr/X11R6/include +QMAKE_LIBDIR_X11 = /usr/X11R6/lib +QMAKE_INCDIR_QT = $$[QT_INSTALL_HEADERS] +QMAKE_LIBDIR_QT = $$[QT_INSTALL_LIBS] +QMAKE_INCDIR_OPENGL = /usr/X11R6/include +QMAKE_LIBDIR_OPENGL = /usr/X11R6/lib +QMAKE_INCDIR_OPENGL_ES1 = $$QMAKE_INCDIR_OPENGL +QMAKE_LIBDIR_OPENGL_ES1 = $$QMAKE_LIBDIR_OPENGL +QMAKE_INCDIR_OPENGL_ES2 = $$QMAKE_INCDIR_OPENGL +QMAKE_LIBDIR_OPENGL_ES2 = $$QMAKE_LIBDIR_OPENGL +QMAKE_INCDIR_EGL = +QMAKE_LIBDIR_EGL = +QMAKE_INCDIR_OPENVG = +QMAKE_LIBDIR_OPENVG = + +QMAKE_LIBS = +QMAKE_LIBS_DYNLOAD = -ldl +QMAKE_LIBS_X11 = -lXext -lX11 -lm +QMAKE_LIBS_X11SM = -lSM -lICE +QMAKE_LIBS_NIS = -lnsl +QMAKE_LIBS_EGL = -lEGL +QMAKE_LIBS_OPENGL = -lGL +QMAKE_LIBS_OPENGL_QT = -lGL +QMAKE_LIBS_OPENGL_ES1 = -lGLES_CM +QMAKE_LIBS_OPENGL_ES2 = -lGLESv2 +QMAKE_LIBS_OPENVG = -lOpenVG +QMAKE_LIBS_THREAD = -lpthread + +QMAKE_CFLAGS_WAYLAND = +QMAKE_INCDIR_WAYLAND = +QMAKE_LIBS_WAYLAND = +QMAKE_LIBDIR_WAYLAND = +QMAKE_DEFINES_WAYLAND = + +QMAKE_MOC = $$[QT_INSTALL_BINS]/moc +QMAKE_UIC = $$[QT_INSTALL_BINS]/uic + +QMAKE_AR = ar cqs +QMAKE_OBJCOPY = objcopy +QMAKE_RANLIB = + +QMAKE_TAR = tar -cf +QMAKE_GZIP = gzip -9f + +QMAKE_COPY = cp -f +QMAKE_COPY_FILE = $(COPY) +QMAKE_COPY_DIR = $(COPY) -r +QMAKE_MOVE = mv -f +QMAKE_DEL_FILE = rm -f +QMAKE_DEL_DIR = rmdir +QMAKE_STRIP = strip +QMAKE_STRIPFLAGS_LIB += --strip-unneeded +QMAKE_CHK_DIR_EXISTS = test -d +QMAKE_MKDIR = mkdir -p +QMAKE_INSTALL_FILE = install -m 644 -p +QMAKE_INSTALL_PROGRAM = install -m 755 -p + +include(unix.conf) diff --git a/mkspecs/common/mac.conf b/mkspecs/common/mac.conf new file mode 100644 --- /dev/null +++ b/mkspecs/common/mac.conf @@ -0,0 +1,44 @@ +# +# qmake configuration for common Mac OS X +# + +QMAKE_RESOURCE = /Developer/Tools/Rez + +QMAKE_EXTENSION_SHLIB = dylib + +QMAKE_LIBDIR = +QMAKE_INCDIR_QT = $$[QT_INSTALL_HEADERS] +QMAKE_LIBDIR_QT = $$[QT_INSTALL_LIBS] +QMAKE_INCDIR_OPENGL = /System/Library/Frameworks/OpenGL.framework/Headers \ + /System/Library/Frameworks/AGL.framework/Headers/ + +QMAKE_FIX_RPATH = install_name_tool -id + +QMAKE_LFLAGS_RPATH = + +QMAKE_LIBS_DYNLOAD = +QMAKE_LIBS_OPENGL = -framework OpenGL -framework AGL +QMAKE_LIBS_OPENGL_QT = $$QMAKE_LIBS_OPENGL +QMAKE_LIBS_THREAD = + +QMAKE_MOC = $$[QT_INSTALL_BINS]/moc +QMAKE_UIC = $$[QT_INSTALL_BINS]/uic + +QMAKE_AR = ar cq +QMAKE_RANLIB = ranlib -s + +QMAKE_TAR = tar -cf +QMAKE_GZIP = gzip -9f + +QMAKE_COPY = cp -f +QMAKE_COPY_FILE = $$QMAKE_COPY +QMAKE_COPY_DIR = $$QMAKE_COPY -R +QMAKE_MOVE = mv -f +QMAKE_DEL_FILE = rm -f +QMAKE_DEL_DIR = rmdir +QMAKE_CHK_DIR_EXISTS = test -d +QMAKE_MKDIR = mkdir -p +QMAKE_MACOSX_DEPLOYMENT_TARGET = 10.4 # overridden to 10.5 for Cocoa on the compiler command line + + +include(unix.conf) diff --git a/mkspecs/common/mac/qplatformdefs.h b/mkspecs/common/mac/qplatformdefs.h new file mode 100644 --- /dev/null +++ b/mkspecs/common/mac/qplatformdefs.h @@ -0,0 +1,97 @@ +/**************************************************************************** +** +** Copyright (C) 2012 Digia Plc and/or its subsidiary(-ies). +** Contact: http://www.qt-project.org/legal +** +** This file is part of the qmake spec of the Qt Toolkit. +** +** $QT_BEGIN_LICENSE:LGPL$ +** Commercial License Usage +** Licensees holding valid commercial Qt licenses may use this file in +** accordance with the commercial license agreement provided with the +** Software or, alternatively, in accordance with the terms contained in +** a written agreement between you and Digia. For licensing terms and +** conditions see http://qt.digia.com/licensing. For further information +** use the contact form at http://qt.digia.com/contact-us. +** +** GNU Lesser General Public License Usage +** Alternatively, this file may be used under the terms of the GNU Lesser +** General Public License version 2.1 as published by the Free Software +** Foundation and appearing in the file LICENSE.LGPL included in the +** packaging of this file. Please review the following information to +** ensure the GNU Lesser General Public License version 2.1 requirements +** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html. +** +** In addition, as a special exception, Digia gives you certain additional +** rights. These rights are described in the Digia Qt LGPL Exception +** version 1.1, included in the file LGPL_EXCEPTION.txt in this package. +** +** GNU General Public License Usage +** Alternatively, this file may be used under the terms of the GNU +** General Public License version 3.0 as published by the Free Software +** Foundation and appearing in the file LICENSE.GPL included in the +** packaging of this file. Please review the following information to +** ensure the GNU General Public License version 3.0 requirements will be +** met: http://www.gnu.org/copyleft/gpl.html. +** +** +** $QT_END_LICENSE$ +** +****************************************************************************/ + +#ifndef QPLATFORMDEFS_H +#define QPLATFORMDEFS_H + +// Get Qt defines/settings + +#include "qglobal.h" + +// Set any POSIX/XOPEN defines at the top of this file to turn on specific APIs + +#include + + +// We are hot - unistd.h should have turned on the specific APIs we requested + + +#include +#include +#include +#include +#include +#include +#define QT_NO_LIBRARY_UNLOAD + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifndef QT_NO_IPV6IFNAME +#include +#endif + +#include "../posix/qplatformdefs.h" + +#undef QT_OPEN_LARGEFILE +#undef QT_SOCKLEN_T +#undef QT_SIGNAL_IGNORE + +#define QT_OPEN_LARGEFILE 0 + +#if (MAC_OS_X_VERSION_MAX_ALLOWED >= MAC_OS_X_VERSION_10_4) +#define QT_SOCKLEN_T socklen_t +#else +#define QT_SOCKLEN_T int +#endif + +#define QT_SIGNAL_IGNORE (void (*)(int))1 + +#define QT_SNPRINTF ::snprintf +#define QT_VSNPRINTF ::vsnprintf + +#endif // QPLATFORMDEFS_H diff --git a/mkspecs/common/posix/qplatformdefs.h b/mkspecs/common/posix/qplatformdefs.h new file mode 100644 --- /dev/null +++ b/mkspecs/common/posix/qplatformdefs.h @@ -0,0 +1,164 @@ +/**************************************************************************** +** +** Copyright (C) 2012 Digia Plc and/or its subsidiary(-ies). +** Contact: http://www.qt-project.org/legal +** +** This file is part of the qmake spec of the Qt Toolkit. +** +** $QT_BEGIN_LICENSE:LGPL$ +** Commercial License Usage +** Licensees holding valid commercial Qt licenses may use this file in +** accordance with the commercial license agreement provided with the +** Software or, alternatively, in accordance with the terms contained in +** a written agreement between you and Digia. For licensing terms and +** conditions see http://qt.digia.com/licensing. For further information +** use the contact form at http://qt.digia.com/contact-us. +** +** GNU Lesser General Public License Usage +** Alternatively, this file may be used under the terms of the GNU Lesser +** General Public License version 2.1 as published by the Free Software +** Foundation and appearing in the file LICENSE.LGPL included in the +** packaging of this file. Please review the following information to +** ensure the GNU Lesser General Public License version 2.1 requirements +** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html. +** +** In addition, as a special exception, Digia gives you certain additional +** rights. These rights are described in the Digia Qt LGPL Exception +** version 1.1, included in the file LGPL_EXCEPTION.txt in this package. +** +** GNU General Public License Usage +** Alternatively, this file may be used under the terms of the GNU +** General Public License version 3.0 as published by the Free Software +** Foundation and appearing in the file LICENSE.GPL included in the +** packaging of this file. Please review the following information to +** ensure the GNU General Public License version 3.0 requirements will be +** met: http://www.gnu.org/copyleft/gpl.html. +** +** +** $QT_END_LICENSE$ +** +****************************************************************************/ + +#ifndef Q_POSIX_QPLATFORMDEFS_H +#define Q_POSIX_QPLATFORMDEFS_H + +#include + +#include +#ifndef QT_NO_SOCKET_H +# include +#endif +#include + +#if defined(QT_USE_XOPEN_LFS_EXTENSIONS) && defined(QT_LARGEFILE_SUPPORT) + +#define QT_STATBUF struct stat64 +#define QT_FPOS_T fpos64_t +#define QT_OFF_T off64_t + +#define QT_STAT ::stat64 +#define QT_LSTAT ::lstat64 +#define QT_TRUNCATE ::truncate64 + +// File I/O +#define QT_OPEN ::open64 +#define QT_LSEEK ::lseek64 +#define QT_FSTAT ::fstat64 +#define QT_FTRUNCATE ::ftruncate64 + +// Standard C89 +#define QT_FOPEN ::fopen64 +#define QT_FSEEK ::fseeko64 +#define QT_FTELL ::ftello64 +#define QT_FGETPOS ::fgetpos64 +#define QT_FSETPOS ::fsetpos64 + +#define QT_MMAP ::mmap64 + +#else // !defined(QT_USE_XOPEN_LFS_EXTENSIONS) || !defined(QT_LARGEFILE_SUPPORT) + +#include "../c89/qplatformdefs.h" + +#define QT_STATBUF struct stat + +#define QT_STAT ::stat +#define QT_LSTAT ::lstat +#define QT_TRUNCATE ::truncate + +// File I/O +#define QT_OPEN ::open +#define QT_LSEEK ::lseek +#define QT_FSTAT ::fstat +#define QT_FTRUNCATE ::ftruncate + +// Posix extensions to C89 +#if !defined(QT_USE_XOPEN_LFS_EXTENSIONS) && !defined(QT_NO_USE_FSEEKO) +#undef QT_OFF_T +#undef QT_FSEEK +#undef QT_FTELL + +#define QT_OFF_T off_t + +#define QT_FSEEK ::fseeko +#define QT_FTELL ::ftello +#endif + +#define QT_MMAP ::mmap + +#endif // !defined (QT_USE_XOPEN_LFS_EXTENSIONS) || !defined(QT_LARGEFILE_SUPPORT) + +#define QT_STAT_MASK S_IFMT +#define QT_STAT_REG S_IFREG +#define QT_STAT_DIR S_IFDIR +#define QT_STAT_LNK S_IFLNK + +#define QT_ACCESS ::access +#define QT_GETCWD ::getcwd +#define QT_CHDIR ::chdir +#define QT_MKDIR ::mkdir +#define QT_RMDIR ::rmdir + +// File I/O +#define QT_CLOSE ::close +#define QT_READ ::read +#define QT_WRITE ::write + +#define QT_OPEN_LARGEFILE O_LARGEFILE +#define QT_OPEN_RDONLY O_RDONLY +#define QT_OPEN_WRONLY O_WRONLY +#define QT_OPEN_RDWR O_RDWR +#define QT_OPEN_CREAT O_CREAT +#define QT_OPEN_TRUNC O_TRUNC +#define QT_OPEN_APPEND O_APPEND + +// Posix extensions to C89 +#define QT_FILENO fileno + +// Directory iteration +#define QT_DIR DIR + +#define QT_OPENDIR ::opendir +#define QT_CLOSEDIR ::closedir + +#if defined(QT_LARGEFILE_SUPPORT) \ + && defined(QT_USE_XOPEN_LFS_EXTENSIONS) \ + && !defined(QT_NO_READDIR64) +#define QT_DIRENT struct dirent64 +#define QT_READDIR ::readdir64 +#define QT_READDIR_R ::readdir64_r +#else +#define QT_DIRENT struct dirent +#define QT_READDIR ::readdir +#define QT_READDIR_R ::readdir_r +#endif + +#define QT_SOCKLEN_T socklen_t + +#define QT_SOCKET_CONNECT ::connect +#define QT_SOCKET_BIND ::bind + +#define QT_SIGNAL_RETTYPE void +#define QT_SIGNAL_ARGS int +#define QT_SIGNAL_IGNORE SIG_IGN + +#endif // include guard diff --git a/mkspecs/common/qcc-base.conf b/mkspecs/common/qcc-base.conf new file mode 100644 --- /dev/null +++ b/mkspecs/common/qcc-base.conf @@ -0,0 +1,41 @@ +# +# This file is used as a basis for the following compilers: +# +# - The QNX qcc compiler +# +# The only differences between this and gcc-base.conf is that -pipe is removed +# as it's on by default in qcc (and has an analogous -nopipe option) and we +# add -Wno-psabi to prevent lots of warnings about va_list mangling +# + +QMAKE_CFLAGS += -Wno-psabi +QMAKE_CFLAGS_DEPS += -M +QMAKE_CFLAGS_WARN_ON += -Wall -W +QMAKE_CFLAGS_WARN_OFF += -w +QMAKE_CFLAGS_RELEASE += -O2 +QMAKE_CFLAGS_DEBUG += -g +QMAKE_CFLAGS_SHLIB += -fPIC -shared +QMAKE_CFLAGS_STATIC_LIB += -fPIC +QMAKE_CFLAGS_YACC += -Wno-unused -Wno-parentheses +QMAKE_CFLAGS_HIDESYMS += -fvisibility=hidden + +QMAKE_CXXFLAGS += $$QMAKE_CFLAGS -lang-c++ +QMAKE_CXXFLAGS_DEPS += $$QMAKE_CFLAGS_DEPS +QMAKE_CXXFLAGS_WARN_ON += $$QMAKE_CFLAGS_WARN_ON +QMAKE_CXXFLAGS_WARN_OFF += $$QMAKE_CFLAGS_WARN_OFF +QMAKE_CXXFLAGS_RELEASE += $$QMAKE_CFLAGS_RELEASE +QMAKE_CXXFLAGS_DEBUG += $$QMAKE_CFLAGS_DEBUG +QMAKE_CXXFLAGS_SHLIB += $$QMAKE_CFLAGS_SHLIB +QMAKE_CXXFLAGS_STATIC_LIB += $$QMAKE_CFLAGS_STATIC_LIB +QMAKE_CXXFLAGS_YACC += $$QMAKE_CFLAGS_YACC +QMAKE_CXXFLAGS_HIDESYMS += $$QMAKE_CFLAGS_HIDESYMS -fvisibility-inlines-hidden + +QMAKE_CFLAGS_PRECOMPILE = -x c-header -c ${QMAKE_PCH_INPUT} -o ${QMAKE_PCH_OUTPUT} +QMAKE_CFLAGS_USE_PRECOMPILE = -Wc,-include -Wc,${QMAKE_PCH_OUTPUT_BASE} +QMAKE_CXXFLAGS_PRECOMPILE = -x c++-header -c ${QMAKE_PCH_INPUT} -o ${QMAKE_PCH_OUTPUT} +QMAKE_CXXFLAGS_USE_PRECOMPILE = $$QMAKE_CFLAGS_USE_PRECOMPILE + +QMAKE_LFLAGS += -lang-c++ + +DEFINES += QT_NO_IMPORT_QT47_QML + diff --git a/mkspecs/common/qws.conf b/mkspecs/common/qws.conf new file mode 100644 --- /dev/null +++ b/mkspecs/common/qws.conf @@ -0,0 +1,22 @@ +# +# qmake configuration common for QWS +# + +MAKEFILE_GENERATOR = UNIX +TARGET_PLATFORM = unix +TEMPLATE = app +CONFIG += qt warn_on release incremental link_prl +QT += core gui network +QMAKE_INCREMENTAL_STYLE = sublib + +# modifications to linux.conf +QMAKE_INCDIR_X11 = +QMAKE_LIBDIR_X11 = +QMAKE_INCDIR_OPENGL = +QMAKE_LIBDIR_OPENGL = +QMAKE_INCDIR_OPENGL_ES1 = +QMAKE_LIBDIR_OPENGL_ES1 = +QMAKE_INCDIR_OPENGL_ES2 = +QMAKE_LIBDIR_OPENGL_ES2 = +QMAKE_LIBS_X11 = +QMAKE_LIBS_X11SM = diff --git a/mkspecs/common/unix.conf b/mkspecs/common/unix.conf new file mode 100644 --- /dev/null +++ b/mkspecs/common/unix.conf @@ -0,0 +1,14 @@ +# +# qmake configuration for common unix +# + +QMAKE_LEX = flex +QMAKE_LEXFLAGS += +QMAKE_YACC = yacc +QMAKE_YACCFLAGS += -d +QMAKE_YACCFLAGS_MANGLE += -p $base -b $base +QMAKE_YACC_HEADER = $base.tab.h +QMAKE_YACC_SOURCE = $base.tab.c +QMAKE_PREFIX_SHLIB = lib +QMAKE_PREFIX_STATICLIB = lib +QMAKE_EXTENSION_STATICLIB = a diff --git a/mkspecs/common/wince/qmake.conf b/mkspecs/common/wince/qmake.conf new file mode 100644 --- /dev/null +++ b/mkspecs/common/wince/qmake.conf @@ -0,0 +1,94 @@ +# +# qmake configuration for common Windows CE +# + +MAKEFILE_GENERATOR = MSVC.NET +TEMPLATE = app +QT += core gui +CONFIG += qt warn_on release incremental flat link_prl precompile_header autogen_precompile_source copy_dir_files debug_and_release debug_and_release_target embed_manifest_dll embed_manifest_exe + +DEFINES += UNDER_CE WINCE _WINDOWS _UNICODE UNICODE _WIN32 QT_NO_PRINTER QT_NO_PRINTDIALOG + +QMAKE_COMPILER_DEFINES += _MSC_VER=1400 + +QMAKE_CC = cl +QMAKE_LEX = flex +QMAKE_LEXFLAGS = +QMAKE_YACC = byacc +QMAKE_YACCFLAGS = -d +QMAKE_CFLAGS = -nologo -Zm200 -Zc:wchar_t- +QMAKE_CFLAGS_WARN_ON = -W3 +QMAKE_CFLAGS_WARN_OFF = -W0 +QMAKE_CFLAGS_RELEASE = -O2 -MD +QMAKE_CFLAGS_LTCG = -GL +QMAKE_CFLAGS_DEBUG = -DDEBUG -D_DEBUG -Zi -MDd +QMAKE_CFLAGS_YACC = + +# Uncomment the following lines to reduce library sizes +# with potential cost of performance +# QMAKE_CFLAGS += -Os +# QMAKE_CFLAGS_RELEASE += -Os + +QMAKE_CXX = $$QMAKE_CC +QMAKE_CXXFLAGS = $$QMAKE_CFLAGS +QMAKE_CXXFLAGS_WARN_ON = $$QMAKE_CFLAGS_WARN_ON -w34100 -w34189 +QMAKE_CXXFLAGS_WARN_OFF = $$QMAKE_CFLAGS_WARN_OFF +QMAKE_CXXFLAGS_RELEASE = $$QMAKE_CFLAGS_RELEASE +QMAKE_CXXFLAGS_DEBUG = $$QMAKE_CFLAGS_DEBUG +QMAKE_CXXFLAGS_LTCG = $$QMAKE_CFLAGS_LTCG +QMAKE_CXXFLAGS_YACC = $$QMAKE_CFLAGS_YACC +QMAKE_CXXFLAGS_STL_ON = -EHsc +QMAKE_CXXFLAGS_STL_OFF = +QMAKE_CXXFLAGS_RTTI_ON = -GR +QMAKE_CXXFLAGS_RTTI_OFF = +QMAKE_CXXFLAGS_EXCEPTIONS_ON = -EHsc +QMAKE_CXXFLAGS_EXCEPTIONS_OFF = -EHs-c- + +QMAKE_INCDIR = +QMAKE_INCDIR_QT = $$[QT_INSTALL_HEADERS] +QMAKE_LIBDIR_QT = $$[QT_INSTALL_LIBS] + +QMAKE_RUN_CC = $(CC) -c $(CFLAGS) $(INCPATH) -Fo$obj $src +QMAKE_RUN_CC_IMP = $(CC) -c $(CFLAGS) $(INCPATH) -Fo$@ $< +QMAKE_RUN_CC_IMP_BATCH = $(CC) -c $(CFLAGS) $(INCPATH) -Fo$@ @<< +QMAKE_RUN_CXX = $(CXX) -c $(CXXFLAGS) $(INCPATH) -Fo$obj $src +QMAKE_RUN_CXX_IMP = $(CXX) -c $(CXXFLAGS) $(INCPATH) -Fo$@ $< +QMAKE_RUN_CXX_IMP_BATCH = $(CXX) -c $(CXXFLAGS) $(INCPATH) -Fo$@ @<< + +QMAKE_LINK = link +QMAKE_LFLAGS = /NOLOGO /NODEFAULTLIB:OLDNAMES.LIB +QMAKE_LFLAGS_RELEASE = /INCREMENTAL:NO +QMAKE_LFLAGS_DEBUG = /DEBUG +QMAKE_LFLAGS_LTCG = /LTCG +QMAKE_LIBS_NETWORK = ws2.lib +QMAKE_LIBS_OPENGL = +QMAKE_LIBS_COMPAT = + +QMAKE_LIBS_EGL = libEGL.lib +QMAKE_LIBS_OPENGL_ES1 = libGLES_CM.lib +QMAKE_LIBS_OPENGL_ES2 = libGLESv2.lib + +QMAKE_LIBS_QT_ENTRY = -lqtmain + +QMAKE_MOC = $$[QT_INSTALL_BINS]\\moc.exe +QMAKE_UIC = $$[QT_INSTALL_BINS]\\uic.exe +QMAKE_IDC = $$[QT_INSTALL_BINS]\\idc.exe + +QMAKE_IDL = midl +QMAKE_LIB = lib +QMAKE_RC = rc + +QMAKE_ZIP = zip -r -9 + +QMAKE_COPY = copy /y +QMAKE_COPY_DIR = xcopy /s /q /y /i +QMAKE_MOVE = move +QMAKE_DEL_FILE = del +QMAKE_DEL_DIR = rmdir +QMAKE_CHK_DIR_EXISTS = if not exist +QMAKE_MKDIR = mkdir + +VCPROJ_EXTENSION = .vcproj +VCSOLUTION_EXTENSION = .sln +VCPROJ_KEYWORD = Qt4VSv1.0 +load(qt_config) diff --git a/mkspecs/common/wince/qplatformdefs.h b/mkspecs/common/wince/qplatformdefs.h new file mode 100644 --- /dev/null +++ b/mkspecs/common/wince/qplatformdefs.h @@ -0,0 +1,133 @@ +/**************************************************************************** +** +** Copyright (C) 2012 Digia Plc and/or its subsidiary(-ies). +** Contact: http://www.qt-project.org/legal +** +** This file is part of the qmake spec of the Qt Toolkit. +** +** $QT_BEGIN_LICENSE:LGPL$ +** Commercial License Usage +** Licensees holding valid commercial Qt licenses may use this file in +** accordance with the commercial license agreement provided with the +** Software or, alternatively, in accordance with the terms contained in +** a written agreement between you and Digia. For licensing terms and +** conditions see http://qt.digia.com/licensing. For further information +** use the contact form at http://qt.digia.com/contact-us. +** +** GNU Lesser General Public License Usage +** Alternatively, this file may be used under the terms of the GNU Lesser +** General Public License version 2.1 as published by the Free Software +** Foundation and appearing in the file LICENSE.LGPL included in the +** packaging of this file. Please review the following information to +** ensure the GNU Lesser General Public License version 2.1 requirements +** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html. +** +** In addition, as a special exception, Digia gives you certain additional +** rights. These rights are described in the Digia Qt LGPL Exception +** version 1.1, included in the file LGPL_EXCEPTION.txt in this package. +** +** GNU General Public License Usage +** Alternatively, this file may be used under the terms of the GNU +** General Public License version 3.0 as published by the Free Software +** Foundation and appearing in the file LICENSE.GPL included in the +** packaging of this file. Please review the following information to +** ensure the GNU General Public License version 3.0 requirements will be +** met: http://www.gnu.org/copyleft/gpl.html. +** +** +** $QT_END_LICENSE$ +** +****************************************************************************/ + +#ifndef QPLATFORMDEFS_H +#define QPLATFORMDEFS_H + +#ifdef UNICODE +#ifndef _UNICODE +#define _UNICODE +#endif +#endif + +// Get Qt defines/settings + +#include "qglobal.h" +#include "qfunctions_wince.h" + +#define _POSIX_ +#include +#undef _POSIX_ + +#include +#include +#include +#include + +#define Q_FS_FAT +#ifdef QT_LARGEFILE_SUPPORT +#define QT_STATBUF struct _stati64 // non-ANSI defs +#define QT_STATBUF4TSTAT struct _stati64 // non-ANSI defs +#define QT_STAT ::_stati64 +#define QT_FSTAT ::_fstati64 +#else +#define QT_STATBUF struct stat // non-ANSI defs +#define QT_STATBUF4TSTAT struct stat // non-ANSI defs +#define QT_STAT ::qt_wince_stat +#define QT_FSTAT ::qt_wince__fstat +#endif +#define QT_STAT_REG _S_IFREG +#define QT_STAT_DIR _S_IFDIR +#define QT_STAT_MASK _S_IFMT +#if defined(_S_IFLNK) +# define QT_STAT_LNK _S_IFLNK +#endif +#define QT_FILENO ::qt_wince___fileno +#define QT_OPEN ::qt_wince_open +#define QT_CLOSE ::qt_wince__close +#ifdef QT_LARGEFILE_SUPPORT +#define QT_LSEEK ::_lseeki64 +#define QT_TSTAT ::_tstati64 +#else +#define QT_LSEEK ::qt_wince__lseek +#define QT_TSTAT ::_tstat +#endif +#define QT_READ ::qt_wince__read +#define QT_WRITE ::qt_wince__write +#define QT_ACCESS ::qt_wince__access +#define QT_GETCWD ::_getcwd +#define QT_CHDIR ::_chdir +#define QT_MKDIR ::qt_wince__mkdir +#define QT_RMDIR ::qt_wince__rmdir +#define QT_OPEN_LARGEFILE 0 +#define QT_OPEN_RDONLY _O_RDONLY +#define QT_OPEN_WRONLY _O_WRONLY +#define QT_OPEN_RDWR _O_RDWR +#define QT_OPEN_CREAT _O_CREAT +#define QT_OPEN_TRUNC _O_TRUNC +#define QT_OPEN_APPEND _O_APPEND +# define QT_OPEN_TEXT _O_TEXT +# define QT_OPEN_BINARY _O_BINARY + +#define QT_FOPEN ::fopen +#define QT_FSEEK ::fseek +#define QT_FTELL ::ftell +#define QT_FGETPOS ::fgetpos +#define QT_FSETPOS ::fsetpos +#define QT_MMAP ::mmap +#define QT_FPOS_T fpos_t +#define QT_OFF_T long + +#define QT_SIGNAL_ARGS int + +#define QT_VSNPRINTF(buffer, count, format, arg) \ + _vsnprintf(buffer, count, format, arg) + +#define QT_SNPRINTF ::_snprintf + +# define F_OK 0 +# define X_OK 1 +# define W_OK 2 +# define R_OK 4 + +typedef int mode_t; + +#endif // QPLATFORMDEFS_H diff --git a/mkspecs/default/qmake.conf b/mkspecs/default/qmake.conf new file mode 100644 --- /dev/null +++ b/mkspecs/default/qmake.conf @@ -0,0 +1,26 @@ +# +# qmake configuration for stm32f4 +# +# + +MAKEFILE_GENERATOR = UNIX +TARGET_PLATFORM = unix +TEMPLATE = app +CONFIG += ucswitch libuc2 warn_on release incremental link_prl +QT += +QMAKE_INCREMENTAL_STYLE = sublib + +include(../common/linux.conf) + +load(qt_config) + + + + + + + + + + + diff --git a/mkspecs/default/qplatformdefs.h b/mkspecs/default/qplatformdefs.h new file mode 100644 --- /dev/null +++ b/mkspecs/default/qplatformdefs.h @@ -0,0 +1,42 @@ +/**************************************************************************** +** +** Copyright (C) 2012 Digia Plc and/or its subsidiary(-ies). +** Contact: http://www.qt-project.org/legal +** +** This file is part of the qmake spec of the Qt Toolkit. +** +** $QT_BEGIN_LICENSE:LGPL$ +** Commercial License Usage +** Licensees holding valid commercial Qt licenses may use this file in +** accordance with the commercial license agreement provided with the +** Software or, alternatively, in accordance with the terms contained in +** a written agreement between you and Digia. For licensing terms and +** conditions see http://qt.digia.com/licensing. For further information +** use the contact form at http://qt.digia.com/contact-us. +** +** GNU Lesser General Public License Usage +** Alternatively, this file may be used under the terms of the GNU Lesser +** General Public License version 2.1 as published by the Free Software +** Foundation and appearing in the file LICENSE.LGPL included in the +** packaging of this file. Please review the following information to +** ensure the GNU Lesser General Public License version 2.1 requirements +** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html. +** +** In addition, as a special exception, Digia gives you certain additional +** rights. These rights are described in the Digia Qt LGPL Exception +** version 1.1, included in the file LGPL_EXCEPTION.txt in this package. +** +** GNU General Public License Usage +** Alternatively, this file may be used under the terms of the GNU +** General Public License version 3.0 as published by the Free Software +** Foundation and appearing in the file LICENSE.GPL included in the +** packaging of this file. Please review the following information to +** ensure the GNU General Public License version 3.0 requirements will be +** met: http://www.gnu.org/copyleft/gpl.html. +** +** +** $QT_END_LICENSE$ +** +****************************************************************************/ + +//#include "../linux-g++/qplatformdefs.h" diff --git a/mkspecs/features/boards/BEAGLESYNTH/bsp.pri b/mkspecs/features/boards/BEAGLESYNTH/bsp.pri new file mode 100644 --- /dev/null +++ b/mkspecs/features/boards/BEAGLESYNTH/bsp.pri @@ -0,0 +1,7 @@ +CPU=stm32f4xxxG +DEFINES+=BSP=\\\"BEAGLESYNTH\\\" +beagleCp.target = beagleCp +beagleCp.commands = scp $$DESTDIR/$(QMAKE_TARGET).bin root@192.168.7.2://opt/stm32flashAje/hello.bin +QMAKE_EXTRA_TARGETS += beagleCp + +include(../../../stm32f4/qmake.conf) diff --git a/mkspecs/features/boards/M4Stick/bsp.pri b/mkspecs/features/boards/M4Stick/bsp.pri new file mode 100644 --- /dev/null +++ b/mkspecs/features/boards/M4Stick/bsp.pri @@ -0,0 +1,4 @@ +CPU=stm32f4xxxG +DEFINES+=BSP=\\\"M4Stick\\\" + +include(../../../stm32f4/qmake.conf) diff --git a/mkspecs/features/boards/M4StickV2/bsp.pri b/mkspecs/features/boards/M4StickV2/bsp.pri new file mode 100644 --- /dev/null +++ b/mkspecs/features/boards/M4StickV2/bsp.pri @@ -0,0 +1,4 @@ +CPU=stm32f4xxxG +DEFINES+=BSP=\\\"M4Stick\\\" + +include(../../../stm32f4/qmake.conf) diff --git a/mkspecs/features/boards/SOLAR_LFR_PSU/bsp.pri b/mkspecs/features/boards/SOLAR_LFR_PSU/bsp.pri new file mode 100644 --- /dev/null +++ b/mkspecs/features/boards/SOLAR_LFR_PSU/bsp.pri @@ -0,0 +1,4 @@ +CPU=stm32f4xxxG +DEFINES+=BSP=\\\"SOLAR_LFR_PSU\\\" + +include(../../../stm32f4/qmake.conf) diff --git a/mkspecs/features/boards/STM32F4Discovery/bsp.pri b/mkspecs/features/boards/STM32F4Discovery/bsp.pri new file mode 100644 --- /dev/null +++ b/mkspecs/features/boards/STM32F4Discovery/bsp.pri @@ -0,0 +1,4 @@ +CPU=stm32f4xxxG +DEFINES+=BSP=\\\"SOLAR_LFR_PSU\\\" + +include(../../../stm32f4/qmake.conf) diff --git a/mkspecs/features/boards/STM32F4Eval/bsp.pri b/mkspecs/features/boards/STM32F4Eval/bsp.pri new file mode 100644 --- /dev/null +++ b/mkspecs/features/boards/STM32F4Eval/bsp.pri @@ -0,0 +1,6 @@ +CPU=stm32f4xxxG +DEFINES+=BSP=\\\"STM32F4Eval\\\" + +include(../../../stm32f4/qmake.conf) + + diff --git a/mkspecs/features/build_pass.prf b/mkspecs/features/build_pass.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/build_pass.prf @@ -0,0 +1,1 @@ +CONFIG += no_autoqmake diff --git a/mkspecs/features/cpu.prf b/mkspecs/features/cpu.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/cpu.prf @@ -0,0 +1,14 @@ +!isEmpty( UCMODEL ) { + include(./$$UCMODEL/cpu.pri) +} + + + + + + + + + + + diff --git a/mkspecs/features/dbusadaptors.prf b/mkspecs/features/dbusadaptors.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/dbusadaptors.prf @@ -0,0 +1,41 @@ +qtPrepareTool(QMAKE_QDBUSXML2CPP, qdbusxml2cpp) + +for(DBUS_ADAPTOR, $$list($$unique(DBUS_ADAPTORS))) { + + !contains(DBUS_ADAPTOR, .*\\w\\.xml$) { + warning("Invalid D-BUS adaptor: '$${DBUS_ADAPTOR}', please use 'com.mydomain.myinterface.xml' instead.") + next() + } + + DBUS_ADAPTOR_LIST += $${DBUS_ADAPTOR} +} + +dbus_adaptor_header.commands = $$QMAKE_QDBUSXML2CPP -a ${QMAKE_FILE_OUT}: ${QMAKE_FILE_IN} +dbus_adaptor_header.output_function = dbus_adaptor_header_output +dbus_adaptor_header.name = DBUSXML2CPP ADAPTOR HEADER ${QMAKE_FILE_IN} +dbus_adaptor_header.variable_out = DBUS_ADAPTOR_HEADERS +dbus_adaptor_header.input = DBUS_ADAPTOR_LIST + +defineReplace(dbus_adaptor_header_output) { + return("$$lower($$section($$list($$basename(1)),.,-2,-2))_adaptor.h") +} + +dbus_adaptor_source.commands = $$QMAKE_QDBUSXML2CPP -i ${QMAKE_FILE_OUT_BASE}.h -a :${QMAKE_FILE_OUT} ${QMAKE_FILE_IN} +dbus_adaptor_source.output_function = dbus_adaptor_source_output +dbus_adaptor_source.name = DBUSXML2CPP ADAPTOR SOURCE ${QMAKE_FILE_IN} +dbus_adaptor_source.variable_out = SOURCES +dbus_adaptor_source.input = DBUS_ADAPTOR_LIST + +load(moc) +dbus_adaptor_moc.commands = $$moc_header.commands +dbus_adaptor_moc.output = $$moc_header.output +dbus_adaptor_moc.depends = $$dbus_adaptor_header.output +dbus_adaptor_moc.input = DBUS_ADAPTOR_HEADERS +dbus_adaptor_moc.variable_out = GENERATED_SOURCES +dbus_adaptor_moc.name = $$moc_header.name + +defineReplace(dbus_adaptor_source_output) { + return("$$lower($$section($$list($$basename(1)),.,-2,-2))_adaptor.cpp") +} + +QMAKE_EXTRA_COMPILERS += dbus_adaptor_header dbus_adaptor_source dbus_adaptor_moc diff --git a/mkspecs/features/dbusinterfaces.prf b/mkspecs/features/dbusinterfaces.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/dbusinterfaces.prf @@ -0,0 +1,42 @@ +load(moc) + +qtPrepareTool(QMAKE_QDBUSXML2CPP, qdbusxml2cpp) + +for(DBUS_INTERFACE, $$list($$unique(DBUS_INTERFACES))) { + + !contains(DBUS_INTERFACE, .*\\w\\.xml$) { + warning("Invalid D-BUS interface : '$${DBUS_INTERFACE}', please use 'com.mydomain.myinterface.xml' instead.") + next() + } + + DBUS_INTERFACE_LIST += $${DBUS_INTERFACE} +} + +dbus_interface_header.commands = $$QMAKE_QDBUSXML2CPP -p ${QMAKE_FILE_OUT}: ${QMAKE_FILE_IN} +dbus_interface_header.output_function = dbus_interface_header_output +dbus_interface_header.name = DBUSXML2CPP INTERFACE HEADER ${QMAKE_FILE_IN} +dbus_interface_header.variable_out = DBUS_INTERFACE_HEADERS +dbus_interface_header.input = DBUS_INTERFACE_LIST + +defineReplace(dbus_interface_header_output) { + return("$$lower($$section($$list($$basename(1)),.,-2,-2))_interface.h") +} + +dbus_interface_source.commands = $$QMAKE_QDBUSXML2CPP -i ${QMAKE_FILE_OUT_BASE}.h -p :${QMAKE_FILE_OUT} ${QMAKE_FILE_IN} +dbus_interface_source.output_function = dbus_interface_source_output +dbus_interface_source.name = DBUSXML2CPP INTERFACE SOURCE ${QMAKE_FILE_IN} +dbus_interface_source.variable_out = SOURCES +dbus_interface_source.input = DBUS_INTERFACE_LIST + +dbus_interface_moc.commands = $$moc_header.commands +dbus_interface_moc.output = $$moc_header.output +dbus_interface_moc.depends = $$dbus_interface_header.output +dbus_interface_moc.input = DBUS_INTERFACE_HEADERS +dbus_interface_moc.variable_out = GENERATED_SOURCES +dbus_interface_moc.name = $$moc_header.name + +defineReplace(dbus_interface_source_output) { + return("$$lower($$section($$list($$basename(1)),.,-2,-2))_interface.cpp") +} + +QMAKE_EXTRA_COMPILERS += dbus_interface_header dbus_interface_source dbus_interface_moc diff --git a/mkspecs/features/debug.prf b/mkspecs/features/debug.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/debug.prf @@ -0,0 +1,8 @@ +CONFIG -= release +contains(QT_CONFIG,dwarf2)|dwarf2:load(dwarf2, true) +QMAKE_CFLAGS += $$QMAKE_CFLAGS_DEBUG +QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_DEBUG +QMAKE_OBJECTIVE_CFLAGS += $$QMAKE_OBJECTIVE_CFLAGS_DEBUG +QMAKE_LFLAGS += $$QMAKE_LFLAGS_DEBUG +QMAKE_LIBFLAGS += $$QMAKE_LIBFLAGS_DEBUG +!debug_and_release:fix_output_dirs:fixExclusiveOutputDirs(debug, release) diff --git a/mkspecs/features/debug_and_release.prf b/mkspecs/features/debug_and_release.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/debug_and_release.prf @@ -0,0 +1,1 @@ +!macx-xcode:!symbian:addExclusiveBuilds(debug, Debug, release, Release) diff --git a/mkspecs/features/declarative_debug.prf b/mkspecs/features/declarative_debug.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/declarative_debug.prf @@ -0,0 +1,1 @@ +contains(QT, declarative):DEFINES += QT_DECLARATIVE_DEBUG diff --git a/mkspecs/features/default_post.prf b/mkspecs/features/default_post.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/default_post.prf @@ -0,0 +1,122 @@ +QT_BREAKPAD_ROOT_PATH = $$(QT_BREAKPAD_ROOT_PATH) +!isEmpty(QT_BREAKPAD_ROOT_PATH): \ # quick test first whether requested ... + !staticlib:!static:CONFIG(release, debug|release):contains(TEMPLATE, .*(app|lib)): \ # is it applicable? + !contains(TARGET, .*phony_target.*): \ # monster hack, you don't really see this here, right? ;) + system($$QT_BREAKPAD_ROOT_PATH/qtbreakpadsymbols --breakpad-exists) { # do we really have it? + CONFIG += breakpad + CONFIG -= no_debug_info separate_debug_info + QMAKE_CFLAGS_RELEASE = $$QMAKE_CFLAGS_RELEASE_WITH_DEBUGINFO + QMAKE_CXXFLAGS_RELEASE = $$QMAKE_CXXFLAGS_RELEASE_WITH_DEBUGINFO + QMAKE_LFLAGS_RELEASE = $$QMAKE_LFLAGS_RELEASE_WITH_DEBUGINFO +} + +CONFIG(debug, debug|release):load(debug) +else:load(release) +debug_and_release:load(debug_and_release) +incredibuild_xge { + CONFIG -= incredibuild_xge + CONFIG = incredibuild_xge $$CONFIG +} + +breakpad { + !contains(DESTDIR, (/|.:[/\\\\]).*):TARGET_BASEPATH = $${OUT_PWD}/ + !isEmpty(DESTDIR):TARGET_BASEPATH = $${TARGET_BASEPATH}$${DESTDIR}/ + + win32 { + TARGET_BASEPATH ~= s,/,\\, + contains(TEMPLATE, .*lib) { + isEmpty(TARGET_VERSION_EXT):!isEmpty(VERSION) { + TARGET_VERSION_EXT = $$section(VERSION, ., 0, 0) + isEqual(TARGET_VERSION_EXT, 0):unset(TARGET_VERSION_EXT) + } + TARGET_EXT = .dll + } else { + TARGET_EXT = .exe + } + + DEBUGFILENAME = $${TARGET_BASEPATH}$${TARGET}$${TARGET_VERSION_EXT}$${TARGET_EXT} + PDBFILENAME = $${TARGET_BASEPATH}$${TARGET}$${TARGET_VERSION_EXT}.pdb + DEBUGFILENAME ~= s,/,\\, + PDBFILENAME ~= s,/,\\, + QMAKE_CLEAN += $$PDBFILENAME # for the debug case it is hardcoded in qmake + } else { + contains(TEMPLATE, .*lib):LIBPREFIX = lib + + macx { + equals(TEMPLATE, lib) { + lib_bundle { + TARGET_BASEPATH = $${TARGET_BASEPATH}$${TARGET}.framework/$${TARGET} + } else { + TARGET_BASEPATH = $${TARGET_BASEPATH}$${LIBPREFIX}$${TARGET} + !plugin { + TEMP_VERSION = $$section(VERSION, ., 0, 0) + isEmpty(TEMP_VERSION):TEMP_VERSION = 1 + TARGET_BASEPATH = $${TARGET_BASEPATH}.$${TEMP_VERSION} + } + TARGET_BASEPATH = $${TARGET_BASEPATH}.$${QMAKE_EXTENSION_SHLIB} + } + } else { + app_bundle { + TARGET_BASEPATH = $${TARGET_BASEPATH}$${TARGET}.app/Contents/MacOS/$${TARGET} + } else { + TARGET_BASEPATH = $${TARGET_BASEPATH}$${TARGET} + } + } + DEBUGFILENAME = $$TARGET_BASEPATH + } else { + equals(TEMPLATE, lib) { + plugin { + TARGET_BASEPATH = $${TARGET_BASEPATH}$${LIBPREFIX}$${TARGET}.so + } else { + TEMP_VERSION = $$VERSION + isEmpty(TEMP_VERSION):TEMP_VERSION = 1.0.0 + TARGET_BASEPATH = $${TARGET_BASEPATH}$${LIBPREFIX}$${TARGET}.so.$${TEMP_VERSION} + } + } else { + TARGET_BASEPATH = $${TARGET_BASEPATH}$${TARGET} + } + DEBUGFILENAME = $$TARGET_BASEPATH + } + } + + PROJECTPATH = $$OUT_PWD + win32:PROJECTPATH ~= s,/,\\, + + !isEmpty(QMAKE_POST_LINK):QMAKE_POST_LINK = $$QMAKE_POST_LINK$$escape_expand(\\n\\t) + QMAKE_POST_LINK = $$QMAKE_POST_LINK$$quote($${QT_BREAKPAD_ROOT_PATH}$${QMAKE_DIR_SEP}qtbreakpadsymbols \"$$DEBUGFILENAME\" \"$$PROJECTPATH\") + !isEmpty(QMAKE_STRIP):QMAKE_POST_LINK = $$QMAKE_POST_LINK$$escape_expand(\\n\\t)$$quote($$QMAKE_STRIP \"$$DEBUGFILENAME\") + + unset(TARGET_BASEPATH) + unset(SYMBOLFILENAME) + unset(TARGET_EXT) + unset(TARGET_VERSION_EXT) + unset(TEMP_VERSION) +} + +QMAKE_INCDIR += $$QMAKE_INCDIR_POST +QMAKE_LIBDIR += $$QMAKE_LIBDIR_POST + +# Let every project have a standard GNU `check' target +!contains(QMAKE_EXTRA_TARGETS, check) { + # `make check' should iterate through all subdirs + contains(TEMPLATE, subdirs) { + check.CONFIG = recursive + check.recurse = $$SUBDIRS + check.recurse_target = check + } + # `make check' should imply building the project + else { + check.depends = first + } + QMAKE_EXTRA_TARGETS += check +} + +# Add special translation sources for projects that require them. +# Note 1: Since lupdate will not parse regular config scopes right, contains checks are used instead. +# Note 2: Checking for last value of TEMPLATE is used instead of simple contains check because +# lupdate doesn't respect "-=" variable assignments and therefore always finds "app" +# as the first value of TEMPLATE variable. +contains(CONFIG, lupdate_run):contains(CONFIG, localize_deployment) { + equals($$list($$last(TEMPLATE)), app): SOURCES += $$[QT_INSTALL_DATA]/mkspecs/common/symbian/appCaptionForTranslation.cpp + SOURCES += $$[QT_INSTALL_DATA]/mkspecs/common/symbian/packageNameForTranslation.cpp +} diff --git a/mkspecs/features/default_pre.prf b/mkspecs/features/default_pre.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/default_pre.prf @@ -0,0 +1,3 @@ +load(exclusive_builds) +### Qt 5: remove "uic" and "resources" - or add "qt" +CONFIG = lex yacc warn_on debug uic resources $$CONFIG diff --git a/mkspecs/features/designer.prf b/mkspecs/features/designer.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/designer.prf @@ -0,0 +1,7 @@ +QT += xml +contains(QT_CONFIG, script): QT += script +qt:load(qt) + +plugin:DEFINES += QDESIGNER_EXPORT_WIDGETS + +qtAddLibrary(QtDesigner) diff --git a/mkspecs/features/device_config.prf b/mkspecs/features/device_config.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/device_config.prf @@ -0,0 +1,15 @@ +# Load generated qdevice.pri +qdd = $$QT_BUILD_TREE +isEmpty(qdd):exists($$_QMAKE_CACHE_): qdd = $$fromfile($$_QMAKE_CACHE_, QT_BUILD_TREE) +isEmpty(qdd): qdd = $$[QT_INSTALL_DATA] +DEVICE_PRI = $$qdd/mkspecs/qdevice.pri +unset(qdd) + +exists($$DEVICE_PRI):include($$DEVICE_PRI) +unset(DEVICE_PRI) + +isEmpty(CROSS_COMPILE) { + #this variable can be persisted via qmake -set CROSS_COMPILE /foo + CROSS_COMPILE = $$[CROSS_COMPILE] +} + diff --git a/mkspecs/features/dll.prf b/mkspecs/features/dll.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/dll.prf @@ -0,0 +1,2 @@ +CONFIG += shared + diff --git a/mkspecs/features/egl.prf b/mkspecs/features/egl.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/egl.prf @@ -0,0 +1,21 @@ +# On UNIX, we can use config tests to figure out if egl.h is in +# EGL/egl.h or GLES/egl.h. Sadly, there are no config tests on WinCE +# so we have to assume that for GLES 1.1 (CL), the EGL header is in +# GLES/egl.h. We also assume there is no separate libEGL.lib library, +# so we use the GL library instead. + +wince*:contains(QT_CONFIG, opengles1) { + INCLUDEPATH += $$QMAKE_INCDIR_OPENGL_ES1 + LIBS_PRIVATE += $$QMAKE_LIBS_OPENGL_ES1 + for(p, QMAKE_LIBDIR_OPENGL_ES1) { + exists($$p):LIBS_PRIVATE += -L$$p + } + DEFINES += QT_GLES_EGL +} else { + INCLUDEPATH += $$QMAKE_INCDIR_EGL + LIBS_PRIVATE += $$QMAKE_LIBS_EGL + LIBS += $$QMAKE_LFLAGS_EGL + for(p, QMAKE_LIBDIR_EGL) { + exists($$p):LIBS_PRIVATE += -L$$p + } +} diff --git a/mkspecs/features/enable_backup.prf b/mkspecs/features/enable_backup.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/enable_backup.prf @@ -0,0 +1,43 @@ +# Generate deployment for backup registration file for mobile devices +symbian|maemo5|linux-g++-maemo { + symbian { + isEmpty(BACKUP_REGISTRATION_FILE_SYMBIAN) { + # Do not require a custom registration file in Symbian builds as the + # default file can be used as is in vast majority of projects. + # However, if the custom file exists in the default location, use that. + + CUSTOM_BACKUP_REG_FILE = $$_PRO_FILE_PWD_/backup_registration/symbian/backup_registration.xml + + exists($$CUSTOM_BACKUP_REG_FILE) { + BACKUP_REGISTRATION_FILE = $$CUSTOM_BACKUP_REG_FILE + } else { + BACKUP_REGISTRATION_FILE = $$[QT_INSTALL_DATA]/mkspecs/common/symbian/backup_registration.xml + } + } else { + BACKUP_REGISTRATION_FILE = $$BACKUP_REGISTRATION_FILE_SYMBIAN + } + + contains(TEMPLATE, app) { + enable_backup_deployment.path = /private/$$replace(TARGET.UID3, 0x,) + } else { + enable_backup_deployment.path = /private/10202D56/import/packages/$$replace(TARGET.UID3, 0x,) + } + DEPLOYMENT += enable_backup_deployment + } else { + isEmpty(BACKUP_REGISTRATION_FILE_MAEMO) { + BACKUP_REGISTRATION_FILE = $$_PRO_FILE_PWD_/backup_registration/maemo/$$basename(TARGET).conf + } else { + BACKUP_REGISTRATION_FILE = $$BACKUP_REGISTRATION_FILE_MAEMO + } + + enable_backup_deployment.path = /etc/osso-backup/applications + INSTALLS += enable_backup_deployment + } + + # Make sure that BACKUP_REGISTRATION_FILE has absolute path, otherwise the following exists check will not work. + !contains(BACKUP_REGISTRATION_FILE, "(^/|^\\\\|^.:).*"): BACKUP_REGISTRATION_FILE = $$_PRO_FILE_PWD_/$$BACKUP_REGISTRATION_FILE + + !exists($$BACKUP_REGISTRATION_FILE): warning(The backup registration file \'$$BACKUP_REGISTRATION_FILE\' was not found. Please provide a valid backup registration file.) + + enable_backup_deployment.files = $$BACKUP_REGISTRATION_FILE +} diff --git a/mkspecs/features/exclusive_builds.prf b/mkspecs/features/exclusive_builds.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/exclusive_builds.prf @@ -0,0 +1,100 @@ +# fixExclusiveOutputDirs(1config, 2config) +# Change all output paths that references 2config to have the string 1config in them +defineTest(fixExclusiveOutputDirs) { + unset(firstBuild) + unset(secondBuild) + unset(appendFirstBuild) + firstBuild = $$1 + secondBuild = $$2 + count(ARGS, 2, greaterThan):isEqual($$list($$lower($$3)), false):appendFirstBuild = false + else:appendFirstBuild = true + + isEmpty(QMAKE_DIR_REPLACE):QMAKE_DIR_REPLACE += OBJECTS_DIR MOC_DIR RCC_DIR + lessThan(firstBuild, $$secondBuild):eval($${firstBuild}_and_$${secondBuild}_target:QMAKE_DIR_REPLACE += DESTDIR) + else:eval($${secondBuild}_and_$${firstBuild}_target:QMAKE_DIR_REPLACE += DESTDIR) + for(fix, QMAKE_DIR_REPLACE) { + isEmpty($$fix)|isEqual($$fix, .) { + eval($$fix = $${firstBuild}) + } else:contains($$list($$first($$fix)), .*$${secondBuild}.*) { + eval($$fix ~= s/$${secondBuild}/$${firstBuild}/gi) + } else:isEqual(appendFirstBuild, true):!contains($$list($$first($$fix)), .*$${firstBuild}.*) { + contains($$list($${first($$fix)}), .*/$):eval($$fix = $${first($$fix)}$${firstBuild}) + else:eval($$fix = $${first($$fix)}-$${firstBuild}) + } + export($$fix) + } + return(true) +} + +# addExclusiveBuilds(1config, 1name, 2config, 2name) +# Adds two BUILDS which are exclusive to each other. +defineTest(addExclusiveBuilds) { + unset(firstBuild) + unset(firstBuildName) + unset(secondBuild) + unset(secondBuildName) + + firstBuild = $$1 + firstBuildName = $$2 + secondBuild = $$3 + secondBuildName = $$4 + + contains(TEMPLATE, subdirs) { + eval(sub_$${firstBuildName}.target = $$firstBuild) + export(sub_$${firstBuildName}.target) + eval(sub_$${firstBuildName}.CONFIG = recursive) + export(sub_$${firstBuildName}.CONFIG) + eval(sub_$${secondBuildName}.target = $$secondBuild) + export(sub_$${secondBuildName}.target) + eval(sub_$${secondBuildName}.CONFIG = recursive) + export(sub_$${secondBuildName}.CONFIG) + QMAKE_EXTRA_TARGETS += sub_$${firstBuildName} sub_$${secondBuildName} + export(QMAKE_EXTRA_TARGETS) + } else:!build_pass { + first_BUILDS = + second_BUILDS = + suffix_BUILDS = Build + + isEmpty(BUILDS): BUILDPERMUTATIONS = $$suffix_BUILDS + else: BUILDPERMUTATIONS = $$BUILDS + + for(permutation, BUILDPERMUTATIONS) { + permutation ~= s/$${suffix_BUILDS}$// + isEmpty(permutation): permutationName = + else: permutationName = -$$permutation + # Makefile target rule + eval($${firstBuildName}$${permutation}.target = $${firstBuild}$$lower($${permutationName})) + export($${firstBuildName}$${permutation}.target) + # IDE name + eval($${firstBuildName}$${permutation}.name = $${firstBuildName}$${permutationName}) + export($${firstBuildName}$${permutation}.name) + # prl import CONFIG option + eval($${firstBuildName}$${permutation}.PRL_CONFIG = $${firstBuild}$${permutation}) + export($${firstBuildName}$${permutation}.PRL_CONFIG) + # Individual CONFIG option + eval($${firstBuildName}$${permutation}.CONFIG = $${firstBuild} $${firstBuildName}Build $$eval($${permutation}.CONFIG)) + export($${firstBuildName}$${permutation}.CONFIG) + + eval($${secondBuildName}$${permutation}.target = $${secondBuild}$$lower($${permutationName})) + export($${secondBuildName}$${permutation}.target) + eval($${secondBuildName}$${permutation}.name = $${secondBuildName}$${permutationName}) + export($${secondBuildName}$${permutation}.name) + eval($${secondBuildName}$${permutation}.PRL_CONFIG = $${secondBuild}$${permutation}) + export($${secondBuildName}$${permutation}.PRL_CONFIG) + eval($${secondBuildName}$${permutation}.CONFIG = $${secondBuild} $${secondBuildName}Build $$eval($${permutation}.CONFIG)) + export($${secondBuildName}$${permutation}.CONFIG) + + first_BUILDS += $${firstBuildName}$${permutation} + second_BUILDS += $${secondBuildName}$${permutation} + } + + # A mutual exclusive block. + CONFIG($${firstBuild}, $${firstBuild}|$${secondBuild}): BUILDS = $$first_BUILDS $$second_BUILDS + else: BUILDS = $$second_BUILDS $$first_BUILDS + export(BUILDS) + } else { + eval($${firstBuildName}Build:fixExclusiveOutputDirs($$firstBuild, $$secondBuild, false)) + eval($${secondBuildName}Build:fixExclusiveOutputDirs($$secondBuild, $$firstBuild, false)) + } + return(true) +} diff --git a/mkspecs/features/help.prf b/mkspecs/features/help.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/help.prf @@ -0,0 +1,4 @@ +INCLUDEPATH = $$QMAKE_INCDIR_QT/QtHelp $$INCLUDEPATH +QT += sql + +qtAddLibrary(QtHelp) diff --git a/mkspecs/features/include_source_dir.prf b/mkspecs/features/include_source_dir.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/include_source_dir.prf @@ -0,0 +1,1 @@ +!equals(_PRO_FILE_PWD_, $$OUT_PWD):INCLUDEPATH *= . diff --git a/mkspecs/features/incredibuild_xge.prf b/mkspecs/features/incredibuild_xge.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/incredibuild_xge.prf @@ -0,0 +1,12 @@ +contains(TEMPLATE, "vc.*") { + EOC = $$escape_expand(\\n\\t) + + # The VCPROJ generator will replace the \r\h with the coded \r\n: + # No other generator understands the \h + win32-msvc2*|wince*msvc*: EOC = $$escape_expand(\\r\\h) + + for(xge, INCREDIBUILD_XGE) { + xgevar = $${xge}.commands + $$xgevar = Rem IncrediBuild_AllowRemote $$EOC Rem IncrediBuild_OutputFile $$replace($${xge}.output,/,\\) $$EOC $$eval($${xge}.commands) + } +} diff --git a/mkspecs/features/lex.prf b/mkspecs/features/lex.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/lex.prf @@ -0,0 +1,24 @@ +# +# Lex extra-compiler for handling files specified in the LEXSOURCES variable +# + +{ + lex.name = Lex ${QMAKE_FILE_IN} + lex.input = LEXSOURCES + lex_included { + lex.CONFIG += no_link + } else { + lex.variable_out = GENERATED_SOURCES + } + isEmpty(QMAKE_LEXFLAGS_MANGLE):QMAKE_LEXFLAGS_MANGLE = -P${QMAKE_FILE_BASE} + QMAKE_LEXEXTRAFLAGS = $$QMAKE_LEXFLAGS + !yacc_no_name_mangle:QMAKE_LEXEXTRAFLAGS += $$QMAKE_LEXFLAGS_MANGLE + + lex.commands = $$QMAKE_LEX $$QMAKE_LEXEXTRAFLAGS ${QMAKE_FILE_IN}$$escape_expand(\\n\\t) \ + $$QMAKE_DEL_FILE $${QMAKE_CPP_MOD_MOC}${QMAKE_FILE_BASE}_lex$${first(QMAKE_EXT_CPP)}$$escape_expand(\\n\\t) \ + $$QMAKE_MOVE lex.${QMAKE_FILE_BASE}.c $${QMAKE_CPP_MOD_MOC}${QMAKE_FILE_BASE}_lex$${first(QMAKE_EXT_CPP)}$$escape_expand(\\n\\t) + lex.output = $${QMAKE_CPP_MOD_MOC}${QMAKE_FILE_BASE}_lex$${first(QMAKE_EXT_CPP)} + + silent:lex.commands = @echo Lex ${QMAKE_FILE_IN} && $$lex.commands + QMAKE_EXTRA_COMPILERS += lex +} diff --git a/mkspecs/features/libuc2.prf b/mkspecs/features/libuc2.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/libuc2.prf @@ -0,0 +1,40 @@ +# +# Libuc2 common rules +# +# + +contains( TEMPLATE, lib ) { + !isEmpty( BSPFILE ) { + target.path = $$[QT_INSTALL_PREFIX]/bsp/lib/$$BSP + HEADERS_inst.files = $$HEADERS + HEADERS_inst.path = $$[QT_INSTALL_PREFIX]/bsp/includes/$$BSP + BSPFILE_inst.files = $$BSPFILE + BSPFILE_inst.path = $$[QT_INSTALL_PREFIX]/mkspecs/features/boards/$$BSP + INSTALLS += target HEADERS_inst BSPFILE_inst + }else{ + HEADERS_inst.files = $$HEADERS + HEADERS_inst.path = $$[QT_INSTALL_HEADERS] + BSPFILE_inst.files = $$BSPFILE + BSPFILE_inst.path = $$[QT_INSTALL_PREFIX]/mkspecs/features/boards/$$BSP + INSTALLS += target HEADERS_inst BSPFILE_inst + } +} + + + + + + + + + + + + + + + + + + + diff --git a/mkspecs/features/link_pkgconfig.prf b/mkspecs/features/link_pkgconfig.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/link_pkgconfig.prf @@ -0,0 +1,25 @@ +# handle pkg-config files +isEmpty(PKG_CONFIG):PKG_CONFIG = pkg-config # keep consistent with qt_functions.prf too! + +for(PKGCONFIG_LIB, $$list($$unique(PKGCONFIG))) { + # don't proceed if the .pro asks for a package we don't have! + !packagesExist($$PKGCONFIG_LIB):error("Package $$PKGCONFIG_LIB not found") + + PKGCONFIG_CFLAGS = $$system($$PKG_CONFIG --cflags $$PKGCONFIG_LIB) + + PKGCONFIG_INCLUDEPATH = $$find(PKGCONFIG_CFLAGS, ^-I.*) + PKGCONFIG_INCLUDEPATH ~= s/^-I(.*)/\\1/g + + PKGCONFIG_DEFINES = $$find(PKGCONFIG_CFLAGS, ^-D.*) + PKGCONFIG_DEFINES ~= s/^-D(.*)/\\1/g + + PKGCONFIG_CFLAGS ~= s/^-[ID].*//g + + INCLUDEPATH *= $$PKGCONFIG_INCLUDEPATH + DEFINES *= $$PKGCONFIG_DEFINES + + QMAKE_CXXFLAGS += $$PKGCONFIG_CFLAGS + QMAKE_CFLAGS += $$PKGCONFIG_CFLAGS + LIBS += $$system($$PKG_CONFIG --libs $$PKGCONFIG_LIB) +} + diff --git a/mkspecs/features/mac/default_post.prf b/mkspecs/features/mac/default_post.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/mac/default_post.prf @@ -0,0 +1,17 @@ +load(default_post) +!no_objective_c:CONFIG += objective_c + +# Pick a suitable default architecture for qmake-based applications. +# If the Qt package contains one of x86 and x86_64, pick that one. If it +# contains both then use the compiler default. Make a similiar decision for +# PowerPC-based systems. Note that this logic assumes that Qt has been +# configured with an architecture that is usable on the system. +qt:!isEmpty(QT_CONFIG) { + contains(QMAKE_HOST.arch, ppc)|contains(QMAKE_HOST.arch, "Power Macintosh") { + !contains(QT_CONFIG, ppc64):contains(QT_CONFIG, ppc):CONFIG += ppc + contains(QT_CONFIG, ppc64):!contains(QT_CONFIG, ppc):CONFIG += ppc64 + } else { + !contains(QT_CONFIG, x86_64):contains(QT_CONFIG, x86):CONFIG += x86 + contains(QT_CONFIG, x86_64):!contains(QT_CONFIG, x86):CONFIG += x86_64 + } +} diff --git a/mkspecs/features/mac/default_pre.prf b/mkspecs/features/mac/default_pre.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/mac/default_pre.prf @@ -0,0 +1,3 @@ +CONFIG = sdk rez $$CONFIG +load(default_pre) + diff --git a/mkspecs/features/mac/dwarf2.prf b/mkspecs/features/mac/dwarf2.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/mac/dwarf2.prf @@ -0,0 +1,6 @@ +macx-xcode|macx-pbuilder { +} else { + QMAKE_CFLAGS_DEBUG += $$QMAKE_CFLAGS_DWARF2 + QMAKE_OBJECTIVE_CFLAGS_DEBUG += $$QMAKE_OBJECTIVE_DWARF2 + QMAKE_CXXFLAGS_DEBUG += $$QMAKE_CXXFLAGS_DWARF2 +} diff --git a/mkspecs/features/mac/objective_c.prf b/mkspecs/features/mac/objective_c.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/mac/objective_c.prf @@ -0,0 +1,23 @@ + +for(source, SOURCES) { + contains(source,.*\\.mm?$) { + warning(Objective-C source \'$$source\' found in SOURCES but should be in OBJECTIVE_SOURCES) + SOURCES -= $$source + OBJECTIVE_SOURCES += $$source + } +} + +isEmpty(QMAKE_OBJECTIVE_CC):QMAKE_OBJECTIVE_CC = $$QMAKE_CC + +OBJECTIVE_C_OBJECTS_DIR = $$OBJECTS_DIR +isEmpty(OBJECTIVE_C_OBJECTS_DIR):OBJECTIVE_C_OBJECTS_DIR = . +isEmpty(QMAKE_EXT_OBJECTIVE_C):QMAKE_EXT_OBJECTIVE_C = .mm .m + +objective_c.dependency_type = TYPE_C +objective_c.variables = QMAKE_OBJECTIVE_CFLAGS +objective_c.commands = $$QMAKE_OBJECTIVE_CC -c $(QMAKE_COMP_QMAKE_OBJECTIVE_CFLAGS) $(DEFINES) $(INCPATH) ${QMAKE_FILE_IN} -o ${QMAKE_FILE_OUT} +objective_c.output = $$OBJECTIVE_C_OBJECTS_DIR/${QMAKE_FILE_BASE}$${first(QMAKE_EXT_OBJ)} +objective_c.input = OBJECTIVE_SOURCES +objective_c.name = Compile ${QMAKE_FILE_IN} +silent:objective_c.commands = @echo objective-c ${QMAKE_FILE_IN} && $$objective_c.commands +QMAKE_EXTRA_COMPILERS += objective_c diff --git a/mkspecs/features/mac/ppc.prf b/mkspecs/features/mac/ppc.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/mac/ppc.prf @@ -0,0 +1,7 @@ +macx-xcode|macx-pbuilder { +} else { + QMAKE_CFLAGS += $$QMAKE_CFLAGS_PPC + QMAKE_OBJECTIVE_CFLAGS += $$QMAKE_OBJECTIVE_CFLAGS_PPC + QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_PPC + QMAKE_LFLAGS += $$QMAKE_LFLAGS_PPC +} diff --git a/mkspecs/features/mac/ppc64.prf b/mkspecs/features/mac/ppc64.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/mac/ppc64.prf @@ -0,0 +1,7 @@ +macx-xcode|macx-pbuilder { +} else { + QMAKE_CFLAGS += $$QMAKE_CFLAGS_PPC_64 + QMAKE_OBJECTIVE_CFLAGS += $$QMAKE_OBJECTIVE_CFLAGS_PPC_64 + QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_PPC_64 + QMAKE_LFLAGS += $$QMAKE_LFLAGS_PPC_64 +} diff --git a/mkspecs/features/mac/rez.prf b/mkspecs/features/mac/rez.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/mac/rez.prf @@ -0,0 +1,16 @@ + +#global defaults +isEmpty(QMAKE_REZ) { + QMAKE_REZ = /Developer/Tools/Rez +} +isEmpty(REZ_DIR):REZ_DIR = . +isEmpty(QMAKE_EXT_REZ):QMAKE_EXT_REZ = .rsrc + +rez_source.CONFIG += no_link +rez_source.dependency_type = TYPE_C +rez_source.commands = $$QMAKE_REZ ${QMAKE_FILE_IN} -o ${QMAKE_FILE_OUT} -useDF +rez_source.output = $$REZ_DIR/${QMAKE_FILE_BASE}$${first(QMAKE_EXT_REZ)} +rez_source.input = REZ_FILES +rez_source.name = REZ ${QMAKE_FILE_IN} +silent:rez_source.commands = @echo rez ${QMAKE_FILE_IN} && $$rez_source.commands +QMAKE_EXTRA_COMPILERS += rez_source diff --git a/mkspecs/features/mac/sdk.prf b/mkspecs/features/mac/sdk.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/mac/sdk.prf @@ -0,0 +1,8 @@ +!isEmpty(QMAKE_MAC_SDK) { + !macx-xcode:!macx-pbuilder { + QMAKE_CFLAGS += -isysroot $$QMAKE_MAC_SDK + QMAKE_OBJECTIVE_CFLAGS += -isysroot $$QMAKE_MAC_SDK + QMAKE_CXXFLAGS += -isysroot $$QMAKE_MAC_SDK + QMAKE_LFLAGS += -Wl,-syslibroot,$$QMAKE_MAC_SDK + } +} diff --git a/mkspecs/features/mac/x86.prf b/mkspecs/features/mac/x86.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/mac/x86.prf @@ -0,0 +1,7 @@ +macx-xcode|macx-pbuilder { +} else { + QMAKE_CFLAGS += $$QMAKE_CFLAGS_X86 + QMAKE_OBJECTIVE_CFLAGS += $$QMAKE_OBJECTIVE_CFLAGS_X86 + QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_X86 + QMAKE_LFLAGS += $$QMAKE_LFLAGS_X86 +} diff --git a/mkspecs/features/mac/x86_64.prf b/mkspecs/features/mac/x86_64.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/mac/x86_64.prf @@ -0,0 +1,7 @@ +macx-xcode|macx-pbuilder { +} else { + QMAKE_CFLAGS += $$QMAKE_CFLAGS_X86_64 + QMAKE_OBJECTIVE_CFLAGS += $$QMAKE_OBJECTIVE_CFLAGS_X86_64 + QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_X86_64 + QMAKE_LFLAGS += $$QMAKE_LFLAGS_X86_64 +} diff --git a/mkspecs/features/moc.prf b/mkspecs/features/moc.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/moc.prf @@ -0,0 +1,116 @@ + +#global defaults +qtPrepareTool(QMAKE_MOC, moc) +isEmpty(MOC_DIR):MOC_DIR = . +isEmpty(QMAKE_H_MOD_MOC):QMAKE_H_MOD_MOC = moc_ +isEmpty(QMAKE_EXT_CPP_MOC):QMAKE_EXT_CPP_MOC = .moc + +# On Windows, put the includes into a .inc file which moc will read, if the project +# has too many includes. We do this to overcome a command-line limit on Win < XP +INCLUDETEMP= +WIN_INCLUDETEMP= +win32:count($$list($$INCLUDEPATH), 40, >) { + INCLUDETEMP = $$MOC_DIR/mocinclude.tmp + + WIN_INCLUDETEMP=$$INCLUDETEMP + + EOC = $$escape_expand(\\n\\t) + + contains(TEMPLATE, "vc.*") { + # the VCPROJ generator will replace the \r\h with the coded \r\n: + # No other generator understands the \h + if(win32-msvc2*|wince*msvc*): EOC = $$escape_expand(\\r\\h) + else: EOC = $$escape_expand(\\\\\\n\\t) + } + + unset(INCFILELIST) + RET = + for(incfile, $$list($$INCLUDEPATH)) { + INCFILELIST = -I$$incfile + isEmpty(RET): RET += @echo $$INCFILELIST> $$WIN_INCLUDETEMP $$EOC + else: RET += @echo $$INCFILELIST>> $$WIN_INCLUDETEMP $$EOC + } + !isEmpty(INCFILELIST):RET += @echo $$INCFILELIST>> $$WIN_INCLUDETEMP $$EOC + + build_pass|isEmpty(BUILDS) { + mocinclude.target = $$INCLUDETEMP + mocinclude.commands = $$RET + QMAKE_EXTRA_TARGETS += mocinclude + } +} + +defineReplace(mocCmdBase) { + !isEmpty(WIN_INCLUDETEMP) { + RET = + contains(TEMPLATE, "vc.*") { + RET += $$mocinclude.commands + } + RET += $$QMAKE_MOC $(DEFINES) @$$WIN_INCLUDETEMP $$join(QMAKE_COMPILER_DEFINES, " -D", -D) + return($$RET) + } + return($$QMAKE_MOC $(DEFINES) $(INCPATH) $$join(QMAKE_COMPILER_DEFINES, " -D", -D)) +} + +#moc headers +moc_header.CONFIG = moc_verify +moc_header.dependency_type = TYPE_C +moc_header.commands = ${QMAKE_FUNC_mocCmdBase} ${QMAKE_FILE_IN} -o ${QMAKE_FILE_OUT} +moc_header.output = $$MOC_DIR/$${QMAKE_H_MOD_MOC}${QMAKE_FILE_BASE}$${first(QMAKE_EXT_CPP)} +moc_header.input = HEADERS +moc_header.variable_out = SOURCES +moc_header.name = MOC ${QMAKE_FILE_IN} +!contains(TEMPLATE, "vc.*") { + !isEmpty(INCLUDETEMP):moc_header.depends += $$INCLUDETEMP +} +silent:moc_header.commands = @echo moc ${QMAKE_FILE_IN} && $$moc_header.commands +QMAKE_EXTRA_COMPILERS += moc_header +INCREDIBUILD_XGE += moc_header + +#moc sources +moc_source.CONFIG = no_link moc_verify +moc_source.dependency_type = TYPE_C +moc_source.commands = ${QMAKE_FUNC_mocCmdBase} ${QMAKE_FILE_IN} -o ${QMAKE_FILE_OUT} +moc_source.output = $$MOC_DIR/$${QMAKE_CPP_MOD_MOC}${QMAKE_FILE_BASE}$${QMAKE_EXT_CPP_MOC} +moc_source.input = SOURCES OBJECTIVE_SOURCES +moc_source.name = MOC ${QMAKE_FILE_IN} +!contains(TEMPLATE, "vc.*") { + !isEmpty(INCLUDETEMP):moc_source.depends += $$INCLUDETEMP +} +silent:moc_source.commands = @echo moc ${QMAKE_FILE_IN} && $$moc_source.commands +QMAKE_EXTRA_COMPILERS += moc_source +INCREDIBUILD_XGE += moc_source + +#make sure we can include these files +moc_dir_short = $$MOC_DIR +contains(QMAKE_HOST.os,Windows):moc_dir_short ~= s,^.:,/, +contains(moc_dir_short, ^[/\\\\].*):INCLUDEPATH += $$MOC_DIR +else:INCLUDEPATH += $$OUT_PWD/$$MOC_DIR + +# Backwards compatibility: Make shadow builds with default MOC_DIR work +# if the user did not add the source dir explicitly. +equals(MOC_DIR, .) { + CONFIG -= include_source_dir + CONFIG = include_source_dir $$CONFIG +} + +#auto depend on moc +unix:!symbian:!no_mocdepend { + moc_source.depends += $$first(QMAKE_MOC) + moc_header.depends += $$first(QMAKE_MOC) + !contains(TARGET, moc) { #auto build moc + isEmpty(QMAKE_MOC_SRC):QMAKE_MOC_SRC = "$(QTDIR)/src/tools/moc" + make_moc.target = $$first(QMAKE_MOC) + make_moc.commands = (cd $$QMAKE_MOC_SRC && $(MAKE)) + QMAKE_EXTRA_TARGETS += make_moc + } +} + +#generate a mocclean +build_pass|isEmpty(BUILDS):mocclean.depends = compiler_moc_header_clean compiler_moc_source_clean +else:mocclean.CONFIG += recursive +QMAKE_EXTRA_TARGETS += mocclean + +#generate a mocables +build_pass|isEmpty(BUILDS):mocables.depends = compiler_moc_header_make_all compiler_moc_source_make_all +else:mocables.CONFIG += recursive +QMAKE_EXTRA_TARGETS += mocables diff --git a/mkspecs/features/no_debug_info.prf b/mkspecs/features/no_debug_info.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/no_debug_info.prf @@ -0,0 +1,14 @@ + +win32-msvc2*|wince*msvc* { + QMAKE_CFLAGS -= -Zi + QMAKE_CFLAGS_DEBUG -= -Zi + QMAKE_CFLAGS_RELEASE_WITH_DEBUGINFO -= -Zi + QMAKE_CXXFLAGS -= -Zi + QMAKE_CXXFLAGS_DEBUG -= -Zi + QMAKE_CXXFLAGS_RELEASE_WITH_DEBUGINFO -= -Zi +} else { + QMAKE_CFLAGS -= -g -ggdb3 + QMAKE_CXXFLAGS -= -g -ggdb3 + QMAKE_LFLAGS -= -g -ggdb3 + QMAKE_LIBFLAGS -= -g -ggdb3 +} diff --git a/mkspecs/features/qdbus.prf b/mkspecs/features/qdbus.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/qdbus.prf @@ -0,0 +1,2 @@ +qtAddLibrary(QtDBus) +CONFIG += dbusadaptors dbusinterfaces diff --git a/mkspecs/features/qt.prf b/mkspecs/features/qt.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/qt.prf @@ -0,0 +1,227 @@ +CONFIG *= moc thread + +#handle defines +win32 { + qt_static:DEFINES += QT_NODLL + !contains(DEFINES, QT_NODLL) { + QT_ENV_DLL = $$(QT_DLL) + QT_ENV_NO_DLL = $$(QT_NODLL) + isEmpty(QT_ENV_NO_DLL) { + shared|!isEmpty(QT_ENV_DLL):DEFINES += QT_DLL + } + contains(DEFINES, QT_MAKEDLL)|contains(DEFINES, QT_DLL):QMAKE_QT_DLL = 1 + } +} +CONFIG(release, debug|release):DEFINES += QT_NO_DEBUG +no_keywords:DEFINES += QT_NO_KEYWORDS +plugin { #Qt plugins + static:DEFINES += QT_STATICPLUGIN + DEFINES += QT_PLUGIN + + # Triggers both on Qt being configured with -arch boundschecker, + # and if you qmake CONFIG+=boundchecker on your plugin project + boundschecker|contains(QT_CONFIG,boundschecker) { + # This option is added for plugins when Qt is configured for Boundschecker, + # since we want Boundschecker to not instrument the qt_plugin_query_verification_data + # function, as we call that function without the plugin's dependent DLLs, thus + # Boundscheckers instrumentation will fail. The function only returns a const char *, + # so no instrumentation is really needed on that function anyways. + QMAKE_CFLAGS += /nmignore:*:qt_plugin_query_verification_data + QMAKE_CXXFLAGS += /nmignore:*:qt_plugin_query_verification_data + } +} + +#handle includes +INCLUDEPATH = $$QMAKE_INCDIR_QT $$INCLUDEPATH #prepending prevents us from picking up "stale" includes +win32:INCLUDEPATH += $$QMAKE_INCDIR_QT/ActiveQt + +# As order does matter for static libs, we reorder the QT variable here +TMPLIBS = declarative webkit phonon multimedia dbus testlib script scripttools svg qt3support sql xmlpatterns xml egl opengl openvg gui network core meegographicssystemhelper +for(QTLIB, $$list($$TMPLIBS)) { + contains(QT, $$QTLIB): QT_ORDERED += $$QTLIB +} + +QT_UNKNOWN = $$QT +QT_UNKNOWN -= $$QT_ORDERED +QT = $$QT_ORDERED +for(QTLIB, $$list($$QT_UNKNOWN)) { + !contains(TMPLIBS, $$QTLIB):message("Warning: unknown QT: $$QTLIB") +} + +QT_PLUGIN_VERIFY = QTPLUGIN DEPLOYMENT_PLUGIN +for(QT_CURRENT_VERIFY, $$list($$QT_PLUGIN_VERIFY)) { + for(QTPLUG, $$list($$lower($$unique($$QT_CURRENT_VERIFY)))) { + qplugin_style = + !qt_debug:!qt_release { + CONFIG(debug, debug|release):qplugin_style = debug + else:qplugin_style = release + } else:CONFIG(qt_debug, qt_debug|qt_release) { + qplugin_style = debug + } else { + qplugin_style = release + } + + # Check if the plugin is known to Qt. We can use this to determine + # the plugin path. Unknown plugins must rely on the default link path. + ACCESSIBLEPLUGINS = qtaccessiblewidgets qtaccessiblecompatwidgets + BEARERPLUGINS = qgenericbearer qnativewifibearer + CODECPLUGINS = qcncodecs qjpcodecs qkrcodecs qtwcodecs + DECORATIONPLUGINS = qdecorationdefault qdecorationstyled qdecorationwindows + GFXDRIVERPLUGINS = qgfxvnc qscreenvfb qgfxtransformed qgfxshadowfb qgfxpvregl qscreenlinuxfb qeglnullws qdirectfbscreen qahiscreen + GRAPHICSSYSTEMPLUGINS = qmeegographicssystem qglgraphicssystem qvggraphicssystem qshivavggraphicssystem + IMAGEPLUGINS = qgif qico qmng qjpeg qsvg qtiff + INPUTPLUGINS = qimsw-multi + KBDDRIVERPLUGINS = qlinuxinputkbddriver + MOUSEDRIVERPLUGINS = qtslibmousehandler qpcmousedriver qlinuxtpmousedriver + SQLPLUGINS = qsqldb2 qsqloci qsqltds qsqlodbc qsqlpsql qsqlibase qsqlmysql qsqlite2 qsqlite + PHONONPLUGINS = phonon_waveout phonon_ds9 phonon_gstreamer phonon_qt7 phonon_mmf + + ALLQTPLUGINS = $$ACCESSIBLEPLUGINS $$BEARERPLUGINS $$CODECPLUGINS $$DECORATIONPLUGINS $$GFXDRIVERPLUGINS $$GRAPHICSSYSTEMPLUGINS $$IMAGEPLUGINS $$INPUTPLUGINS $$KBDDRIVERPLUGINS $$MOUSEDRIVERPLUGINS $$SQLPLUGINS $$PHONONPLUGINS + + QT_PLUGINPATH = + contains(ALLQTPLUGINS, $$QTPLUG) { + # Determine the plugin path + contains(ACCESSIBLEPLUGINS, $$QTPLUG): QT_PLUGINPATH = accessible + contains(BEARERPLUGINS, $$QTPLUG): QT_PLUGINPATH = bearer + contains(CODECPLUGINS, $$QTPLUG): QT_PLUGINPATH = codecs + contains(DECORATIONPLUGINS, $$QTPLUG): QT_PLUGINPATH = decorations + contains(GFXDRIVERPLUGINS, $$QTPLUG): QT_PLUGINPATH = gfxdrivers + contains(GRAPHICSSYSTEMPLUGINS, $$QTPLUG): QT_PLUGINPATH = graphicssystems + contains(IMAGEPLUGINS, $$QTPLUG): QT_PLUGINPATH = imageformats + contains(INPUTPLUGINS, $$QTPLUG): QT_PLUGINPATH = inputmethods + contains(KBDDRIVERPLUGINS, $$QTPLUG): QT_PLUGINPATH = kbddrivers + contains(MOUSEDRIVERPLUGINS, $$QTPLUG): QT_PLUGINPATH = mousedrivers + contains(SQLPLUGINS, $$QTPLUG): QT_PLUGINPATH = sqldrivers + contains(PHONONPLUGINS, $$QTPLUG): QT_PLUGINPATH = phonon_backend + } + + # Generate the plugin linker line + target_qt:isEqual(TARGET, QTPLUG) { + warning($$TARGET cannot have a QTPLUGIN of $$QTPLUG) + } else { + QT_LINKAGE = -l$${QTPLUG} + win32 { + CONFIG(debug, debug|release):QT_LINKAGE = -l$${QTPLUG}d + } else:mac { + isEqual(qplugin_style, debug):QT_LINKAGE = -l$${QTPLUG}_debug + } + } + + # Only link against plugin in static builds + isEqual(QT_CURRENT_VERIFY, QTPLUGIN): { + !isEmpty(QT_PLUGINPATH): LIBS *= -L$$[QT_INSTALL_PLUGINS]/$$QT_PLUGINPATH + LIBS += $$QT_LINKAGE + # if the plugin is linked statically there is no need to deploy it + DEPLOYMENT_PLUGIN -= $$QT_CURRENT_VERIFY + } + isEqual(QT_CURRENT_VERIFY, DEPLOYMENT_PLUGIN):shared:wince*: { + QT_ITEM = + CONFIG(debug, debug|release): QT_ITEM = $${QTPLUG}d4.dll + else: QT_ITEM = $${QTPLUG}4.dll + + eval(qt_additional_plugin_$${QTPLUG}.files = $$[QT_INSTALL_PLUGINS]/$${QT_PLUGINPATH}/$${QT_ITEM}) + eval(qt_additional_plugin_$${QTPLUG}.path = $${QT_PLUGINPATH}) + + DEPLOYMENT *= qt_additional_plugin_$${QTPLUG} + } + isEqual(QT_CURRENT_VERIFY, DEPLOYMENT_PLUGIN):shared:symbian: { + QT_ITEM = $${QTPLUG}.dll + + eval(qt_additional_plugin_$${QTPLUG}.files = $${QT_ITEM}) + eval(qt_additional_plugin_$${QTPLUG}.path = $${QT_PLUGINPATH}) + + DEPLOYMENT *= qt_additional_plugin_$${QTPLUG} + } + } +} +#specific module settings +!isEmpty(QT_BUILD_TREE):QMAKE_LIBDIR = $$QT_BUILD_TREE/lib $$QMAKE_LIBDIR #as above, prepending prevents us from picking up "stale" libs +QMAKE_LIBDIR += $$QMAKE_LIBDIR_QT +for(QTLIB, $$list($$lower($$unique(QT)))) { + unset(qlib_style) + !qt_debug:!qt_release { + CONFIG(debug, debug|release):qlib_style = debug + else:qlib_style = release + } else:CONFIG(qt_debug, qt_debug|qt_release) { + qlib_style = debug + } else { + qlib_style = release + } + + unset(qlib) + isEqual(QTLIB, gui):qlib = QtGui + else:isEqual(QTLIB, network):qlib = QtNetwork + else:isEqual(QTLIB, xml):qlib = QtXml + else:isEqual(QTLIB, xmlpatterns):qlib = QtXmlPatterns + else:isEqual(QTLIB, opengl):qlib = QtOpenGL + else:isEqual(QTLIB, openvg):qlib = QtOpenVG + else:isEqual(QTLIB, sql):qlib = QtSql + else:isEqual(QTLIB, core):qlib = QtCore + else:isEqual(QTLIB, canvas):qlib = QtCanvas + else:isEqual(QTLIB, qt3support):qlib = Qt3Support + else:isEqual(QTLIB, svg):qlib = QtSvg + else:isEqual(QTLIB, script):qlib = QtScript + else:isEqual(QTLIB, scripttools):qlib = QtScriptTools + else:isEqual(QTLIB, testlib):qlib = QtTest + else:isEqual(QTLIB, dbus):qlib = QtDBus + else:isEqual(QTLIB, phonon) { + qlib = phonon + INCLUDEPATH += $$QMAKE_INCDIR_QT/phonon_compat + + # The Helix backend requires this. Since we can't let a plugin set it, + # we bump the values for all Symbian Phonon plugins. + symbian:isEmpty(TARGET.EPOCHEAPSIZE):TARGET.EPOCHEAPSIZE = 0x040000 0x1600000 + + } else:isEqual(QTLIB, webkit) { + qlib = QtWebKit + aix-xlc { + # Flags recommended by IBM when using WebKit + QMAKE_LFLAGS -= -bmaxdata:0x80000000 + QMAKE_LFLAGS += -bmaxdata:0xD0000000/dsa + } + } else:isEqual(QTLIB, declarative):qlib = QtDeclarative + else:isEqual(QTLIB, multimedia):qlib = QtMultimedia + else:isEqual(QTLIB, meegographicssystemhelper):qlib = QtMeeGoGraphicsSystemHelper + else:message("Unknown QT: $$QTLIB"):qlib = + !isEmpty(qlib) { + target_qt:isEqual(TARGET, qlib) { + warning($$TARGET cannot have a QT of $$QTLIB) + } else { + DEFINES *= $$upper(QT_$${QTLIB}_LIB) + isEqual(QTLIB, opengl):CONFIG += opengl + isEqual(QTLIB, openvg):CONFIG += openvg + isEqual(QTLIB, qt3support):DEFINES *= QT3_SUPPORT + isEqual(QTLIB, testlib):CONFIG += console + isEqual(QTLIB, dbus):CONFIG += dbusadaptors dbusinterfaces + + qtAddLibrary($$qlib) + } + } +} + +qt_compat { + !qt_compat_no_warning:QTDIR_build:warning(***USE of COMPAT inside of QTDIR!**) #just for us + INCLUDEPATH *= $$QMAKE_INCDIR_QT/Qt + DEFINES *= QT_COMPAT +} + +wince*:static:gui { + QTLIB += qmenu_wce.res +} + +!isEmpty(QT_NAMESPACE):DEFINES *= QT_NAMESPACE=$$QT_NAMESPACE +mac { + !isEmpty(QT_NAMESPACE_MAC_CRC):DEFINES *= QT_NAMESPACE_MAC_CRC=$$QT_NAMESPACE_MAC_CRC +} + +#SIMD defines: +mmx:DEFINES += QT_HAVE_MMX +3dnow:DEFINES += QT_HAVE_3DNOW +sse:DEFINES += QT_HAVE_SSE QT_HAVE_MMXEXT +sse2:DEFINES += QT_HAVE_SSE2 +sse3:DEFINES += QT_HAVE_SSE3 +ssse3:DEFINES += QT_HAVE_SSSE3 +sse4_1:DEFINES += QT_HAVE_SSE4_1 +sse4_2:DEFINES += QT_HAVE_SSE4_2 +avx:DEFINES += QT_HAVE_AVX +iwmmxt:DEFINES += QT_HAVE_IWMMXT diff --git a/mkspecs/features/qt_config.prf b/mkspecs/features/qt_config.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/qt_config.prf @@ -0,0 +1,24 @@ +# This file is loaded by the mkspecs, before .qmake.cache has been loaded. +# Consequently, we have to do some stunts to get values out of the cache. + +exists($$_QMAKE_CACHE_):QMAKE_QT_CONFIG = $$fromfile($$_QMAKE_CACHE_, QMAKE_QT_CONFIG) +isEmpty(QMAKE_QT_CONFIG)|!exists($$QMAKE_QT_CONFIG) { + qdd = $$QT_BUILD_TREE + isEmpty(qdd):exists($$_QMAKE_CACHE_): qdd = $$fromfile($$_QMAKE_CACHE_, QT_BUILD_TREE) + isEmpty(qdd): qdd = $$[QT_INSTALL_DATA] + QMAKE_QT_CONFIG = $$qdd/mkspecs/qconfig.pri + unset(qdd) +} +!include($$QMAKE_QT_CONFIG, "", true) { + debug(1, "Cannot load qconfig.pri!") +} else { + debug(1, "Loaded .qconfig.pri from ($$QMAKE_QT_CONFIG)") + for(dir, $$list($$unique($$list($$dirname(QMAKE_QT_CONFIG) \ + $$split($$list($$[QMAKE_MKSPECS]), $$DIRLIST_SEPARATOR))))) { + debug(1, "Loading modules from $${dir}") + for(mod, $$list($$files($$dir/modules/qt_*.pri))):include($$mod) + } +} + +load(qt_functions) + diff --git a/mkspecs/features/qt_functions.prf b/mkspecs/features/qt_functions.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/qt_functions.prf @@ -0,0 +1,122 @@ +defineReplace(qtLibraryTarget) { + unset(LIBRARY_NAME) + LIBRARY_NAME = $$1 + mac:!static:contains(QT_CONFIG, qt_framework) { + QMAKE_FRAMEWORK_BUNDLE_NAME = $$LIBRARY_NAME + export(QMAKE_FRAMEWORK_BUNDLE_NAME) + } + contains(TEMPLATE, .*lib):CONFIG(debug, debug|release) { + !debug_and_release|build_pass { + mac:RET = $$member(LIBRARY_NAME, 0)_debug + else:win32:RET = $$member(LIBRARY_NAME, 0)d + } + } + isEmpty(RET):RET = $$LIBRARY_NAME + return($$RET) +} + +defineTest(qtAddLibrary) { + INCLUDEPATH -= $$QMAKE_INCDIR_QT/$$1 + INCLUDEPATH = $$QMAKE_INCDIR_QT/$$1 $$INCLUDEPATH + + LIB_NAME = $$1 + unset(LINKAGE) + mac { + CONFIG(qt_framework, qt_framework|qt_no_framework) { #forced + QMAKE_FRAMEWORKPATH *= $${QMAKE_LIBDIR_QT} + FRAMEWORK_INCLUDE = $$QMAKE_LIBDIR_QT/$${LIB_NAME}.framework/Headers + !qt_no_framework_direct_includes:exists($$FRAMEWORK_INCLUDE) { + INCLUDEPATH -= $$FRAMEWORK_INCLUDE + INCLUDEPATH = $$FRAMEWORK_INCLUDE $$INCLUDEPATH + } + LINKAGE = -framework $${LIB_NAME}$${QT_LIBINFIX} + } else:!qt_no_framework { #detection + for(frmwrk_dir, $$list($$QMAKE_LIBDIR_QT $$QMAKE_LIBDIR $$(DYLD_FRAMEWORK_PATH) /Library/Frameworks)) { + exists($${frmwrk_dir}/$${LIB_NAME}.framework) { + QMAKE_FRAMEWORKPATH *= $${frmwrk_dir} + FRAMEWORK_INCLUDE = $$frmwrk_dir/$${LIB_NAME}.framework/Headers + !qt_no_framework_direct_includes:exists($$FRAMEWORK_INCLUDE) { + INCLUDEPATH -= $$FRAMEWORK_INCLUDE + INCLUDEPATH = $$FRAMEWORK_INCLUDE $$INCLUDEPATH + } + LINKAGE = -framework $${LIB_NAME} + break() + } + } + } + } + symbian { + isEqual(LIB_NAME, QtCore) { + #workaround for dependency from f32file.h on e32svr.h which has moved location in symbian3 + INCLUDEPATH *= $$OS_LAYER_SYSTEMINCLUDE + } else:isEqual(LIB_NAME, QtGui) { + # Needed for #include because qs60mainapplication.h includes aknapp.h + INCLUDEPATH *= $$MW_LAYER_SYSTEMINCLUDE + } else:isEqual(LIB_NAME, QtWebKit) { + # Needed for because relative inclusion problem in toolchain + INCLUDEPATH *= $$QMAKE_INCDIR_QT/QtXmlPatterns + INCLUDEPATH *= $$QMAKE_INCDIR_QT/QtNetwork + isEmpty(TARGET.CAPABILITY): TARGET.CAPABILITY = NetworkServices + isEmpty(TARGET.EPOCHEAPSIZE):TARGET.EPOCHEAPSIZE = 0x20000 0x2000000 + } else:isEqual(LIB_NAME, QtXmlPatterns) { + # Needed for #include because relative inclusion problem in toolchain + INCLUDEPATH *= $$QMAKE_INCDIR_QT/QtNetwork + } else:isEqual(LIB_NAME, QtNetwork) { + isEmpty(TARGET.CAPABILITY): TARGET.CAPABILITY = NetworkServices + } else:isEqual(LIB_NAME, QtDeclarative) { + isEmpty(TARGET.CAPABILITY): TARGET.CAPABILITY = NetworkServices + isEmpty(TARGET.EPOCHEAPSIZE):TARGET.EPOCHEAPSIZE = 0x20000 0x2000000 + } + export(TARGET.EPOCHEAPSIZE) + export(TARGET.CAPABILITY) + } + isEmpty(LINKAGE) { + if(!debug_and_release|build_pass):CONFIG(debug, debug|release) { + win32:LINKAGE = -l$${LIB_NAME}$${QT_LIBINFIX}d + mac:LINKAGE = -l$${LIB_NAME}$${QT_LIBINFIX}_debug + } + isEmpty(LINKAGE):LINKAGE = -l$${LIB_NAME}$${QT_LIBINFIX} + } + !isEmpty(QMAKE_LSB) { + QMAKE_LFLAGS *= --lsb-libpath=$$$$QMAKE_LIBDIR_QT + QMAKE_LFLAGS *= -L/opt/lsb/lib + QMAKE_LFLAGS *= --lsb-shared-libs=$${LIB_NAME}$${QT_LIBINFIX} + } + LIBS += $$LINKAGE + export(LIBS) + export(INCLUDEPATH) + export(QMAKE_FRAMEWORKPATH) + export(QMAKE_LFLAGS) + return(true) +} + +# variable, default +defineTest(qtPrepareTool) { + isEmpty($$1) { + !isEmpty(QT_BUILD_TREE):$$1 = $$QT_BUILD_TREE/bin/$$2 + else:$$1 = $$[QT_INSTALL_BINS]/$$2 + } + $$1 ~= s,[/\\\\],$$QMAKE_DIR_SEP, + contains(QMAKE_HOST.os, Windows):!contains($$1, .*\\.(exe|bat)$) { + exists($$eval($$1).bat) { + $$1 = $$eval($$1).bat + } else { + $$1 = $$eval($$1).exe + } + } + export($$1) +} + +defineTest(packagesExist) { + # this can't be done in global scope here because qt_functions is loaded + # before the .pro is parsed, so if the .pro set PKG_CONFIG, we wouldn't know it + # yet. oops. + isEmpty(PKG_CONFIG):PKG_CONFIG = pkg-config # keep consistent with link_pkgconfig.prf! too + + for(package, ARGS) { + !system($$PKG_CONFIG --exists $$package):return(false) + } + + return(true) +} + diff --git a/mkspecs/features/qtestlib.prf b/mkspecs/features/qtestlib.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/qtestlib.prf @@ -0,0 +1,4 @@ + +CONFIG += console + +qtAddLibrary(QtTest) diff --git a/mkspecs/features/qtopia.prf b/mkspecs/features/qtopia.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/qtopia.prf @@ -0,0 +1,1 @@ +CONFIG *= qtopiainc qtopialib diff --git a/mkspecs/features/qtopiainc.prf b/mkspecs/features/qtopiainc.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/qtopiainc.prf @@ -0,0 +1,1 @@ +INCLUDEPATH += $$QMAKE_INCDIR_QTOPIA diff --git a/mkspecs/features/qtopialib.prf b/mkspecs/features/qtopialib.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/qtopialib.prf @@ -0,0 +1,2 @@ +!isEmpty(QMAKE_LIBDIR_QTOPIA):QMAKE_LIBDIR = $$QMAKE_LIBDIR_QTOPIA +LIBS += $$QMAKE_LIBS_QTOPIA diff --git a/mkspecs/features/qttest_p4.prf b/mkspecs/features/qttest_p4.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/qttest_p4.prf @@ -0,0 +1,24 @@ +isEmpty(TEMPLATE):TEMPLATE=app +CONFIG += qt warn_on console depend_includepath testcase + +# x11 is not defined by configure (the following line is copied from gui.pro) +!win32:!embedded:!qpa:!mac:!symbian:CONFIG += x11 + +qtAddLibrary(QtTest) + +symbian:{ + TARGET.EPOCHEAPSIZE = 0x100000 0x2000000 +# DEFINES += QTEST_NO_SPECIALIZATIONS + TARGET.CAPABILITY="None" + RSS_RULES ="group_name=\"QtTests\";" + MMP_RULES*=SMPSAFE +} + +# prefix test binary with tst_ +!contains(TARGET, ^tst_.*):TARGET = $$join(TARGET,,"tst_") + +isEmpty(target.path) { + target.path += $$[QT_INSTALL_PREFIX]/tests/qt4/$${TARGET} +} + +INSTALLS += target diff --git a/mkspecs/features/release.prf b/mkspecs/features/release.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/release.prf @@ -0,0 +1,7 @@ +CONFIG -= debug +QMAKE_CFLAGS += $$QMAKE_CFLAGS_RELEASE +QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_RELEASE +QMAKE_OBJECTIVE_CFLAGS += $$QMAKE_OBJECTIVE_CFLAGS_RELEASE +QMAKE_LFLAGS += $$QMAKE_LFLAGS_RELEASE +QMAKE_LIBFLAGS += $$QMAKE_LIBFLAGS_RELEASE +!debug_and_release:fix_output_dirs:fixExclusiveOutputDirs(release, debug) \ No newline at end of file diff --git a/mkspecs/features/resources.prf b/mkspecs/features/resources.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/resources.prf @@ -0,0 +1,29 @@ +defined(qtPrepareTool)|load(qt_functions) ### Qt 5: see default_pre.prf +qtPrepareTool(QMAKE_RCC, rcc) + +isEmpty(RCC_DIR):RCC_DIR = . +isEmpty(QMAKE_RESOURCE_PREFIX):QMAKE_RESOURCE_PREFIX = /tmp/ +isEmpty(QMAKE_MOD_RCC):QMAKE_MOD_RCC = qrc + +resource_combine { + rcc.CONFIG += combine + rcc.output = $$RCC_DIR/$${first(QMAKE_MOD_RCC)}_combined$${first(QMAKE_EXT_CPP)} +} else { + rcc.output = $$RCC_DIR/$${first(QMAKE_MOD_RCC)}_${QMAKE_FILE_BASE}$${first(QMAKE_EXT_CPP)} +} +!contains(QMAKE_RESOURCE_FLAGS, -root):!isEmpty(QMAKE_RESOURCE_ROOT):QMAKE_RESOURCE_FLAGS += -root $$QMAKE_RESOURCE_ROOT +!contains(QMAKE_RESOURCE_FLAGS, -name) { + resource_combine { + isEmpty(QMAKE_RESOURCE_NAME):!isEmpty(TARGET):QMAKE_RESOURCE_NAME = $$TARGET + !isEmpty(QMAKE_RESOURCE_NAME):QMAKE_RESOURCE_FLAGS += -name $$QMAKE_RESOURCE_NAME + } else { + QMAKE_RESOURCE_FLAGS += -name ${QMAKE_FILE_BASE} + } +} +rcc.commands = "$$QMAKE_RCC" $$QMAKE_RESOURCE_FLAGS "${QMAKE_FILE_IN}" -o "${QMAKE_FILE_OUT}" +rcc.depend_command = "$$QMAKE_RCC" -list $$QMAKE_RESOURCE_FLAGS "${QMAKE_FILE_IN}" +rcc.input = RESOURCES +rcc.variable_out = SOURCES +rcc.name = RCC ${QMAKE_FILE_IN} +silent:rcc.commands = @echo rcc "${QMAKE_FILE_IN}" && $$rcc.commands +QMAKE_EXTRA_COMPILERS += rcc diff --git a/mkspecs/features/shared.prf b/mkspecs/features/shared.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/shared.prf @@ -0,0 +1,7 @@ +CONFIG -= static +contains(TEMPLATE, ".*lib"): { + CONFIG += dll + CONFIG -= staticlib + win32:QMAKE_LFLAGS += $$QMAKE_LFLAGS_DLL +} +!static_and_shared:fix_output_dirs:fixExclusiveOutputDirs(shared, static) diff --git a/mkspecs/features/silent.prf b/mkspecs/features/silent.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/silent.prf @@ -0,0 +1,6 @@ +!macx-xcode { + QMAKE_CC = @echo compiling $< && $$QMAKE_CC + QMAKE_CXX = @echo compiling $< && $$QMAKE_CXX + !contains(QMAKE_LINK, "@:"):QMAKE_LINK = @echo linking $@ && $$QMAKE_LINK + QMAKE_LINK_SHLIB = @echo linking $@ && $$QMAKE_LINK_SHLIB +} diff --git a/mkspecs/features/static.prf b/mkspecs/features/static.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/static.prf @@ -0,0 +1,14 @@ +CONFIG -= shared dll +contains(TEMPLATE, ".*lib"):{ + CONFIG += staticlib + unix { + QMAKE_CFLAGS += $$QMAKE_CFLAGS_STATIC_LIB + QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_STATIC_LIB + } +} + +mac { + QMAKE_LFLAGS += $$QMAKE_LFLAGS_STATIC_LIB +} + +!static_and_shared:fix_output_dirs:fixExclusiveOutputDirs(static, shared) diff --git a/mkspecs/features/static_and_shared.prf b/mkspecs/features/static_and_shared.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/static_and_shared.prf @@ -0,0 +1,3 @@ +!contains(TEMPLATE, subdirs):!macx-xcode:!symbian-abld:!symbian-sbsv2 { + addExclusiveBuilds(static, Static, shared, Shared) +} diff --git a/mkspecs/features/staticlib.prf b/mkspecs/features/staticlib.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/staticlib.prf @@ -0,0 +1,1 @@ +CONFIG += static diff --git a/mkspecs/features/testcase.prf b/mkspecs/features/testcase.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/testcase.prf @@ -0,0 +1,69 @@ +!contains(TEMPLATE,subdirs) { + +check.files = +check.path = . + +# If the test ends up in a different directory, we should cd to that directory. +# Note that qmake modifies DESTDIR after this file is processed, +# therefore, testing DESTDIR for emptiness is not sufficient. +# Also note that in debug-and-release mode we don't want to cd into the debug/release +# directory (e.g. if the test goes to foo/release/tst_thing.exe, we want to do +# cd foo && release/tst_thing.exe ). +MUNGED_DESTDIR=$$DESTDIR +MUNGED_TARGET=$$TARGET +win32:debug_and_release { + contains(DESTDIR,^release$)|contains(DESTDIR,^debug$):MUNGED_DESTDIR= + + # In debug-and-release mode, the first ../ in TARGET breaks out of the debug/release + # subdirectory. However, since make's working directory is already outside of the + # debug/release subdirectory, this first ../ should be ignored when deciding if + # we have to change directory before running the test. + MUNGED_TARGET=$$replace(MUNGED_TARGET,^\\.\\./,) +} +!isEmpty(MUNGED_DESTDIR):!contains(MUNGED_DESTDIR,^\\./?):check.commands = cd $(DESTDIR) && +contains(MUNGED_TARGET,.*/.*):check.commands = cd $(DESTDIR) && + +# Allow for a custom test runner script +check.commands += $(TESTRUNNER) + +macx { + app_bundle: check.commands += ./$(QMAKE_TARGET).app/Contents/MacOS/$(QMAKE_TARGET) + else: check.commands += ./$(QMAKE_TARGET) +} +else:unix: check.commands += ./$(QMAKE_TARGET) +else: check.commands += $(DESTDIR_TARGET) + +# For Qt/Embedded, run every test app as a QWS server +embedded: check.commands += -qws + +# Allow for custom arguments to tests +check.commands += $(TESTARGS) + +# If the test is marked as insignificant, discard the exit code +insignificant_test:check.commands = -$${check.commands} + +QMAKE_EXTRA_TARGETS *= check + +!debug_and_release|build_pass { + check.depends = first +} else { + check.CONFIG = recursive + # In debug and release mode, only run the test once. + # Run debug if available, release otherwise. + debug_and_release { + check.target = dummy_check + check.recurse_target = check + debug { + real_check.depends = debug-check + real_check.target = check + QMAKE_EXTRA_TARGETS += real_check + } else { + real_check.depends = release-check + real_check.target = check + QMAKE_EXTRA_TARGETS += real_check + } + } +} + +} + diff --git a/mkspecs/features/ucswitch.prf b/mkspecs/features/ucswitch.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/ucswitch.prf @@ -0,0 +1,34 @@ +# +# Microcontroler switch +# +# +contains( TEMPLATE, app ) { + !isEmpty( BSP ) { + include(./boards/$$BSP/bsp.pri) + } +} + +#contains( TEMPLATE, lib ) { + !isEmpty( UCMODEL ) { + include(../$$UCMODEL/qmake.conf) + } +#} + + + + + + + + + + + + + + + + + + + diff --git a/mkspecs/features/uic.prf b/mkspecs/features/uic.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/uic.prf @@ -0,0 +1,117 @@ +defined(qtPrepareTool)|load(qt_functions) ### Qt 5: see default_pre.prf +qtPrepareTool(QMAKE_UIC3, uic3) +qtPrepareTool(QMAKE_UIC, uic) + +isEmpty(UI_DIR):UI_DIR = . +isEmpty(UI_SOURCES_DIR):UI_SOURCES_DIR = $$UI_DIR +isEmpty(UI_HEADERS_DIR):UI_HEADERS_DIR = $$UI_DIR +isEmpty(QMAKE_MOD_UIC):QMAKE_MOD_UIC = ui_ + +# Allow FORMS3 to contain old UIC3 forms, while FORMS contains new +# UIC files in the same project. However, if CONFIG+=uic3 and no +# FORMS3 is defined, FORMS may only contain old UIC3 files. + +!uic3|!isEmpty(FORMS3) { + # If we have CONFIG+=uic3 and no FORMS3, then don't do this step, + # as UIC3 files don't need a ui_.h file + + uic.commands = $$QMAKE_UIC ${QMAKE_FILE_IN} -o ${QMAKE_FILE_OUT} + uic.depend_command = "$$QMAKE_UIC" -d "${QMAKE_FILE_IN}" + uic.output = $$UI_HEADERS_DIR/$${QMAKE_MOD_UIC}${QMAKE_FILE_BASE}$${first(QMAKE_EXT_H)} + uic.input = FORMS + uic.variable_out = GENERATED_FILES + uic.CONFIG += no_link target_predeps + uic.name = UIC ${QMAKE_FILE_IN} + silent:uic.commands = @echo uic ${QMAKE_FILE_IN} && $$uic.commands + QMAKE_EXTRA_COMPILERS += uic + INCREDIBUILD_XGE += uic +} + +!isEmpty(FORMS)|!isEmpty(FORMS3) { + ui_dir_short = $$UI_HEADERS_DIR + contains(QMAKE_HOST.os,Windows):ui_dir_short ~= s,^.:,/, + contains(ui_dir_short, ^[/\\\\].*):INCLUDEPATH += $$UI_HEADERS_DIR + else:INCLUDEPATH += $$OUT_PWD/$$UI_HEADERS_DIR +} + +# Backwards compatibility: Make shadow builds with default UI_DIR work +# if the user did not add the source dir explicitly. +equals(UI_DIR, .) { + CONFIG -= include_source_dir + CONFIG = include_source_dir $$CONFIG +} + +uic3 { + isEmpty(FORMS3) { + UIC3_FORMS = FORMS + !build_pass:message("Project contains CONFIG+=uic3, but no files in FORMS3; UI files in FORMS treated as UIC3 form files.") + } else { + UIC3_FORMS = FORMS3 + } + + uic3_decl.commands = $$QMAKE_UIC3 ${QMAKE_FILE_IN} -o ${QMAKE_FILE_OUT} + uic3_decl.dependency_type = TYPE_UI + uic3_decl.output = $$UI_HEADERS_DIR/${QMAKE_FILE_BASE}$${first(QMAKE_EXT_H)} + uic3_decl.input = $$UIC3_FORMS + uic3_decl.CONFIG += no_link + uic3_decl.variable_out = GENERATED_FILES UIC3_HEADERS + uic3_decl.name = UIC3 Decl ${QMAKE_FILE_IN} + silent:uic3_decl.commands = @echo uic3 ${QMAKE_FILE_IN} && $$uic3_decl.commands + QMAKE_EXTRA_COMPILERS += uic3_decl + + uic3_impl.commands = $$QMAKE_UIC3 -impl ${QMAKE_FILE_BASE}$${first(QMAKE_EXT_H)} ${QMAKE_FILE_IN} -o ${QMAKE_FILE_OUT} + uic3_impl.dependency_type = TYPE_UI + uic3_impl.output = $$UI_SOURCES_DIR/${QMAKE_FILE_BASE}$${first(QMAKE_EXT_CPP)} + uic3_impl.depends = $$UI_HEADERS_DIR/${QMAKE_FILE_BASE}$${first(QMAKE_EXT_H)} + uic3_impl.input = $$UIC3_FORMS + uic3_impl.variable_out = GENERATED_SOURCES + uic3_impl.name = UIC3 Impl ${QMAKE_FILE_IN} + silent:uic3_impl.commands = @echo uic3 -impl ${QMAKE_FILE_IN} && $$uic3_impl.commands + QMAKE_EXTRA_COMPILERS += uic3_impl + + ### add a moc step + load(moc) + uic3_moc.commands = $$moc_header.commands + uic3_moc.output = $$moc_header.output + uic3_moc.depends = $$UI_HEADERS_DIR/${QMAKE_FILE_BASE}$${first(QMAKE_EXT_H)} + uic3_moc.input = UIC3_HEADERS + uic3_moc.variable_out = GENERATED_SOURCES + uic3_moc.name = $$moc_header.name + !contains(TEMPLATE, "vc.*"):!isEmpty(INCLUDETEMP):uic3_moc.depends += $$INCLUDETEMP + QMAKE_EXTRA_COMPILERS += uic3_moc +} + +defineReplace(imageCollectionCmd) { + unset(EMBEDDED_IMAGES) + RET = + for(image, $$list($$split(1))) { + EMBEDDED_IMAGES += $$image + count(EMBEDDED_IMAGES, 5) { + isEmpty(RET): RET += echo $$EMBEDDED_IMAGES > $${UI_DIR}/images.tmp $$escape_expand(\\n\\t) + else: RET += echo $$EMBEDDED_IMAGES >> $${UI_DIR}/images.tmp $$escape_expand(\\n\\t) + unset(EMBEDDED_IMAGES) + } + } + !isEmpty(EMBEDDED_IMAGES):RET += echo $$EMBEDDED_IMAGES >> $${UI_DIR}/images.tmp $$escape_expand(\\n\\t) + !isEmpty(RET) { + RET += $$QMAKE_UIC3 -embed $$TARGET -f $${UI_DIR}/images.tmp -o $$2 $$escape_expand(\\n\\t) + return($$RET) + } + return($$QMAKE_UIC3 -embed $$TARGET $$1 -o $$2) +} + +image_collection.output = $${UI_DIR}/qmake_image_collection$${first(QMAKE_EXT_CPP)} +image_collection.variable_out = SOURCES +image_collection.input = IMAGES +image_collection.CONFIG += combine +image_collection.name = UIC3 Image collection in ${QMAKE_FILE_OUT} +!win32 { + image_collection.commands = $$QMAKE_UIC3 -embed $$TARGET ${QMAKE_FILE_IN} -o ${QMAKE_FILE_OUT} + silent:image_collection.commands = @echo uic3 -embed ${QMAKE_FILE_IN} && $$image_collection.commands +} else { + image_collection.commands = ${QMAKE_FUNC_imageCollectionCmd} + silent:image_collection.commands = @echo uic3 -embed $$TARGET -f $${UI_DIR}/images.tmp && $image_collection.commands +} +QMAKE_EXTRA_COMPILERS += image_collection + + diff --git a/mkspecs/features/uitools.prf b/mkspecs/features/uitools.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/uitools.prf @@ -0,0 +1,14 @@ +QT += xml +qt:load(qt) + +# Include the correct version of the UiLoader library +symbian: QTUITOOLS_LINKAGE = -lQtUiTools.lib +else: QTUITOOLS_LINKAGE = -lQtUiTools$${QT_LIBINFIX} + +CONFIG(debug, debug|release) { + mac: QTUITOOLS_LINKAGE = -lQtUiTools$${QT_LIBINFIX}_debug + win32: QTUITOOLS_LINKAGE = -lQtUiTools$${QT_LIBINFIX}d +} +LIBS += $$QTUITOOLS_LINKAGE + +INCLUDEPATH = $$QMAKE_INCDIR_QT/QtUiTools $$INCLUDEPATH diff --git a/mkspecs/features/unix/bsymbolic_functions.prf b/mkspecs/features/unix/bsymbolic_functions.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/unix/bsymbolic_functions.prf @@ -0,0 +1,6 @@ + +!staticlib:!static:contains(TEMPLATE, lib) { + QMAKE_LFLAGS_SHLIB += $$QMAKE_LFLAGS_BSYMBOLIC_FUNC + + !isEmpty(QMAKE_DYNAMIC_LIST_FILE):QMAKE_LFLAGS_SHLIB += $$QMAKE_LFLAGS_DYNAMIC_LIST$$QMAKE_DYNAMIC_LIST_FILE +} diff --git a/mkspecs/features/unix/dylib.prf b/mkspecs/features/unix/dylib.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/unix/dylib.prf @@ -0,0 +1,1 @@ + diff --git a/mkspecs/features/unix/gdb_dwarf_index.prf b/mkspecs/features/unix/gdb_dwarf_index.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/unix/gdb_dwarf_index.prf @@ -0,0 +1,23 @@ +!CONFIG(separate_debug_info):CONFIG(debug, debug|release):!staticlib:!static:!contains(TEMPLATE, subdirs):!isEmpty(QMAKE_OBJCOPY) { + + contains(TEMPLATE, "lib") { + QMAKE_GDB_INDEX = { test -z \"$(DESTDIR)\" || cd \"$(DESTDIR)\"; } && + QMAKE_GDB_DIR = . + } else { + QMAKE_GDB_INDEX = { test -n \"$(DESTDIR)\" && DESTDIR=\"$(DESTDIR)\" || DESTDIR=.; } && + QMAKE_GDB_DIR = \$\$DESTDIR + } + + QMAKE_GDB_INDEX += \ + test \$\$(gdb --version | sed -e \'s,[^0-9]\\+\\([0-9]\\)\\.\\([0-9]\\).*,\\1\\2,;q\') -gt 72 && \ + gdb --nx --batch --quiet -ex \'set confirm off\' -ex \"save gdb-index $$QMAKE_GDB_DIR\" -ex quit \'$(TARGET)\' && \ + test -f $(TARGET).gdb-index && \ + $$QMAKE_OBJCOPY --add-section \'.gdb_index=$(TARGET).gdb-index\' --set-section-flags \'.gdb_index=readonly\' \'$(TARGET)\' \'$(TARGET)\' && \ + $$QMAKE_DEL_FILE $(TARGET).gdb-index || true + + !isEmpty(QMAKE_POST_LINK):QMAKE_POST_LINK = $$escape_expand(\\n\\t)$$QMAKE_POST_LINK + QMAKE_POST_LINK = $$QMAKE_GDB_INDEX $$QMAKE_POST_LINK + + silent:QMAKE_POST_LINK = @echo indexing $@ for gdb && $$QMAKE_POST_LINK +} + diff --git a/mkspecs/features/unix/hide_symbols.prf b/mkspecs/features/unix/hide_symbols.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/unix/hide_symbols.prf @@ -0,0 +1,4 @@ +QMAKE_CFLAGS += $$QMAKE_CFLAGS_HIDESYMS +QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_HIDESYMS +QMAKE_OBJECTIVE_CFLAGS += $$QMAKE_OBJECTIVE_CFLAGS_HIDESYMS +QMAKE_LFLAGS += $$QMAKE_LFLAGS_HIDESYMS diff --git a/mkspecs/features/unix/largefile.prf b/mkspecs/features/unix/largefile.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/unix/largefile.prf @@ -0,0 +1,2 @@ +DEFINES += _LARGEFILE64_SOURCE _LARGEFILE_SOURCE + diff --git a/mkspecs/features/unix/opengl.prf b/mkspecs/features/unix/opengl.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/unix/opengl.prf @@ -0,0 +1,17 @@ +contains(QT_CONFIG, opengles1) { + INCLUDEPATH += $$QMAKE_INCDIR_OPENGL_ES1 + !isEmpty(QMAKE_LIBDIR_OPENGL_ES1):QMAKE_LIBDIR += $$QMAKE_LIBDIR_OPENGL_ES1 + target_qt:LIBS_PRIVATE += $$QMAKE_LIBS_OPENGL_ES1 + else:LIBS += $$QMAKE_LIBS_OPENGL_ES1 +} else:contains(QT_CONFIG, opengles2) { + INCLUDEPATH += $$QMAKE_INCDIR_OPENGL_ES2 + !isEmpty(QMAKE_LIBDIR_OPENGL_ES2):QMAKE_LIBDIR += $$QMAKE_LIBDIR_OPENGL_ES2 + target_qt:LIBS_PRIVATE += $$QMAKE_LIBS_OPENGL_ES2 + else:LIBS += $$QMAKE_LIBS_OPENGL_ES2 +} else { + INCLUDEPATH += $$QMAKE_INCDIR_OPENGL + !isEmpty(QMAKE_LIBDIR_OPENGL):QMAKE_LIBDIR += $$QMAKE_LIBDIR_OPENGL + target_qt:LIBS_PRIVATE += $$QMAKE_LIBS_OPENGL_QT + else:LIBS += $$QMAKE_LIBS_OPENGL +} + diff --git a/mkspecs/features/unix/openvg.prf b/mkspecs/features/unix/openvg.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/unix/openvg.prf @@ -0,0 +1,15 @@ +!isEmpty(QMAKE_INCDIR_OPENVG): INCLUDEPATH += $$QMAKE_INCDIR_OPENVG +!isEmpty(QMAKE_LIBDIR_OPENVG): QMAKE_LIBDIR += -L$$QMAKE_LIBDIR_OPENVG +!isEmpty(QMAKE_LIBS_OPENVG): LIBS += $$QMAKE_LIBS_OPENVG + +contains(QT_CONFIG, egl) { + !isEmpty(QMAKE_INCDIR_EGL): INCLUDEPATH += $$QMAKE_INCDIR_EGL + !isEmpty(QMAKE_LIBDIR_EGL): LIBS += -L$$QMAKE_LIBDIR_EGL + !isEmpty(QMAKE_LIBS_EGL): LIBS += $$QMAKE_LIBS_EGL +} + +contains(QT_CONFIG, openvg_on_opengl) { + !isEmpty(QMAKE_INCDIR_OPENGL): INCLUDEPATH += $$QMAKE_INCDIR_OPENGL + !isEmpty(QMAKE_LIBDIR_OPENGL): QMAKE_LIBDIR += -L$$QMAKE_LIBDIR_OPENGL + !isEmpty(QMAKE_LIBS_OPENGL): LIBS += $$QMAKE_LIBS_OPENGL +} diff --git a/mkspecs/features/unix/separate_debug_info.prf b/mkspecs/features/unix/separate_debug_info.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/unix/separate_debug_info.prf @@ -0,0 +1,20 @@ + +!separate_debug_info_nocopy:!staticlib:!static:!contains(TEMPLATE, subdirs):!isEmpty(QMAKE_OBJCOPY) { + qnx:debug_info_suffix=sym + else:debug_info_suffix=debug + QMAKE_SEPARATE_DEBUG_INFO = test -z \"$(DESTDIR)\" || cd \"$(DESTDIR)\" ; targ=`basename $(TARGET)`; $$QMAKE_OBJCOPY --only-keep-debug \"\$\$targ\" \"\$\$targ.$$debug_info_suffix\" && $$QMAKE_OBJCOPY --strip-debug \"\$\$targ\" && $$QMAKE_OBJCOPY --add-gnu-debuglink=\"\$\$targ.$$debug_info_suffix\" \"\$\$targ\" && chmod -x \"\$\$targ.$$debug_info_suffix\" + QMAKE_INSTALL_SEPARATE_DEBUG_INFO = test -z \"$(DESTDIR)\" || cd \"$(DESTDIR)\" ; $(INSTALL_FILE) `basename $(TARGET)`.$$debug_info_suffix $(INSTALL_ROOT)/\$\$target_path/ + + !isEmpty(QMAKE_POST_LINK):QMAKE_POST_LINK = $$escape_expand(\\n\\t)$$QMAKE_POST_LINK + QMAKE_POST_LINK = $$QMAKE_SEPARATE_DEBUG_INFO $$QMAKE_POST_LINK + silent:QMAKE_POST_LINK = @echo creating $@.$$debug_info_suffix && $$QMAKE_POST_LINK + + isEmpty(DESTDIR) { + target.targets += "`basename $(TARGET)`.$$debug_info_suffix" + QMAKE_DISTCLEAN += "`basename $(TARGET)`.$$debug_info_suffix" + } else { + target.targets += "$(DESTDIR)/`basename $(TARGET)`.$$debug_info_suffix" + QMAKE_DISTCLEAN += "$(DESTDIR)/`basename $(TARGET)`.$$debug_info_suffix" + } +} + diff --git a/mkspecs/features/unix/thread.prf b/mkspecs/features/unix/thread.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/unix/thread.prf @@ -0,0 +1,14 @@ +!isEmpty(QMAKE_CFLAGS_THREAD) { + QMAKE_CFLAGS += $$QMAKE_CFLAGS_THREAD + QMAKE_EXPORT_CFLAGS += $$QMAKE_CFLAGS_THREAD +} +!isEmpty(QMAKE_CXXFLAGS_THREAD) { + QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_THREAD + QMAKE_EXPORT_CXXFLAGS += $$QMAKE_CXXFLAGS_THREAD +} +INCLUDEPATH += $$QMAKE_INCDIR_THREAD +LIBS += $$QMAKE_LIBS_THREAD +!isEmpty(QMAKE_LFLAGS_THREAD):QMAKE_LFLAGS += $$QMAKE_LFLAGS_THREAD +!isEmpty(QMAKE_CC_THREAD):QMAKE_CC = $$QMAKE_CC_THREAD +!isEmpty(QMAKE_CXX_THREAD):QMAKE_CXX = $$QMAKE_CXX_THREAD +!isEmpty(QMAKE_LINK_THREAD):QMAKE_LINK = $$QMAKE_LINK_THREAD diff --git a/mkspecs/features/unix/x11.prf b/mkspecs/features/unix/x11.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/unix/x11.prf @@ -0,0 +1,1 @@ +CONFIG *= x11lib x11inc diff --git a/mkspecs/features/unix/x11inc.prf b/mkspecs/features/unix/x11inc.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/unix/x11inc.prf @@ -0,0 +1,3 @@ +INCLUDEPATH += $$QMAKE_INCDIR_X11 +QMAKE_CFLAGS += $$QMAKE_CFLAGS_X11 +QMAKE_CXXFLAGS += $$QMAKE_CFLAGS_X11 diff --git a/mkspecs/features/unix/x11lib.prf b/mkspecs/features/unix/x11lib.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/unix/x11lib.prf @@ -0,0 +1,2 @@ +!isEmpty(QMAKE_LIBDIR_X11):QMAKE_LIBDIR += $$QMAKE_LIBDIR_X11 +LIBS_PRIVATE += $$QMAKE_LIBS_X11 diff --git a/mkspecs/features/unix/x11sm.prf b/mkspecs/features/unix/x11sm.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/unix/x11sm.prf @@ -0,0 +1,2 @@ +!isEmpty(QMAKE_LIBDIR_X11):QMAKE_LIBDIR += $$QMAKE_LIBDIR_X11 +LIBS_PRIVATE += $$QMAKE_LIBS_X11SM diff --git a/mkspecs/features/use_c_linker.prf b/mkspecs/features/use_c_linker.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/use_c_linker.prf @@ -0,0 +1,5 @@ +!isEmpty(QMAKE_LINK_C):QMAKE_LINK = $$QMAKE_LINK_C +!isEmpty(QMAKE_LINK_C_SHLIB) { + !isEmpty(QMAKE_LINK_SHLIB_CMD):QMAKE_LINK_SHLIB_CMD ~= s/^$$re_escape($$QMAKE_LINK_SHLIB)$/$$QMAKE_LINK_C_SHLIB/ + QMAKE_LINK_SHLIB = $$QMAKE_LINK_C_SHLIB +} diff --git a/mkspecs/features/vxworks.prf b/mkspecs/features/vxworks.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/vxworks.prf @@ -0,0 +1,64 @@ +# VxWorks Munching Feature +# When compiling C++ sources on VxWorks in kernel mode, all .o files have to +# be processed by the so-called 'munch' script which will generate +# additional code for static c'tors and d'tors. The resulting .c file has to +# be compiled in turn and linked to the executable. +# This can only been done when linking applications, since the munch script +# generates a .c file containing static symbols: linking a lib that was +# already munched to a munched application would lead to duplicate symbols! + +isEmpty(VXWORKS_MUNCH_EXT):VXWORKS_MUNCH_EXT = vxm +isEmpty(VXWORKS_MUNCH_TOOL):VXWORKS_MUNCH_TOOL = $(WIND_BASE)/host/resource/hutils/tcl/munch.tcl + + +!exists($$VXWORKS_MUNCH_TOOL) { + error("Could not find VxWorks Munch tool: '$${VXWORKS_MUNCH_TOOL}'. Please set the environment variable WIND_BASE correctly.") +} + +# The following scope is entered for any project that specifies 'shared' as well +# as for any project specifying neither 'shared', nor 'lib', nor 'staticlib'. +# This means that for a static build only the executable is munched, while for +# a shared build, every lib, plugin and executable is munched separately. + +shared|!staticlib:!lib { + *-dcc { + VXWORKS_MUNCH_CMD = targ=`basename $(TARGET)`; \ + ddump -Ng \"$(TARGET)\" | tclsh $$VXWORKS_MUNCH_TOOL -c $$VXWORKS_ARCH_MUNCH >\"$(OBJECTS_DIR)/\$\${targ}_ctdt.c\" && \ + $$QMAKE_CC -c $$QMAKE_CFLAGS \"$(OBJECTS_DIR)/\$\${targ}_ctdt.c\" -o \"$(OBJECTS_DIR)/\$\${targ}_ctdt.o\" && \ + $$QMAKE_LINK $$QMAKE_LFLAGS -X -r5 -r4 \"$(OBJECTS_DIR)/\$\${targ}_ctdt.o\" \"$(TARGET)\" -o \"$(TARGET).munched\" && \ + mv \"$(TARGET).munched\" \"$(TARGET)\" && \ + chmod +x \"$(TARGET)\" + } + *-g++ { + VXWORKS_MUNCH_CMD = targ=`basename $(TARGET)`; \ + nm \"$(DESTDIR)$(TARGET)\" | tclsh $$VXWORKS_MUNCH_TOOL -c $$VXWORKS_ARCH_MUNCH >\"$(OBJECTS_DIR)/\$\${targ}_ctdt.c\" && \ + $$QMAKE_CC -c $$QMAKE_CFLAGS -fdollars-in-identifiers \"$(OBJECTS_DIR)/\$\${targ}_ctdt.c\" -o \"$(OBJECTS_DIR)/\$\${targ}_ctdt.o\" && \ + $$QMAKE_LINK $$QMAKE_LFLAGS -nostdlib -Wl,-X -T $(WIND_BASE)/target/h/tool/gnu/ldscripts/link.OUT \"$(OBJECTS_DIR)/\$\${targ}_ctdt.o\" \"$(DESTDIR)$(TARGET)\" -o \"$(DESTDIR)$(TARGET).munched\" && \ + mv \"$(DESTDIR)$(TARGET).munched\" \"$(DESTDIR)$(TARGET)\" && \ + chmod +x \"$(DESTDIR)$(TARGET)\" + } + + # We need to create a dummy lib.a in case someone links against this lib. + # In VxWorks it's the responsibility of the run-time linker ld to resolve + # symbols, since there are no real shared libraries for the toolchain linker + # to link against. + + shared:contains(TEMPLATE, lib) { + VXWORKS_MUNCH_CMD += "&&" + VXWORKS_MUNCH_CMD += (atarg=`basename $(TARGET) .so.$${VERSION}`.a ; touch \"$(DESTDIR)\$\${atarg}\") + } + + !isEmpty(QMAKE_POST_LINK):QMAKE_POST_LINK = $$escape_expand(\\n\\t)$$QMAKE_POST_LINK + QMAKE_POST_LINK = $$VXWORKS_MUNCH_CMD$$QMAKE_POST_LINK + silent:QMAKE_POST_LINK = @echo creating $@.$$VXWORKS_MUNCH_EXT && $$QMAKE_POST_LINK + + isEmpty(DESTDIR) { + target.targets += "`basename $(TARGET)`.$$VXWORKS_MUNCH_EXT" + QMAKE_DISTCLEAN += "`basename $(TARGET)`.$$VXWORKS_MUNCH_EXT" + } else { + target.targets += "$(DESTDIR)/`basename $(TARGET)`.$$VXWORKS_MUNCH_EXT" + QMAKE_DISTCLEAN += "$(DESTDIR)/`basename $(TARGET)`.$$VXWORKS_MUNCH_EXT" + } + *-g++:LIBS += -lgcc +} + diff --git a/mkspecs/features/warn_off.prf b/mkspecs/features/warn_off.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/warn_off.prf @@ -0,0 +1,4 @@ +CONFIG -= warn_on +QMAKE_CFLAGS += $$QMAKE_CFLAGS_WARN_OFF +QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_WARN_OFF +QMAKE_OBJECTIVE_CFLAGS += $$QMAKE_OBJECTIVE_CFLAGS_WARN_OFF \ No newline at end of file diff --git a/mkspecs/features/warn_on.prf b/mkspecs/features/warn_on.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/warn_on.prf @@ -0,0 +1,5 @@ +CONFIG -= warn_off +QMAKE_CFLAGS += $$QMAKE_CFLAGS_WARN_ON +QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_WARN_ON +QMAKE_OBJECTIVE_CFLAGS += $$QMAKE_OBJECTIVE_CFLAGS_WARN_ON + diff --git a/mkspecs/features/win32/console.prf b/mkspecs/features/win32/console.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/console.prf @@ -0,0 +1,4 @@ +CONFIG -= windows +contains(TEMPLATE, ".*app") { + QMAKE_LFLAGS += $$QMAKE_LFLAGS_CONSOLE $$QMAKE_LFLAGS_EXE +} diff --git a/mkspecs/features/win32/default_post.prf b/mkspecs/features/win32/default_post.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/default_post.prf @@ -0,0 +1,11 @@ +!isEmpty(CE_ARCH) { + QMAKESPEC_DIR = $$QMAKESPEC + exists($$QMAKESPEC_DIR/default_post.prf) { + isEmpty(QMAKESPEC_DIR):QMAKESPEC_DIR = $$QMAKESPEC_ORIGINAL + !isEmpty(QMAKESPEC_DIR):load($$QMAKESPEC_DIR/default_post.prf) + } +} + +# Now load the global default_post +load(default_post) + diff --git a/mkspecs/features/win32/default_pre.prf b/mkspecs/features/win32/default_pre.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/default_pre.prf @@ -0,0 +1,3 @@ +CONFIG = rtti_off exceptions_off stl_off incremental_off thread_off windows $$CONFIG +load(default_pre) + diff --git a/mkspecs/features/win32/dumpcpp.prf b/mkspecs/features/win32/dumpcpp.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/dumpcpp.prf @@ -0,0 +1,11 @@ +isEmpty(QMAKE_DUMPCPP_NAME) { + QMAKE_DUMPCPP_NAME = make_dumpcpp +} + +# auto depend on dumpcpp +!contains(TARGET, dumpcpp) { + isEmpty(QMAKE_DUMPCPP_SRC): QMAKE_DUMPCPP_SRC = "$(QTDIR)/tools/activeqt/dumpcpp" + make_dumpcpp.commands = (cd $$QMAKE_DUMPCPP_SRC && $(QMAKE) && $(MAKE)) + QMAKE_EXTRA_TARGETS += $$QMAKE_DUMPCPP_NAME +} + diff --git a/mkspecs/features/win32/embed_manifest_dll.prf b/mkspecs/features/win32/embed_manifest_dll.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/embed_manifest_dll.prf @@ -0,0 +1,12 @@ +!if(plugin:no_plugin_manifest):if(win32-msvc2005*|win32-msvc2008*|win32-msvc2010*):!static:equals(TEMPLATE, "lib") { + MANIFEST_DIR = $$OBJECTS_DIR + isEmpty(MANIFEST_DIR):MANIFEST_DIR = . + NOPATH_TARGET = $$TARGET + NOPATH_TARGET ~= s,\\\\ , ,q # Remove space escaping (NOPATH_TARGET is quoted) + NOPATH_TARGET ~= s,\\\\,/,g # Change to single type separators + NOPATH_TARGET ~= s,^(.*/)+,, # Remove all paths + QMAKE_LFLAGS += /MANIFEST $$quote(/MANIFESTFILE:\"$${MANIFEST_DIR}\\$${NOPATH_TARGET}.intermediate.manifest\") + !isEmpty(QMAKE_POST_LINK):QMAKE_POST_LINK = $$escape_expand(\\n\\t)$$QMAKE_POST_LINK + QMAKE_POST_LINK = $$quote(mt.exe -nologo -manifest \"$$replace(MANIFEST_DIR,/,\\)\\$${NOPATH_TARGET}.intermediate.manifest\" -outputresource:$(DESTDIR_TARGET);2)$$QMAKE_POST_LINK + QMAKE_CLEAN += \"$$replace(MANIFEST_DIR,/,\\)\\$${NOPATH_TARGET}.intermediate.manifest\" +} diff --git a/mkspecs/features/win32/embed_manifest_exe.prf b/mkspecs/features/win32/embed_manifest_exe.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/embed_manifest_exe.prf @@ -0,0 +1,12 @@ +if(win32-msvc2005*|win32-msvc2008*|win32-msvc2010*):equals(TEMPLATE, "app") { + MANIFEST_DIR = $$OBJECTS_DIR + isEmpty(MANIFEST_DIR):MANIFEST_DIR = . + NOPATH_TARGET = $$TARGET + NOPATH_TARGET ~= s,\\\\ , ,q # Remove space escaping (NOPATH_TARGET is quoted) + NOPATH_TARGET ~= s,\\\\,/,g # Change to single type separators + NOPATH_TARGET ~= s,^(.*/)+,, # Remove all paths + QMAKE_LFLAGS += /MANIFEST $$quote(/MANIFESTFILE:\"$${MANIFEST_DIR}\\$${NOPATH_TARGET}.intermediate.manifest\") + !isEmpty(QMAKE_POST_LINK):QMAKE_POST_LINK = $$escape_expand(\\n\\t)$$QMAKE_POST_LINK + QMAKE_POST_LINK = $$quote(mt.exe -nologo -manifest \"$$replace(MANIFEST_DIR,/,\\)\\$${NOPATH_TARGET}.intermediate.manifest\" -outputresource:$(DESTDIR_TARGET);1)$$QMAKE_POST_LINK + QMAKE_CLEAN += \"$$replace(MANIFEST_DIR,/,\\)\\$${NOPATH_TARGET}.intermediate.manifest\" +} diff --git a/mkspecs/features/win32/exceptions.prf b/mkspecs/features/win32/exceptions.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/exceptions.prf @@ -0,0 +1,5 @@ +CONFIG -= exceptions_off +QMAKE_CFLAGS *= $$QMAKE_CFLAGS_EXCEPTIONS_ON +QMAKE_CXXFLAGS *= $$QMAKE_CXXFLAGS_EXCEPTIONS_ON +QMAKE_LFLAGS *= $$QMAKE_LFLAGS_EXCEPTIONS_ON + diff --git a/mkspecs/features/win32/exceptions_off.prf b/mkspecs/features/win32/exceptions_off.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/exceptions_off.prf @@ -0,0 +1,5 @@ +CONFIG -= exceptions +QMAKE_CFLAGS += $$QMAKE_CFLAGS_EXCEPTIONS_OFF +QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_EXCEPTIONS_OFF +QMAKE_LFLAGS += $$QMAKE_LFLAGS_EXCEPTIONS_OFF + diff --git a/mkspecs/features/win32/ltcg.prf b/mkspecs/features/win32/ltcg.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/ltcg.prf @@ -0,0 +1,5 @@ +CONFIG(release, debug|release) { + QMAKE_CFLAGS *= $$QMAKE_CFLAGS_LTCG + QMAKE_CXXFLAGS *= $$QMAKE_CXXFLAGS_LTCG + QMAKE_LFLAGS *= $$QMAKE_LFLAGS_LTCG +} diff --git a/mkspecs/features/win32/msvc_mp.prf b/mkspecs/features/win32/msvc_mp.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/msvc_mp.prf @@ -0,0 +1,2 @@ +QMAKE_CFLAGS += $$QMAKE_CFLAGS_MP +QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_MP diff --git a/mkspecs/features/win32/opengl.prf b/mkspecs/features/win32/opengl.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/opengl.prf @@ -0,0 +1,11 @@ +# WinCE does not have a platform directory for .prf files, and the +# win32 directory is searched for .prfs by qmake on WinCE. Ideally +# there should be a features/wince/opengl.prf which contains the wince +# block below. + +wince* { + include(../unix/opengl.prf) +} else { + QMAKE_LIBS += $$QMAKE_LIBS_OPENGL + QMAKE_LFLAGS += $$QMAKE_LFLAGS_OPENGL +} diff --git a/mkspecs/features/win32/openvg.prf b/mkspecs/features/win32/openvg.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/openvg.prf @@ -0,0 +1,7 @@ +QMAKE_LIBS += $$QMAKE_LIBS_OPENVG +QMAKE_LFLAGS += $$QMAKE_LFLAGS_OPENVG + +contains(QT_CONFIG, openvg_on_opengl) { + QMAKE_LIBS += $$QMAKE_LIBS_OPENGL + QMAKE_LFLAGS += $$QMAKE_LFLAGS_OPENGL +} diff --git a/mkspecs/features/win32/qaxcontainer.prf b/mkspecs/features/win32/qaxcontainer.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/qaxcontainer.prf @@ -0,0 +1,32 @@ +!debug_and_release|build_pass { + CONFIG(debug, debug|release) { + LIBS += -lQAxContainerd + } else { + LIBS += -lQAxContainer + } +} else { + LIBS += -lQAxContainer +} + +qtPrepareTool(QMAKE_DUMPCPP, dumpcpp) + +dumpcpp_decl.commands = $$QMAKE_DUMPCPP ${QMAKE_FILE_IN} -o ${QMAKE_FILE_BASE} +qaxcontainer_compat: dumpcpp_decl.commands += -compat +dumpcpp_decl.output = ${QMAKE_FILE_BASE}.h +dumpcpp_decl.input = TYPELIBS +dumpcpp_decl.variable_out = HEADERS +dumpcpp_decl.name = DUMP +dumpcpp_decl.CONFIG += no_link +dumpcpp_decl.depends = $$QMAKE_DUMPCPP + +QMAKE_EXTRA_COMPILERS += dumpcpp_decl + + +dumpcpp_impl.commands = $$QMAKE_DUMPCPP -donothing +dumpcpp_impl.output = ${QMAKE_FILE_BASE}.cpp +dumpcpp_impl.input = TYPELIBS +dumpcpp_impl.variable_out = SOURCES +dumpcpp_impl.name = CPP +dumpcpp_impl.depends = $$QMAKE_DUMPCPP ${QMAKE_FILE_BASE}.h + +QMAKE_EXTRA_COMPILERS += dumpcpp_impl diff --git a/mkspecs/features/win32/qaxserver.prf b/mkspecs/features/win32/qaxserver.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/qaxserver.prf @@ -0,0 +1,59 @@ +build_pass:console: { + warning("QAxServer applications cannot be console applications.") + warning("Remove 'console' from your CONFIG.") +} + +ACTIVEQT_VERSION = $$VERSION +isEmpty(ACTIVEQT_VERSION):ACTIVEQT_VERSION = 1.0 + +DEFINES += QAXSERVER + +contains(TEMPLATE, "vc.*") { + ACTIVEQT_IDC = $${QMAKE_IDC} ### Qt5: remove me + qtPrepareTool(ACTIVEQT_IDC, idc) + ACTIVEQT_IDL = $${QMAKE_IDL} + ACTIVEQT_TARGET = "$(TargetPath)" + win32-msvc { + ACTIVEQT_NEWLINE = $$escape_expand(\\t) + ACTIVEQT_OUTPUT = $(IntDir)/$${TARGET} + } else { + ACTIVEQT_NEWLINE = $$escape_expand(\\n\\t) + ACTIVEQT_OUTPUT = $(IntDir)$${TARGET} + } + ACTIVEQT_TLBOUT = "$(TargetDir)/$${TARGET}.tlb" + GENERATED += $${OBJECTS_DIR}/$${TARGET}.idl $${ACTIVEQT_TLBOUT} +} else { + ACTIVEQT_IDC = -$(IDC) + ACTIVEQT_IDL = -$(IDL) + ACTIVEQT_NEWLINE = $$escape_expand(\\n\\t) + ACTIVEQT_TARGET = $(DESTDIR_TARGET) + ACTIVEQT_OUTPUT = $(OBJECTS_DIR)/$${TARGET} + isEmpty(DESTDIR) { + ACTIVEQT_TLBOUT = $${TARGET}.tlb + } else { + ACTIVEQT_TLBOUT = $${DESTDIR}/$${TARGET}.tlb + } +} + +!qaxserver_no_postlink { + !isEmpty(QMAKE_POST_LINK):QMAKE_POST_LINK += $$quote($$ACTIVEQT_NEWLINE) + QMAKE_POST_LINK += $$quote($$ACTIVEQT_IDC $${ACTIVEQT_TARGET} /idl $${ACTIVEQT_OUTPUT}.idl -version $${ACTIVEQT_VERSION}$${ACTIVEQT_NEWLINE}) + !isEmpty(RC_FILE) { + QMAKE_POST_LINK += $$quote($$ACTIVEQT_IDL "$${ACTIVEQT_OUTPUT}.idl" /nologo /tlb "$${ACTIVEQT_OUTPUT}.tlb"$$ACTIVEQT_NEWLINE) + QMAKE_POST_LINK += $$quote($$ACTIVEQT_IDC $${ACTIVEQT_TARGET} /tlb $${ACTIVEQT_OUTPUT}.tlb$$ACTIVEQT_NEWLINE) + } else { + QMAKE_POST_LINK += $$quote($$ACTIVEQT_IDL "$${ACTIVEQT_OUTPUT}.idl" /nologo /tlb "$${ACTIVEQT_TLBOUT}"$$ACTIVEQT_NEWLINE) + message("No rc-file linked into project; type library will be a separate file.") + } + QMAKE_POST_LINK += $$quote($$ACTIVEQT_IDC $${ACTIVEQT_TARGET} /regserver) + QMAKE_CLEAN += $${ACTIVEQT_OUTPUT}.idl $${ACTIVEQT_OUTPUT}.tlb +} + +qt:!target_qt { + CONFIG(debug, debug|release) { + QMAKE_LIBS_QT_ENTRY = -lQAxServerd + } else { + QMAKE_LIBS_QT_ENTRY = -lQAxServer + } + dll:QMAKE_LIBS += $$QMAKE_LIBS_QT_ENTRY +} diff --git a/mkspecs/features/win32/qt_dll.prf b/mkspecs/features/win32/qt_dll.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/qt_dll.prf @@ -0,0 +1,1 @@ +CONFIG *= qt diff --git a/mkspecs/features/win32/rtti.prf b/mkspecs/features/win32/rtti.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/rtti.prf @@ -0,0 +1,3 @@ +CONFIG -= rtti_off +QMAKE_CFLAGS += $$QMAKE_CFLAGS_RTTI_ON +QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_RTTI_ON diff --git a/mkspecs/features/win32/rtti_off.prf b/mkspecs/features/win32/rtti_off.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/rtti_off.prf @@ -0,0 +1,4 @@ +CONFIG -= rtti +QMAKE_CFLAGS += $$QMAKE_CFLAGS_RTTI_OFF +QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_RTTI_OFF +DEFINES += QT_NO_DYNAMIC_CAST \ No newline at end of file diff --git a/mkspecs/features/win32/stl.prf b/mkspecs/features/win32/stl.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/stl.prf @@ -0,0 +1,3 @@ +CONFIG -= stl_off +QMAKE_CFLAGS *= $$QMAKE_CFLAGS_STL_ON +QMAKE_CXXFLAGS *= $$QMAKE_CXXFLAGS_STL_ON diff --git a/mkspecs/features/win32/stl_off.prf b/mkspecs/features/win32/stl_off.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/stl_off.prf @@ -0,0 +1,3 @@ +CONFIG -= stl +QMAKE_CFLAGS += $$QMAKE_CFLAGS_STL_OFF +QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_STL_OFF diff --git a/mkspecs/features/win32/thread.prf b/mkspecs/features/win32/thread.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/thread.prf @@ -0,0 +1,26 @@ +CONFIG -= thread_off +qt { + target_qt:PRL_EXPORT_DEFINES += QT_THREAD_SUPPORT + else:DEFINES += QT_THREAD_SUPPORT +} + +# #### These need to go +debug { + contains(DEFINES, QT_DLL) { + QMAKE_CFLAGS += $$QMAKE_CFLAGS_MT_DLLDBG + QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_MT_DLLDBG + } else { + QMAKE_CFLAGS += $$QMAKE_CFLAGS_MT_DBG + QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_MT_DBG + } +} else { + contains(DEFINES, QT_DLL) { + QMAKE_CFLAGS += $$QMAKE_CFLAGS_MT_DLL + QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_MT_DLL + } else { + QMAKE_CFLAGS += $$QMAKE_CFLAGS_MT + QMAKE_CXXFLAGS += $$QMAKE_CXXFLAGS_MT + } +} + +QMAKE_LIBS += $$QMAKE_LIBS_RTMT diff --git a/mkspecs/features/win32/thread_off.prf b/mkspecs/features/win32/thread_off.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/thread_off.prf @@ -0,0 +1,2 @@ +CONFIG -= thread +QMAKE_LIBS += $$QMAKE_LIBS_RT diff --git a/mkspecs/features/win32/windows.prf b/mkspecs/features/win32/windows.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/win32/windows.prf @@ -0,0 +1,15 @@ +CONFIG -= console +contains(TEMPLATE, ".*app"){ + QMAKE_LFLAGS += $$QMAKE_LFLAGS_WINDOWS $$QMAKE_LFLAGS_EXE + win32-g++:DEFINES += QT_NEEDS_QMAIN + win32-borland:DEFINES += QT_NEEDS_QMAIN + + qt:for(entryLib, $$list($$unique(QMAKE_LIBS_QT_ENTRY))) { + isEqual(entryLib, -lqtmain): { + CONFIG(debug, debug|release): QMAKE_LIBS += $${entryLib}$${QT_LIBINFIX}d + else: QMAKE_LIBS += $${entryLib}$${QT_LIBINFIX} + } else { + QMAKE_LIBS += $${entryLib} + } + } +} diff --git a/mkspecs/features/yacc.prf b/mkspecs/features/yacc.prf new file mode 100644 --- /dev/null +++ b/mkspecs/features/yacc.prf @@ -0,0 +1,42 @@ +# +# Yacc extra-compiler for handling files specified in the YACCSOURCES variable +# + +{ + yacc_decl.name = Yacc header + yacc_decl.input = YACCSOURCES + yacc_decl.variable_out = GENERATED_FILES + + + isEmpty(QMAKE_YACCFLAGS_MANGLE) { + QMAKE_YACCFLAGS_MANGLE = -p ${QMAKE_FILE_BASE} + QMAKE_YACC_HEADER = y.tab.h + QMAKE_YACC_SOURCE = y.tab.c + } else { + QMAKE_YACCFLAGS_MANGLE ~= s/\\$base/${QMAKE_FILE_BASE}/g #backwards compat + QMAKE_YACC_HEADER ~= s/\\$base/${QMAKE_FILE_BASE}/g + QMAKE_YACC_SOURCE ~= s/\\$base/${QMAKE_FILE_BASE}/g + } + QMAKE_YACCDECLFLAGS = $$QMAKE_YACCFLAGS + !yacc_no_name_mangle:QMAKE_YACCDECLFLAGS += $$QMAKE_YACCFLAGS_MANGLE + + yacc_decl.commands = \ + $$QMAKE_YACC $$QMAKE_YACCDECLFLAGS ${QMAKE_FILE_IN}$$escape_expand(\\n\\t) \ + $$QMAKE_DEL_FILE $${QMAKE_CPP_MOD_MOC}${QMAKE_FILE_BASE}_yacc$${first(QMAKE_EXT_H)} $${QMAKE_CPP_MOD_MOC}${QMAKE_FILE_BASE}_yacc$${first(QMAKE_EXT_CPP)}$$escape_expand(\\n\\t) \ + $$QMAKE_MOVE $${QMAKE_YACC_HEADER} $${QMAKE_CPP_MOD_MOC}${QMAKE_FILE_BASE}_yacc$${first(QMAKE_EXT_H)}$$escape_expand(\\n\\t) \ + $$QMAKE_MOVE $${QMAKE_YACC_SOURCE} $${QMAKE_CPP_MOD_MOC}${QMAKE_FILE_BASE}_yacc$${first(QMAKE_EXT_CPP)}$$escape_expand(\\n\\t) + yacc_decl.output = $${QMAKE_CPP_MOD_MOC}${QMAKE_FILE_BASE}_yacc$${first(QMAKE_EXT_H)} + + silent:yacc_decl.commands = @echo Yacc ${QMAKE_FILE_IN} && $$yacc_decl.commands + QMAKE_EXTRA_COMPILERS += yacc_decl +} + +{ + yacc_impl.name = source for ${QMAKE_FILE_IN} + yacc_impl.input = YACCSOURCES + yacc_impl.variable_out = GENERATED_SOURCES + yacc_impl.commands = $$escape_expand(\\n) # We don't want any commands where, but if command is empty no rules are created + yacc_impl.depends = $${QMAKE_CPP_MOD_MOC}${QMAKE_FILE_BASE}_yacc$${first(QMAKE_EXT_H)} # Make sure we depend on the step above + yacc_impl.output = $${QMAKE_CPP_MOD_MOC}${QMAKE_FILE_BASE}_yacc$${first(QMAKE_EXT_CPP)} # Faked output from this step, output really created in step above + QMAKE_EXTRA_COMPILERS += yacc_impl +} diff --git a/mkspecs/modules/README b/mkspecs/modules/README new file mode 100644 --- /dev/null +++ b/mkspecs/modules/README @@ -0,0 +1,3 @@ +Externally provided Qt modules may drop a qmake file here to become part of +the current Qt configuration. The file name must follow the pattern +"qt_.pri". It must contain a "QT_CONFIG += " statement. diff --git a/mkspecs/qconfig.pri b/mkspecs/qconfig.pri new file mode 100644 --- /dev/null +++ b/mkspecs/qconfig.pri @@ -0,0 +1,21 @@ +#configuration +CONFIG += def_files_disabled no_mocdepend release stl qt_no_framework +QT_ARCH = x86_64 +QT_EDITION = OpenSource +QT_CONFIG += minimal-config small-config medium-config large-config full-config accessibility reduce_exports ipv6 clock-gettime clock-monotonic mremap getaddrinfo ipv6ifname getifaddrs inotify system-jpeg system-mng system-png png system-freetype no-gui system-zlib nis iconv glib openssl x11sm xshape xvideo xsync xrender mitshm fontconfig xkb concurrent release + +#versioning +QT_VERSION = 4.8.4 +QT_MAJOR_VERSION = 4 +QT_MINOR_VERSION = 8 +QT_PATCH_VERSION = 4 + +#namespaces +QT_LIBINFIX = +QT_NAMESPACE = +QT_NAMESPACE_MAC_CRC = + +QMAKE_RPATHDIR += "/opt/testlibuc2/libuc2/lib" +QT_GCC_MAJOR_VERSION = 4 +QT_GCC_MINOR_VERSION = 7 +QT_GCC_PATCH_VERSION = 2 diff --git a/mkspecs/qdevice.pri b/mkspecs/qdevice.pri new file mode 100644 diff --git a/mkspecs/stm32f4/optimised_math.h b/mkspecs/stm32f4/optimised_math.h new file mode 100644 --- /dev/null +++ b/mkspecs/stm32f4/optimised_math.h @@ -0,0 +1,37 @@ +/*------------------------------------------------------------------------------ +-- This file is a part of the libuc, microcontroler library +-- Copyright (C) 2012, Alexis Jeandet +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program; if not, write to the Free Software +-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +------------------------------------------------------------------------------- +-- Author : Alexis Jeandet +-- Mail : alexis.jeandet@gmail.com +-------------------------------------------------------------------------------*/ +#ifndef OPTIMISED_MATH_H +#define OPTIMISED_MATH_H +#include + +inline float32_t optimised_sqrt(float32_t value) +{ + float32_t out; + arm_sqrt_f32(value,&out); + return out; +} + +inline float optimised_sin(float32_t x) +{ + return arm_sin_f32(x); +} +#endif diff --git a/mkspecs/stm32f4/qmake.conf b/mkspecs/stm32f4/qmake.conf new file mode 100644 --- /dev/null +++ b/mkspecs/stm32f4/qmake.conf @@ -0,0 +1,73 @@ +# +# qmake configuration for stm32f4 +# +# + + +isEmpty(_stm32f4_conf){ +_stm32f4_conf="oneshot" + +QMAKE_CFLAGS=-mlittle-endian -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -std=c99 + +include(../common/arm-none-eabi.conf) + +DEFINES += __OPTIMIZED_MATH +DEFINES += \"assert_param(expr)=((void)0)\" +INCLUDEPATH += $$PWD + +DEFINES += __FPU_PRESENT=1 +DEFINES += ARM_MATH_CM4 + +DEFINES += BSP="\"\\\"$$BSP"\\\"\" + +CONFIG += cpu + +contains( TEMPLATE, app ) { + OBJECTS_DIR=obj + DESTDIR=bin + unix:QMAKE_POST_LINK += arm-none-eabi-objcopy -O ihex "$(TARGET)" $$DESTDIR/"$(QMAKE_TARGET).hex" && arm-none-eabi-objcopy -O binary "$(TARGET)" $$DESTDIR/"$(QMAKE_TARGET).bin" + win32:QMAKE_POST_LINK += arm-none-eabi-objcopy -O ihex "$(DESTDIR_TARGET)" $$DESTDIR/"$(QMAKE_TARGET).hex" && arm-none-eabi-objcopy -O binary "$(DESTDIR_TARGET)" $$DESTDIR/"$(QMAKE_TARGET).bin" + + LIBS += -L$$[QT_INSTALL_PREFIX]/bsp/lib/$$BSP + LIBS += -lbsp + + + QMAKE_LFLAGS= -mlittle-endian -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -std=c99 -T $$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/stm32_flash.ld + + INCLUDEPATH+= $$[QT_INSTALL_PREFIX]/bsp/includes/$$BSP + + SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/syscalls.c + SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/fs.c + SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/startup.s + SOURCES +=$$[QT_INSTALL_PREFIX]/mkspecs/features/stm32f4/cpuinit.c + +# OTHER_FILES += $$[QT_INSTALL_PREFIX]/ucfiles/stm32f4/$$CPU/stm32_flash.ld + + stflash.target = stflash + stflash.commands = cd $$DESTDIR && sudo st-flash write $(QMAKE_TARGET).bin 0x08000000 + QMAKE_EXTRA_TARGETS += stflash +} + +contains( TEMPLATE, lib ) { + CONFIG+=staticlib + message( "You can only build static library for stm32f4" ) +} + +include(../common/libuc2libs.conf) + +} + + + + + + + + + + + + + + + diff --git a/mkspecs/stm32f4/qplatformdefs.h b/mkspecs/stm32f4/qplatformdefs.h new file mode 100644 --- /dev/null +++ b/mkspecs/stm32f4/qplatformdefs.h @@ -0,0 +1,42 @@ +/**************************************************************************** +** +** Copyright (C) 2012 Digia Plc and/or its subsidiary(-ies). +** Contact: http://www.qt-project.org/legal +** +** This file is part of the qmake spec of the Qt Toolkit. +** +** $QT_BEGIN_LICENSE:LGPL$ +** Commercial License Usage +** Licensees holding valid commercial Qt licenses may use this file in +** accordance with the commercial license agreement provided with the +** Software or, alternatively, in accordance with the terms contained in +** a written agreement between you and Digia. For licensing terms and +** conditions see http://qt.digia.com/licensing. For further information +** use the contact form at http://qt.digia.com/contact-us. +** +** GNU Lesser General Public License Usage +** Alternatively, this file may be used under the terms of the GNU Lesser +** General Public License version 2.1 as published by the Free Software +** Foundation and appearing in the file LICENSE.LGPL included in the +** packaging of this file. Please review the following information to +** ensure the GNU Lesser General Public License version 2.1 requirements +** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html. +** +** In addition, as a special exception, Digia gives you certain additional +** rights. These rights are described in the Digia Qt LGPL Exception +** version 1.1, included in the file LGPL_EXCEPTION.txt in this package. +** +** GNU General Public License Usage +** Alternatively, this file may be used under the terms of the GNU +** General Public License version 3.0 as published by the Free Software +** Foundation and appearing in the file LICENSE.GPL included in the +** packaging of this file. Please review the following information to +** ensure the GNU General Public License version 3.0 requirements will be +** met: http://www.gnu.org/copyleft/gpl.html. +** +** +** $QT_END_LICENSE$ +** +****************************************************************************/ + +//#include "../linux-g++/qplatformdefs.h" diff --git a/rules/common/gcc/rules.mk b/rules/common/gcc/rules.mk deleted file mode 100644 --- a/rules/common/gcc/rules.mk +++ /dev/null @@ -1,70 +0,0 @@ -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2012, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - -#--------------------------------------------------------------------------------- -# GCC EXECUTABLES -#--------------------------------------------------------------------------------- - - -bin: $(DEVSOURCESND) $(BINDIR)/$(TARGET).elf $(BINDIR)/$(TARGET).bin $(BINDIR)/$(TARGET).hex - @echo "compile bin" - -lib: $(TARGETINSTALLPATH)/$(TARGET).a - @echo "compile lib" - - -%.o : %.c - mkdir -p $(OBJDIR) - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - - -$(OBJECTFILES) : $(OBJDIR)/%.o : %.c $(DEPS) - mkdir -p $(OBJDIR) - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - -$(ASMOBJECTFILES) : $(OBJDIR)/%.o : %.s - mkdir -p $(OBJDIR) - $(LIBUC_CC) -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - - -%.elf: $(LINKER_SCRIPT) $(OBJECTFILES) - mkdir -p $(BINDIR) - $(LIBUC_LD) -Map $(@:.elf=.map) $(LIBUC_LDFLAGS) $^ -o $@ $(LIBUC_BSP) $(LIBUC_LIBRARIES) - $(LIBUC_OBJDUMP) $(LIBUC_ODFLAGS) $@ > $(@:.elf=.dump) - $(LIBUC_SIZE) $@ - - -%.bin: %.elf $(BIN_LIBS_DEPS) - $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O binary $< $*.bin - @echo "BIN_LIBS_DEPS" - @echo $(BIN_LIBS_DEPS) - -%.hex: %.elf - $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O ihex $< $*.hex - - - -%.a: $(OBJECTFILES) - mkdir -p $(TARGETINSTALLPATH) - mkdir -p $(HEADERSINSTALLPATH) - $(LIBUC_AR) rcs $@ $(OBJECTFILES) #$(LIBUC_AR) rcs $(TARGETINSTALLPATH)/$@ $(OBJECTFILES) - cp -f $(HEADERS) $(HEADERSINSTALLPATH)/ diff --git a/rules/common/librules.pri b/rules/common/librules.pri deleted file mode 100644 --- a/rules/common/librules.pri +++ /dev/null @@ -1,57 +0,0 @@ -#--------------------------------------------------------------------------------- -# LIBRARY DEFINITIONS -#--------------------------------------------------------------------------------- -LIBUC_LIBS_DIR = $$libuc2/lib - -INCLUDEPATH += $$LIBUC_LIBS_DIR/includes \ - $$LIBUC_LIBS_DIR/includes/GRAPHIC/CONTROLERS \ - $$LIBUC_LIBS_DIR/includes/GRAPHIC/GUI/FONTS \ - $$LIBUC_LIBS_DIR/includes/GRAPHIC/GUI/Widgets \ - $$LIBUC_LIBS_DIR/includes/$$ARCH - -LIBUC_BIN_LIBS_DIR = $$LIBUC_LIBS_DIR/bin/$$ARCH - - -LIBS += -L$$LIBUC_LIBS_DIR/bin/$$ARCH \ - -lCS43L22 -lina226 -lili9328 -lfonts -lm - -LIBS += -L$$LIBUC_LIBS_DIR/bin/$$ARCH \ - -lsdcard - -LIBS += -L$$LIBUC_LIBS_DIR/bin/$$ARCH \ - -lfat32 - -LIBS += -L$$LIBUC_LIBS_DIR/bin/$$ARCH \ - -lmbr - -LIBS += -L$$LIBUC_LIBS_DIR/bin/$$ARCH \ - -luart - -LIBS += -L$$LIBUC_LIBS_DIR/bin/$$ARCH \ - -li2c - -LIBS += -L$$LIBUC_LIBS_DIR/bin/$$ARCH \ - -lgpio - -LIBS += -L$$LIBUC_LIBS_DIR/bin/$$ARCH \ - -lspi - -LIBS += -L$$LIBUC_LIBS_DIR/bin/$$ARCH \ - -lcpu - -LIBS += -L$$LIBUC_LIBS_DIR/bin/$$ARCH \ - -lcore - - - - - - - - - - - - - - diff --git a/rules/common/libsrules.mk b/rules/common/libsrules.mk deleted file mode 100644 --- a/rules/common/libsrules.mk +++ /dev/null @@ -1,177 +0,0 @@ -#--------------------------------------------------------------------------------- -# LIBRARY DEFINITIONS -#--------------------------------------------------------------------------------- -LIBUC_LIBS = - -LIBUC_LIBS_CORE = -static -lcore -LIBUC_LIBS_DIR_CORE = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_CORE_CMD = -L $(LIBUC_LIBS_DIR_CORE) -LIBUC_INC_DIR_CORE = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_CORE_CMD = - -LIBUC_LIBS_CPU = -static -lcpu -LIBUC_LIBS_DIR_CPU = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_CPU_CMD = -L $(LIBUC_LIBS_DIR_CPU) -LIBUC_INC_DIR_CPU = $(LIBUC_INC_DIR)/$(ARCH) -LIBUC_INC_DIR_CPU_CMD = -I $(LIBUC_INC_DIR_CPU) - -LIBUC_LIBS_GPIO = -static -lgpio -LIBUC_LIBS_DIR_GPIO = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_GPIO_CMD = -L $(LIBUC_LIBS_DIR_GPIO) -LIBUC_INC_DIR_GPIO = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_GPIO_CMD = - -LIBUC_LIBS_APB = -static -lapb -LIBUC_LIBS_DIR_APB = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_APB_CMD = -L $(LIBUC_LIBS_DIR_APB) -LIBUC_INC_DIR_APB = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_APB_CMD = - -LIBUC_LIBS_UCSTRINGS = -static -lucstrings -LIBUC_LIBS_DIR_UCSTRINGS = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_UCSTRINGS_CMD = -L $(LIBUC_LIBS_DIR_UCSTRINGS) -LIBUC_INC_DIR_UCSTRINGS = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_UCSTRINGS_CMD = - -LIBUC_LIBS_UART = -static -luart -LIBUC_LIBS_DIR_UART = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_UART_CMD = -L $(LIBUC_LIBS_DIR_UART) -LIBUC_INC_DIR_UART = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_UART_CMD = - -LIBUC_LIBS_SPI = -static -lspi -LIBUC_LIBS_DIR_SPI = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_SPI_CMD = -L $(LIBUC_LIBS_DIR_SPI) -LIBUC_INC_DIR_SPI = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_SPI_CMD = - -LIBUC_LIBS_SSP = -static -lssp -LIBUC_LIBS_DIR_SSP = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_SSP_CMD = -L $(LIBUC_LIBS_DIR_SSP) -LIBUC_INC_DIR_SSP = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_SSP_CMD = - -LIBUC_LIBS_IIC = -static -liic -LIBUC_LIBS_DIR_IIC = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_IIC_CMD = -L $(LIBUC_LIBS_DIR_IIC) -LIBUC_INC_DIR_IIC = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_IIC_CMD = - -LIBUC_LIBS_ADC = -static -ladc -LIBUC_LIBS_DIR_ADC = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_ADC_CMD = -L $(LIBUC_LIBS_DIR_ADC) -LIBUC_INC_DIR_ADC = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_ADC_CMD = - -LIBUC_LIBS_24LC0X = -static -l24lc0X -LIBUC_LIBS_DIR_24LC0X = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_24LC0X_CMD = -L $(LIBUC_LIBS_DIR_24LC0X) -LIBUC_INC_DIR_24LC0X = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_24LC0X_CMD = - -LIBUC_LIBS_SDCARD = -static -lsdcard -LIBUC_LIBS_DIR_SDCARD = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_SDCARD_CMD = -L $(LIBUC_LIBS_DIR_SDCARD) -LIBUC_INC_DIR_SDCARD = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_SDCARD_CMD = - -LIBUC_LIBS_VS10XX = -static -lvs10XX -LIBUC_LIBS_DIR_VS10XX = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_VS10XX_CMD = -L $(LIBUC_LIBS_DIR_VS10XX) -LIBUC_INC_DIR_VS10XX = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_VS10XX_CMD = - -LIBUC_LIBS_BLKDEVICE = -static -lblkdevice -LIBUC_LIBS_DIR_BLKDEVICE = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_BLKDEVICE_CMD = -L $(LIBUC_LIBS_DIR_BLKDEVICE) -LIBUC_INC_DIR_BLKDEVICE = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_BLKDEVICE_CMD = - -LIBUC_LIBS_FAT32 = -static -lfat32 -LIBUC_LIBS_DIR_FAT32 = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_FAT32_CMD = -L $(LIBUC_LIBS_DIR_FAT32) -LIBUC_INC_DIR_FAT32 = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_FAT32_CMD = - -LIBUC_LIBS_UHANDLE = -static -luhandle -LIBUC_LIBS_DIR_UHANDLE = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_UHANDLE_CMD = -L $(LIBUC_LIBS_DIR_UHANDLE) -LIBUC_INC_DIR_UHANDLE = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_UHANDLE_CMD = - -LIBUC_LIBS_STREAMDEVICES = -static -lstreamdevices -LIBUC_LIBS_DIR_STREAMDEVICES = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_STREAMDEVICES_CMD = -L $(LIBUC_LIBS_DIR_STREAMDEVICES) -LIBUC_INC_DIR_STREAMDEVICES = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_STREAMDEVICES_CMD = - -LIBUC_LIBS_HEXVIEWER = -static -lhexviewer -LIBUC_LIBS_DIR_HEXVIEWER = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_HEXVIEWER_CMD = -L $(LIBUC_LIBS_DIR_HEXVIEWER) -LIBUC_INC_DIR_HEXVIEWER = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_HEXVIEWER_CMD = - -LIBUC_LIBS_MBR = -static -lmbr -LIBUC_LIBS_DIR_MBR = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_MBR_CMD = -L $(LIBUC_LIBS_DIR_MBR) -LIBUC_INC_DIR_MBR = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_MBR_CMD = - -LIBUC_LIBS_UCDIRENT = -static -lucdirent -LIBUC_LIBS_DIR_UCDIRENT = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_UCDIRENT_CMD = -L $(LIBUC_LIBS_DIR_UCDIRENT) -LIBUC_INC_DIR_UCDIRENT = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_UCDIRENT_CMD = - -LIBUC_LIBS_FS = -static -lfs -LIBUC_LIBS_DIR_FS = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_FS_CMD = -L $(LIBUC_LIBS_DIR_FS) -LIBUC_INC_DIR_FS = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_FS_CMD = - -LIBUC_LIBS_FSEXPLORER = -static -lfsexplorer -LIBUC_LIBS_DIR_FSEXPLORER = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_FSEXPLORER_CMD = -L $(LIBUC_LIBS_DIR_FSEXPLORER) -LIBUC_INC_DIR_FSEXPLORER = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_FSEXPLORER_CMD = - -LIBUC_LIBS_DIR_ALLFS_CMD = $(LIBUC_LIBS_DIR_UCDIRENT_CMD) $(LIBUC_LIBS_DIR_FS_CMD) $(LIBUC_LIBS_DIR_MBR_CMD) $(LIBUC_LIBS_DIR_FAT32_CMD) $(LIBUC_LIBS_DIR_SDCARD_CMD) $(LIBUC_LIBS_DIR_BLKDEVICE_CMD) -LIBUC_INC_DIR_ALLFS_CMD = $(LIBUC_INC_DIR_UCDIRENT_CMD) $(LIBUC_INC_DIR_FS_CMD) $(LIBUC_INC_DIR_MBR_CMD) $(LIBUC_INC_DIR_FAT32_CMD) $(LIBUC_INC_DIR_SDCARD_CMD) $(LIBUC_INC_DIR_BLKDEVICE_CMD) -LIBUC_LIBS_ALLFS = $(LIBUC_LIBS_UCDIRENT) $(LIBUC_LIBS_FS) $(LIBUC_LIBS_MBR) $(LIBUC_LIBS_FAT32) $(LIBUC_LIBS_SDCARD) $(LIBUC_LIBS_BLKDEVICE) - - -LIBUC_LIBS_ADS127X = -static -lads127X -LIBUC_LIBS_DIR_ADS127X = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_ADS127X_CMD = -L $(LIBUC_LIBS_DIR_ADS127X) -LIBUC_INC_DIR_ADS127X = $(LIBUC_INC_DIR) -LIBUC_INC_DIR_ADS127X_CMD = - - -LIBUC_LIBS_NXPLIB = -static -lnxplib -LIBUC_LIBS_DIR_NXPLIB = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_NXPLIB_CMD = -L $(LIBUC_LIBS_DIR_NXPLIB) -LIBUC_INC_DIR_NXPLIB = $(LIBUC_INC_DIR)/LPCXXXX -LIBUC_INC_DIR_NXPLIB_CMD = -I $(LIBUC_INC_DIR_NXPLIB) - -LIBUC_LIBS_ARMMATH = -static -larmmath -LIBUC_LIBS_DIR_ARMMATH = $(LIBUC_LIBS_DIR) -LIBUC_LIBS_DIR_ARMMATH_CMD = -L $(LIBUC_LIBS_DIR_ARMMATH) -LIBUC_INC_DIR_ARMMATH = $(LIBUC_INC_DIR)/ARM -LIBUC_INC_DIR_ARMMATH_CMD = $(LIBUC_INC_DIR_ARMMATH) - - - - - - - - - - - - - - - - - diff --git a/rules/common/rules.mk b/rules/common/rules.mk deleted file mode 100644 --- a/rules/common/rules.mk +++ /dev/null @@ -1,38 +0,0 @@ -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - -Makefile = Makefile - -all: - @echo "" - - -subdir: - @echo "Generic subdir rules" - -$(Makefile) : $(PROJECTFILE) - libucmake $(PROJECTFILE) - make - - - - diff --git a/rules/latex/rules.mk b/rules/latex/rules.mk deleted file mode 100644 --- a/rules/latex/rules.mk +++ /dev/null @@ -1,68 +0,0 @@ -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ -LIBUC_LATEX = latex -LIBUC_DVIPDF = dvipdf -LIBUC_DVIPS = dvips -LIBUC_PS2PDF = ps2pdf -LIBUC_PDFLATEX = pdflatex - -DVIFILES = $(LATEXSOURCES:.tex=.dvi) -PDFFILES = $(DVIFILES:.ps=.pdf) -PSFILES = $(DVIFILES:.dvi=.ps) -AUXDIR=aux -TOCDIR=toc -LOGDIR=log - -first:all - @echo "latex rules" - - -%.pdf:$(LATEXSOURCES) Makefile - echo $(LIBUC_LATEX) - $(LIBUC_LATEX) $(LATEXSOURCES) - $(LIBUC_DVIPS) $(DVIFILES) - $(LIBUC_PS2PDF) $(PSFILES) - $(LIBUC_LATEX) $(LATEXSOURCES) - $(LIBUC_DVIPS) $(DVIFILES) - $(LIBUC_PS2PDF) $(PSFILES) - mkdir -p $(TOCDIR) - mkdir -p $(AUXDIR) - mkdir -p $(LOGDIR) - mv *.toc $(TOCDIR) - mv *.aux $(AUXDIR) - mv *.log $(LOGDIR) - - -clean: - rm -f *.toc *.aux *.log *.pdf *.dvi - rm -f $(TOCDIR)/* - rm -f $(AUXDIR)/* - rm -f $(LOGDIR)/* - - -distclean: clean - rm -f *.toc *.aux *.log *.pdf *.dvi - rm -f Makefile - - - - diff --git a/rules/lpc17XX-arm-none-eabi-gcc/LPC17xx.ld b/rules/lpc17XX-arm-none-eabi-gcc/LPC17xx.ld deleted file mode 100644 --- a/rules/lpc17XX-arm-none-eabi-gcc/LPC17xx.ld +++ /dev/null @@ -1,198 +0,0 @@ -/* Linker script for Cortex-M3 - * - * Version:CodeSourcery Sourcery G++ Lite 2007q3-53 - * BugURL:https://support.codesourcery.com/GNUToolchain/ - * - * Copyright 2007 CodeSourcery. - * - * The authors hereby grant permission to use, copy, modify, distribute, - * and license this software and its documentation for any purpose, provided - * that existing copyright notices are retained in all copies and that this - * notice is included verbatim in any distributions. No written agreement, - * license, or royalty fee is required for any of the authorized uses. - * Modifications to this software may be copyrighted by their authors - * and need not follow the licensing terms described here, provided that - * the new terms are clearly indicated on the first page of each file where - * they apply. */ - -OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -ENTRY(_start) -SEARCH_DIR(.) -GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3micro) - -MEMORY -{ - rom (rx) : ORIGIN = 0x00000000, LENGTH = 512K - ram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K -} - -/* These force the linker to search for particular symbols from - * the start of the link process and thus ensure the user's - * overrides are picked up - */ -EXTERN(__cs3_reset_cortex_m) -EXTERN(__cs3_interrupt_vector_cortex_m) -EXTERN(__cs3_start_c main __cs3_stack __cs3_stack_size __cs3_heap_end) - -PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); -PROVIDE(__cs3_stack_size = __cs3_region_start_ram + __cs3_region_size_ram - _end); -PROVIDE(__cs3_heap_start = _end); -PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); - -SECTIONS -{ - .text : - { - CREATE_OBJECT_SYMBOLS - __cs3_region_start_rom = .; - *(.cs3.region-head.rom) - __cs3_interrupt_vector = __cs3_interrupt_vector_cortex_m; - *(.cs3.interrupt_vector) - /* Make sure we pulled in an interrupt vector. */ - ASSERT (. != __cs3_interrupt_vector_cortex_m, "No interrupt vector"); - *(.rom) - *(.rom.b) - - __cs3_reset = __cs3_reset_cortex_m; - *(.cs3.reset) - /* Make sure we pulled in some reset code. */ - ASSERT (. != __cs3_reset, "No reset code"); - - *(.text .text.* .gnu.linkonce.t.*) - *(.plt) - *(.gnu.warning) - *(.glue_7t) *(.glue_7) *(.vfp11_veneer) - - *(.rodata .rodata.* .gnu.linkonce.r.*) - - *(.ARM.extab* .gnu.linkonce.armextab.*) - *(.gcc_except_table) - *(.eh_frame_hdr) - *(.eh_frame) - - . = ALIGN(4); - KEEP(*(.init)) - - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - - . = ALIGN(4); - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - - . = ALIGN(0x4); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*crtend.o(.ctors)) - - . = ALIGN(4); - KEEP(*(.fini)) - - . = ALIGN(4); - __fini_array_start = .; - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - __fini_array_end = .; - - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*crtend.o(.dtors)) - - . = ALIGN(4); - __cs3_regions = .; - LONG (0) - LONG (__cs3_region_init_ram) - LONG (__cs3_region_start_ram) - LONG (__cs3_region_init_size_ram) - LONG (__cs3_region_zero_size_ram) - } - - /* .ARM.exidx is sorted, so has to go in its own output section. */ - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } >rom - __exidx_end = .; - .text.align : - { - . = ALIGN(8); - _etext = .; - } >rom - __cs3_region_size_rom = LENGTH(rom); - __cs3_region_num = 1; - - .data : - { - __cs3_region_start_ram = .; - *(.cs3.region-head.ram) - KEEP(*(.jcr)) - *(.got.plt) *(.got) - *(.shdata) - *(.data .data.* .gnu.linkonce.d.*) - *(.ram) - . = ALIGN (8); - _edata = .; - } >ram AT>rom - .bss : - { - *(.shbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - *(.ram.b) - . = ALIGN (8); - _end = .; - __end = .; - } >ram AT>rom - .heap : - { - *(.heap) - } >ram - .stack (__cs3_stack - __cs3_stack_size) : - { - *(.stack) - } >ram - __cs3_region_init_ram = LOADADDR (.data); - __cs3_region_init_size_ram = _edata - __cs3_region_start_ram; - __cs3_region_zero_size_ram = _end - _edata; - __cs3_region_size_ram = LENGTH(ram); - __cs3_region_num = 1; - - .stab 0 (NOLOAD) : { *(.stab) } - .stabstr 0 (NOLOAD) : { *(.stabstr) } - /* DWARF debug sections. - * Symbols in the DWARF debugging sections are relative to the beginning - * of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - - .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } - .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } - /DISCARD/ : { *(.note.GNU-stack) } -} diff --git a/rules/lpc17XX-arm-none-eabi-gcc/LPC17xx.ld.old b/rules/lpc17XX-arm-none-eabi-gcc/LPC17xx.ld.old deleted file mode 100644 --- a/rules/lpc17XX-arm-none-eabi-gcc/LPC17xx.ld.old +++ /dev/null @@ -1,191 +0,0 @@ -/* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED -* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF -* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. -* THE AUTHORS SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR -* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. USE IT AT YOUR OWN RISK */ - -MEMORY -{ - /* LPC1768 : 512k ROM + 64k SRAM */ - /*------------------------------ */ - - /* On-chip ROM is a readable (r), executable region (x) */ - /* On-chip SRAM is a readable (r), writable (w) and */ - /* executable region (x) */ - - /* Main ROM region - 512k for LPC1768 */ - IROM (rx) : ORIGIN = 0x00000000, LENGTH = 512k - - /* local static RAM - 32k for LPC1756 */ - IRAM0 (rwx) : ORIGIN = 0x10000000, LENGTH = 32k - - /* AHB SRAM - 16k for LPC1756 - often used for USB */ - IRAM1 (rwx) : ORIGIN = 0x2007C000, LENGTH = 16k - IRAM2 (rwx) : ORIGIN = 0x20080000, LENGTH = 16k -} - -/* SECTION command : Define mapping of input sections */ -/* into output sections. */ - -SECTIONS -{ - /******************************************/ - /* code section */ - - /* "normal" code */ - - .text : - { - KEEP(*(.isr_vector .isr_vector.*)) - *(.text .text.*) - *(.gnu.linkonce.t.*) - *(.glue_7) - *(.glue_7t) - *(.gcc_except_table) - *(.rodata .rodata*) - *(.gnu.linkonce.r.*) - } >IROM - .testData : - { - _sitestdata = LOADADDR (.testData); - . = ALIGN(4); - _stestdata = .; - *(.testData .testData.*) - . = ALIGN(4); - _etestdata = . ; - } >IRAM1 AT >IROM - - /******************************************/ - /* .ctors .dtors are used for c++ constructors/destructors */ - .ctors : - { - . = ALIGN(4); - PROVIDE(__ctors_start = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(__ctors_end = .); - } >IROM - - .dtors : - { - . = ALIGN(4); - PROVIDE(__dtors_start = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(__dtors_end = .); - - . = ALIGN(4); - /* End Of .text section */ - _etext = .; - _sifastcode = .; - } >IROM - - /**************************************************/ - /* fastcode - copied at startup & executed in RAM */ - - .fastcode : - { - . = ALIGN (4); - _sfastcode = . ; - - *(.glue_7t) *(.glue_7) - *(.fastcode) - - /* add other modules here ... */ - - . = ALIGN (4); - _efastcode = . ; - _sidata = .; - } >IRAM0 AT>IROM - - /******************************************/ - /* This used for USB RAM section */ - .usb_ram (NOLOAD): - { - *.o (USB_RAM) - } > IRAM1 - - /******************************************/ - /* data section */ - .data : - { - _sidata = LOADADDR (.data); - . = ALIGN(4); - _sdata = .; - - *(vtable vtable.*) - *(.data .data.*) - *(.gnu.linkonce.d*) - - . = ALIGN(4); - _edata = . ; - } >IRAM0 AT>IROM - - /******************************************/ - /* For no-init variables section */ - .bss (NOLOAD) : - { - . = ALIGN(4); - _sbss = . ; - - *(.bss .bss.*) - *(.gnu.linkonce.b*) - *(COMMON) - - . = ALIGN(4); - _ebss = . ; - } >IRAM0 - - /******************************************/ - /* For stack section */ - .stackarea (NOLOAD) : - { - . = ALIGN(8); - _sstack = .; - - *(.stackarea .stackarea.*) - - . = ALIGN(8); - _estack = .; - - . = ALIGN(4); - _end = . ; - PROVIDE (end = .); - - } > IRAM0 - - /******************************************/ - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - /* .comment 0 : { *(.comment) } */ - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to the beginning - of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } -} diff --git a/rules/lpc17XX-arm-none-eabi-gcc/ldscript_ram_gnu.ld b/rules/lpc17XX-arm-none-eabi-gcc/ldscript_ram_gnu.ld deleted file mode 100644 --- a/rules/lpc17XX-arm-none-eabi-gcc/ldscript_ram_gnu.ld +++ /dev/null @@ -1,212 +0,0 @@ -/* Linker script for Cortex-M3 - * - * Version:CodeSourcery Sourcery G++ Lite 2007q3-53 - * BugURL:https://support.codesourcery.com/GNUToolchain/ - * - * Copyright 2007 CodeSourcery. - * - * The authors hereby grant permission to use, copy, modify, distribute, - * and license this software and its documentation for any purpose, provided - * that existing copyright notices are retained in all copies and that this - * notice is included verbatim in any distributions. No written agreement, - * license, or royalty fee is required for any of the authorized uses. - * Modifications to this software may be copyrighted by their authors - * and need not follow the licensing terms described here, provided that - * the new terms are clearly indicated on the first page of each file where - * they apply. */ - -OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -/*ENTRY(_start)*/ -SEARCH_DIR(.) -GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3micro) - -MEMORY -{ - rom (rx) : ORIGIN = 0x00000000, LENGTH = 512K - ram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K - - ram1(rwx) : ORIGIN = 0x2007C000, LENGTH = 16k - ram2(rwx) : ORIGIN = 0x20080000, LENGTH = 16k -} - -/* These force the linker to search for particular symbols from - * the start of the link process and thus ensure the user's - * overrides are picked up - */ -EXTERN(__cs3_reset_cortex_m) -EXTERN(__cs3_interrupt_vector_cortex_m) -EXTERN(__cs3_start_c main __cs3_stack __cs3_stack_size __cs3_heap_end) - -PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); -PROVIDE(__cs3_stack_size = __cs3_region_start_ram + __cs3_region_size_ram - _end); -PROVIDE(__cs3_heap_start = _end); -PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); - -SECTIONS -{ - .text : - { - CREATE_OBJECT_SYMBOLS - __cs3_region_start_ram = .; - *(.cs3.region-head.ram) -/* __cs3_region_start_rom = .;*/ -/* *(.cs3.region-head.rom)*/ - __cs3_interrupt_vector = __cs3_interrupt_vector_cortex_m; - *(.cs3.interrupt_vector) - /* Make sure we pulled in an interrupt vector. */ - ASSERT (. != __cs3_interrupt_vector_cortex_m, "No interrupt vector"); -/* *(.rom) - *(.rom.b)*/ - *(.ram) - - __cs3_reset = __cs3_reset_cortex_m; - *(.cs3.reset) - /* Make sure we pulled in some reset code. */ - ASSERT (. != __cs3_reset, "No reset code"); - - *(.text .text.* .gnu.linkonce.t.*) - *(.plt) - *(.gnu.warning) - *(.glue_7t) *(.glue_7) *(.vfp11_veneer) - - *(.rodata .rodata.* .gnu.linkonce.r.*) - - *(.ARM.extab* .gnu.linkonce.armextab.*) - *(.gcc_except_table) - *(.eh_frame_hdr) - *(.eh_frame) - - . = ALIGN(4); - KEEP(*(.init)) - - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - - . = ALIGN(4); - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - - . = ALIGN(0x4); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*crtend.o(.ctors)) - - . = ALIGN(4); - KEEP(*(.fini)) - - . = ALIGN(4); - __fini_array_start = .; - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - __fini_array_end = .; - - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*crtend.o(.dtors)) - - . = ALIGN(4); - __cs3_regions = .; - LONG (0) - LONG (__cs3_region_init_ram) - LONG (__cs3_region_start_ram) - LONG (__cs3_region_init_size_ram) - LONG (__cs3_region_zero_size_ram) - } >ram - - /* .ARM.exidx is sorted, so has to go in its own output section. */ - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } >ram - __exidx_end = .; - .text.align : - { - . = ALIGN(8); - _etext = .; - } >ram -/* __cs3_region_size_rom = LENGTH(rom); - __cs3_region_num = 1;*/ - - .data : - { -/* __cs3_region_start_ram = .; - *(.cs3.region-head.ram)*/ - _sdata = .; - KEEP(*(.jcr)) - *(.got.plt) *(.got) - *(.shdata) - *(.data .data.* .gnu.linkonce.d.*) - *(.ram.d) - . = ALIGN (8); - _edata = .; - } >ram /*AT>rom*/ - .bss (NOLOAD): - { - . = ALIGN (4); - __bss_start__ = .; - *(.shbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - __bss_end__ = .; - *(.ram.b) - . = ALIGN (4); - _end = .; - __end = .; - } >ram1 - .heap (NOLOAD): - { - *(.heap) - } >ram - .stack (__cs3_stack - __cs3_stack_size) (NOLOAD): - { - *(.stack) - _estack = .; - PROVIDE(estack = .); - } >ram - __cs3_region_init_ram = LOADADDR (.data); -/* __cs3_region_init_ram = LOADADDR (.text);*/ -/* __cs3_region_init_size_ram = _edata - __cs3_region_start_ram;*/ - __cs3_region_init_size_ram = _edata - _sdata; - __cs3_region_zero_size_ram = _end - _edata; - __cs3_region_size_ram = LENGTH(ram); - __cs3_region_num = 1; - - .stab 0 (NOLOAD) : { *(.stab) } - .stabstr 0 (NOLOAD) : { *(.stabstr) } - /* DWARF debug sections. - * Symbols in the DWARF debugging sections are relative to the beginning - * of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - - .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } - .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } - /DISCARD/ : { *(.note.GNU-stack) } -} diff --git a/rules/lpc17XX-arm-none-eabi-gcc/ldscript_ram_v00_gnu.ld b/rules/lpc17XX-arm-none-eabi-gcc/ldscript_ram_v00_gnu.ld deleted file mode 100644 --- a/rules/lpc17XX-arm-none-eabi-gcc/ldscript_ram_v00_gnu.ld +++ /dev/null @@ -1,201 +0,0 @@ -/* Linker script for Cortex-M3 - * - * Version:CodeSourcery Sourcery G++ Lite 2007q3-53 - * BugURL:https://support.codesourcery.com/GNUToolchain/ - * - * Copyright 2007 CodeSourcery. - * - * The authors hereby grant permission to use, copy, modify, distribute, - * and license this software and its documentation for any purpose, provided - * that existing copyright notices are retained in all copies and that this - * notice is included verbatim in any distributions. No written agreement, - * license, or royalty fee is required for any of the authorized uses. - * Modifications to this software may be copyrighted by their authors - * and need not follow the licensing terms described here, provided that - * the new terms are clearly indicated on the first page of each file where - * they apply. */ - -OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -/*ENTRY(_start)*/ -SEARCH_DIR(.) -GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3micro) - -MEMORY -{ - rom (rx) : ORIGIN = 0x00000000, LENGTH = 512K - ram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K - - ram1(rwx) : ORIGIN = 0x20000000, LENGTH = 16k - ram2(rwx) : ORIGIN = 0x20004000, LENGTH = 16k -} - -/* These force the linker to search for particular symbols from - * the start of the link process and thus ensure the user's - * overrides are picked up - */ -EXTERN(__cs3_reset_cortex_m) -EXTERN(__cs3_interrupt_vector_cortex_m) -EXTERN(__cs3_start_c main __cs3_stack __cs3_stack_size __cs3_heap_end) - -PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); -PROVIDE(__cs3_stack_size = __cs3_region_start_ram + __cs3_region_size_ram - _end); -PROVIDE(__cs3_heap_start = _end); -PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); - -SECTIONS -{ - .text : - { - CREATE_OBJECT_SYMBOLS - __cs3_region_start_rom = .; - *(.cs3.region-head.rom) - __cs3_interrupt_vector = __cs3_interrupt_vector_cortex_m; - *(.cs3.interrupt_vector) - /* Make sure we pulled in an interrupt vector. */ - ASSERT (. != __cs3_interrupt_vector_cortex_m, "No interrupt vector"); - *(.rom) - *(.rom.b) - - __cs3_reset = __cs3_reset_cortex_m; - *(.cs3.reset) - /* Make sure we pulled in some reset code. */ - ASSERT (. != __cs3_reset, "No reset code"); - - *(.text .text.* .gnu.linkonce.t.*) - *(.plt) - *(.gnu.warning) - *(.glue_7t) *(.glue_7) *(.vfp11_veneer) - - *(.rodata .rodata.* .gnu.linkonce.r.*) - - *(.ARM.extab* .gnu.linkonce.armextab.*) - *(.gcc_except_table) - *(.eh_frame_hdr) - *(.eh_frame) - - . = ALIGN(4); - KEEP(*(.init)) - - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - - . = ALIGN(4); - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - - . = ALIGN(0x4); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*crtend.o(.ctors)) - - . = ALIGN(4); - KEEP(*(.fini)) - - . = ALIGN(4); - __fini_array_start = .; - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - __fini_array_end = .; - - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*crtend.o(.dtors)) - - . = ALIGN(4); - __cs3_regions = .; - LONG (0) - LONG (__cs3_region_init_ram) - LONG (__cs3_region_start_ram) - LONG (__cs3_region_init_size_ram) - LONG (__cs3_region_zero_size_ram) - } - - /* .ARM.exidx is sorted, so has to go in its own output section. */ - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } >rom - __exidx_end = .; - .text.align : - { - . = ALIGN(8); - _etext = .; - } >rom - __cs3_region_size_rom = LENGTH(rom); - __cs3_region_num = 1; - - .data : - { - __cs3_region_start_ram = .; - *(.cs3.region-head.ram) - KEEP(*(.jcr)) - *(.got.plt) *(.got) - *(.shdata) - *(.data .data.* .gnu.linkonce.d.*) - *(.ram) - . = ALIGN (8); - _edata = .; - } >ram AT>rom - .bss : - { - *(.shbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - *(.ram.b) - . = ALIGN (8); - _end = .; - __end = .; - } >ram AT>rom - .heap : - { - *(.heap) - } >ram - .stack (__cs3_stack - __cs3_stack_size) : - { - *(.stack) - } >ram - __cs3_region_init_ram = LOADADDR (.data); - __cs3_region_init_size_ram = _edata - __cs3_region_start_ram; - __cs3_region_zero_size_ram = _end - _edata; - __cs3_region_size_ram = LENGTH(ram); - __cs3_region_num = 1; - - .stab 0 (NOLOAD) : { *(.stab) } - .stabstr 0 (NOLOAD) : { *(.stabstr) } - /* DWARF debug sections. - * Symbols in the DWARF debugging sections are relative to the beginning - * of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - - .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } - .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } - /DISCARD/ : { *(.note.GNU-stack) } -} diff --git a/rules/lpc17XX-arm-none-eabi-gcc/ldscript_rom_gnu.ld b/rules/lpc17XX-arm-none-eabi-gcc/ldscript_rom_gnu.ld deleted file mode 100644 --- a/rules/lpc17XX-arm-none-eabi-gcc/ldscript_rom_gnu.ld +++ /dev/null @@ -1,209 +0,0 @@ -/* Linker script for Cortex-M3 - * - * Version:CodeSourcery Sourcery G++ Lite 2007q3-53 - * BugURL:https://support.codesourcery.com/GNUToolchain/ - * - * Copyright 2007 CodeSourcery. - * - * The authors hereby grant permission to use, copy, modify, distribute, - * and license this software and its documentation for any purpose, provided - * that existing copyright notices are retained in all copies and that this - * notice is included verbatim in any distributions. No written agreement, - * license, or royalty fee is required for any of the authorized uses. - * Modifications to this software may be copyrighted by their authors - * and need not follow the licensing terms described here, provided that - * the new terms are clearly indicated on the first page of each file where - * they apply. */ - -OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -/*ENTRY(_start)*/ -SEARCH_DIR(.) -GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3micro) - -MEMORY -{ - rom (rx) : ORIGIN = 0x00000000, LENGTH = 512K - ram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K - - ram1(rwx) : ORIGIN = 0x2007C000, LENGTH = 16k - ram2(rwx) : ORIGIN = 0x20080000, LENGTH = 16k -} - -/* These force the linker to search for particular symbols from - * the start of the link process and thus ensure the user's - * overrides are picked up - */ -EXTERN(__cs3_reset_cortex_m) -EXTERN(__cs3_interrupt_vector_cortex_m) -EXTERN(__cs3_start_c main __cs3_stack __cs3_stack_size __cs3_heap_end) - -PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); -PROVIDE(__cs3_stack_size = __cs3_region_start_ram + __cs3_region_size_ram - _end); -PROVIDE(__cs3_heap_start = _end); -PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); - -SECTIONS -{ - .text : - { - CREATE_OBJECT_SYMBOLS - __cs3_region_start_rom = .; - *(.cs3.region-head.rom) - __cs3_interrupt_vector = __cs3_interrupt_vector_cortex_m; - *(.cs3.interrupt_vector) - /* Make sure we pulled in an interrupt vector. */ - ASSERT (. != __cs3_interrupt_vector_cortex_m, "No interrupt vector"); - *(.rom) - *(.rom.b) - - __cs3_reset = __cs3_reset_cortex_m; - *(.cs3.reset) - /* Make sure we pulled in some reset code. */ - ASSERT (. != __cs3_reset, "No reset code"); - - *(.text .text.* .gnu.linkonce.t.*) - *(.plt) - *(.gnu.warning) - *(.glue_7t) *(.glue_7) *(.vfp11_veneer) - - *(.rodata .rodata.* .gnu.linkonce.r.*) - - *(.ARM.extab* .gnu.linkonce.armextab.*) - *(.gcc_except_table) - *(.eh_frame_hdr) - *(.eh_frame) - - . = ALIGN(4); - KEEP(*(.init)) - - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - - . = ALIGN(4); - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - - . = ALIGN(0x4); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*crtend.o(.ctors)) - - . = ALIGN(4); - KEEP(*(.fini)) - - . = ALIGN(4); - __fini_array_start = .; - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - __fini_array_end = .; - - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*crtend.o(.dtors)) - - . = ALIGN(4); - __cs3_regions = .; - LONG (0) - LONG (__cs3_region_init_ram) - LONG (__cs3_region_start_ram) - LONG (__cs3_region_init_size_ram) - LONG (__cs3_region_zero_size_ram) - } - - /* .ARM.exidx is sorted, so has to go in its own output section. */ - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } >rom - __exidx_end = .; - .text.align : - { - . = ALIGN(8); - _etext = .; - } >rom - __cs3_region_size_rom = LENGTH(rom); - __cs3_region_num = 1; - - .data : - { - __cs3_region_start_ram = .; - *(.cs3.region-head.ram) - KEEP(*(.jcr)) - *(.got.plt) *(.got) - *(.shdata) - *(.data .data.* .gnu.linkonce.d.*) - *(.ram) - . = ALIGN (8); - _edata = .; - } >ram AT>rom - .bss : - { - *(.shbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - *(.ram.b) - . = ALIGN (8); - _end = .; - __end = .; - } >ram AT>rom - /* This used for USB RAM section */ - .usb_ram (NOLOAD): - { - *.o (USB_RAM) - } > ram2 - .heap (NOLOAD) : - { - *(.heap) - } >ram - .stack (__cs3_stack - __cs3_stack_size) (NOLOAD): - { - *(.stack) - _estack = .; - PROVIDE(estack = .); - } >ram - - __cs3_region_init_ram = LOADADDR (.data); - __cs3_region_init_size_ram = _edata - __cs3_region_start_ram; - __cs3_region_zero_size_ram = _end - _edata; - __cs3_region_size_ram = LENGTH(ram); - __cs3_region_num = 1; - - .stab 0 (NOLOAD) : { *(.stab) } - .stabstr 0 (NOLOAD) : { *(.stabstr) } - /* DWARF debug sections. - * Symbols in the DWARF debugging sections are relative to the beginning - * of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - - .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } - .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } - /DISCARD/ : { *(.note.GNU-stack) } -} diff --git a/rules/lpc17XX-arm-none-eabi-gcc/ldscript_rom_v00_gnu.ld b/rules/lpc17XX-arm-none-eabi-gcc/ldscript_rom_v00_gnu.ld deleted file mode 100644 --- a/rules/lpc17XX-arm-none-eabi-gcc/ldscript_rom_v00_gnu.ld +++ /dev/null @@ -1,201 +0,0 @@ -/* Linker script for Cortex-M3 - * - * Version:CodeSourcery Sourcery G++ Lite 2007q3-53 - * BugURL:https://support.codesourcery.com/GNUToolchain/ - * - * Copyright 2007 CodeSourcery. - * - * The authors hereby grant permission to use, copy, modify, distribute, - * and license this software and its documentation for any purpose, provided - * that existing copyright notices are retained in all copies and that this - * notice is included verbatim in any distributions. No written agreement, - * license, or royalty fee is required for any of the authorized uses. - * Modifications to this software may be copyrighted by their authors - * and need not follow the licensing terms described here, provided that - * the new terms are clearly indicated on the first page of each file where - * they apply. */ - -OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -/*ENTRY(_start)*/ -SEARCH_DIR(.) -GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3micro) - -MEMORY -{ - rom (rx) : ORIGIN = 0x00000000, LENGTH = 512K - ram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K - - ram1(rwx) : ORIGIN = 0x20000000, LENGTH = 16k - ram2(rwx) : ORIGIN = 0x20004000, LENGTH = 16k -} - -/* These force the linker to search for particular symbols from - * the start of the link process and thus ensure the user's - * overrides are picked up - */ -EXTERN(__cs3_reset_cortex_m) -EXTERN(__cs3_interrupt_vector_cortex_m) -EXTERN(__cs3_start_c main __cs3_stack __cs3_stack_size __cs3_heap_end) - -PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); -PROVIDE(__cs3_stack_size = __cs3_region_start_ram + __cs3_region_size_ram - _end); -PROVIDE(__cs3_heap_start = _end); -PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); - -SECTIONS -{ - .text : - { - CREATE_OBJECT_SYMBOLS - __cs3_region_start_rom = .; - *(.cs3.region-head.rom) - __cs3_interrupt_vector = __cs3_interrupt_vector_cortex_m; - *(.cs3.interrupt_vector) - /* Make sure we pulled in an interrupt vector. */ - ASSERT (. != __cs3_interrupt_vector_cortex_m, "No interrupt vector"); - *(.rom) - *(.rom.b) - - __cs3_reset = __cs3_reset_cortex_m; - *(.cs3.reset) - /* Make sure we pulled in some reset code. */ - ASSERT (. != __cs3_reset, "No reset code"); - - *(.text .text.* .gnu.linkonce.t.*) - *(.plt) - *(.gnu.warning) - *(.glue_7t) *(.glue_7) *(.vfp11_veneer) - - *(.rodata .rodata.* .gnu.linkonce.r.*) - - *(.ARM.extab* .gnu.linkonce.armextab.*) - *(.gcc_except_table) - *(.eh_frame_hdr) - *(.eh_frame) - - . = ALIGN(4); - KEEP(*(.init)) - - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - - . = ALIGN(4); - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - - . = ALIGN(0x4); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*crtend.o(.ctors)) - - . = ALIGN(4); - KEEP(*(.fini)) - - . = ALIGN(4); - __fini_array_start = .; - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - __fini_array_end = .; - - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*crtend.o(.dtors)) - - . = ALIGN(4); - __cs3_regions = .; - LONG (0) - LONG (__cs3_region_init_ram) - LONG (__cs3_region_start_ram) - LONG (__cs3_region_init_size_ram) - LONG (__cs3_region_zero_size_ram) - } - - /* .ARM.exidx is sorted, so has to go in its own output section. */ - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } >rom - __exidx_end = .; - .text.align : - { - . = ALIGN(8); - _etext = .; - } >rom - __cs3_region_size_rom = LENGTH(rom); - __cs3_region_num = 1; - - .data : - { - __cs3_region_start_ram = .; - *(.cs3.region-head.ram) - KEEP(*(.jcr)) - *(.got.plt) *(.got) - *(.shdata) - *(.data .data.* .gnu.linkonce.d.*) - *(.ram) - . = ALIGN (8); - _edata = .; - } >ram AT>rom - .bss : - { - *(.shbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - *(.ram.b) - . = ALIGN (8); - _end = .; - __end = .; - } >ram AT>rom - .heap : - { - *(.heap) - } >ram - .stack (__cs3_stack - __cs3_stack_size) : - { - *(.stack) - } >ram - __cs3_region_init_ram = LOADADDR (.data); - __cs3_region_init_size_ram = _edata - __cs3_region_start_ram; - __cs3_region_zero_size_ram = _end - _edata; - __cs3_region_size_ram = LENGTH(ram); - __cs3_region_num = 1; - - .stab 0 (NOLOAD) : { *(.stab) } - .stabstr 0 (NOLOAD) : { *(.stabstr) } - /* DWARF debug sections. - * Symbols in the DWARF debugging sections are relative to the beginning - * of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - - .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } - .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } - /DISCARD/ : { *(.note.GNU-stack) } -} diff --git a/rules/lpc17XX-arm-none-eabi-gcc/rules.mk b/rules/lpc17XX-arm-none-eabi-gcc/rules.mk deleted file mode 100644 --- a/rules/lpc17XX-arm-none-eabi-gcc/rules.mk +++ /dev/null @@ -1,116 +0,0 @@ -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - -#--------------------------------------------------------------------------------- -# GCC EXECUTABLES -#--------------------------------------------------------------------------------- -LIBUC_PREFIX = arm-none-eabi- -LIBUC_CC = $(LIBUC_PREFIX)gcc -LIBUC_CXX = $(LIBUC_PREFIX)g++ -LIBUC_AR = $(LIBUC_PREFIX)ar -LIBUC_RANLIB = $(LIBUC_PREFIX)ranlib -LIBUC_AS = $(LIBUC_PREFIX)as -LIBUC_LD = $(LIBUC_PREFIX)ld -LIBUC_SIZE = $(LIBUC_PREFIX)size -LIBUC_STRIP = $(LIBUC_PREFIX)strip -s -LIBUC_READELF = $(LIBUC_PREFIX)readelf -LIBUC_OBJCOPY=$(LIBUC_PREFIX)objcopy -LIBUC_OBJDUMP=$(LIBUC_PREFIX)objdump - - - -#--------------------------------------------------------------------------------- -# GCC FLAGS -#--------------------------------------------------------------------------------- -LIBUC_FMCU = -mcpu=cortex-m3 -LIBUC_CFLAGS = $(LIBUC_FMCU) -LIBUC_CFLAGS = --std=gnu99 -fgnu89-inline -mcpu=cortex-m3 -mthumb -LIBUC_CFLAGS += -ffunction-sections -fdata-sections -LIBUC_LDFLAGS = --gc-sections -LIBUC_ODFLAGS = -x --syms -LIBUC_CPFLAGS = -LIBUC_CFLAGS_WARN_ON = -Wall -LIBUC_CFLAGS_WARN_OFF = -w -LIBUC_CFLAGS_RELEASE = -O2 -LIBUC_CFLAGS_DEBUG = -g -LIBUC_CFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g -LIBUC_CFLAGS_STATIC_LIB = -fPIC -LIBUC_CFLAGS_SOFT_FPU = -msoft-float -LIBUC_CFLAGS_HARD_FPU = - -LIBUC_CXXFLAGS = $(LIBUC_FMCU) -LIBUC_CXXFLAGS += -g -gdwarf-2 -LIBUC_CXXFLAGS += -Wextra -Wundef -Wcast-align -mthumb -msoft-float -LIBUC_CXXFLAGS_WARN_ON = -Wall -LIBUC_CXXFLAGS_WARN_OFF = -w -LIBUC_CXXFLAGS_RELEASE = -O2 -LIBUC_CXXFLAGS_DEBUG = -g -LIBUC_CXXFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g -LIBUC_CXXFLAGS_STATIC_LIB = -fPIC -LIBUC_CXXFLAGS_SOFT_FPU = -msoft-float -LIBUC_CXXFLAGS_HARD_FPU = - -#--------------------------------------------------------------------------------- -# LIBRARY DEFINITIONS -#--------------------------------------------------------------------------------- - -LIBUC_LIBS_DIR = $(LIBUC)/lib/bin/$(ARCH) -LIBUC_INC_DIR = $(LIBUC)/lib/includes -include $(LIBUC)/rules/common/libsrules.mk - -#--------------------------------------------------------------------------------- -# BOARD SUPORT PACKAGES -#--------------------------------------------------------------------------------- -LIBUC_BSP_DIR=$(LIBUC)/bsp -LIBUC_BSP_BIN_DIR= $(LIBUC_BSP_DIR)/bin -LIBUC_BSP_INC_DIR= $(LIBUC_BSP_DIR)/includes -LIBUC_BSP = -L $(LIBUC_BSP_BIN_DIR)/$(BSP) -static -lbsp -LIBUC_BSP_INC = -I $(LIBUC_BSP_INC_DIR)/$(BSP) -#--------------------------------------------------------------------------------- -# DEVICE SPECIAL FILES -#--------------------------------------------------------------------------------- -LINKER_SCRIPT = $(ARCHFOLDER)/LPC17xx.ld -LPC17XX_INCDIR = $(ARCHFOLDER) - - -INCLUDES = $(LPC17XX_INCDIR) -I $(LIBUC_INC_DIR) $(LIBUC_INCLUDES) $(LIBUC_BSP_INC) -CFLAGS = $(LIBUC_CFLAGS) - -SOURCES += syscalls.c -SOURCES += startup_LPC17xx.s - -APPOBJECTFILES += $(OBJDIR)/syscalls.o -APPOBJECTFILES += $(OBJDIR)/startup_LPC17xx.o -#--------------------------------------------------------------------------------- -# RULES -#--------------------------------------------------------------------------------- - -first: all - -$(OBJDIR)/syscalls.o: $(ARCHFOLDER)/syscalls.c $(OBJDIR) - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - - -$(OBJDIR)/startup_LPC17xx.o: $(ARCHFOLDER)/startup_LPC17xx.s $(OBJDIR) - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - - diff --git a/rules/lpc17XX-arm-none-eabi-gcc/startup_LPC17xx.s b/rules/lpc17XX-arm-none-eabi-gcc/startup_LPC17xx.s deleted file mode 100644 --- a/rules/lpc17XX-arm-none-eabi-gcc/startup_LPC17xx.s +++ /dev/null @@ -1,248 +0,0 @@ -/*****************************************************************************/ -/* startup_LPC17xx.s: Startup file for LPC17xx device series */ -/*****************************************************************************/ -/* Version: CodeSourcery Sourcery G++ Lite (with CS3) */ -/*****************************************************************************/ - - -/* -//*** <<< Use Configuration Wizard in Context Menu >>> *** -*/ - - -/* -// Stack Configuration -// Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -// -*/ - - .equ Stack_Size, 0x00000100 - .section ".stack", "w" - .align 3 - .globl __cs3_stack_mem - .globl __cs3_stack_size -__cs3_stack_mem: - .if Stack_Size - .space Stack_Size - .endif - .size __cs3_stack_mem, . - __cs3_stack_mem - .set __cs3_stack_size, . - __cs3_stack_mem - - -/* -// Heap Configuration -// Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -// -*/ - - .equ Heap_Size, 0x00001000 - - .section ".heap", "w" - .align 3 - .globl __cs3_heap_start - .globl __cs3_heap_end -__cs3_heap_start: - .if Heap_Size - .space Heap_Size - .endif -__cs3_heap_end: - - -/* Vector Table */ - - .section ".cs3.interrupt_vector" - .globl __cs3_interrupt_vector_cortex_m - .type __cs3_interrupt_vector_cortex_m, %object - -__cs3_interrupt_vector_cortex_m: - .long __cs3_stack /* Top of Stack */ - .long __cs3_reset /* Reset Handler */ - .long NMI_Handler /* NMI Handler */ - .long HardFault_Handler /* Hard Fault Handler */ - .long MemManage_Handler /* MPU Fault Handler */ - .long BusFault_Handler /* Bus Fault Handler */ - .long UsageFault_Handler /* Usage Fault Handler */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long SVC_Handler /* SVCall Handler */ - .long DebugMon_Handler /* Debug Monitor Handler */ - .long 0 /* Reserved */ - .long PendSV_Handler /* PendSV Handler */ - .long SysTick_Handler /* SysTick Handler */ - - /* External Interrupts */ - .long WDT_IRQHandler /* 16: Watchdog Timer */ - .long TIMER0_IRQHandler /* 17: Timer0 */ - .long TIMER1_IRQHandler /* 18: Timer1 */ - .long TIMER2_IRQHandler /* 19: Timer2 */ - .long TIMER3_IRQHandler /* 20: Timer3 */ - .long UART0_IRQHandler /* 21: UART0 */ - .long UART1_IRQHandler /* 22: UART1 */ - .long UART2_IRQHandler /* 23: UART2 */ - .long UART3_IRQHandler /* 24: UART3 */ - .long PWM1_IRQHandler /* 25: PWM1 */ - .long I2C0_IRQHandler /* 26: I2C0 */ - .long I2C1_IRQHandler /* 27: I2C1 */ - .long I2C2_IRQHandler /* 28: I2C2 */ - .long SPI_IRQHandler /* 29: SPI */ - .long SSP0_IRQHandler /* 30: SSP0 */ - .long SSP1_IRQHandler /* 31: SSP1 */ - .long PLL0_IRQHandler /* 32: PLL0 Lock (Main PLL) */ - .long RTC_IRQHandler /* 33: Real Time Clock */ - .long EINT0_IRQHandler /* 34: External Interrupt 0 */ - .long EINT1_IRQHandler /* 35: External Interrupt 1 */ - .long EINT2_IRQHandler /* 36: External Interrupt 2 */ - .long EINT3_IRQHandler /* 37: External Interrupt 3 */ - .long ADC_IRQHandler /* 38: A/D Converter */ - .long BOD_IRQHandler /* 39: Brown-Out Detect */ - .long USB_IRQHandler /* 40: USB */ - .long CAN_IRQHandler /* 41: CAN */ - .long DMA_IRQHandler /* 42: General Purpose DMA */ - .long I2S_IRQHandler /* 43: I2S */ - .long ENET_IRQHandler /* 44: Ethernet */ - .long RIT_IRQHandler /* 45: Repetitive Interrupt Timer */ - .long MCPWM_IRQHandler /* 46: Motor Control PWM */ - .long QEI_IRQHandler /* 47: Quadrature Encoder Interface */ - .long PLL1_IRQHandler /* 48: PLL1 Lock (USB PLL) */ - .long USBActivity_IRQHandler /* 49: USB Activity */ - .long CANActivity_IRQHandler /* 50: CAN Activity */ - - .size __cs3_interrupt_vector_cortex_m, . - __cs3_interrupt_vector_cortex_m - - - .thumb - - -/* Reset Handler */ - - .section .cs3.reset,"x",%progbits - .thumb_func - .globl __cs3_reset_cortex_m - .type __cs3_reset_cortex_m, %function -__cs3_reset_cortex_m: - .fnstart - LDR R0, =SystemInit - BLX R0 -.if (RAM_MODE) - LDR R0,=main - BX R0 -.else - LDR R0,=_start - BX R0 -.endif - .pool - .cantunwind - .fnend - .size __cs3_reset_cortex_m,.-__cs3_reset_cortex_m - - .section ".text" - -/* Exception Handlers */ - - .weak NMI_Handler - .type NMI_Handler, %function -NMI_Handler: - B . - .size NMI_Handler, . - NMI_Handler - - .weak HardFault_Handler - .type HardFault_Handler, %function -HardFault_Handler: - B . - .size HardFault_Handler, . - HardFault_Handler - - .weak MemManage_Handler - .type MemManage_Handler, %function -MemManage_Handler: - B . - .size MemManage_Handler, . - MemManage_Handler - - .weak BusFault_Handler - .type BusFault_Handler, %function -BusFault_Handler: - B . - .size BusFault_Handler, . - BusFault_Handler - - .weak UsageFault_Handler - .type UsageFault_Handler, %function -UsageFault_Handler: - B . - .size UsageFault_Handler, . - UsageFault_Handler - - .weak SVC_Handler - .type SVC_Handler, %function -SVC_Handler: - B . - .size SVC_Handler, . - SVC_Handler - - .weak DebugMon_Handler - .type DebugMon_Handler, %function -DebugMon_Handler: - B . - .size DebugMon_Handler, . - DebugMon_Handler - - .weak PendSV_Handler - .type PendSV_Handler, %function -PendSV_Handler: - B . - .size PendSV_Handler, . - PendSV_Handler - - .weak SysTick_Handler - .type SysTick_Handler, %function -SysTick_Handler: - B . - .size SysTick_Handler, . - SysTick_Handler - - -/* IRQ Handlers */ - - .globl Default_Handler - .type Default_Handler, %function -Default_Handler: - B . - .size Default_Handler, . - Default_Handler - - .macro IRQ handler - .weak \handler - .set \handler, Default_Handler - .endm - - IRQ WDT_IRQHandler - IRQ TIMER0_IRQHandler - IRQ TIMER1_IRQHandler - IRQ TIMER2_IRQHandler - IRQ TIMER3_IRQHandler - IRQ UART0_IRQHandler - IRQ UART1_IRQHandler - IRQ UART2_IRQHandler - IRQ UART3_IRQHandler - IRQ PWM1_IRQHandler - IRQ I2C0_IRQHandler - IRQ I2C1_IRQHandler - IRQ I2C2_IRQHandler - IRQ SPI_IRQHandler - IRQ SSP0_IRQHandler - IRQ SSP1_IRQHandler - IRQ PLL0_IRQHandler - IRQ RTC_IRQHandler - IRQ EINT0_IRQHandler - IRQ EINT1_IRQHandler - IRQ EINT2_IRQHandler - IRQ EINT3_IRQHandler - IRQ ADC_IRQHandler - IRQ BOD_IRQHandler - IRQ USB_IRQHandler - IRQ CAN_IRQHandler - IRQ DMA_IRQHandler - IRQ I2S_IRQHandler - IRQ ENET_IRQHandler - IRQ RIT_IRQHandler - IRQ MCPWM_IRQHandler - IRQ QEI_IRQHandler - IRQ PLL1_IRQHandler - IRQ USBActivity_IRQHandler - IRQ CANActivity_IRQHandler - - .end diff --git a/rules/lpc21XX-arm-elf-gcc/LPC2378-RAM.ld b/rules/lpc21XX-arm-elf-gcc/LPC2378-RAM.ld deleted file mode 100644 --- a/rules/lpc21XX-arm-elf-gcc/LPC2378-RAM.ld +++ /dev/null @@ -1,127 +0,0 @@ -/***********************************************************************/ -/* */ -/* RAM.ld: Linker Script File */ -/* */ -/***********************************************************************/ - -ENTRY(_start) -STACK_SIZE = 0x800; - -/* Memory Definitions */ -/* lpc2378 mt */ -MEMORY -{ - ROM (rx) : ORIGIN = 0x00000000, LENGTH = 512K - RAM (rw) : ORIGIN = 0x40000000, LENGTH = 32K -} - -/* Section Definitions */ -SECTIONS -{ - /* first section is .text which is used for code */ - .text : - { - *crt0.o (.text) /* Startup code */ - *(.text) /* remaining code */ - *(.rodata) /* read-only data (constants) */ - *(.rodata*) - *(.glue_7) - *(.glue_7t) - } > RAM - - . = ALIGN(4); - - /* .ctors .dtors are used for c++ constructors/destructors */ - /* added by Martin Thomas 4/2005 based on Anglia Design example */ - .ctors : - { - PROVIDE(__ctors_start__ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(__ctors_end__ = .); - } >RAM - - .dtors : - { - PROVIDE(__dtors_start__ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(__dtors_end__ = .); - } >RAM - - . = ALIGN(4); - /* mthomas - end */ - - _etext = . ; - PROVIDE (etext = .); - - /* .data section which is used for initialized data */ - .data : - { - _data = .; - *(.data) - } > RAM - - . = ALIGN(4); - _edata = . ; - PROVIDE (edata = .); - - /* .bss section which is used for uninitialized data */ - .bss (NOLOAD) : - { - __bss_start = . ; - __bss_start__ = . ; - *(.bss) - *(COMMON) - . = ALIGN(4); - } > RAM - - . = ALIGN(4); - __bss_end__ = . ; - PROVIDE (__bss_end = .); - - /* .stack ALIGN(256) : */ - .stack : - { - . = ALIGN(256); - . += STACK_SIZE; - PROVIDE (_stack = .); - } > RAM - - _end = . ; - PROVIDE (end = .); - - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to the beginning - of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } -} diff --git a/rules/lpc21XX-arm-elf-gcc/LPC2378-ROM.ld b/rules/lpc21XX-arm-elf-gcc/LPC2378-ROM.ld deleted file mode 100644 --- a/rules/lpc21XX-arm-elf-gcc/LPC2378-ROM.ld +++ /dev/null @@ -1,128 +0,0 @@ -/***********************************************************************/ -/* */ -/* ROM.ld: Linker Script File */ -/* */ -/***********************************************************************/ -ENTRY(_boot) -STACK_SIZE = 0x400; - -/* Memory Definitions */ -/* lpc2378 mt */ -MEMORY -{ - ROM (rx) : ORIGIN = 0x00000000, LENGTH = 500K - RAM (rw) : ORIGIN = 0x40000000, LENGTH = (0x00008000 - 0x00000400 - 0x20 - 0x100) -} - -/* Section Definitions */ -SECTIONS -{ - /* first section is .text which is used for code */ - .text : - { - *crt0.o (.text) /* Startup code */ - *(.text) /* remaining code */ - *(.rodata) /* read-only data (constants) */ - *(.rodata*) - *(.glue_7) - *(.glue_7t) - } > ROM - - . = ALIGN(4); - - /* .ctors .dtors are used for c++ constructors/destructors */ - /* added by Martin Thomas 4/2005 based on Anglia Design example */ - .ctors : - { - PROVIDE(__ctors_start__ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(__ctors_end__ = .); - } >ROM - - .dtors : - { - PROVIDE(__dtors_start__ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(__dtors_end__ = .); - } >ROM - - . = ALIGN(4); - /* mthomas - end */ - - - _etext = . ; - PROVIDE (etext = .); - - /* .data section which is used for initialized data */ - .data : AT (_etext) - { - _data = .; - *(.data) - SORT(CONSTRUCTORS) /* mt 4/2005 */ - } > RAM - - . = ALIGN(4); - _edata = . ; - PROVIDE (edata = .); - - /* .bss section which is used for uninitialized data */ - .bss (NOLOAD) : - { - __bss_start = . ; - __bss_start__ = . ; - *(.bss) - *(COMMON) - . = ALIGN(4); - } > RAM - - . = ALIGN(4); - __bss_end__ = . ; - PROVIDE (__bss_end = .); - - /* .stack ALIGN(256) : */ - .stack : - { - . = ALIGN(256); - . += STACK_SIZE; - PROVIDE (_stack = .); - } > RAM - - _end = . ; - PROVIDE (end = .); - - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to the beginning - of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } -} diff --git a/rules/lpc21XX-arm-elf-gcc/LPC23xx.h b/rules/lpc21XX-arm-elf-gcc/LPC23xx.h deleted file mode 100644 --- a/rules/lpc21XX-arm-elf-gcc/LPC23xx.h +++ /dev/null @@ -1,1138 +0,0 @@ -/***************************************************************************** - * - * Project : lwIP Web - * Subproject : - * Name : LPC23xx.h - * Function : register definitions - * Designer : K. Sterckx - * Creation date : 22/01/2007 - * Compiler : GNU ARM - * Processor : LPC23xx - * Last update : - * Last updated by : - * History : - * - ***************************************************************************** - * - * Hardware specific macro's and defines - * - ****************************************************************************/ - -#ifndef __LPC23xx_H -#define __LPC23xx_H - -/* Vectored Interrupt Controller (VIC) */ -#define VIC_BASE_ADDR 0xFFFFF000 -#define VICIRQStatus (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x000)) -#define VICFIQStatus (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x004)) -#define VICRawIntr (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x008)) -#define VICIntSelect (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x00C)) -#define VICIntEnable (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x010)) -#define VICIntEnClr (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x014)) -#define VICSoftInt (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x018)) -#define VICSoftIntClr (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x01C)) -#define VICProtection (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x020)) -#define VICSWPrioMask (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x024)) - -#define VICVectAddr0 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x100)) -#define VICVectAddr1 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x104)) -#define VICVectAddr2 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x108)) -#define VICVectAddr3 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x10C)) -#define VICVectAddr4 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x110)) -#define VICVectAddr5 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x114)) -#define VICVectAddr6 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x118)) -#define VICVectAddr7 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x11C)) -#define VICVectAddr8 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x120)) -#define VICVectAddr9 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x124)) -#define VICVectAddr10 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x128)) -#define VICVectAddr11 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x12C)) -#define VICVectAddr12 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x130)) -#define VICVectAddr13 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x134)) -#define VICVectAddr14 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x138)) -#define VICVectAddr15 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x13C)) -#define VICVectAddr16 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x140)) -#define VICVectAddr17 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x144)) -#define VICVectAddr18 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x148)) -#define VICVectAddr19 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x14C)) -#define VICVectAddr20 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x150)) -#define VICVectAddr21 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x154)) -#define VICVectAddr22 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x158)) -#define VICVectAddr23 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x15C)) -#define VICVectAddr24 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x160)) -#define VICVectAddr25 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x164)) -#define VICVectAddr26 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x168)) -#define VICVectAddr27 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x16C)) -#define VICVectAddr28 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x170)) -#define VICVectAddr29 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x174)) -#define VICVectAddr30 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x178)) -#define VICVectAddr31 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x17C)) - -/* The name convention below is from previous LPC2000 family MCUs, in LPC230x, -these registers are known as "VICVectPriority(x)". */ -#define VICVectCntl0 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x200)) -#define VICVectCntl1 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x204)) -#define VICVectCntl2 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x208)) -#define VICVectCntl3 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x20C)) -#define VICVectCntl4 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x210)) -#define VICVectCntl5 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x214)) -#define VICVectCntl6 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x218)) -#define VICVectCntl7 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x21C)) -#define VICVectCntl8 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x220)) -#define VICVectCntl9 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x224)) -#define VICVectCntl10 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x228)) -#define VICVectCntl11 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x22C)) -#define VICVectCntl12 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x230)) -#define VICVectCntl13 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x234)) -#define VICVectCntl14 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x238)) -#define VICVectCntl15 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x23C)) -#define VICVectCntl16 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x240)) -#define VICVectCntl17 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x244)) -#define VICVectCntl18 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x248)) -#define VICVectCntl19 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x24C)) -#define VICVectCntl20 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x250)) -#define VICVectCntl21 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x254)) -#define VICVectCntl22 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x258)) -#define VICVectCntl23 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x25C)) -#define VICVectCntl24 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x260)) -#define VICVectCntl25 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x264)) -#define VICVectCntl26 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x268)) -#define VICVectCntl27 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x26C)) -#define VICVectCntl28 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x270)) -#define VICVectCntl29 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x274)) -#define VICVectCntl30 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x278)) -#define VICVectCntl31 (*(volatile unsigned int *)(VIC_BASE_ADDR + 0x27C)) - -#define VICVectAddr (*(volatile unsigned int *)(VIC_BASE_ADDR + 0xF00)) - - -/* Pin Connect Block */ -#define PINSEL_BASE_ADDR 0xE002C000 -#define PINSEL0 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x00)) -#define PINSEL1 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x04)) -#define PINSEL2 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x08)) -#define PINSEL3 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x0C)) -#define PINSEL4 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x10)) -#define PINSEL5 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x14)) -#define PINSEL6 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x18)) -#define PINSEL7 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x1C)) -#define PINSEL8 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x20)) -#define PINSEL9 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x24)) -#define PINSEL10 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x28)) - -#define PINMODE0 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x40)) -#define PINMODE1 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x44)) -#define PINMODE2 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x48)) -#define PINMODE3 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x4C)) -#define PINMODE4 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x50)) -#define PINMODE5 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x54)) -#define PINMODE6 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x58)) -#define PINMODE7 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x5C)) -#define PINMODE8 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x60)) -#define PINMODE9 (*(volatile unsigned int *)(PINSEL_BASE_ADDR + 0x64)) - -/* General Purpose Input/Output (GPIO) */ -#define GPIO_BASE_ADDR 0xE0028000 -#define IOPIN0 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x00)) -#define IOSET0 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x04)) -#define IODIR0 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x08)) -#define IOCLR0 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x0C)) -#define IOPIN1 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x10)) -#define IOSET1 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x14)) -#define IODIR1 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x18)) -#define IOCLR1 (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x1C)) - -/* GPIO Interrupt Registers */ -#define IO0_INT_EN_R (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x90)) -#define IO0_INT_EN_F (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x94)) -#define IO0_INT_STAT_R (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x84)) -#define IO0_INT_STAT_F (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x88)) -#define IO0_INT_CLR (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x8C)) - -#define IO2_INT_EN_R (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xB0)) -#define IO2_INT_EN_F (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xB4)) -#define IO2_INT_STAT_R (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xA4)) -#define IO2_INT_STAT_F (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xA8)) -#define IO2_INT_CLR (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0xAC)) - -#define IO_INT_STAT (*(volatile unsigned int *)(GPIO_BASE_ADDR + 0x80)) - -#define PARTCFG_BASE_ADDR 0x3FFF8000 -#define PARTCFG (*(volatile unsigned int *)(PARTCFG_BASE_ADDR + 0x00)) - -/* Fast I/O setup */ -#define FIO_BASE_ADDR 0x3FFFC000 -#define FIO0DIR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x00)) -#define FIO0MASK (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x10)) -#define FIO0PIN (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x14)) -#define FIO0SET (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x18)) -#define FIO0CLR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x1C)) - -#define FIO1DIR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x20)) -#define FIO1MASK (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x30)) -#define FIO1PIN (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x34)) -#define FIO1SET (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x38)) -#define FIO1CLR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x3C)) - -#define FIO2DIR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x40)) -#define FIO2MASK (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x50)) -#define FIO2PIN (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x54)) -#define FIO2SET (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x58)) -#define FIO2CLR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x5C)) - -#define FIO3DIR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x60)) -#define FIO3MASK (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x70)) -#define FIO3PIN (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x74)) -#define FIO3SET (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x78)) -#define FIO3CLR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x7C)) - -#define FIO4DIR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x80)) -#define FIO4MASK (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x90)) -#define FIO4PIN (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x94)) -#define FIO4SET (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x98)) -#define FIO4CLR (*(volatile unsigned int *)(FIO_BASE_ADDR + 0x9C)) - -/* FIOs can be accessed through WORD, HALF-WORD or BYTE. */ -#define FIO0DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x01)) -#define FIO1DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21)) -#define FIO2DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x41)) -#define FIO3DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x61)) -#define FIO4DIR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x81)) - -#define FIO0DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x02)) -#define FIO1DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x22)) -#define FIO2DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x42)) -#define FIO3DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x62)) -#define FIO4DIR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x82)) - -#define FIO0DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x03)) -#define FIO1DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x23)) -#define FIO2DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x43)) -#define FIO3DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x63)) -#define FIO4DIR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x83)) - -#define FIO0DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x04)) -#define FIO1DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x24)) -#define FIO2DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x44)) -#define FIO3DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x64)) -#define FIO4DIR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x84)) - -#define FIO0DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x00)) -#define FIO1DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x20)) -#define FIO2DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x40)) -#define FIO3DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x60)) -#define FIO4DIRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x80)) - -#define FIO0DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x02)) -#define FIO1DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x22)) -#define FIO2DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x42)) -#define FIO3DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x62)) -#define FIO4DIRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x82)) - -#define FIO0MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x10)) -#define FIO1MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x30)) -#define FIO2MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x50)) -#define FIO3MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x70)) -#define FIO4MASK0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x90)) - -#define FIO0MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x11)) -#define FIO1MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21)) -#define FIO2MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x51)) -#define FIO3MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x71)) -#define FIO4MASK1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x91)) - -#define FIO0MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x12)) -#define FIO1MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x32)) -#define FIO2MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x52)) -#define FIO3MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x72)) -#define FIO4MASK2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x92)) - -#define FIO0MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x13)) -#define FIO1MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x33)) -#define FIO2MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x53)) -#define FIO3MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x73)) -#define FIO4MASK3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x93)) - -#define FIO0MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x10)) -#define FIO1MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x30)) -#define FIO2MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x50)) -#define FIO3MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x70)) -#define FIO4MASKL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x90)) - -#define FIO0MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x12)) -#define FIO1MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x32)) -#define FIO2MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x52)) -#define FIO3MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x72)) -#define FIO4MASKU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x92)) - -#define FIO0PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x14)) -#define FIO1PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x34)) -#define FIO2PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x54)) -#define FIO3PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x74)) -#define FIO4PIN0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x94)) - -#define FIO0PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x15)) -#define FIO1PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x25)) -#define FIO2PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x55)) -#define FIO3PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x75)) -#define FIO4PIN1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x95)) - -#define FIO0PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x16)) -#define FIO1PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x36)) -#define FIO2PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x56)) -#define FIO3PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x76)) -#define FIO4PIN2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x96)) - -#define FIO0PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x17)) -#define FIO1PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x37)) -#define FIO2PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x57)) -#define FIO3PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x77)) -#define FIO4PIN3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x97)) - -#define FIO0PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x14)) -#define FIO1PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x34)) -#define FIO2PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x54)) -#define FIO3PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x74)) -#define FIO4PINL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x94)) - -#define FIO0PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x16)) -#define FIO1PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x36)) -#define FIO2PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x56)) -#define FIO3PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x76)) -#define FIO4PINU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x96)) - -#define FIO0SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x18)) -#define FIO1SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x38)) -#define FIO2SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x58)) -#define FIO3SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x78)) -#define FIO4SET0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x98)) - -#define FIO0SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x19)) -#define FIO1SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x29)) -#define FIO2SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x59)) -#define FIO3SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x79)) -#define FIO4SET1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x99)) - -#define FIO0SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1A)) -#define FIO1SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3A)) -#define FIO2SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5A)) -#define FIO3SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7A)) -#define FIO4SET2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9A)) - -#define FIO0SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1B)) -#define FIO1SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3B)) -#define FIO2SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5B)) -#define FIO3SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7B)) -#define FIO4SET3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9B)) - -#define FIO0SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x18)) -#define FIO1SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x38)) -#define FIO2SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x58)) -#define FIO3SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x78)) -#define FIO4SETL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x98)) - -#define FIO0SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1A)) -#define FIO1SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3A)) -#define FIO2SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5A)) -#define FIO3SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7A)) -#define FIO4SETU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9A)) - -#define FIO0CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1C)) -#define FIO1CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3C)) -#define FIO2CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5C)) -#define FIO3CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7C)) -#define FIO4CLR0 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9C)) - -#define FIO0CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1D)) -#define FIO1CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x2D)) -#define FIO2CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5D)) -#define FIO3CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7D)) -#define FIO4CLR1 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9D)) - -#define FIO0CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1E)) -#define FIO1CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3E)) -#define FIO2CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5E)) -#define FIO3CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7E)) -#define FIO4CLR2 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9E)) - -#define FIO0CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1F)) -#define FIO1CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3F)) -#define FIO2CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5F)) -#define FIO3CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7F)) -#define FIO4CLR3 (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9F)) - -#define FIO0CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1C)) -#define FIO1CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3C)) -#define FIO2CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5C)) -#define FIO3CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7C)) -#define FIO4CLRL (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9C)) - -#define FIO0CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1E)) -#define FIO1CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3E)) -#define FIO2CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5E)) -#define FIO3CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7E)) -#define FIO4CLRU (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9E)) - - -/* System Control Block(SCB) modules include Memory Accelerator Module, -Phase Locked Loop, VPB divider, Power Control, External Interrupt, -Reset, and Code Security/Debugging */ -#define SCB_BASE_ADDR 0xE01FC000 - -/* Memory Accelerator Module (MAM) */ -#define MAMCR (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x000)) -#define MAMTIM (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x004)) -#define MEMMAP (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x040)) - -/* Phase Locked Loop (PLL) */ -#define PLLCON (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x080)) -#define PLLCFG (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x084)) -#define PLLSTAT (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x088)) -#define PLLFEED (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x08C)) - -/* Power Control */ -#define PCON (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x0C0)) -#define PCONP (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x0C4)) - -/* Clock Divider */ -#define APBDIV (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x100)) -#define CCLKCFG (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x104)) -#define USBCLKCFG (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x108)) -#define CLKSRCSEL (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x10C)) -#define PCLKSEL0 (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x1A8)) -#define PCLKSEL1 (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x1AC)) - -/* External Interrupts */ -#define EXTINT (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x140)) -#define INTWAKE (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x144)) -#define EXTMODE (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x148)) -#define EXTPOLAR (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x14C)) - -/* Reset, reset source identification */ -#define RSIR (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x180)) - -/* RSID, code security protection */ -#define CSPR (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x184)) - -/* AHB configuration */ -#define AHBCFG1 (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x188)) -#define AHBCFG2 (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x18C)) - -/* System Controls and Status */ -#define SCS (*(volatile unsigned int *)(SCB_BASE_ADDR + 0x1A0)) - -/*MPMC(EMC) registers*/ -#define STATIC_MEM0_BASE 0x80000000 -#define STATIC_MEM1_BASE 0x81000000 -#define STATIC_MEM2_BASE 0x82000000 -#define STATIC_MEM3_BASE 0x83000000 - -#define DYNAMIC_MEM0_BASE 0xA0000000 -#define DYNAMIC_MEM1_BASE 0xB0000000 -#define DYNAMIC_MEM2_BASE 0xC0000000 -#define DYNAMIC_MEM3_BASE 0xD0000000 - -/* External Memory Controller (EMC) */ -#define EMC_BASE_ADDR 0xFFE08000 -#define EMC_CTRL (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x000)) -#define EMC_STAT (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x004)) -#define EMC_CONFIG (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x008)) - -/* Dynamic RAM access registers */ -#define EMC_DYN_CTRL (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x020)) -#define EMC_DYN_RFSH (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x024)) -#define EMC_DYN_RD_CFG (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x028)) -#define EMC_DYN_RP (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x030)) -#define EMC_DYN_RAS (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x034)) -#define EMC_DYN_SREX (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x038)) -#define EMC_DYN_APR (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x03C)) -#define EMC_DYN_DAL (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x040)) -#define EMC_DYN_WR (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x044)) -#define EMC_DYN_RC (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x048)) -#define EMC_DYN_RFC (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x04C)) -#define EMC_DYN_XSR (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x050)) -#define EMC_DYN_RRD (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x054)) -#define EMC_DYN_MRD (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x058)) - -#define EMC_DYN_CFG0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x100)) -#define EMC_DYN_RASCAS0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x104)) -#define EMC_DYN_CFG1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x140)) -#define EMC_DYN_RASCAS1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x144)) -#define EMC_DYN_CFG2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x160)) -#define EMC_DYN_RASCAS2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x164)) -#define EMC_DYN_CFG3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x180)) -#define EMC_DYN_RASCAS3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x184)) - -/* static RAM access registers */ -#define EMC_STA_CFG0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x200)) -#define EMC_STA_WAITWEN0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x204)) -#define EMC_STA_WAITOEN0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x208)) -#define EMC_STA_WAITRD0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x20C)) -#define EMC_STA_WAITPAGE0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x210)) -#define EMC_STA_WAITWR0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x214)) -#define EMC_STA_WAITTURN0 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x218)) - -#define EMC_STA_CFG1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x220)) -#define EMC_STA_WAITWEN1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x224)) -#define EMC_STA_WAITOEN1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x228)) -#define EMC_STA_WAITRD1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x22C)) -#define EMC_STA_WAITPAGE1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x230)) -#define EMC_STA_WAITWR1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x234)) -#define EMC_STA_WAITTURN1 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x238)) - -#define EMC_STA_CFG2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x240)) -#define EMC_STA_WAITWEN2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x244)) -#define EMC_STA_WAITOEN2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x248)) -#define EMC_STA_WAITRD2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x24C)) -#define EMC_STA_WAITPAGE2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x250)) -#define EMC_STA_WAITWR2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x254)) -#define EMC_STA_WAITTURN2 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x258)) - -#define EMC_STA_CFG3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x260)) -#define EMC_STA_WAITWEN3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x264)) -#define EMC_STA_WAITOEN3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x268)) -#define EMC_STA_WAITRD3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x26C)) -#define EMC_STA_WAITPAGE3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x270)) -#define EMC_STA_WAITWR3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x274)) -#define EMC_STA_WAITTURN3 (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x278)) - -#define EMC_STA_EXT_WAIT (*(volatile unsigned int *)(EMC_BASE_ADDR + 0x880)) - - -/* Timer 0 */ -#define TMR0_BASE_ADDR 0xE0004000 -#define T0IR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x00)) -#define T0TCR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x04)) -#define T0TC (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x08)) -#define T0PR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x0C)) -#define T0PC (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x10)) -#define T0MCR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x14)) -#define T0MR0 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x18)) -#define T0MR1 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x1C)) -#define T0MR2 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x20)) -#define T0MR3 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x24)) -#define T0CCR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x28)) -#define T0CR0 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x2C)) -#define T0CR1 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x30)) -#define T0CR2 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x34)) -#define T0CR3 (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x38)) -#define T0EMR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x3C)) -#define T0CTCR (*(volatile unsigned int *)(TMR0_BASE_ADDR + 0x70)) - -/* Timer 1 */ -#define TMR1_BASE_ADDR 0xE0008000 -#define T1IR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x00)) -#define T1TCR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x04)) -#define T1TC (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x08)) -#define T1PR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x0C)) -#define T1PC (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x10)) -#define T1MCR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x14)) -#define T1MR0 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x18)) -#define T1MR1 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x1C)) -#define T1MR2 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x20)) -#define T1MR3 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x24)) -#define T1CCR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x28)) -#define T1CR0 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x2C)) -#define T1CR1 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x30)) -#define T1CR2 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x34)) -#define T1CR3 (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x38)) -#define T1EMR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x3C)) -#define T1CTCR (*(volatile unsigned int *)(TMR1_BASE_ADDR + 0x70)) - -/* Timer 2 */ -#define TMR2_BASE_ADDR 0xE0070000 -#define T2IR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x00)) -#define T2TCR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x04)) -#define T2TC (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x08)) -#define T2PR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x0C)) -#define T2PC (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x10)) -#define T2MCR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x14)) -#define T2MR0 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x18)) -#define T2MR1 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x1C)) -#define T2MR2 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x20)) -#define T2MR3 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x24)) -#define T2CCR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x28)) -#define T2CR0 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x2C)) -#define T2CR1 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x30)) -#define T2CR2 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x34)) -#define T2CR3 (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x38)) -#define T2EMR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x3C)) -#define T2CTCR (*(volatile unsigned int *)(TMR2_BASE_ADDR + 0x70)) - -/* Timer 3 */ -#define TMR3_BASE_ADDR 0xE0074000 -#define T3IR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x00)) -#define T3TCR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x04)) -#define T3TC (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x08)) -#define T3PR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x0C)) -#define T3PC (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x10)) -#define T3MCR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x14)) -#define T3MR0 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x18)) -#define T3MR1 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x1C)) -#define T3MR2 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x20)) -#define T3MR3 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x24)) -#define T3CCR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x28)) -#define T3CR0 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x2C)) -#define T3CR1 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x30)) -#define T3CR2 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x34)) -#define T3CR3 (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x38)) -#define T3EMR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x3C)) -#define T3CTCR (*(volatile unsigned int *)(TMR3_BASE_ADDR + 0x70)) - - -/* Pulse Width Modulator (PWM) */ -#define PWM0_BASE_ADDR 0xE0014000 -#define PWM0IR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x00)) -#define PWM0TCR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x04)) -#define PWM0TC (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x08)) -#define PWM0PR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x0C)) -#define PWM0PC (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x10)) -#define PWM0MCR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x14)) -#define PWM0MR0 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x18)) -#define PWM0MR1 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x1C)) -#define PWM0MR2 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x20)) -#define PWM0MR3 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x24)) -#define PWM0CCR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x28)) -#define PWM0CR0 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x2C)) -#define PWM0CR1 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x30)) -#define PWM0CR2 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x34)) -#define PWM0CR3 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x38)) -#define PWM0EMR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x3C)) -#define PWM0MR4 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x40)) -#define PWM0MR5 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x44)) -#define PWM0MR6 (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x48)) -#define PWM0PCR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x4C)) -#define PWM0LER (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x50)) -#define PWM0CTCR (*(volatile unsigned int *)(PWM0_BASE_ADDR + 0x70)) - -#define PWM1_BASE_ADDR 0xE0018000 -#define PWM1IR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x00)) -#define PWM1TCR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x04)) -#define PWM1TC (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x08)) -#define PWM1PR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x0C)) -#define PWM1PC (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x10)) -#define PWM1MCR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x14)) -#define PWM1MR0 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x18)) -#define PWM1MR1 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x1C)) -#define PWM1MR2 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x20)) -#define PWM1MR3 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x24)) -#define PWM1CCR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x28)) -#define PWM1CR0 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x2C)) -#define PWM1CR1 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x30)) -#define PWM1CR2 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x34)) -#define PWM1CR3 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x38)) -#define PWM1EMR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x3C)) -#define PWM1MR4 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x40)) -#define PWM1MR5 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x44)) -#define PWM1MR6 (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x48)) -#define PWM1PCR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x4C)) -#define PWM1LER (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x50)) -#define PWM1CTCR (*(volatile unsigned int *)(PWM1_BASE_ADDR + 0x70)) - - -/* Universal Asynchronous Receiver Transmitter 0 (UART0) */ -#define UART0_BASE_ADDR 0xE000C000 -#define U0RBR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x00)) -#define U0THR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x00)) -#define U0DLL (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x00)) -#define U0DLM (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x04)) -#define U0IER (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x04)) -#define U0IIR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x08)) -#define U0FCR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x08)) -#define U0LCR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x0C)) -#define U0LSR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x14)) -#define U0SCR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x1C)) -#define U0ACR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x20)) -#define U0ICR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x24)) -#define U0FDR (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x28)) -#define U0TER (*(volatile unsigned int *)(UART0_BASE_ADDR + 0x30)) - -/* Universal Asynchronous Receiver Transmitter 1 (UART1) */ -#define UART1_BASE_ADDR 0xE0010000 -#define U1RBR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x00)) -#define U1THR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x00)) -#define U1DLL (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x00)) -#define U1DLM (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x04)) -#define U1IER (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x04)) -#define U1IIR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x08)) -#define U1FCR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x08)) -#define U1LCR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x0C)) -#define U1MCR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x10)) -#define U1LSR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x14)) -#define U1MSR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x18)) -#define U1SCR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x1C)) -#define U1ACR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x20)) -#define U1FDR (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x28)) -#define U1TER (*(volatile unsigned int *)(UART1_BASE_ADDR + 0x30)) - -/* Universal Asynchronous Receiver Transmitter 2 (UART2) */ -#define UART2_BASE_ADDR 0xE0078000 -#define U2RBR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x00)) -#define U2THR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x00)) -#define U2DLL (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x00)) -#define U2DLM (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x04)) -#define U2IER (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x04)) -#define U2IIR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x08)) -#define U2FCR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x08)) -#define U2LCR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x0C)) -#define U2LSR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x14)) -#define U2SCR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x1C)) -#define U2ACR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x20)) -#define U2ICR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x24)) -#define U2FDR (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x28)) -#define U2TER (*(volatile unsigned int *)(UART2_BASE_ADDR + 0x30)) - -/* Universal Asynchronous Receiver Transmitter 3 (UART3) */ -#define UART3_BASE_ADDR 0xE007C000 -#define U3RBR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x00)) -#define U3THR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x00)) -#define U3DLL (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x00)) -#define U3DLM (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x04)) -#define U3IER (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x04)) -#define U3IIR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x08)) -#define U3FCR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x08)) -#define U3LCR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x0C)) -#define U3LSR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x14)) -#define U3SCR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x1C)) -#define U3ACR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x20)) -#define U3ICR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x24)) -#define U3FDR (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x28)) -#define U3TER (*(volatile unsigned int *)(UART3_BASE_ADDR + 0x30)) - -/* I2C Interface 0 */ -#define I2C0_BASE_ADDR 0xE001C000 -#define I20CONSET (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x00)) -#define I20STAT (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x04)) -#define I20DAT (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x08)) -#define I20ADR (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x0C)) -#define I20SCLH (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x10)) -#define I20SCLL (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x14)) -#define I20CONCLR (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x18)) -//Slightly different naming -#define I2C0CONSET (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x00)) -#define I2C0STAT (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x04)) -#define I2C0DAT (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x08)) -#define I2C0ADR (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x0C)) -#define I2C0SCLH (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x10)) -#define I2C0SCLL (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x14)) -#define I2C0CONCLR (*(volatile unsigned int *)(I2C0_BASE_ADDR + 0x18)) - - -/* I2C Interface 1 */ -#define I2C1_BASE_ADDR 0xE005C000 -#define I21CONSET (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x00)) -#define I21STAT (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x04)) -#define I21DAT (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x08)) -#define I21ADR (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x0C)) -#define I21SCLH (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x10)) -#define I21SCLL (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x14)) -#define I21CONCLR (*(volatile unsigned int *)(I2C1_BASE_ADDR + 0x18)) - -/* I2C Interface 2 */ -#define I2C2_BASE_ADDR 0xE0080000 -#define I22CONSET (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x00)) -#define I22STAT (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x04)) -#define I22DAT (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x08)) -#define I22ADR (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x0C)) -#define I22SCLH (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x10)) -#define I22SCLL (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x14)) -#define I22CONCLR (*(volatile unsigned int *)(I2C2_BASE_ADDR + 0x18)) - -/* SPI0 (Serial Peripheral Interface 0) */ -#define SPI0_BASE_ADDR 0xE0020000 -#define S0SPCR (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x00)) -#define S0SPSR (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x04)) -#define S0SPDR (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x08)) -#define S0SPCCR (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x0C)) -#define S0SPINT (*(volatile unsigned int *)(SPI0_BASE_ADDR + 0x1C)) - -/* SSP0 Controller */ -#define SSP0_BASE_ADDR 0xE0068000 -#define SSP0CR0 (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x00)) -#define SSP0CR1 (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x04)) -#define SSP0DR (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x08)) -#define SSP0SR (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x0C)) -#define SSP0CPSR (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x10)) -#define SSP0IMSC (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x14)) -#define SSP0RIS (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x18)) -#define SSP0MIS (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x1C)) -#define SSP0ICR (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x20)) -#define SSP0DMACR (*(volatile unsigned int *)(SSP0_BASE_ADDR + 0x24)) - -/* SSP1 Controller */ -#define SSP1_BASE_ADDR 0xE0030000 -#define SSP1CR0 (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x00)) -#define SSP1CR1 (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x04)) -#define SSP1DR (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x08)) -#define SSP1SR (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x0C)) -#define SSP1CPSR (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x10)) -#define SSP1IMSC (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x14)) -#define SSP1RIS (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x18)) -#define SSP1MIS (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x1C)) -#define SSP1ICR (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x20)) -#define SSP1DMACR (*(volatile unsigned int *)(SSP1_BASE_ADDR + 0x24)) - - -/* Real Time Clock */ -#define RTC_BASE_ADDR 0xE0024000 -#define RTC_ILR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x00)) -#define RTC_CTC (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x04)) -#define RTC_CCR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x08)) -#define RTC_CIIR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x0C)) -#define RTC_AMR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x10)) -#define RTC_CTIME0 (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x14)) -#define RTC_CTIME1 (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x18)) -#define RTC_CTIME2 (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x1C)) -#define RTC_SEC (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x20)) -#define RTC_MIN (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x24)) -#define RTC_HOUR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x28)) -#define RTC_DOM (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x2C)) -#define RTC_DOW (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x30)) -#define RTC_DOY (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x34)) -#define RTC_MONTH (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x38)) -#define RTC_YEAR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x3C)) -#define RTC_CISS (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x40)) -#define RTC_ALSEC (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x60)) -#define RTC_ALMIN (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x64)) -#define RTC_ALHOUR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x68)) -#define RTC_ALDOM (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x6C)) -#define RTC_ALDOW (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x70)) -#define RTC_ALDOY (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x74)) -#define RTC_ALMON (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x78)) -#define RTC_ALYEAR (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x7C)) -#define RTC_PREINT (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x80)) -#define RTC_PREFRAC (*(volatile unsigned int *)(RTC_BASE_ADDR + 0x84)) - - -/* A/D Converter 0 (AD0) */ -#define AD0_BASE_ADDR 0xE0034000 -#define AD0CR (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x00)) -#define AD0GDR (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x04)) -#define AD0INTEN (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x0C)) -#define AD0DR0 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x10)) -#define AD0DR1 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x14)) -#define AD0DR2 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x18)) -#define AD0DR3 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x1C)) -#define AD0DR4 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x20)) -#define AD0DR5 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x24)) -#define AD0DR6 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x28)) -#define AD0DR7 (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x2C)) -#define AD0STAT (*(volatile unsigned int *)(AD0_BASE_ADDR + 0x30)) - - -/* D/A Converter */ -#define DAC_BASE_ADDR 0xE006C000 -#define DACR (*(volatile unsigned int *)(DAC_BASE_ADDR + 0x00)) - - -/* Watchdog */ -#define WDG_BASE_ADDR 0xE0000000 -#define WDMOD (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x00)) -#define WDTC (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x04)) -#define WDFEED (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x08)) -#define WDTV (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x0C)) -#define WDCLKSEL (*(volatile unsigned int *)(WDG_BASE_ADDR + 0x10)) - -/* CAN CONTROLLERS AND ACCEPTANCE FILTER */ -#define CAN_ACCEPT_BASE_ADDR 0xE003C000 -#define CAN_AFMR (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x00)) -#define CAN_SFF_SA (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x04)) -#define CAN_SFF_GRP_SA (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x08)) -#define CAN_EFF_SA (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x0C)) -#define CAN_EFF_GRP_SA (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x10)) -#define CAN_EOT (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x14)) -#define CAN_LUT_ERR_ADR (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x18)) -#define CAN_LUT_ERR (*(volatile unsigned int *)(CAN_ACCEPT_BASE_ADDR + 0x1C)) - -#define CAN_CENTRAL_BASE_ADDR 0xE0040000 -#define CAN_TX_SR (*(volatile unsigned int *)(CAN_CENTRAL_BASE_ADDR + 0x00)) -#define CAN_RX_SR (*(volatile unsigned int *)(CAN_CENTRAL_BASE_ADDR + 0x04)) -#define CAN_MSR (*(volatile unsigned int *)(CAN_CENTRAL_BASE_ADDR + 0x08)) - -#define CAN1_BASE_ADDR 0xE0044000 -#define CAN1MOD (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x00)) -#define CAN1CMR (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x04)) -#define CAN1GSR (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x08)) -#define CAN1ICR (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x0C)) -#define CAN1IER (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x10)) -#define CAN1BTR (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x14)) -#define CAN1EWL (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x18)) -#define CAN1SR (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x1C)) -#define CAN1RFS (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x20)) -#define CAN1RID (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x24)) -#define CAN1RDA (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x28)) -#define CAN1RDB (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x2C)) - -#define CAN1TFI1 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x30)) -#define CAN1TID1 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x34)) -#define CAN1TDA1 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x38)) -#define CAN1TDB1 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x3C)) -#define CAN1TFI2 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x40)) -#define CAN1TID2 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x44)) -#define CAN1TDA2 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x48)) -#define CAN1TDB2 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x4C)) -#define CAN1TFI3 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x50)) -#define CAN1TID3 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x54)) -#define CAN1TDA3 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x58)) -#define CAN1TDB3 (*(volatile unsigned int *)(CAN1_BASE_ADDR + 0x5C)) - -#define CAN2_BASE_ADDR 0xE0048000 -#define CAN2MOD (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x00)) -#define CAN2CMR (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x04)) -#define CAN2GSR (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x08)) -#define CAN2ICR (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x0C)) -#define CAN2IER (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x10)) -#define CAN2BTR (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x14)) -#define CAN2EWL (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x18)) -#define CAN2SR (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x1C)) -#define CAN2RFS (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x20)) -#define CAN2RID (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x24)) -#define CAN2RDA (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x28)) -#define CAN2RDB (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x2C)) - -#define CAN2TFI1 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x30)) -#define CAN2TID1 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x34)) -#define CAN2TDA1 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x38)) -#define CAN2TDB1 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x3C)) -#define CAN2TFI2 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x40)) -#define CAN2TID2 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x44)) -#define CAN2TDA2 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x48)) -#define CAN2TDB2 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x4C)) -#define CAN2TFI3 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x50)) -#define CAN2TID3 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x54)) -#define CAN2TDA3 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x58)) -#define CAN2TDB3 (*(volatile unsigned int *)(CAN2_BASE_ADDR + 0x5C)) - - -/* MultiMedia Card Interface(MCI) Controller */ -#define MCI_BASE_ADDR 0xE008C000 -#define MCI_POWER (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x00)) -#define MCI_CLOCK (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x04)) -#define MCI_ARGUMENT (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x08)) -#define MCI_COMMAND (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x0C)) -#define MCI_RESP_CMD (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x10)) -#define MCI_RESP0 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x14)) -#define MCI_RESP1 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x18)) -#define MCI_RESP2 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x1C)) -#define MCI_RESP3 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x20)) -#define MCI_DATA_TMR (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x24)) -#define MCI_DATA_LEN (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x28)) -#define MCI_DATA_CTRL (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x2C)) -#define MCI_DATA_CNT (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x30)) -#define MCI_STATUS (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x34)) -#define MCI_CLEAR (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x38)) -#define MCI_MASK0 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x3C)) -#define MCI_MASK1 (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x40)) -#define MCI_FIFO_CNT (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x48)) -#define MCI_FIFO (*(volatile unsigned int *)(MCI_BASE_ADDR + 0x80)) - - -/* I2S Interface Controller (I2S) */ -#define I2S_BASE_ADDR 0xE0088000 -#define I2S_DAO (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x00)) -#define I2S_DAI (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x04)) -#define I2S_TX_FIFO (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x08)) -#define I2S_RX_FIFO (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x0C)) -#define I2S_STATE (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x10)) -#define I2S_DMA1 (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x14)) -#define I2S_DMA2 (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x18)) -#define I2S_IRQ (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x1C)) -#define I2S_TXRATE (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x20)) -#define I2S_RXRATE (*(volatile unsigned int *)(I2S_BASE_ADDR + 0x24)) - - -/* General-purpose DMA Controller */ -#define DMA_BASE_ADDR 0xFFE04000 -#define GPDMA_INT_STAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x000)) -#define GPDMA_INT_TCSTAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x004)) -#define GPDMA_INT_TCCLR (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x008)) -#define GPDMA_INT_ERR_STAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x00C)) -#define GPDMA_INT_ERR_CLR (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x010)) -#define GPDMA_RAW_INT_TCSTAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x014)) -#define GPDMA_RAW_INT_ERR_STAT (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x018)) -#define GPDMA_ENABLED_CHNS (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x01C)) -#define GPDMA_SOFT_BREQ (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x020)) -#define GPDMA_SOFT_SREQ (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x024)) -#define GPDMA_SOFT_LBREQ (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x028)) -#define GPDMA_SOFT_LSREQ (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x02C)) -#define GPDMA_CONFIG (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x030)) -#define GPDMA_SYNC (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x034)) - -/* DMA channel 0 registers */ -#define GPDMA_CH0_SRC (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x100)) -#define GPDMA_CH0_DEST (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x104)) -#define GPDMA_CH0_LLI (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x108)) -#define GPDMA_CH0_CTRL (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x10C)) -#define GPDMA_CH0_CFG (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x110)) - -/* DMA channel 1 registers */ -#define GPDMA_CH1_SRC (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x120)) -#define GPDMA_CH1_DEST (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x124)) -#define GPDMA_CH1_LLI (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x128)) -#define GPDMA_CH1_CTRL (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x12C)) -#define GPDMA_CH1_CFG (*(volatile unsigned int *)(DMA_BASE_ADDR + 0x130)) - - -/* USB Controller */ -#define USB_INT_BASE_ADDR 0xE01FC1C0 -#define USB_BASE_ADDR 0xFFE0C200 /* USB Base Address */ - -#define USB_INT_STAT (*(volatile unsigned int *)(USB_INT_BASE_ADDR + 0x00)) - -/* USB Device Interrupt Registers */ -#define DEV_INT_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0x00)) -#define DEV_INT_EN (*(volatile unsigned int *)(USB_BASE_ADDR + 0x04)) -#define DEV_INT_CLR (*(volatile unsigned int *)(USB_BASE_ADDR + 0x08)) -#define DEV_INT_SET (*(volatile unsigned int *)(USB_BASE_ADDR + 0x0C)) -#define DEV_INT_PRIO (*(volatile unsigned int *)(USB_BASE_ADDR + 0x2C)) - -/* USB Device Endpoint Interrupt Registers */ -#define EP_INT_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0x30)) -#define EP_INT_EN (*(volatile unsigned int *)(USB_BASE_ADDR + 0x34)) -#define EP_INT_CLR (*(volatile unsigned int *)(USB_BASE_ADDR + 0x38)) -#define EP_INT_SET (*(volatile unsigned int *)(USB_BASE_ADDR + 0x3C)) -#define EP_INT_PRIO (*(volatile unsigned int *)(USB_BASE_ADDR + 0x40)) - -/* USB Device Endpoint Realization Registers */ -#define REALIZE_EP (*(volatile unsigned int *)(USB_BASE_ADDR + 0x44)) -#define EP_INDEX (*(volatile unsigned int *)(USB_BASE_ADDR + 0x48)) -#define MAXPACKET_SIZE (*(volatile unsigned int *)(USB_BASE_ADDR + 0x4C)) - -/* USB Device Command Reagisters */ -#define CMD_CODE (*(volatile unsigned int *)(USB_BASE_ADDR + 0x10)) -#define CMD_DATA (*(volatile unsigned int *)(USB_BASE_ADDR + 0x14)) - -/* USB Device Data Transfer Registers */ -#define RX_DATA (*(volatile unsigned int *)(USB_BASE_ADDR + 0x18)) -#define TX_DATA (*(volatile unsigned int *)(USB_BASE_ADDR + 0x1C)) -#define RX_PLENGTH (*(volatile unsigned int *)(USB_BASE_ADDR + 0x20)) -#define TX_PLENGTH (*(volatile unsigned int *)(USB_BASE_ADDR + 0x24)) -#define USB_CTRL (*(volatile unsigned int *)(USB_BASE_ADDR + 0x28)) - -/* USB Device DMA Registers */ -#define DMA_REQ_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0x50)) -#define DMA_REQ_CLR (*(volatile unsigned int *)(USB_BASE_ADDR + 0x54)) -#define DMA_REQ_SET (*(volatile unsigned int *)(USB_BASE_ADDR + 0x58)) -#define UDCA_HEAD (*(volatile unsigned int *)(USB_BASE_ADDR + 0x80)) -#define EP_DMA_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0x84)) -#define EP_DMA_EN (*(volatile unsigned int *)(USB_BASE_ADDR + 0x88)) -#define EP_DMA_DIS (*(volatile unsigned int *)(USB_BASE_ADDR + 0x8C)) -#define DMA_INT_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0x90)) -#define DMA_INT_EN (*(volatile unsigned int *)(USB_BASE_ADDR + 0x94)) -#define EOT_INT_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0xA0)) -#define EOT_INT_CLR (*(volatile unsigned int *)(USB_BASE_ADDR + 0xA4)) -#define EOT_INT_SET (*(volatile unsigned int *)(USB_BASE_ADDR + 0xA8)) -#define NDD_REQ_INT_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0xAC)) -#define NDD_REQ_INT_CLR (*(volatile unsigned int *)(USB_BASE_ADDR + 0xB0)) -#define NDD_REQ_INT_SET (*(volatile unsigned int *)(USB_BASE_ADDR + 0xB4)) -#define SYS_ERR_INT_STAT (*(volatile unsigned int *)(USB_BASE_ADDR + 0xB8)) -#define SYS_ERR_INT_CLR (*(volatile unsigned int *)(USB_BASE_ADDR + 0xBC)) -#define SYS_ERR_INT_SET (*(volatile unsigned int *)(USB_BASE_ADDR + 0xC0)) - - -/* USB Host Controller */ -#define USBHC_BASE_ADDR 0xFFE0C000 -#define HC_REVISION (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x00)) -#define HC_CONTROL (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x04)) -#define HC_CMD_STAT (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x08)) -#define HC_INT_STAT (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x0C)) -#define HC_INT_EN (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x10)) -#define HC_INT_DIS (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x14)) -#define HC_HCCA (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x18)) -#define HC_PERIOD_CUR_ED (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x1C)) -#define HC_CTRL_HEAD_ED (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x20)) -#define HC_CTRL_CUR_ED (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x24)) -#define HC_BULK_HEAD_ED (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x28)) -#define HC_BULK_CUR_ED (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x2C)) -#define HC_DONE_HEAD (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x30)) -#define HC_FM_INTERVAL (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x34)) -#define HC_FM_REMAINING (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x38)) -#define HC_FM_NUMBER (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x3C)) -#define HC_PERIOD_START (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x40)) -#define HC_LS_THRHLD (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x44)) -#define HC_RH_DESCA (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x48)) -#define HC_RH_DESCB (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x4C)) -#define HC_RH_STAT (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x50)) -#define HC_RH_PORT_STAT1 (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x54)) -#define HC_RH_PORT_STAT2 (*(volatile unsigned int *)(USBHC_BASE_ADDR + 0x58)) - -/* USB OTG Controller */ -#define USBOTG_BASE_ADDR 0xFFE0C100 -#define OTG_INT_STAT (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x00)) -#define OTG_INT_EN (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x04)) -#define OTG_INT_SET (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x08)) -#define OTG_INT_CLR (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x0C)) -#define OTG_STAT_CTRL (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x10)) -#define OTG_TIMER (*(volatile unsigned int *)(USBOTG_BASE_ADDR + 0x14)) - -#define USBOTG_I2C_BASE_ADDR 0xFFE0C300 -#define OTG_I2C_RX (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x00)) -#define OTG_I2C_TX (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x00)) -#define OTG_I2C_STS (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x04)) -#define OTG_I2C_CTL (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x08)) -#define OTG_I2C_CLKHI (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x0C)) -#define OTG_I2C_CLKLO (*(volatile unsigned int *)(USBOTG_I2C_BASE_ADDR + 0x10)) - -#define USBOTG_CLK_BASE_ADDR 0xFFE0CFF0 -#define OTG_CLK_CTRL (*(volatile unsigned int *)(USBOTG_CLK_BASE_ADDR + 0x04)) -#define OTG_CLK_STAT (*(volatile unsigned int *)(USBOTG_CLK_BASE_ADDR + 0x08)) - - -/* Ethernet MAC (32 bit data bus) -- all registers are RW unless indicated in parentheses */ -#define MAC_BASE_ADDR 0xFFE00000 /* AHB Peripheral # 0 */ -#define MAC_MAC1 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x000)) /* MAC config reg 1 */ -#define MAC_MAC2 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x004)) /* MAC config reg 2 */ -#define MAC_IPGT (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x008)) /* b2b InterPacketGap reg */ -#define MAC_IPGR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x00C)) /* non b2b InterPacketGap reg */ -#define MAC_CLRT (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x010)) /* CoLlision window/ReTry reg */ -#define MAC_MAXF (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x014)) /* MAXimum Frame reg */ -#define MAC_SUPP (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x018)) /* PHY SUPPort reg */ -#define MAC_TEST (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x01C)) /* TEST reg */ -#define MAC_MCFG (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x020)) /* MII Mgmt ConFiG reg */ -#define MAC_MCMD (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x024)) /* MII Mgmt CoMmanD reg */ -#define MAC_MADR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x028)) /* MII Mgmt ADdRess reg */ -#define MAC_MWTD (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x02C)) /* MII Mgmt WriTe Data reg (WO) */ -#define MAC_MRDD (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x030)) /* MII Mgmt ReaD Data reg (RO) */ -#define MAC_MIND (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x034)) /* MII Mgmt INDicators reg (RO) */ - -#define MAC_SA0 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x040)) /* Station Address 0 reg */ -#define MAC_SA1 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x044)) /* Station Address 1 reg */ -#define MAC_SA2 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x048)) /* Station Address 2 reg */ - -#define MAC_COMMAND (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x100)) /* Command reg */ -#define MAC_STATUS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x104)) /* Status reg (RO) */ -#define MAC_RXDESCRIPTOR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x108)) /* Rx descriptor base address reg */ -#define MAC_RXSTATUS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x10C)) /* Rx status base address reg */ -#define MAC_RXDESCRIPTORNUM (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x110)) /* Rx number of descriptors reg */ -#define MAC_RXPRODUCEINDEX (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x114)) /* Rx produce index reg (RO) */ -#define MAC_RXCONSUMEINDEX (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x118)) /* Rx consume index reg */ -#define MAC_TXDESCRIPTOR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x11C)) /* Tx descriptor base address reg */ -#define MAC_TXSTATUS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x120)) /* Tx status base address reg */ -#define MAC_TXDESCRIPTORNUM (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x124)) /* Tx number of descriptors reg */ -#define MAC_TXPRODUCEINDEX (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x128)) /* Tx produce index reg */ -#define MAC_TXCONSUMEINDEX (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x12C)) /* Tx consume index reg (RO) */ - -#define MAC_TSV0 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x158)) /* Tx status vector 0 reg (RO) */ -#define MAC_TSV1 (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x15C)) /* Tx status vector 1 reg (RO) */ -#define MAC_RSV (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x160)) /* Rx status vector reg (RO) */ - -#define MAC_FLOWCONTROLCNT (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x170)) /* Flow control counter reg */ -#define MAC_FLOWCONTROLSTS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x174)) /* Flow control status reg */ - -#define MAC_RXFILTERCTRL (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x200)) /* Rx filter ctrl reg */ -#define MAC_RXFILTERWOLSTS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x204)) /* Rx filter WoL status reg (RO) */ -#define MAC_RXFILTERWOLCLR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x208)) /* Rx filter WoL clear reg (WO) */ - -#define MAC_HASHFILTERL (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x210)) /* Hash filter LSBs reg */ -#define MAC_HASHFILTERH (*(volatile unsigned int *)(MAC_BASE_ADDR + 0x214)) /* Hash filter MSBs reg */ - -#define MAC_INTSTATUS (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFE0)) /* Interrupt status reg (RO) */ -#define MAC_INTENABLE (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFE4)) /* Interrupt enable reg */ -#define MAC_INTCLEAR (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFE8)) /* Interrupt clear reg (WO) */ -#define MAC_INTSET (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFEC)) /* Interrupt set reg (WO) */ - -#define MAC_POWERDOWN (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFF4)) /* Power-down reg */ -#define MAC_MODULEID (*(volatile unsigned int *)(MAC_BASE_ADDR + 0xFFC)) /* Module ID reg (RO) */ - - -#endif /* __LPC23xx_H */ - diff --git a/rules/lpc21XX-arm-elf-gcc/crt0.S b/rules/lpc21XX-arm-elf-gcc/crt0.S deleted file mode 100644 --- a/rules/lpc21XX-arm-elf-gcc/crt0.S +++ /dev/null @@ -1,193 +0,0 @@ - .global main // int main(void) - - .global _etext // -> .data initial values in ROM - .global _data // -> .data area in RAM - .global _edata // end of .data area - .global __bss_start // -> .bss area in RAM - .global __bss_end__ // end of .bss area - .global _stack // top of stack - -// Stack Sizes - .set UND_STACK_SIZE, 0x00000004 - .set ABT_STACK_SIZE, 0x00000004 - .set FIQ_STACK_SIZE, 0x00000004 - .set IRQ_STACK_SIZE, 0X00000080 - .set SVC_STACK_SIZE, 0x00000004 - -// Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs - .set MODE_USR, 0x10 // User Mode - .set MODE_FIQ, 0x11 // FIQ Mode - .set MODE_IRQ, 0x12 // IRQ Mode - .set MODE_SVC, 0x13 // Supervisor Mode - .set MODE_ABT, 0x17 // Abort Mode - .set MODE_UND, 0x1B // Undefined Mode - .set MODE_SYS, 0x1F // System Mode - - .equ I_BIT, 0x80 // when I bit is set, IRQ is disabled - .equ F_BIT, 0x40 // when F bit is set, FIQ is disabled - - .text - .code 32 - .align 2 - - .global _boot - .func _boot -_boot: - -// Runtime Interrupt Vectors -// ------------------------- -Vectors: - b _start // reset - _start - ldr pc,_undf // undefined - _undf - ldr pc,_swi // SWI - _swi - ldr pc,_pabt // program abort - _pabt - ldr pc,_dabt // data abort - _dabt - nop // reserved - ldr pc,[pc,#-0xFF0] // IRQ - read the VIC - ldr pc,_fiq // FIQ - _fiq - -#if 0 -// Use this group for production -_undf: .word _reset // undefined - _reset -_swi: .word _reset // SWI - _reset -_pabt: .word _reset // program abort - _reset -_dabt: .word _reset // data abort - _reset -_irq: .word _reset // IRQ - _reset -_fiq: .word _reset // FIQ - _reset - -#else -// Use this group for development -_undf: .word __undf // undefined -_swi: .word __swi // SWI -_pabt: .word __pabt // program abort -_dabt: .word __dabt // data abort -_irq: .word __irq // IRQ -_fiq: .word __fiq // FIQ - -__undf: b . // undefined -__swi: b . // SWI -__pabt: b . // program abort -__dabt: b . // data abort -__irq: b . // IRQ -__fiq: b . // FIQ -#endif - .size _boot, . - _boot - .endfunc - - -// Setup the operating mode & stack. -// --------------------------------- - .global _start, start, _mainCRTStartup - .func _start - -_start: -start: -_mainCRTStartup: - -// Initialize Interrupt System -// - Set stack location for each mode -// - Leave in System Mode with Interrupts Disabled -// ----------------------------------------------- - ldr r0,=_stack - msr CPSR_c,#MODE_UND|I_BIT|F_BIT // Undefined Instruction Mode - mov sp,r0 - sub r0,r0,#UND_STACK_SIZE - msr CPSR_c,#MODE_ABT|I_BIT|F_BIT // Abort Mode - mov sp,r0 - sub r0,r0,#ABT_STACK_SIZE - msr CPSR_c,#MODE_FIQ|I_BIT|F_BIT // FIQ Mode - mov sp,r0 - sub r0,r0,#FIQ_STACK_SIZE - msr CPSR_c,#MODE_IRQ|I_BIT|F_BIT // IRQ Mode - mov sp,r0 - sub r0,r0,#IRQ_STACK_SIZE - msr CPSR_c,#MODE_SVC|I_BIT|F_BIT // Supervisor Mode - mov sp,r0 - sub r0,r0,#SVC_STACK_SIZE - msr CPSR_c,#MODE_SYS|I_BIT|F_BIT // System Mode - mov sp,r0 - -// Copy initialized data to its execution address in RAM -// ----------------------------------------------------- -#ifdef ROM_RUN - ldr r1,=_etext // -> ROM data start - ldr r2,=_data // -> data start - ldr r3,=_edata // -> end of data -1: cmp r2,r3 // check if data to move - ldrlo r0,[r1],#4 // copy it - strlo r0,[r2],#4 - blo 1b // loop until done -#endif -// Clear .bss -// ---------- - mov r0,#0 // get a zero - ldr r1,=__bss_start // -> bss start - ldr r2,=__bss_end__ // -> bss end -2: cmp r1,r2 // check if data to clear - strlo r0,[r1],#4 // clear 4 bytes - blo 2b // loop until done - -/* - Call C++ constructors (for objects in "global scope") - ctor loop added by Martin Thomas 4/2005 - based on a Anglia Design example-application for ST ARM -*/ - - LDR r0, =__ctors_start__ - LDR r1, =__ctors_end__ -ctor_loop: - CMP r0, r1 - BEQ ctor_end - LDR r2, [r0], #4 - STMFD sp!, {r0-r1} - MOV lr, pc - MOV pc, r2 - LDMFD sp!, {r0-r1} - B ctor_loop -ctor_end: - -// Call main program: main(0) -// -------------------------- - mov r0,#0 // no arguments (argc = 0) - mov r1,r0 - mov r2,r0 - mov fp,r0 // null frame pointer - mov r7,r0 // null frame pointer for thumb - ldr r10,=main - mov lr,pc - bx r10 // enter main() - -/* "global object"-dtors are never called and it should not be - needed since there is no OS to exit to. */ - - .size _start, . - _start - .endfunc - - .global _reset, reset, exit, abort - .func _reset -_reset: -reset: -exit: -abort: -#if 0 -// Disable interrupts, then force a hardware reset by driving P23 low -// ------------------------------------------------------------------- - mrs r0,cpsr // get PSR - orr r0,r0,#I_BIT|F_BIT // disable IRQ and FIQ - msr cpsr,r0 // set up status register - - ldr r1,=(PS_BASE) // PS Base Address - ldr r0,=(PS_PIO) // PIO Module - str r0,[r1,#PS_PCER_OFF] // enable its clock - ldr r1,=(PIO_BASE) // PIO Base Address - ldr r0,=(1<<23) // P23 - str r0,[r1,#PIO_PER_OFF] // make sure pin is contolled by PIO - str r0,[r1,#PIO_CODR_OFF] // set the pin low - str r0,[r1,#PIO_OER_OFF] // make it an output -#endif - b . // loop until reset - - .size _reset, . - _reset - .endfunc - - .end diff --git a/rules/lpc21XX-arm-elf-gcc/lpc2103_ram.ld b/rules/lpc21XX-arm-elf-gcc/lpc2103_ram.ld deleted file mode 100644 --- a/rules/lpc21XX-arm-elf-gcc/lpc2103_ram.ld +++ /dev/null @@ -1,49 +0,0 @@ -ENTRY(_startup) - -MEMORY -{ - RAM (rw) : ORIGIN = 0x40000200, LENGTH = (0x00010000 - 0x00000200 - 0x20 - 0x100) -} - -SECTIONS -{ - .text : - { - _text = .; - *startup.o (.text) - *(.text) - *(.glue_7) - *(.glue_7t) - } > RAM - - . = ALIGN(4); - _etext = .; - - .rodata : - { - _rodata = . ; - *(.rodata) - } > RAM - - . = ALIGN(4); - _erodata = .; - - .data : - { - _data = . ; - *(.data) - } > RAM - - . = ALIGN(4); - _edata = .; - - .bss : - { - __bss_start = .; - *(.bss) - } > RAM - - . = ALIGN(4); - __bss_end = . ; -} -_end = .; diff --git a/rules/lpc21XX-arm-elf-gcc/ramstartup-1.S b/rules/lpc21XX-arm-elf-gcc/ramstartup-1.S deleted file mode 100644 --- a/rules/lpc21XX-arm-elf-gcc/ramstartup-1.S +++ /dev/null @@ -1,12 +0,0 @@ -.text -.global _startup -.func _startup -_startup: - mov r0, #0 - mov r1, #0 - ldr lr, =__back - b main -__back: - b __back -.endfunc -.end diff --git a/rules/lpc21XX-arm-elf-gcc/rules.mk b/rules/lpc21XX-arm-elf-gcc/rules.mk deleted file mode 100644 --- a/rules/lpc21XX-arm-elf-gcc/rules.mk +++ /dev/null @@ -1,202 +0,0 @@ -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - -#--------------------------------------------------------------------------------- -# GCC EXECUTABLES -#--------------------------------------------------------------------------------- -LIBUC_PREFIX = arm-none-eabi- -LIBUC_CC = $(LIBUC_PREFIX)gcc -LIBUC_CXX = $(LIBUC_PREFIX)g++ -LIBUC_AR = $(LIBUC_PREFIX)ar -LIBUC_RANLIB = $(LIBUC_PREFIX)ranlib -LIBUC_AS = $(LIBUC_PREFIX)as -LIBUC_LD = $(LIBUC_PREFIX)ld -LIBUC_SIZE = $(LIBUC_PREFIX)size -LIBUC_STRIP = $(LIBUC_PREFIX)strip -s -LIBUC_READELF = $(LIBUC_PREFIX)readelf -LIBUC_OBJCOPY=$(LIBUC_PREFIX)objcopy -LIBUC_OBJDUMP=$(LIBUC_PREFIX)objdump - - - -#--------------------------------------------------------------------------------- -# GCC FLAGS -#--------------------------------------------------------------------------------- -LIBUC_FMCU = -mcpu=arm7tdmi -LIBUC_CFLAGS = $(LIBUC_FMCU) -LIBUC_CFLAGS += -g -gdwarf-2 -fomit-frame-pointer -LIBUC_CFLAGS += -Wall -Wextra -Wundef -Wcast-align -DROM_RUN -LIBUC_LDFLAGS = -nostartfiles -LIBUC_ODFLAGS = -x --syms -LIBUC_CPFLAGS = -LIBUC_CFLAGS_WARN_ON = -Wall -LIBUC_CFLAGS_WARN_OFF = -w -LIBUC_CFLAGS_RELEASE = -O2 -LIBUC_CFLAGS_DEBUG = -g -LIBUC_CFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g -LIBUC_CFLAGS_STATIC_LIB = -fPIC -LIBUC_CFLAGS_SOFT_FPU = -msoft-float -LIBUC_CFLAGS_HARD_FPU = - -LIBUC_CXXFLAGS = $(LIBUC_FMCU) -LIBUC_CXXFLAGS += -g -gdwarf-2 $(LIBUC_FMCU) -LIBUC_CXXFLAGS += -Wall -Wextra -Wundef -Wcast-align -LIBUC_CXXFLAGS_WARN_ON = -Wall -LIBUC_CXXFLAGS_WARN_OFF = -w -LIBUC_CXXFLAGS_RELEASE = -O2 -LIBUC_CXXFLAGS_DEBUG = -g -LIBUC_CXXFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g -LIBUC_CXXFLAGS_STATIC_LIB = -fPIC -LIBUC_CXXFLAGS_SOFT_FPU = -msoft-float -LIBUC_CXXFLAGS_HARD_FPU = - - -#--------------------------------------------------------------------------------- -# LIBRARY DEFINITIONS -#--------------------------------------------------------------------------------- -LIBUC_LIBS_DIR = $(LIBUC)/lib/bin/lpc21XX -LIBUC_INC_DIR = $(LIBUC)/lib/includes/lpc21XX -include $(LIBUC)/rules/common/libsrules.mk - - -#--------------------------------------------------------------------------------- -# BOARD SUPORT PACKAGES -#--------------------------------------------------------------------------------- -LIBUC_BSP_DIR=$(LIBUC)/bsp -LIBUC_BSP_BIN_DIR= $(LIBUC_BSP_DIR)/bin -LIBUC_BSP_INC_DIR= $(LIBUC_BSP_DIR)/includes -LIBUC_BSP = -L $(LIBUC_BSP_BIN_DIR)/$(BSP) -static -lbsp -LIBUC_BSP_INC = -I $(LIBUC_BSP_INC_DIR)/$(BSP) -#--------------------------------------------------------------------------------- -# DEVICE SPECIAL FILES -#--------------------------------------------------------------------------------- -LINKER_SCRIPT = $(ARCHFOLDER)/LPC2378-ROM.ld -DEVSOURCES += -DEVSOURCESND = $(notdir $(DEVSOURCES)) -DEVOBJECTFILES += $(DEVSOURCESND:.c=.o) -DEVOBJECTFILES := $(addprefix $(OBJDIR)/,$(DEVOBJECTFILES)) -OBJECTFILES += $(DEVOBJECTFILES) - -ASMDEVSOURCES += $(ARCHFOLDER)/crt0.S -ASMDEVSOURCESND = $(notdir $(ASMDEVSOURCES)) -ASMDEVOBJECTFILES += $(ASMDEVSOURCESND:.S=.o) -ASMDEVOBJECTFILES := $(addprefix $(OBJDIR)/,$(ASMDEVOBJECTFILES)) -ASMOBJECTFILES += $(ASMDEVOBJECTFILES) - -#RUN_MODE=ROM_RUN -#LIBUC_CFLAGS += -D$(RUN_MODE) - -LPC23XX_INCDIR=$(ARCHFOLDER) - - -#--------------------------------------------------------------------------------- -# RULES -#--------------------------------------------------------------------------------- - -all: - @echo "lpc23XX-arm-noabi-gcc rules" - - -bin: $(ASMDEVSOURCESND) $(DEVSOURCESND) $(BINDIR)/$(TARGET).bin $(BINDIR)/$(TARGET).hex - @echo "compile bin" - -$(DEVSOURCESND): $(DEVSOURCES) - cp -f $(DEVSOURCES) ./ - -$(ASMDEVSOURCESND): $(ASMDEVSOURCES) - cp -f $(ASMDEVSOURCES) ./ - -lib: $(TARGETINSTALLPATH)/$(TARGET).a - @echo "compile lib" - -%.a: $(OBJECTFILES) - mkdir -p $(TARGETINSTALLPATH) - @if [ -z $(HEADERSINSTALLPATH) ] ; then echo "No headers to install" ; else mkdir -p $(HEADERSINSTALLPATH) ; fi - $(LIBUC_AR) rcs $@ $(OBJECTFILES) #$(LIBUC_AR) rcs $(TARGETINSTALLPATH)/$@ $(OBJECTFILES) - @if [ -z $(HEADERS) ] ; then echo "No headers to install" ; else cp -f $(HEADERS) $(HEADERSINSTALLPATH)/ ; fi - #cp -f $(HEADERS) $(HEADERSINSTALLPATH)/ - - -#%.o: %.c -# $(LIBUC_CC) -O3 -I $(LPC17XX_INCDIR) $(LIBUC_INCLUDES) $(LIBUC_BSP_INC) -MM $< -MF $*.d -MP -# $(LIBUC_CC) -O3 -I $(LPC17XX_INCDIR) $(LIBUC_INCLUDES) $(LIBUC_BSP_INC) -c $(LIBUC_CFLAGS) $< -o $@ - -$(OBJECTFILES) : $(OBJDIR)/%.o : %.c $(INC_LIBS_DEPS) $(HEADERS) - mkdir -p $(OBJDIR) - $(LIBUC_CC) -O3 -I $(LPC23XX_INCDIR) $(LIBUC_INCLUDES) $(LIBUC_BSP_INC) -MM $< -MF $*.d -MP - $(LIBUC_CC) -O3 -I $(LPC23XX_INCDIR) $(LIBUC_INCLUDES) $(LIBUC_BSP_INC) -c $(LIBUC_CFLAGS) $< -o $@ - - - -$(ASMOBJECTFILES) : $(OBJDIR)/%.o : %.S $(INC_LIBS_DEPS) $(HEADERS) - mkdir -p $(OBJDIR) - $(LIBUC_CC) -O3 -I $(LPC23XX_INCDIR) $(LIBUC_INCLUDES) $(LIBUC_BSP_INC) -c $(LIBUC_CFLAGS) $< -o $@ - - -%.elf: $(LINKER_SCRIPT) $(ASMOBJECTFILES) $(OBJECTFILES) - mkdir -p $(BINDIR) - $(LIBUC_CC) $(LIBUC_LDFLAGS) $(LIBUC_CFLAGS) -T $^ -o $@ $(LIBUC_BSP) $(LIBUC_LIBRARIES) - $(LIBUC_OBJDUMP) $(LIBUC_ODFLAGS) $@ > $(@:.elf=.dump) - $(LIBUC_SIZE) $@ - - - -%.bin: %.elf $(BIN_LIBS_DEPS) - $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O binary $< $*.bin - @echo "BIN_LIBS_DEPS" - @echo $(BIN_LIBS_DEPS) - -%.hex: %.elf - $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O ihex $< $*.hex - - -clean: - rm -f *.o *.d *.bin *.hex *.dump *.map *.a *.elf - rm -f $(OBJECTFILES) - rm -f $(BINDIR)/*.bin - rm -f $(BINDIR)/*.hex - rm -f $(BINDIR)/*.dump - rm -f $(BINDIR)/*.map - rm -f $(BINDIR)/*.a - rm -f $(BINDIR)/*.elf - rm -f $(DEVSOURCESND) - -distclean: clean libclean - rm -f $(TARGETINSTALLPATH)/*.bin - rm -f $(TARGETINSTALLPATH)/*.a - - - -libclean: - @echo "not a library" - - - - - - - - - - - - diff --git a/rules/sparc-elf-gcc/rules.mk b/rules/sparc-elf-gcc/rules.mk deleted file mode 100644 --- a/rules/sparc-elf-gcc/rules.mk +++ /dev/null @@ -1,160 +0,0 @@ -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - -#--------------------------------------------------------------------------------- -# GCC EXECUTABLES -#--------------------------------------------------------------------------------- -LIBUC_PREFIX = sparc-elf- -LIBUC_CC = $(LIBUC_PREFIX)gcc -LIBUC_CXX = $(LIBUC_PREFIX)g++ -LIBUC_AR = $(LIBUC_PREFIX)ar -LIBUC_AS = $(LIBUC_PREFIX)as -LIBUC_LD = $(LIBUC_PREFIX)ld -LIBUC_SIZE = $(LIBUC_PREFIX)size -LIBUC_STRIP = $(LIBUC_PREFIX)strip -s -LIBUC_READELF = $(LIBUC_PREFIX)readelf -LIBUC_OBJCOPY=$(LIBUC_PREFIX)objcopy -LIBUC_OBJDUMP=$(LIBUC_PREFIX)objdump - - - -#--------------------------------------------------------------------------------- -# GCC FLAGS -#--------------------------------------------------------------------------------- -LIBUC_FMCU = -LIBUC_CFLAGS = $(LIBUC_FMCU) -LIBUC_CFLAGS = --std=gnu99 -fgnu89-inline -LIBUC_CFLAGS += -LIBUC_LDFLAGS = -LIBUC_ODFLAGS = -x --syms -LIBUC_CPFLAGS = -LIBUC_CFLAGS_WARN_ON = -Wall -LIBUC_CFLAGS_WARN_OFF = -w -LIBUC_CFLAGS_RELEASE = -O2 -LIBUC_CFLAGS_DEBUG = -g -LIBUC_CFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g -LIBUC_CFLAGS_STATIC_LIB = -fPIC -LIBUC_CFLAGS_SOFT_FPU = -msoft-float -LIBUC_CFLAGS_HARD_FPU = - -LIBUC_CXXFLAGS = $(LIBUC_FMCU) -LIBUC_CXXFLAGS += -g -gdwarf-2 -LIBUC_CXXFLAGS += -Wextra -Wundef -Wcast-align -msoft-float -LIBUC_CXXFLAGS_WARN_ON = -Wall -LIBUC_CXXFLAGS_WARN_OFF = -w -LIBUC_CXXFLAGS_RELEASE = -O2 -LIBUC_CXXFLAGS_DEBUG = -g -LIBUC_CXXFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g -LIBUC_CXXFLAGS_STATIC_LIB = -fPIC -LIBUC_CXXFLAGS_SOFT_FPU = -msoft-float -LIBUC_CXXFLAGS_HARD_FPU = - -#--------------------------------------------------------------------------------- -# LIBRARY DEFINITIONS -#--------------------------------------------------------------------------------- - -LIBUC_LIBS_DIR = $(LIBUC)/lib/bin/LEON3 -LIBUC_INC_DIR = $(LIBUC)/lib/includes/LEON3 -include $(LIBUC)/rules/common/libsrules.mk - -#--------------------------------------------------------------------------------- -# BOARD SUPORT PACKAGES -#--------------------------------------------------------------------------------- -LIBUC_BSP_DIR=$(LIBUC)/bsp -LIBUC_BSP_BIN_DIR= $(LIBUC_BSP_DIR)/bin -LIBUC_BSP_INC_DIR= $(LIBUC_BSP_DIR)/includes -LIBUC_BSP = -L $(LIBUC_BSP_BIN_DIR)/$(BSP) -static -lbsp -LIBUC_BSP_INC = -I $(LIBUC_BSP_INC_DIR)/$(BSP) -#--------------------------------------------------------------------------------- -# DEVICE SPECIAL FILES -#--------------------------------------------------------------------------------- - - - -#--------------------------------------------------------------------------------- -# RULES -#--------------------------------------------------------------------------------- - -all: - @echo "sparc-elf-gcc rules" - - -bin: $(BINDIR)/$(TARGET).bin $(BINDIR)/$(TARGET).hex - @echo "compile bin" - - - -lib: $(TARGETINSTALLPATH)/$(TARGET).a - @echo "compile lib" - -%.a: $(OBJECTFILES) - mkdir -p $(TARGETINSTALLPATH) - @if [ -z $(HEADERSINSTALLPATH) ] ; then echo "No headers to install" ; else mkdir -p $(HEADERSINSTALLPATH) ; fi - $(LIBUC_AR) rcs $@ $(OBJECTFILES) #$(LIBUC_AR) rcs $(TARGETINSTALLPATH)/$@ $(OBJECTFILES) - @if [ -z $(HEADERS) ] ; then echo "No headers to install" ; else cp -f $(HEADERS) $(HEADERSINSTALLPATH)/ ; fi - #cp -f $(HEADERS) $(HEADERSINSTALLPATH)/ - - - -$(OBJECTFILES) : $(OBJDIR)/%.o : %.c $(INC_LIBS_DEPS) $(HEADERS) - mkdir -p $(OBJDIR) - $(LIBUC_CC) -O3 -I $(LIBUC_INCLUDES) $(LIBUC_BSP_INC) -c $(LIBUC_CFLAGS) $< -o $@ - - -%.elf: $(OBJECTFILES) - mkdir -p $(BINDIR) - $(LIBUC_CC) $(LIBUC_LDFLAGS) $^ -o $@ $(LIBUC_BSP) $(LIBUC_LIBRARIES) - - -%.bin: %.elf $(BIN_LIBS_DEPS) - $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O binary $< $*.bin - - -%.hex: %.elf - $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O ihex $< $*.hex - - -clean: - rm -f *.o *.d *.bin *.hex *.dump *.map *.a *.elf - rm -f $(OBJECTFILES) - rm -f $(BINDIR)/*.bin - rm -f $(BINDIR)/*.hex - rm -f $(BINDIR)/*.dump - rm -f $(BINDIR)/*.map - rm -f $(BINDIR)/*.a - rm -f $(BINDIR)/*.elf - rm -f $(DEVSOURCESND) - -distclean: clean libclean - rm -f $(TARGETINSTALLPATH)/*.bin - rm -f $(TARGETINSTALLPATH)/*.a - -libclean: - @echo "not a library" - - - - - - - - diff --git a/rules/sparc-elf-gcc/rules.mk.orig b/rules/sparc-elf-gcc/rules.mk.orig deleted file mode 100644 --- a/rules/sparc-elf-gcc/rules.mk.orig +++ /dev/null @@ -1,160 +0,0 @@ -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - -#--------------------------------------------------------------------------------- -# GCC EXECUTABLES -#--------------------------------------------------------------------------------- -LIBUC_PREFIX = sparc-elf- -LIBUC_CC = $(LIBUC_PREFIX)gcc -LIBUC_CXX = $(LIBUC_PREFIX)g++ -LIBUC_AR = $(LIBUC_PREFIX)ar -LIBUC_AS = $(LIBUC_PREFIX)as -LIBUC_LD = $(LIBUC_PREFIX)ld -LIBUC_SIZE = $(LIBUC_PREFIX)size -LIBUC_STRIP = $(LIBUC_PREFIX)strip -s -LIBUC_READELF = $(LIBUC_PREFIX)readelf -LIBUC_OBJCOPY=$(LIBUC_PREFIX)objcopy -LIBUC_OBJDUMP=$(LIBUC_PREFIX)objdump - - - -#--------------------------------------------------------------------------------- -# GCC FLAGS -#--------------------------------------------------------------------------------- -LIBUC_FMCU = -LIBUC_CFLAGS = $(LIBUC_FMCU) -LIBUC_CFLAGS = --std=gnu99 -fgnu89-inline -LIBUC_CFLAGS += -LIBUC_LDFLAGS = -LIBUC_ODFLAGS = -x --syms -LIBUC_CPFLAGS = -LIBUC_CFLAGS_WARN_ON = -Wall -LIBUC_CFLAGS_WARN_OFF = -w -LIBUC_CFLAGS_RELEASE = -O2 -LIBUC_CFLAGS_DEBUG = -g -LIBUC_CFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g -LIBUC_CFLAGS_STATIC_LIB = -fPIC -LIBUC_CFLAGS_SOFT_FPU = -msoft-float -LIBUC_CFLAGS_HARD_FPU = - -LIBUC_CXXFLAGS = $(LIBUC_FMCU) -LIBUC_CXXFLAGS += -g -gdwarf-2 -LIBUC_CXXFLAGS += -Wextra -Wundef -Wcast-align -msoft-float -LIBUC_CXXFLAGS_WARN_ON = -Wall -LIBUC_CXXFLAGS_WARN_OFF = -w -LIBUC_CXXFLAGS_RELEASE = -O2 -LIBUC_CXXFLAGS_DEBUG = -g -LIBUC_CXXFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g -LIBUC_CXXFLAGS_STATIC_LIB = -fPIC -LIBUC_CXXFLAGS_SOFT_FPU = -msoft-float -LIBUC_CXXFLAGS_HARD_FPU = - -#--------------------------------------------------------------------------------- -# LIBRARY DEFINITIONS -#--------------------------------------------------------------------------------- - -LIBUC_LIBS_DIR = $(LIBUC)/lib/bin/LEON3 -LIBUC_INC_DIR = $(LIBUC)/lib/includes/LEON3 -include $(LIBUC)/rules/common/libsrules.mk - -#--------------------------------------------------------------------------------- -# BOARD SUPORT PACKAGES -#--------------------------------------------------------------------------------- -LIBUC_BSP_DIR=$(LIBUC)/bsp -LIBUC_BSP_BIN_DIR= $(LIBUC_BSP_DIR)/bin -LIBUC_BSP_INC_DIR= $(LIBUC_BSP_DIR)/includes -LIBUC_BSP = -L $(LIBUC_BSP_BIN_DIR)/$(BSP) -static -lbsp -LIBUC_BSP_INC = -I $(LIBUC_BSP_INC_DIR)/$(BSP) -#--------------------------------------------------------------------------------- -# DEVICE SPECIAL FILES -#--------------------------------------------------------------------------------- - - -INCLUDES=$(LIBUC_INCLUDES) $(LIBUC_BSP_INC) -CFLAGS=$(LIBUC_CFLAGS) -#--------------------------------------------------------------------------------- -# RULES -#--------------------------------------------------------------------------------- - -all: - @echo "sparc-elf-gcc rules" - - -bin: $(BINDIR)/$(TARGET).bin $(BINDIR)/$(TARGET).hex - @echo "compile bin" - - - -lib: $(TARGETINSTALLPATH)/$(TARGET).a - @echo "compile lib" - -%.a: $(OBJECTFILES) - mkdir -p $(TARGETINSTALLPATH) - mkdir -p $(HEADERSINSTALLPATH) - $(LIBUC_AR) rcs $@ $(OBJECTFILES) #$(LIBUC_AR) rcs $(TARGETINSTALLPATH)/$@ $(OBJECTFILES) - cp -f $(HEADERS) $(HEADERSINSTALLPATH)/ - - - -#$(OBJECTFILES) : $(OBJDIR)/%.o : %.c $(INC_LIBS_DEPS) $(HEADERS) -# mkdir -p $(OBJDIR) -# $(LIBUC_CC) -O3 -I $(LIBUC_INCLUDES) $(LIBUC_BSP_INC) -c $(LIBUC_CFLAGS) $< -o $@ - - -#%.elf: $(OBJECTFILES) -# mkdir -p $(BINDIR) -# $(LIBUC_CC) $(LIBUC_LDFLAGS) $^ -o $@ $(LIBUC_BSP) $(LIBUC_LIBRARIES) - - -#%.bin: %.elf $(BIN_LIBS_DEPS) -# $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O binary $< $*.bin -# - -#%.hex: %.elf -# $(LIBUC_OBJCOPY) $(LIBUC_CPFLAGS) -O ihex $< $*.hex - - -clean: - rm -f *.o *.d *.bin *.hex *.dump *.map *.a *.elf - rm -f $(OBJECTFILES) - rm -f $(BINDIR)/*.bin - rm -f $(BINDIR)/*.hex - rm -f $(BINDIR)/*.dump - rm -f $(BINDIR)/*.map - rm -f $(BINDIR)/*.a - rm -f $(BINDIR)/*.elf - rm -f $(DEVSOURCESND) - -distclean: clean libclean - rm -f $(TARGETINSTALLPATH)/*.bin - rm -f $(TARGETINSTALLPATH)/*.a - -libclean: - @echo "not a library" - - - - - - - - diff --git a/rules/stm32f1-arm-none-eabi-gcc/rules.mk b/rules/stm32f1-arm-none-eabi-gcc/rules.mk deleted file mode 100644 --- a/rules/stm32f1-arm-none-eabi-gcc/rules.mk +++ /dev/null @@ -1,126 +0,0 @@ -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - -#--------------------------------------------------------------------------------- -# GCC EXECUTABLES -#--------------------------------------------------------------------------------- -LIBUC_PREFIX = arm-none-eabi- -LIBUC_CC = $(LIBUC_PREFIX)gcc -LIBUC_CXX = $(LIBUC_PREFIX)g++ -LIBUC_AR = $(LIBUC_PREFIX)ar -LIBUC_RANLIB = $(LIBUC_PREFIX)ranlib -LIBUC_AS = $(LIBUC_PREFIX)as -LIBUC_LD = $(LIBUC_PREFIX)ld -LIBUC_SIZE = $(LIBUC_PREFIX)size -LIBUC_STRIP = $(LIBUC_PREFIX)strip -s -LIBUC_READELF = $(LIBUC_PREFIX)readelf -LIBUC_OBJCOPY=$(LIBUC_PREFIX)objcopy -LIBUC_OBJDUMP=$(LIBUC_PREFIX)objdump - - - -#--------------------------------------------------------------------------------- -# GCC FLAGS -#--------------------------------------------------------------------------------- -LIBUC_FMCU = -mcpu=cortex-m4 -LIBUC_CFLAGS = -g -O3 -mlittle-endian -mthumb $(LIBUC_FMCU) -LIBUC_CFLAGS += -std=c99 #-ffreestanding -LIBUC_LDFLAGS = -LIBUC_ODFLAGS = -x --syms -LIBUC_CPFLAGS = -LIBUC_CFLAGS_WARN_ON = -Wall -LIBUC_CFLAGS_WARN_OFF = -w -LIBUC_CFLAGS_RELEASE = -O2 -LIBUC_CFLAGS_DEBUG = -g -LIBUC_CFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g -LIBUC_CFLAGS_STATIC_LIB = -fPIC -LIBUC_CFLAGS_SOFT_FPU = -msoft-float -LIBUC_CFLAGS_HARD_FPU = - -LIBUC_CXXFLAGS = $(LIBUC_FMCU) -LIBUC_CXXFLAGS += -g -gdwarf-2 -LIBUC_CXXFLAGS += -Wextra -Wundef -Wcast-align -mthumb -msoft-float -LIBUC_CXXFLAGS_WARN_ON = -Wall -LIBUC_CXXFLAGS_WARN_OFF = -w -LIBUC_CXXFLAGS_RELEASE = -O2 -LIBUC_CXXFLAGS_DEBUG = -g -LIBUC_CXXFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g -LIBUC_CXXFLAGS_STATIC_LIB = -fPIC -LIBUC_CXXFLAGS_SOFT_FPU = -msoft-float -LIBUC_CXXFLAGS_HARD_FPU = - -#--------------------------------------------------------------------------------- -# LIBRARY DEFINITIONS -#--------------------------------------------------------------------------------- - -LIBUC_LIBS_DIR = $(LIBUC)/lib/bin/stm32f4 -LIBUC_INC_DIR = $(LIBUC)/lib/includes -include $(LIBUC)/rules/common/libsrules.mk - -#--------------------------------------------------------------------------------- -# BOARD SUPORT PACKAGES -#--------------------------------------------------------------------------------- -LIBUC_BSP_DIR=$(LIBUC)/bsp -LIBUC_BSP_BIN_DIR= $(LIBUC_BSP_DIR)/bin -LIBUC_BSP_INC_DIR= $(LIBUC_BSP_DIR)/includes -LIBUC_BSP = -L $(LIBUC_BSP_BIN_DIR)/$(BSP) -static -lbsp -LIBUC_BSP_INC = -I $(LIBUC_BSP_INC_DIR)/$(BSP) -#--------------------------------------------------------------------------------- -# DEVICE SPECIAL FILES -#--------------------------------------------------------------------------------- -LINKER_SCRIPT = $(ARCHFOLDER)/stm32_flash.ld -#DEVSOURCES += $(ARCHFOLDER)/system_stm32f4xx.c $(ARCHFOLDER)/stm32f4xx_it.c $(ARCHFOLDER)/syscalls.c -#ASMDEVSOURCES += $(ARCHFOLDER)/startup_stm32f4xx.s -#ASMDEVSOURCESND = $(notdir $(ASMDEVSOURCES)) -#DEVSOURCESND = $(notdir $(DEVSOURCES)) -#ASMDEVOBJECTFILES += $(ASMDEVSOURCESND:.s=.o) -#DEVOBJECTFILES += $(DEVSOURCESND:.c=.o) -#DEVOBJECTFILES := $(addprefix $(OBJDIR)/,$(DEVOBJECTFILES)) -#ASMDEVOBJECTFILES := $(addprefix $(OBJDIR)/,$(ASMDEVOBJECTFILES)) -#ASMOBJECTFILES += $(ASMDEVOBJECTFILES) -#OBJECTFILES += $(DEVOBJECTFILES) -STM32F4_INCDIR = $(ARCHFOLDER) - -INCLUDES = $(STM32F4_INCDIR) -I $(LIBUC_INC_DIR) $(LIBUC_INCLUDES) $(LIBUC_BSP_INC) -CFLAGS = $(LIBUC_CFLAGS) - -SOURCES += syscalls.c -SOURCES += startup_stm32f4xx.s - -APPOBJECTFILES += $(OBJDIR)/syscalls.o -APPOBJECTFILES += $(OBJDIR)/startup_stm32f4xx.o - -first: all - -$(OBJDIR)/syscalls.o: $(LIBUC)/rules/stm32f4-arm-none-eabi-gcc/syscalls.c $(OBJDIR) - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - - -$(OBJDIR)/startup_stm32f4xx.o: $(LIBUC)/rules/stm32f4-arm-none-eabi-gcc/startup_stm32f4xx.s $(OBJDIR) - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - - - - - - - diff --git a/rules/stm32f1-arm-none-eabi-gcc/startup_stm32f4xx.s b/rules/stm32f1-arm-none-eabi-gcc/startup_stm32f4xx.s deleted file mode 100644 --- a/rules/stm32f1-arm-none-eabi-gcc/startup_stm32f4xx.s +++ /dev/null @@ -1,509 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f4xx.s - * @author MCD Application Team - * @version V1.0.0 - * @date 30-September-2011 - * @brief STM32F4xx Devices vector table for RIDE7 toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Configure the clock system and the external SRAM mounted on - * STM324xG-EVAL board to be used as data memory (optional, - * to be enabled by user) - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M4 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m3 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss -/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ - -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss - -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call the application's entry point.*/ - bl bsp_init - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M3. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -*******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - - /* External Interrupts */ - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_IRQHandler /* PVD through EXTI Line detection */ - .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ - .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line0 */ - .word EXTI1_IRQHandler /* EXTI Line1 */ - .word EXTI2_IRQHandler /* EXTI Line2 */ - .word EXTI3_IRQHandler /* EXTI Line3 */ - .word EXTI4_IRQHandler /* EXTI Line4 */ - .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ - .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ - .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ - .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ - .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ - .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ - .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ - .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ - .word CAN1_TX_IRQHandler /* CAN1 TX */ - .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ - .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .word CAN1_SCE_IRQHandler /* CAN1 SCE */ - .word EXTI9_5_IRQHandler /* External Line[9:5]s */ - .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ - .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ - .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_IRQHandler /* USART3 */ - .word EXTI15_10_IRQHandler /* External Line[15:10]s */ - .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ - .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ - .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ - .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ - .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ - .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ - .word FSMC_IRQHandler /* FSMC */ - .word SDIO_IRQHandler /* SDIO */ - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ - .word UART4_IRQHandler /* UART4 */ - .word UART5_IRQHandler /* UART5 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ - .word TIM7_IRQHandler /* TIM7 */ - .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ - .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ - .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ - .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ - .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ - .word ETH_IRQHandler /* Ethernet */ - .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ - .word CAN2_TX_IRQHandler /* CAN2 TX */ - .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ - .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ - .word CAN2_SCE_IRQHandler /* CAN2 SCE */ - .word OTG_FS_IRQHandler /* USB OTG FS */ - .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ - .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ - .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ - .word USART6_IRQHandler /* USART6 */ - .word I2C3_EV_IRQHandler /* I2C3 event */ - .word I2C3_ER_IRQHandler /* I2C3 error */ - .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ - .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ - .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ - .word OTG_HS_IRQHandler /* USB OTG HS */ - .word DCMI_IRQHandler /* DCMI */ - .word CRYP_IRQHandler /* CRYP crypto */ - .word HASH_RNG_IRQHandler /* Hash and Rng */ - .word FPU_IRQHandler /* FPU */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMP_STAMP_IRQHandler - .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler - .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Stream0_IRQHandler - .thumb_set DMA1_Stream0_IRQHandler,Default_Handler - - .weak DMA1_Stream1_IRQHandler - .thumb_set DMA1_Stream1_IRQHandler,Default_Handler - - .weak DMA1_Stream2_IRQHandler - .thumb_set DMA1_Stream2_IRQHandler,Default_Handler - - .weak DMA1_Stream3_IRQHandler - .thumb_set DMA1_Stream3_IRQHandler,Default_Handler - - .weak DMA1_Stream4_IRQHandler - .thumb_set DMA1_Stream4_IRQHandler,Default_Handler - - .weak DMA1_Stream5_IRQHandler - .thumb_set DMA1_Stream5_IRQHandler,Default_Handler - - .weak DMA1_Stream6_IRQHandler - .thumb_set DMA1_Stream6_IRQHandler,Default_Handler - - .weak ADC_IRQHandler - .thumb_set ADC_IRQHandler,Default_Handler - - .weak CAN1_TX_IRQHandler - .thumb_set CAN1_TX_IRQHandler,Default_Handler - - .weak CAN1_RX0_IRQHandler - .thumb_set CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM9_IRQHandler - .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM10_IRQHandler - .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM11_IRQHandler - .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler - .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak OTG_FS_WKUP_IRQHandler - .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler - - .weak TIM8_BRK_TIM12_IRQHandler - .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler - - .weak TIM8_UP_TIM13_IRQHandler - .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_TIM14_IRQHandler - .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler - - .weak TIM8_CC_IRQHandler - .thumb_set TIM8_CC_IRQHandler,Default_Handler - - .weak DMA1_Stream7_IRQHandler - .thumb_set DMA1_Stream7_IRQHandler,Default_Handler - - .weak FSMC_IRQHandler - .thumb_set FSMC_IRQHandler,Default_Handler - - .weak SDIO_IRQHandler - .thumb_set SDIO_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Stream0_IRQHandler - .thumb_set DMA2_Stream0_IRQHandler,Default_Handler - - .weak DMA2_Stream1_IRQHandler - .thumb_set DMA2_Stream1_IRQHandler,Default_Handler - - .weak DMA2_Stream2_IRQHandler - .thumb_set DMA2_Stream2_IRQHandler,Default_Handler - - .weak DMA2_Stream3_IRQHandler - .thumb_set DMA2_Stream3_IRQHandler,Default_Handler - - .weak DMA2_Stream4_IRQHandler - .thumb_set DMA2_Stream4_IRQHandler,Default_Handler - - .weak ETH_IRQHandler - .thumb_set ETH_IRQHandler,Default_Handler - - .weak ETH_WKUP_IRQHandler - .thumb_set ETH_WKUP_IRQHandler,Default_Handler - - .weak CAN2_TX_IRQHandler - .thumb_set CAN2_TX_IRQHandler,Default_Handler - - .weak CAN2_RX0_IRQHandler - .thumb_set CAN2_RX0_IRQHandler,Default_Handler - - .weak CAN2_RX1_IRQHandler - .thumb_set CAN2_RX1_IRQHandler,Default_Handler - - .weak CAN2_SCE_IRQHandler - .thumb_set CAN2_SCE_IRQHandler,Default_Handler - - .weak OTG_FS_IRQHandler - .thumb_set OTG_FS_IRQHandler,Default_Handler - - .weak DMA2_Stream5_IRQHandler - .thumb_set DMA2_Stream5_IRQHandler,Default_Handler - - .weak DMA2_Stream6_IRQHandler - .thumb_set DMA2_Stream6_IRQHandler,Default_Handler - - .weak DMA2_Stream7_IRQHandler - .thumb_set DMA2_Stream7_IRQHandler,Default_Handler - - .weak USART6_IRQHandler - .thumb_set USART6_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler - .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler - .thumb_set I2C3_ER_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_OUT_IRQHandler - .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_IN_IRQHandler - .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler - - .weak OTG_HS_WKUP_IRQHandler - .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler - - .weak OTG_HS_IRQHandler - .thumb_set OTG_HS_IRQHandler,Default_Handler - - .weak DCMI_IRQHandler - .thumb_set DCMI_IRQHandler,Default_Handler - - .weak CRYP_IRQHandler - .thumb_set CRYP_IRQHandler,Default_Handler - - .weak HASH_RNG_IRQHandler - .thumb_set HASH_RNG_IRQHandler,Default_Handler - - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/rules/stm32f1-arm-none-eabi-gcc/stm32_flash.ld b/rules/stm32f1-arm-none-eabi-gcc/stm32_flash.ld deleted file mode 100644 --- a/rules/stm32f1-arm-none-eabi-gcc/stm32_flash.ld +++ /dev/null @@ -1,171 +0,0 @@ -/* -***************************************************************************** -** -** File : stm32_flash.ld -** -** Abstract : Linker script for STM32F207IG Device with -** 1024KByte FLASH, 112KByte RAM -** -** Set heap size, stack size and stack location according -** to application requirements. -** -** Set memory bank area and size if external memory is used. -** -** Target : STMicroelectronics STM32 -** -** Environment : Atollic TrueSTUDIO(R) -** -** Distribution: The file is distributed �as is,� without any warranty -** of any kind. -** -** (c)Copyright Atollic AB. -** You may use this file as-is or modify it according to the needs of your -** project. Distribution of this file (unmodified or modified) is not -** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the -** rights to distribute the assembled, compiled & linked contents of this -** file as part of an application binary file, provided that it is built -** using the Atollic TrueSTUDIO(R) toolchain. -** -***************************************************************************** -*/ - -/* Entry Point */ -ENTRY(Reset_Handler) - -/* Highest address of the user mode stack */ -_estack = 0x2001c000; /* end of 112K RAM */ - -/* Generate a link error if heap and stack don't fit into RAM */ -_Min_Heap_Size = 0; /* required amount of heap */ -_Min_Stack_Size = 0x400; /* required amount of stack */ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112K - MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K -} - -/* Define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } >FLASH - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - *(.glue_7) /* glue arm to thumb code */ - *(.glue_7t) /* glue thumb to arm code */ - *(.eh_frame) - - KEEP (*(.init)) - KEEP (*(.fini)) - - . = ALIGN(4); - _etext = .; /* define a global symbols at end of code */ - } >FLASH - - - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH - .ARM : { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } >FLASH - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array*)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >FLASH - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array*)) - PROVIDE_HIDDEN (__init_array_end = .); - } >FLASH - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(.fini_array*)) - KEEP (*(SORT(.fini_array.*))) - PROVIDE_HIDDEN (__fini_array_end = .); - } >FLASH - - /* used by the startup to initialize data */ - _sidata = .; - - /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end */ - } >RAM - - /* Uninitialized data section */ - . = ALIGN(4); - .bss : - { - /* This is used by the startup in order to initialize the .bss secion */ - _sbss = .; /* define a global symbol at bss start */ - __bss_start__ = _sbss; - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end */ - __bss_end__ = _ebss; - } >RAM - - /* User_heap_stack section, used to check that there is enough RAM left */ - ._user_heap_stack : - { - . = ALIGN(4); - PROVIDE ( end = . ); - PROVIDE ( _end = . ); - . = . + _Min_Heap_Size; - . = . + _Min_Stack_Size; - . = ALIGN(4); - } >RAM - - /* MEMORY_bank1 section, code must be located here explicitly */ - /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ - .memory_b1_text : - { - *(.mb1text) /* .mb1text sections (code) */ - *(.mb1text*) /* .mb1text* sections (code) */ - *(.mb1rodata) /* read-only data (constants) */ - *(.mb1rodata*) - } >MEMORY_B1 - - /* Remove information from the standard libraries */ - /DISCARD/ : - { - libc.a ( * ) - libm.a ( * ) - libgcc.a ( * ) - } - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/rules/stm32f1-arm-none-eabi-gcc/syscalls.c b/rules/stm32f1-arm-none-eabi-gcc/syscalls.c deleted file mode 100644 --- a/rules/stm32f1-arm-none-eabi-gcc/syscalls.c +++ /dev/null @@ -1,249 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#undef errno - - - -#ifdef __cplusplus -extern "C" { -#endif -extern int errno; -streamdevice* __files__[256]; - -char *__env[1] = { 0 }; -char **environ = __env; - -int _exit() -{ - while(1); -} - -int _close(int file) -{ - if(file<256 && __files__[file]!=NULL) - { - return __files__[file]->close(__files__[file]); - } - return 0; -} - -int _write(int file, char *ptr, int len) -{ - if(file<256 && __files__[file]!=NULL) - { - if(__files__[file]->write(__files__[file],ptr,1,len)) return len; - } - return 0; -} - -int _execve(char *name, char **argv, char **env) { -errno = ENOMEM; -return -1; -} - - -int _fork(void) { -errno = EAGAIN; -return -1; -} - -int _fstat(int file, struct stat *st) { -st->st_mode = S_IFCHR; -return 0; -} - - -int _getpid(void) { -return 1; -} - - -int _isatty(int file) { -return 1; -} - - -int _kill(int pid, int sig) { -errno = EINVAL; -return -1; -} - - -int _link(char *old, char *new) { -errno = EMLINK; -return -1; -} - - -int _lseek(int file, int ptr, int dir) { -return 0; -} - -int _open(const char *name, int flags, int mode) -{ - if(!strncmp("UART", name, 4) && ((name[4] & 0x30)==0x30)) - { - uart_t* uart1 = malloc(sizeof(uart_t)); - streamdevice* fd1 = malloc(sizeof(streamdevice)); - if(uartopen((name[4] & 0xF)-1,uart1)); - { - uartmkstreamdev(uart1,fd1); - int i=2; - while(i<256 && __files__[i]!=NULL)i++; - if(i!=256) - { - __files__[i] = fd1; - return i; - } - else printf("Too much files opened\n\r"); - } - } - return -1; -} - -int _read(int file, char *ptr, int len) { -return 0; -} - - - -caddr_t _sbrk(int incr) { -register char * stack_ptr __asm__ ("sp"); -extern char _end; /* Defined by the linker */ -static char *heap_end; -char *prev_heap_end; -if (heap_end == 0) { -heap_end = &_end; -} -prev_heap_end = heap_end; -if (heap_end + incr > stack_ptr) { -_write (1, "Heap and stack collision\n", 25); -abort (); -} -heap_end += incr; -return (caddr_t) prev_heap_end; -} - - - -int _stat(char *file, struct stat *st) { -st->st_mode = S_IFCHR; -return 0; -} - - -int _times(struct tms *buf) { -return -1; -} - - -int _unlink(char *name) { -errno = ENOENT; -return -1; -} - -int _wait(int *status) { -errno = ECHILD; -return -1; -} - - -int _read_r (struct _reent *r, int file, char * ptr, int len) -{ - r = r; - file = file; - ptr = ptr; - len = len; - - errno = EINVAL; - return -1; -} - -/***************************************************************************/ - -int _lseek_r (struct _reent *r, int file, int ptr, int dir) -{ - r = r; - file = file; - ptr = ptr; - dir = dir; - - return 0; -} - -/***************************************************************************/ - -int _write_r (struct _reent *r, int file, char * ptr, int len) -{ - return _write(file, ptr, len); -} - -/***************************************************************************/ - -int _close_r (struct _reent *r, int file) -{ - return 0; -} - -/***************************************************************************/ - -caddr_t _sbrk_r (struct _reent *r, int incr) -{ -register char * stack_ptr __asm__ ("sp"); -extern char _end; /* Defined by the linker */ -static char *heap_end; -char *prev_heap_end; -if (heap_end == 0) { -heap_end = &_end; -} -prev_heap_end = heap_end; -if (heap_end + incr > stack_ptr) { -_write (1, "Heap and stack collision\n", 25); -abort (); -} -heap_end += incr; -return (caddr_t) prev_heap_end; -} - -/***************************************************************************/ - -int _fstat_r (struct _reent *r, int file, struct stat * st) -{ - r = r; - file = file; - - memset (st, 0, sizeof (* st)); - st->st_mode = S_IFCHR; - return 0; -} - -/***************************************************************************/ -int _open_r(struct _reent *r,const char *name, int flags, int mode) -{ - return _open(name, flags, mode); -} - -int _isatty_r(struct _reent *r, int fd) -{ - r = r; - fd = fd; - - return 1; -} - - -#ifdef __cplusplus -} -#endif - - diff --git a/rules/stm32f4-arm-none-eabi-gcc/gdbinit b/rules/stm32f4-arm-none-eabi-gcc/gdbinit deleted file mode 100644 --- a/rules/stm32f4-arm-none-eabi-gcc/gdbinit +++ /dev/null @@ -1,1 +0,0 @@ -load diff --git a/rules/stm32f4-arm-none-eabi-gcc/optimised_math.h b/rules/stm32f4-arm-none-eabi-gcc/optimised_math.h deleted file mode 100644 --- a/rules/stm32f4-arm-none-eabi-gcc/optimised_math.h +++ /dev/null @@ -1,37 +0,0 @@ -/*------------------------------------------------------------------------------ --- This file is a part of the libuc, microcontroler library --- Copyright (C) 2012, Alexis Jeandet --- --- This program is free software; you can redistribute it and/or modify --- it under the terms of the GNU General Public License as published by --- the Free Software Foundation; either version 3 of the License, or --- (at your option) any later version. --- --- This program is distributed in the hope that it will be useful, --- but WITHOUT ANY WARRANTY; without even the implied warranty of --- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --- GNU General Public License for more details. --- --- You should have received a copy of the GNU General Public License --- along with this program; if not, write to the Free Software --- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -------------------------------------------------------------------------------- --- Author : Alexis Jeandet --- Mail : alexis.jeandet@gmail.com --------------------------------------------------------------------------------*/ -#ifndef OPTIMISED_MATH_H -#define OPTIMISED_MATH_H -#include - -inline float32_t optimised_sqrt(float32_t value) -{ - float32_t out; - arm_sqrt_f32(value,&out); - return out; -} - -inline float optimised_sin(float32_t x) -{ - return arm_sin_f32(x); -} -#endif diff --git a/rules/stm32f4-arm-none-eabi-gcc/rules.mk b/rules/stm32f4-arm-none-eabi-gcc/rules.mk deleted file mode 100644 --- a/rules/stm32f4-arm-none-eabi-gcc/rules.mk +++ /dev/null @@ -1,104 +0,0 @@ -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - -#--------------------------------------------------------------------------------- -# GCC EXECUTABLES -#--------------------------------------------------------------------------------- -LIBUC_PREFIX = arm-none-eabi- -LIBUC_CC = $(LIBUC_PREFIX)gcc -LIBUC_CXX = $(LIBUC_PREFIX)g++ -LIBUC_AR = $(LIBUC_PREFIX)ar -LIBUC_RANLIB = $(LIBUC_PREFIX)ranlib -LIBUC_AS = $(LIBUC_PREFIX)as -LIBUC_LD = $(LIBUC_PREFIX)ld -LIBUC_SIZE = $(LIBUC_PREFIX)size -LIBUC_STRIP = $(LIBUC_PREFIX)strip -s -LIBUC_READELF = $(LIBUC_PREFIX)readelf -LIBUC_OBJCOPY=$(LIBUC_PREFIX)objcopy -LIBUC_OBJDUMP=$(LIBUC_PREFIX)objdump - - - -#--------------------------------------------------------------------------------- -# GCC FLAGS -#--------------------------------------------------------------------------------- -LIBUC_FMCU = -mcpu=cortex-m4 -LIBUC_CFLAGS = -g -O3 -mlittle-endian -mthumb $(LIBUC_FMCU) -LIBUC_CFLAGS += -std=c99 #-ffreestanding -LIBUC_LDFLAGS = -LIBUC_ODFLAGS = -x --syms -LIBUC_CPFLAGS = -LIBUC_CFLAGS_WARN_ON = -Wall -LIBUC_CFLAGS_WARN_OFF = -w -LIBUC_CFLAGS_RELEASE = -O2 -LIBUC_CFLAGS_DEBUG = -g -LIBUC_CFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g -LIBUC_CFLAGS_STATIC_LIB = -fPIC -LIBUC_CFLAGS_SOFT_FPU = -msoft-float -LIBUC_CFLAGS_HARD_FPU = - -LIBUC_CXXFLAGS = $(LIBUC_FMCU) -LIBUC_CXXFLAGS += -g -gdwarf-2 -LIBUC_CXXFLAGS += -Wextra -Wundef -Wcast-align -mthumb -msoft-float -LIBUC_CXXFLAGS_WARN_ON = -Wall -LIBUC_CXXFLAGS_WARN_OFF = -w -LIBUC_CXXFLAGS_RELEASE = -O2 -LIBUC_CXXFLAGS_DEBUG = -g -LIBUC_CXXFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g -LIBUC_CXXFLAGS_STATIC_LIB = -fPIC -LIBUC_CXXFLAGS_SOFT_FPU = -msoft-float -LIBUC_CXXFLAGS_HARD_FPU = - - -#--------------------------------------------------------------------------------- -# DEVICE SPECIAL FILES -#--------------------------------------------------------------------------------- -LINKER_SCRIPT = $(LIBUC)/lib/src/stm32f4/CPU/$(CPUMODEL)/stm32_flash.ld -STM32F4_INCDIR = $(ARCHFOLDER) - -INCLUDES = $(STM32F4_INCDIR) -CFLAGS = $(LIBUC_CFLAGS) - -SOURCES += syscalls.c -SOURCES += startup_stm32f4xx.s -SOURCES += fs.c - -APPOBJECTFILES += $(OBJDIR)/syscalls.o -APPOBJECTFILES += $(OBJDIR)/startup_stm32f4xx.o -APPOBJECTFILES += $(OBJDIR)/fs.o -first: all - -$(OBJDIR)/syscalls.o: $(LIBUC)/rules/stm32f4-arm-none-eabi-gcc/syscalls.c $(OBJDIR) - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - - -$(OBJDIR)/startup_stm32f4xx.o: $(LIBUC)/lib/src/stm32f4/CPU/$(CPUMODEL)/startup_stm32f4xx.s $(OBJDIR) - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - -$(OBJDIR)/fs.o: $(LIBUC)/lib/src/stm32f4/CPU/$(CPUMODEL)/fs.c $(OBJDIR) - $(LIBUC_CC) -O3 -I $(INCLUDES) -c $(CFLAGS) $< -o $@ - - - - - - diff --git a/rules/stm32f4-arm-none-eabi-gcc/rules.pri b/rules/stm32f4-arm-none-eabi-gcc/rules.pri deleted file mode 100644 --- a/rules/stm32f4-arm-none-eabi-gcc/rules.pri +++ /dev/null @@ -1,145 +0,0 @@ -libuc2=$$(libuc2) -QMAKE_CC=arm-none-eabi-gcc -message(C compiler forced to: $$QMAKE_CC) -QMAKE_CXX=arm-none-eabi-g++ -message(C++ compiler forced to: $$QMAKE_CXX) -QMAKE_AR=arm-none-eabi-ar rcs -message(Archiver forced to: $$QMAKE_AR) -QMAKE_LINK=arm-none-eabi-gcc -message(Linker forced to: $$QMAKE_LINK) -QMAKE_LINK_SHLIB=arm-none-eabi-g++ -QMAKE_OBJCOPY= arm-none-eabi-objcopy -QMAKE_STRIP=arm-none-eabi-strip -QMAKE_GDB=arm-none-eabi-gdb -INCLUDEPATH = -ARCH=stm32f4-arm-none-eabi-gcc - -QMAKE_CFLAGS_DEBUG= -g -QMAKE_CFLAGS_RELEASE="" -QMAKE_CXXFLAGS_DEBUG= -g -QMAKE_CXXFLAGS_RELEASE="" -QMAKE_LFLAGS_RELEASE="" -QMAKE_LFLAGS_DEBUG= -g -QMAKE_CXXFLAGS_DEPS = -QMAKE_CXXFLAGS_WARN_ON = -Wall -QMAKE_CXXFLAGS_WARN_OFF = -w -QMAKE_CXXFLAGS_RELEASE = -QMAKE_CXXFLAGS_DEBUG = -QMAKE_CXXFLAGS_YACC = -QMAKE_CXXFLAGS_THREAD = -QMAKE_CXXFLAGS_RTTI_ON = -QMAKE_CXXFLAGS_RTTI_OFF = -QMAKE_CXXFLAGS_EXCEPTIONS_ON = -QMAKE_CXXFLAGS_EXCEPTIONS_OFF = -QMAKE_CFLAGS_WARN_ON = -Wall -QMAKE_CFLAGS_WARN_OFF = -w -QMAKE_CFLAGS_RELEASE = -QMAKE_CFLAGS_YACC = -QMAKE_LFLAGS_EXCEPTIONS_ON = -QMAKE_LFLAGS_EXCEPTIONS_OFF = -QMAKE_LFLAGS_RELEASE = -QMAKE_LFLAGS_CONSOLE = -QMAKE_LFLAGS_WINDOWS = -QMAKE_LFLAGS_DLL = -QMAKE_INCDIR_QT = -QMAKE_INCDIR = -QMAKE_CFLAGS_SHLIB = -QMAKE_CFLAGS_STATIC_LIB = -QMAKE_CXXFLAGS_SHLIB = -QMAKE_CXXFLAGS_STATIC_LIB = - -DEFINES += __OPTIMIZED_MATH -DEFINES += assert_param(expr)=((void)0) -INCLUDEPATH += $$PWD -INCLUDEPATH += $${libuc2}/lib/src/stm32f4/CPU/STM32F4xx_StdPeriph_Driver/inc -INCLUDEPATH += $${libuc2}/lib/src/stm32f4/CPU/CMSIS/Include -contains(CONFIG , USB){ - include($${libuc2}/lib/src/stm32f4/CPU/USB/USB.pri) -} -#DEFINES += __VFP_FP__ -DEFINES += __FPU_PRESENT=1 -DEFINES += ARM_MATH_CM4 - -contains( TEMPLATE, app ) { - OBJECTS_DIR=obj - DESTDIR=bin - unix:QMAKE_POST_LINK += arm-none-eabi-objcopy -O ihex "$(TARGET)" $$DESTDIR/"$(QMAKE_TARGET).hex" && arm-none-eabi-objcopy -O binary "$(TARGET)" $$DESTDIR/"$(QMAKE_TARGET).bin" - win32:QMAKE_POST_LINK += arm-none-eabi-objcopy -O ihex "$(DESTDIR_TARGET)" $$DESTDIR/"$(QMAKE_TARGET).hex" && arm-none-eabi-objcopy -O binary "$(DESTDIR_TARGET)" $$DESTDIR/"$(QMAKE_TARGET).bin" - - -} - -contains( TEMPLATE, app ) { - #include($$libuc2/bsp/cfg/$$BSP/bsp.pri) - LIBS += -L$$libuc2/bsp/bin/$$BSP - LIBS += -lbsp -} - -include($$libuc2/rules/common/librules.pri) - -contains( TEMPLATE, lib ) { - OBJECTS_DIR=obj - contains( CONFIG, bsp ){ - TARGET = bsp - DESTDIR=$$libuc2/bsp/bin/$$BSP - INCLUDEPATH += $$libuc2/bsp/includes/$$BSP - message(Writting a Makefile for a bsp) - }else{ - message(Writting a Makefile for a library) - DESTDIR=$$LIBUC_BIN_LIBS_DIR - } - -} - - -QMAKE_CFLAGS_RELEASE+= -O3 -mlittle-endian -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -std=c99 -QMAKE_CFLAGS_DEBUG+= -O3 -mlittle-endian -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -std=c99 -QMAKE_CXXFLAGS_RELEASE+= -O3 -mlittle-endian -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -std=c99 -QMAKE_CXXFLAGS_DEBUG+= -O3 -mlittle-endian -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -std=c99 - -contains( TEMPLATE, app ) { - QMAKE_LFLAGS_DEBUG+= -O3 -mlittle-endian -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -std=c99 -T $$libuc2/lib/src/stm32f4/CPU/$$CPU/stm32_flash.ld - QMAKE_LFLAGS_RELEASE+= -O3 -mlittle-endian -mthumb -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -std=c99 -T $$libuc2/lib/src/stm32f4/CPU/$$CPU/stm32_flash.ld -} - -contains( TEMPLATE, lib ) { - CONFIG+=staticlib -} - -INCLUDEPATH+=$$libuc2/lib/includes \ - $$libuc2/lib/includes/$$ARCH - -contains( TEMPLATE, app ) { - INCLUDEPATH+=$$libuc2/bsp/includes/$$BSP - SOURCES +=$$libuc2/lib/src/stm32f4/CPU/$$CPU/fs.c - SOURCES +=$$libuc2/rules/$$ARCH/syscalls.c - - SOURCES +=$$libuc2/lib/src/stm32f4/CPU/$$CPU/startup.s - SOURCES +=$$libuc2/lib/src/stm32f4/CPU/$$CPU/cpuinit.c - - #SOURCES +=$$libuc2/lib/src/stm32f4/CPU/$$CPU/startup_stm32f4xx.s - #SOURCES +=$$libuc2/lib/src/stm32f4/CPU/system_stm32f4xx.c - - OTHER_FILES += $$libuc2/lib/src/stm32f4/CPU/$$CPU/stm32_flash.ld - - stflash.target = stflash - stflash.commands = cd $$DESTDIR && sudo st-flash write $(QMAKE_TARGET).bin 0x08000000 - QMAKE_EXTRA_TARGETS += stflash -} - - - - - - - - - - - - - - - - - diff --git a/rules/stm32f4-arm-none-eabi-gcc/startup_stm32f4xx.s b/rules/stm32f4-arm-none-eabi-gcc/startup_stm32f4xx.s deleted file mode 100644 --- a/rules/stm32f4-arm-none-eabi-gcc/startup_stm32f4xx.s +++ /dev/null @@ -1,509 +0,0 @@ -/** - ****************************************************************************** - * @file startup_stm32f4xx.s - * @author MCD Application Team - * @version V1.0.0 - * @date 30-September-2011 - * @brief STM32F4xx Devices vector table for RIDE7 toolchain. - * This module performs: - * - Set the initial SP - * - Set the initial PC == Reset_Handler, - * - Set the vector table entries with the exceptions ISR address - * - Configure the clock system and the external SRAM mounted on - * STM324xG-EVAL board to be used as data memory (optional, - * to be enabled by user) - * - Branches to main in the C library (which eventually - * calls main()). - * After Reset the Cortex-M4 processor is in Thread mode, - * priority is Privileged, and the Stack is set to Main. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - - .syntax unified - .cpu cortex-m3 - .fpu softvfp - .thumb - -.global g_pfnVectors -.global Default_Handler - -/* start address for the initialization values of the .data section. -defined in linker script */ -.word _sidata -/* start address for the .data section. defined in linker script */ -.word _sdata -/* end address for the .data section. defined in linker script */ -.word _edata -/* start address for the .bss section. defined in linker script */ -.word _sbss -/* end address for the .bss section. defined in linker script */ -.word _ebss -/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ - -/** - * @brief This is the code that gets called when the processor first - * starts execution following a reset event. Only the absolutely - * necessary set is performed, after which the application - * supplied main() routine is called. - * @param None - * @retval : None -*/ - - .section .text.Reset_Handler - .weak Reset_Handler - .type Reset_Handler, %function -Reset_Handler: - -/* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 - b LoopCopyDataInit - -CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 - -LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 - bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss -/* Zero fill the bss segment. */ -FillZerobss: - movs r3, #0 - str r3, [r2], #4 - -LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 - bcc FillZerobss - -/* Call the clock system intitialization function.*/ - bl SystemInit -/* Call the application's entry point.*/ - bl bsp_init - bx lr -.size Reset_Handler, .-Reset_Handler - -/** - * @brief This is the code that gets called when the processor receives an - * unexpected interrupt. This simply enters an infinite loop, preserving - * the system state for examination by a debugger. - * @param None - * @retval None -*/ - .section .text.Default_Handler,"ax",%progbits -Default_Handler: -Infinite_Loop: - b Infinite_Loop - .size Default_Handler, .-Default_Handler -/****************************************************************************** -* -* The minimal vector table for a Cortex M3. Note that the proper constructs -* must be placed on this to ensure that it ends up at physical address -* 0x0000.0000. -* -*******************************************************************************/ - .section .isr_vector,"a",%progbits - .type g_pfnVectors, %object - .size g_pfnVectors, .-g_pfnVectors - - -g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word MemManage_Handler - .word BusFault_Handler - .word UsageFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word DebugMon_Handler - .word 0 - .word PendSV_Handler - .word SysTick_Handler - - /* External Interrupts */ - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_IRQHandler /* PVD through EXTI Line detection */ - .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ - .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_IRQHandler /* EXTI Line0 */ - .word EXTI1_IRQHandler /* EXTI Line1 */ - .word EXTI2_IRQHandler /* EXTI Line2 */ - .word EXTI3_IRQHandler /* EXTI Line3 */ - .word EXTI4_IRQHandler /* EXTI Line4 */ - .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ - .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ - .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ - .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ - .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ - .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ - .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ - .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ - .word CAN1_TX_IRQHandler /* CAN1 TX */ - .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ - .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ - .word CAN1_SCE_IRQHandler /* CAN1 SCE */ - .word EXTI9_5_IRQHandler /* External Line[9:5]s */ - .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ - .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ - .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM4_IRQHandler /* TIM4 */ - .word I2C1_EV_IRQHandler /* I2C1 Event */ - .word I2C1_ER_IRQHandler /* I2C1 Error */ - .word I2C2_EV_IRQHandler /* I2C2 Event */ - .word I2C2_ER_IRQHandler /* I2C2 Error */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_IRQHandler /* USART3 */ - .word EXTI15_10_IRQHandler /* External Line[15:10]s */ - .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ - .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ - .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ - .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ - .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ - .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ - .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ - .word FSMC_IRQHandler /* FSMC */ - .word SDIO_IRQHandler /* SDIO */ - .word TIM5_IRQHandler /* TIM5 */ - .word SPI3_IRQHandler /* SPI3 */ - .word UART4_IRQHandler /* UART4 */ - .word UART5_IRQHandler /* UART5 */ - .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ - .word TIM7_IRQHandler /* TIM7 */ - .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ - .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ - .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ - .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ - .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ - .word ETH_IRQHandler /* Ethernet */ - .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ - .word CAN2_TX_IRQHandler /* CAN2 TX */ - .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ - .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ - .word CAN2_SCE_IRQHandler /* CAN2 SCE */ - .word OTG_FS_IRQHandler /* USB OTG FS */ - .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ - .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ - .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ - .word USART6_IRQHandler /* USART6 */ - .word I2C3_EV_IRQHandler /* I2C3 event */ - .word I2C3_ER_IRQHandler /* I2C3 error */ - .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ - .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ - .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ - .word OTG_HS_IRQHandler /* USB OTG HS */ - .word DCMI_IRQHandler /* DCMI */ - .word CRYP_IRQHandler /* CRYP crypto */ - .word HASH_RNG_IRQHandler /* Hash and Rng */ - .word FPU_IRQHandler /* FPU */ - -/******************************************************************************* -* -* Provide weak aliases for each Exception handler to the Default_Handler. -* As they are weak aliases, any function with the same name will override -* this definition. -* -*******************************************************************************/ - .weak NMI_Handler - .thumb_set NMI_Handler,Default_Handler - - .weak HardFault_Handler - .thumb_set HardFault_Handler,Default_Handler - - .weak MemManage_Handler - .thumb_set MemManage_Handler,Default_Handler - - .weak BusFault_Handler - .thumb_set BusFault_Handler,Default_Handler - - .weak UsageFault_Handler - .thumb_set UsageFault_Handler,Default_Handler - - .weak SVC_Handler - .thumb_set SVC_Handler,Default_Handler - - .weak DebugMon_Handler - .thumb_set DebugMon_Handler,Default_Handler - - .weak PendSV_Handler - .thumb_set PendSV_Handler,Default_Handler - - .weak SysTick_Handler - .thumb_set SysTick_Handler,Default_Handler - - .weak WWDG_IRQHandler - .thumb_set WWDG_IRQHandler,Default_Handler - - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - - .weak TAMP_STAMP_IRQHandler - .thumb_set TAMP_STAMP_IRQHandler,Default_Handler - - .weak RTC_WKUP_IRQHandler - .thumb_set RTC_WKUP_IRQHandler,Default_Handler - - .weak FLASH_IRQHandler - .thumb_set FLASH_IRQHandler,Default_Handler - - .weak RCC_IRQHandler - .thumb_set RCC_IRQHandler,Default_Handler - - .weak EXTI0_IRQHandler - .thumb_set EXTI0_IRQHandler,Default_Handler - - .weak EXTI1_IRQHandler - .thumb_set EXTI1_IRQHandler,Default_Handler - - .weak EXTI2_IRQHandler - .thumb_set EXTI2_IRQHandler,Default_Handler - - .weak EXTI3_IRQHandler - .thumb_set EXTI3_IRQHandler,Default_Handler - - .weak EXTI4_IRQHandler - .thumb_set EXTI4_IRQHandler,Default_Handler - - .weak DMA1_Stream0_IRQHandler - .thumb_set DMA1_Stream0_IRQHandler,Default_Handler - - .weak DMA1_Stream1_IRQHandler - .thumb_set DMA1_Stream1_IRQHandler,Default_Handler - - .weak DMA1_Stream2_IRQHandler - .thumb_set DMA1_Stream2_IRQHandler,Default_Handler - - .weak DMA1_Stream3_IRQHandler - .thumb_set DMA1_Stream3_IRQHandler,Default_Handler - - .weak DMA1_Stream4_IRQHandler - .thumb_set DMA1_Stream4_IRQHandler,Default_Handler - - .weak DMA1_Stream5_IRQHandler - .thumb_set DMA1_Stream5_IRQHandler,Default_Handler - - .weak DMA1_Stream6_IRQHandler - .thumb_set DMA1_Stream6_IRQHandler,Default_Handler - - .weak ADC_IRQHandler - .thumb_set ADC_IRQHandler,Default_Handler - - .weak CAN1_TX_IRQHandler - .thumb_set CAN1_TX_IRQHandler,Default_Handler - - .weak CAN1_RX0_IRQHandler - .thumb_set CAN1_RX0_IRQHandler,Default_Handler - - .weak CAN1_RX1_IRQHandler - .thumb_set CAN1_RX1_IRQHandler,Default_Handler - - .weak CAN1_SCE_IRQHandler - .thumb_set CAN1_SCE_IRQHandler,Default_Handler - - .weak EXTI9_5_IRQHandler - .thumb_set EXTI9_5_IRQHandler,Default_Handler - - .weak TIM1_BRK_TIM9_IRQHandler - .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler - - .weak TIM1_UP_TIM10_IRQHandler - .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler - - .weak TIM1_TRG_COM_TIM11_IRQHandler - .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler - - .weak TIM1_CC_IRQHandler - .thumb_set TIM1_CC_IRQHandler,Default_Handler - - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - - .weak TIM3_IRQHandler - .thumb_set TIM3_IRQHandler,Default_Handler - - .weak TIM4_IRQHandler - .thumb_set TIM4_IRQHandler,Default_Handler - - .weak I2C1_EV_IRQHandler - .thumb_set I2C1_EV_IRQHandler,Default_Handler - - .weak I2C1_ER_IRQHandler - .thumb_set I2C1_ER_IRQHandler,Default_Handler - - .weak I2C2_EV_IRQHandler - .thumb_set I2C2_EV_IRQHandler,Default_Handler - - .weak I2C2_ER_IRQHandler - .thumb_set I2C2_ER_IRQHandler,Default_Handler - - .weak SPI1_IRQHandler - .thumb_set SPI1_IRQHandler,Default_Handler - - .weak SPI2_IRQHandler - .thumb_set SPI2_IRQHandler,Default_Handler - - .weak USART1_IRQHandler - .thumb_set USART1_IRQHandler,Default_Handler - - .weak USART2_IRQHandler - .thumb_set USART2_IRQHandler,Default_Handler - - .weak USART3_IRQHandler - .thumb_set USART3_IRQHandler,Default_Handler - - .weak EXTI15_10_IRQHandler - .thumb_set EXTI15_10_IRQHandler,Default_Handler - - .weak RTC_Alarm_IRQHandler - .thumb_set RTC_Alarm_IRQHandler,Default_Handler - - .weak OTG_FS_WKUP_IRQHandler - .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler - - .weak TIM8_BRK_TIM12_IRQHandler - .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler - - .weak TIM8_UP_TIM13_IRQHandler - .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler - - .weak TIM8_TRG_COM_TIM14_IRQHandler - .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler - - .weak TIM8_CC_IRQHandler - .thumb_set TIM8_CC_IRQHandler,Default_Handler - - .weak DMA1_Stream7_IRQHandler - .thumb_set DMA1_Stream7_IRQHandler,Default_Handler - - .weak FSMC_IRQHandler - .thumb_set FSMC_IRQHandler,Default_Handler - - .weak SDIO_IRQHandler - .thumb_set SDIO_IRQHandler,Default_Handler - - .weak TIM5_IRQHandler - .thumb_set TIM5_IRQHandler,Default_Handler - - .weak SPI3_IRQHandler - .thumb_set SPI3_IRQHandler,Default_Handler - - .weak UART4_IRQHandler - .thumb_set UART4_IRQHandler,Default_Handler - - .weak UART5_IRQHandler - .thumb_set UART5_IRQHandler,Default_Handler - - .weak TIM6_DAC_IRQHandler - .thumb_set TIM6_DAC_IRQHandler,Default_Handler - - .weak TIM7_IRQHandler - .thumb_set TIM7_IRQHandler,Default_Handler - - .weak DMA2_Stream0_IRQHandler - .thumb_set DMA2_Stream0_IRQHandler,Default_Handler - - .weak DMA2_Stream1_IRQHandler - .thumb_set DMA2_Stream1_IRQHandler,Default_Handler - - .weak DMA2_Stream2_IRQHandler - .thumb_set DMA2_Stream2_IRQHandler,Default_Handler - - .weak DMA2_Stream3_IRQHandler - .thumb_set DMA2_Stream3_IRQHandler,Default_Handler - - .weak DMA2_Stream4_IRQHandler - .thumb_set DMA2_Stream4_IRQHandler,Default_Handler - - .weak ETH_IRQHandler - .thumb_set ETH_IRQHandler,Default_Handler - - .weak ETH_WKUP_IRQHandler - .thumb_set ETH_WKUP_IRQHandler,Default_Handler - - .weak CAN2_TX_IRQHandler - .thumb_set CAN2_TX_IRQHandler,Default_Handler - - .weak CAN2_RX0_IRQHandler - .thumb_set CAN2_RX0_IRQHandler,Default_Handler - - .weak CAN2_RX1_IRQHandler - .thumb_set CAN2_RX1_IRQHandler,Default_Handler - - .weak CAN2_SCE_IRQHandler - .thumb_set CAN2_SCE_IRQHandler,Default_Handler - - .weak OTG_FS_IRQHandler - .thumb_set OTG_FS_IRQHandler,Default_Handler - - .weak DMA2_Stream5_IRQHandler - .thumb_set DMA2_Stream5_IRQHandler,Default_Handler - - .weak DMA2_Stream6_IRQHandler - .thumb_set DMA2_Stream6_IRQHandler,Default_Handler - - .weak DMA2_Stream7_IRQHandler - .thumb_set DMA2_Stream7_IRQHandler,Default_Handler - - .weak USART6_IRQHandler - .thumb_set USART6_IRQHandler,Default_Handler - - .weak I2C3_EV_IRQHandler - .thumb_set I2C3_EV_IRQHandler,Default_Handler - - .weak I2C3_ER_IRQHandler - .thumb_set I2C3_ER_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_OUT_IRQHandler - .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler - - .weak OTG_HS_EP1_IN_IRQHandler - .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler - - .weak OTG_HS_WKUP_IRQHandler - .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler - - .weak OTG_HS_IRQHandler - .thumb_set OTG_HS_IRQHandler,Default_Handler - - .weak DCMI_IRQHandler - .thumb_set DCMI_IRQHandler,Default_Handler - - .weak CRYP_IRQHandler - .thumb_set CRYP_IRQHandler,Default_Handler - - .weak HASH_RNG_IRQHandler - .thumb_set HASH_RNG_IRQHandler,Default_Handler - - .weak FPU_IRQHandler - .thumb_set FPU_IRQHandler,Default_Handler - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/rules/stm32f4-arm-none-eabi-gcc/stm32_flash.ld b/rules/stm32f4-arm-none-eabi-gcc/stm32_flash.ld deleted file mode 100644 --- a/rules/stm32f4-arm-none-eabi-gcc/stm32_flash.ld +++ /dev/null @@ -1,171 +0,0 @@ -/* -***************************************************************************** -** -** File : stm32_flash.ld -** -** Abstract : Linker script for STM32F207IG Device with -** 1024KByte FLASH, 112KByte RAM -** -** Set heap size, stack size and stack location according -** to application requirements. -** -** Set memory bank area and size if external memory is used. -** -** Target : STMicroelectronics STM32 -** -** Environment : Atollic TrueSTUDIO(R) -** -** Distribution: The file is distributed �as is,� without any warranty -** of any kind. -** -** (c)Copyright Atollic AB. -** You may use this file as-is or modify it according to the needs of your -** project. Distribution of this file (unmodified or modified) is not -** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the -** rights to distribute the assembled, compiled & linked contents of this -** file as part of an application binary file, provided that it is built -** using the Atollic TrueSTUDIO(R) toolchain. -** -***************************************************************************** -*/ - -/* Entry Point */ -ENTRY(Reset_Handler) - -/* Highest address of the user mode stack */ -_estack = 0x2001c000; /* end of 112K RAM */ - -/* Generate a link error if heap and stack don't fit into RAM */ -_Min_Heap_Size = 0; /* required amount of heap */ -_Min_Stack_Size = 0x400; /* required amount of stack */ - -/* Specify the memory areas */ -MEMORY -{ - FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K - RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112K - MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K - CCMRAM (xrw) : ORIGIN = 0x10000000, LENGTH = 64K -} - -/* Define output sections */ -SECTIONS -{ - /* The startup code goes first into FLASH */ - .isr_vector : - { - . = ALIGN(4); - KEEP(*(.isr_vector)) /* Startup code */ - . = ALIGN(4); - } >FLASH - - /* The program code and other data goes into FLASH */ - .text : - { - . = ALIGN(4); - *(.text) /* .text sections (code) */ - *(.text*) /* .text* sections (code) */ - *(.rodata) /* .rodata sections (constants, strings, etc.) */ - *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ - *(.glue_7) /* glue arm to thumb code */ - *(.glue_7t) /* glue thumb to arm code */ - *(.eh_frame) - - KEEP (*(.init)) - KEEP (*(.fini)) - - . = ALIGN(4); - _etext = .; /* define a global symbols at end of code */ - } >FLASH - - - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH - .ARM : { - __exidx_start = .; - *(.ARM.exidx*) - __exidx_end = .; - } >FLASH - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array*)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >FLASH - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array*)) - PROVIDE_HIDDEN (__init_array_end = .); - } >FLASH - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(.fini_array*)) - KEEP (*(SORT(.fini_array.*))) - PROVIDE_HIDDEN (__fini_array_end = .); - } >FLASH - - /* used by the startup to initialize data */ - _sidata = .; - - /* Initialized data sections goes into RAM, load LMA copy after code */ - .data : AT ( _sidata ) - { - . = ALIGN(4); - _sdata = .; /* create a global symbol at data start */ - *(.data) /* .data sections */ - *(.data*) /* .data* sections */ - - . = ALIGN(4); - _edata = .; /* define a global symbol at data end */ - } >RAM - - /* Uninitialized data section */ - . = ALIGN(4); - .bss : - { - /* This is used by the startup in order to initialize the .bss secion */ - _sbss = .; /* define a global symbol at bss start */ - __bss_start__ = _sbss; - *(.bss) - *(.bss*) - *(COMMON) - - . = ALIGN(4); - _ebss = .; /* define a global symbol at bss end */ - __bss_end__ = _ebss; - } >RAM - - /* User_heap_stack section, used to check that there is enough RAM left */ - ._user_heap_stack : - { - . = ALIGN(4); - PROVIDE ( end = . ); - PROVIDE ( _end = . ); - . = . + _Min_Heap_Size; - . = . + _Min_Stack_Size; - . = ALIGN(4); - } >RAM - - /* MEMORY_bank1 section, code must be located here explicitly */ - /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ - .memory_b1_text : - { - *(.mb1text) /* .mb1text sections (code) */ - *(.mb1text*) /* .mb1text* sections (code) */ - *(.mb1rodata) /* read-only data (constants) */ - *(.mb1rodata*) - } >MEMORY_B1 - - /* Remove information from the standard libraries */ - /DISCARD/ : - { - libc.a ( * ) - libm.a ( * ) - libgcc.a ( * ) - } - - .ARM.attributes 0 : { *(.ARM.attributes) } -} diff --git a/rules/stm32f4-arm-none-eabi-gcc/syscalls.c b/rules/stm32f4-arm-none-eabi-gcc/syscalls.c deleted file mode 100644 --- a/rules/stm32f4-arm-none-eabi-gcc/syscalls.c +++ /dev/null @@ -1,261 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#undef errno - - - -#ifdef __cplusplus -extern "C" { -#endif -extern int errno; -extern int32_t __max_opened_files__; -extern streamdevice* __opnfiles__[]; -extern int32_t* __fs_root__; -extern int32_t __fs_root_size__; - -char *__env[1] = { 0 }; -char **environ = __env; - -int _exit() -{ - while(1); -} - -int _close(int file) -{ - if(file<__max_opened_files__ && __opnfiles__[file]!=NULL) - { - return __opnfiles__[file]->close((streamdeviceptr) __opnfiles__[file]); - } - return 0; -} - - -int _write(int file, char *ptr, int len) -{ - if(file<__max_opened_files__ && __opnfiles__[file]!=NULL) - { - if(__opnfiles__[file]->write((streamdeviceptr)__opnfiles__[file],ptr,1,len)) return len; - } - return 0; -} - -int _execve(char *name, char **argv, char **env) { - errno = ENOMEM; - return -1; -} - - -int _fork(void) { - errno = EAGAIN; - return -1; -} - -int _fstat(int file, struct stat *st) { - st->st_mode = S_IFCHR; - return 0; -} - - -int _getpid(void) { - return 1; -} - - -int _isatty(int file) { - return 1; -} - - -int _kill(int pid, int sig) { - errno = EINVAL; - return -1; -} - - -int _link(char *old, char *_new) { - errno = EMLINK; - return -1; -} - - -int _lseek(int file, int ptr, int dir) { - return 0; -} - -#include - -int _open(const char *name, int flags, int mode) -{ - if(!strncmp("UART", name, 4) && ((name[4] & 0x30)==0x30)) - { - //uart_t* uart1 = malloc(sizeof(uart_t)); - streamdevice* fd1 = malloc(sizeof(streamdevice)); - uart_t uart=uartopen((name[4] & 0xF)-1); - if(uart!=-1); - { - uartmkstreamdev(uart,fd1); - int i=2; - while(i<__max_opened_files__ && __opnfiles__[i]!=NULL)i++; - if(i!=__max_opened_files__) - { - __opnfiles__[i] = fd1; - return i; - } - else printf("Too much files opened\n\r"); - } - } - return -1; -} - -int _read(int file, char *ptr, int len) { - if(file<__max_opened_files__ && __opnfiles__[file]!=NULL) - { - if(__opnfiles__[file]->read((streamdeviceptr)__opnfiles__[file],ptr,1,len)) return len; - } - return 0; -} - - - -caddr_t _sbrk(int incr) { - register char * stack_ptr __asm__ ("sp"); - extern char _end; /* Defined by the linker */ - static char *heap_end; - char *prev_heap_end; - if (heap_end == 0) { - heap_end = &_end; - } - prev_heap_end = heap_end; - if (heap_end + incr > stack_ptr) { - _write (1, "Heap and stack collision\n", 25); - abort (); - } - heap_end += incr; - return (caddr_t) prev_heap_end; -} - - - -int _stat(char *file, struct stat *st) { - st->st_mode = S_IFCHR; - return 0; -} - - -int _times(struct tms *buf) { - return -1; -} - - -int _unlink(char *name) { - errno = ENOENT; - return -1; -} - -int _wait(int *status) { - errno = ECHILD; - return -1; -} - - -int _read_r (struct _reent *r, int file, char * ptr, int len) -{ - r = r; - file = file; - ptr = ptr; - len = len; - _read(file,ptr,len); - errno = EINVAL; - return -1; -} - -/***************************************************************************/ - -int _lseek_r (struct _reent *r, int file, int ptr, int dir) -{ - r = r; - file = file; - ptr = ptr; - dir = dir; - - return 0; -} - -/***************************************************************************/ - -int _write_r (struct _reent *r, int file, char * ptr, int len) -{ - return _write(file, ptr, len); -} - -/***************************************************************************/ - -int _close_r (struct _reent *r, int file) -{ - return 0; -} - -/***************************************************************************/ - -caddr_t _sbrk_r (struct _reent *r, int incr) -{ - register char * stack_ptr __asm__ ("sp"); - extern char _end; /* Defined by the linker */ - static char *heap_end; - char *prev_heap_end; - if (heap_end == 0) { - heap_end = &_end; - } - prev_heap_end = heap_end; - if (heap_end + incr > stack_ptr) { - _write (1, "Heap and stack collision\n", 25); - abort (); - } - heap_end += incr; - return (caddr_t) prev_heap_end; -} - -/***************************************************************************/ - -int _fstat_r (struct _reent *r, int file, struct stat * st) -{ - r = r; - file = file; - - memset (st, 0, sizeof (* st)); - st->st_mode = S_IFCHR; - return 0; -} - -/***************************************************************************/ -int _open_r(struct _reent *r,const char *name, int flags, int mode) -{ - return _open(name, flags, mode); -} - -int _isatty_r(struct _reent *r, int fd) -{ - r = r; - fd = fd; - - return 1; -} - - -#ifdef __cplusplus -} -#endif - - diff --git a/rules/template.mk b/rules/template.mk deleted file mode 100644 --- a/rules/template.mk +++ /dev/null @@ -1,91 +0,0 @@ -#/*------------------------------------------------------------------------------ -#-- This file is a part of the libuc, microcontroler library -#-- Copyright (C) 2011, Alexis Jeandet -#-- -#-- This program is free software; you can redistribute it and/or modify -#-- it under the terms of the GNU General Public License as published by -#-- the Free Software Foundation; either version 3 of the License, or -#-- (at your option) any later version. -#-- -#-- This program is distributed in the hope that it will be useful, -#-- but WITHOUT ANY WARRANTY; without even the implied warranty of -#-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -#-- GNU General Public License for more details. -#-- -#-- You should have received a copy of the GNU General Public License -#-- along with this program; if not, write to the Free Software -#-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -#------------------------------------------------------------------------------- -#-- Author : Alexis Jeandet -#-- Mail : alexis.jeandet@gmail.com -#-------------------------------------------------------------------------------*/ - -#--------------------------------------------------------------------------------- -# GCC EXECUTABLES -#--------------------------------------------------------------------------------- -LIBUC_PREFIX = arm-elf- -LIBUC_CC = $(LIBUC_PREFIX)gcc -LIBUC_CXX = $(LIBUC_PREFIX)g++ -LIBUC_AR = $(LIBUC_PREFIX)ar -LIBUC_AS = $(LIBUC_PREFIX)as -LIBUC_LD = $(LIBUC_PREFIX)ld -LIBUC_SIZE = $(LIBUC_PREFIX)size -LIBUC_STRIP = $(LIBUC_PREFIX)strip -s -LIBUC_READELF = $(LIBUC_PREFIX)readelf -LIBUC_OBJCOPY=$(LIBUC_PREFIX)objcopy - - - -#--------------------------------------------------------------------------------- -# GCC FLAGS -#--------------------------------------------------------------------------------- -LIBUC_FMCU = -mcpu=arm7tdmi -LIBUC_CFLAGS = $(LIBUC_FMCU) -LIBUC_CFLAGS += -g -gdwarf-2 -LIBUC_CFLAGS += -Wextra -Wundef -Wcast-align -LIBUC_CFLAGS_WARN_ON = -Wall -LIBUC_CFLAGS_WARN_OFF = -w -LIBUC_CFLAGS_RELEASE = -O2 -LIBUC_CFLAGS_DEBUG = -g -LIBUC_CFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g -LIBUC_CFLAGS_STATIC_LIB = -fPIC -LIBUC_CFLAGS_SOFT_FPU = -msoft-float -LIBUC_CFLAGS_HARD_FPU = - -LIBUC_CXXFLAGS = $(LIBUC_FMCU) -LIBUC_CXXFLAGS += -g -gdwarf-2 -LIBUC_CXXFLAGS += -Wextra -Wundef -Wcast-align -LIBUC_CXXFLAGS_WARN_ON = -Wall -LIBUC_CXXFLAGS_WARN_OFF = -w -LIBUC_CXXFLAGS_RELEASE = -O2 -LIBUC_CXXFLAGS_DEBUG = -g -LIBUC_CXXFLAGS_RELEASE_WITH_DEBUGINFO += -O2 -g -LIBUC_CXXFLAGS_STATIC_LIB = -fPIC -LIBUC_CXXFLAGS_SOFT_FPU = -msoft-float -LIBUC_CXXFLAGS_HARD_FPU = - -LIBUC_LIBS = -LIBUC_LIBS_UART = -luart -LIBUC_LIBS_SPI = -lspi -LIBUC_LIBS_IIC = -liic -LIBUC_LIBS_ADC = -ladc - -LIBUC_LIBS_DIR = $(LIBUC)/lib/bin/lpc17XX -LIBUC_LIBS_DIR_UART = -L $(LIBUC_LIBS_DIR)/UART -LIBUC_LIBS_DIR_SPI = -L $(LIBUC_LIBS_DIR)/SPI -LIBUC_LIBS_DIR_IIC = -L $(LIBUC_LIBS_DIR)/IIC -LIBUC_LIBS_DIR_ADC = -L $(LIBUC_LIBS_DIR)/ADC - -LIBUC_INC_DIR = $(LIBUC)/lib/includes/lpc17XX -LIBUC_INC_DIR_UART = -L $(LIBUC_INC_DIR)/UART -LIBUC_INC_DIR_SPI = -L $(LIBUC_INC_DIR)/SPI -LIBUC_INC_DIR_IIC = -L $(LIBUC_INC_DIR)/IIC -LIBUC_INC_DIR_ADC = -L $(LIBUC_INC_DIR)/ADC - - - - - - - -