HG_REPOSITORIES/LPP/INSTRUMENTATION/libuc2 Files · bsp/src/STM32F4Eval/bsp.c

Factorised stream device structure to reduce memory usage....

Factorised stream device structure to reduce memory usage. Improved Graphical terminal for multi instances.

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        jeandet
    
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      /*------------------------------------------------------------------------------

      --  This file is a part of the libuc, microcontroler library

      --  Copyright (C) 2011, Alexis Jeandet

      --

      --  This program is free software; you can redistribute it and/or modify

      --  it under the terms of the GNU General Public License as published by

      --  the Free Software Foundation; either version 3 of the License, or

      --  (at your option) any later version.

      --

      --  This program is distributed in the hope that it will be useful,

      --  but WITHOUT ANY WARRANTY; without even the implied warranty of

      --  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

      --  GNU General Public License for more details.

      --

      --  You should have received a copy of the GNU General Public License

      --  along with this program; if not, write to the Free Software

      --  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA 

      -------------------------------------------------------------------------------

      --                 Author : Alexis Jeandet

      --                   Mail : alexis.jeandet@gmail.com

      -------------------------------------------------------------------------------*/

      #include "bsp.h"

      #include <streamdevices.h>

      #include <malloc.h>

      #include <gpio.h>

      #include <uart.h>

      #include <stdio.h>

      #include <stm32f4xx_gpio.h>

      #include <stm32f4xx_fsmc.h>

      #include <i2c.h>

      #include <core.h>

        jeandet
    
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      #include <terminal.h>

        jeandet
    
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      uint32_t OSC0  =8000000;

      uint32_t INTOSC =16000000;

      uint32_t RTCOSC =32768;

      uint32_t currentCpuFreq=0;

      extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];

      LCD_IF_t lcdIF0={

          .init = &bsp_FSMC_init,

          .writereg = &bsp_lcd0_write_reg,

          .readreg = &bsp_lcd0_read_reg,

          .writeGRAM = &bsp_lcd0_writeGRAM,

          .readGRAM = &bsp_lcd0_readGRAM

      };

      LCD_t lcd0={

          .interface = &lcdIF0,

          .init = &ili9328init,

          .paint = &ili9328paint,

          .paintText = &ili9328paintText,

          .paintFilRect = &ili9328paintFilRect,

          .refreshenable = &ili9328refreshenable,

          .width= 240,

          .height = 320

      };

        jeandet
    
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              r51
            
      terminal_t terminal0;

        jeandet
    
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      volatile int16_t* lcd0_CMD=(volatile int16_t*)  (0x60000000 | 0x08000000);

      volatile int16_t* lcd0_DATA=((volatile int16_t*)(0x60000000 | 0x08000002));

      float VREF0 =(float)3.3;

      int bsp_init()

      {

          int i=0;

          for(i=0;i<32;i++)

          {

              __opnfiles__[i] = NULL;

          }

          bsp_GPIO_init();

          bsp_uart_init();

          bsp_iic_init();

          bsp_FSMC_init();

        jeandet
    
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              r51
            
          bsp_GTerm_init();

          printf("\r=====================\n\r");

          printf(  "=====================\n\r");

        jeandet
    
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          printf(BSP);

          printf(" initialised\n\r");

        jeandet
    
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              r51
            
          printf(  "=====================\n\r");

        jeandet
    
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          return 1;

      }

      void bsp_GPIO_init()

      {

          gpio_t gpio1 = gpioopen(LED1);

          gpio_t gpio2 = gpioopen(LED2);

          gpio_t gpio3 = gpioopen(LED3);

          gpiosetspeed(&gpio1,gpiohighspeed);

          gpiosetspeed(&gpio2,gpiohighspeed);

          gpiosetspeed(&gpio3,gpiohighspeed);

          gpiosetdir(&gpio1,gpiooutdir);

          gpiosetdir(&gpio2,gpiooutdir);

          gpiosetdir(&gpio3,gpiooutdir);

      }

      void bsp_uart_init()

      {

        jeandet
    
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          //if(__opnfiles__[1]==NULL)

          //{

          //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));

          //  streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));

          // uart_t uart = uartopenandconfig(uart1,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1);

          //uartmkstreamdev(uart,fd1);

          //__opnfiles__[1] = fd1;

          //}

          //else

          //{

          uartopenandconfig(0,uartparitynone | uart8bits | uartonestop,115200,PA9,PA10,-1,-1);

          //}

        jeandet
    
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      }

      /*

      D0   PD14      D1   PD15      D2   PD0      D3   PD1      D4   PE7

      D5   PE8       D6   PE9       D7   PE10     D8   PE11     D9   PE12

      D10  PE13      D11  PE14      D12  PE15     D13  PD8      D14  PD9

      D15  PD10

      A0   PF0  = RS      FSMC_NE3 PG10 CS      FSMC_NWE PD5  W/S

      FSMC_NOE PD4  RD

      */

      /*-- GPIOs Configuration -----------------------------------------------------*/

      /*

       +-------------------+--------------------+------------------+------------------+

       +                       SRAM pins assignment                                   +

       +-------------------+--------------------+------------------+------------------+

       | PD0  <-> FSMC_D2  | PE0  <-> FSMC_NBL0 | PF0  <-> FSMC_A0 | PG0 <-> FSMC_A10 |

       | PD1  <-> FSMC_D3  | PE1  <-> FSMC_NBL1 | PF1  <-> FSMC_A1 | PG1 <-> FSMC_A11 |

       | PD4  <-> FSMC_NOE | PE3  <-> FSMC_A19  | PF2  <-> FSMC_A2 | PG2 <-> FSMC_A12 |

       | PD5  <-> FSMC_NWE | PE4  <-> FSMC_A20  | PF3  <-> FSMC_A3 | PG3 <-> FSMC_A13 |

       | PD8  <-> FSMC_D13 | PE7  <-> FSMC_D4   | PF4  <-> FSMC_A4 | PG4 <-> FSMC_A14 |

       | PD9  <-> FSMC_D14 | PE8  <-> FSMC_D5   | PF5  <-> FSMC_A5 | PG5 <-> FSMC_A15 |

       | PD10 <-> FSMC_D15 | PE9  <-> FSMC_D6   | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 |

       | PD11 <-> FSMC_A16 | PE10 <-> FSMC_D7   | PF13 <-> FSMC_A7 |------------------+

       | PD12 <-> FSMC_A17 | PE11 <-> FSMC_D8   | PF14 <-> FSMC_A8 |

       | PD13 <-> FSMC_A18 | PE12 <-> FSMC_D9   | PF15 <-> FSMC_A9 |

       | PD14 <-> FSMC_D0  | PE13 <-> FSMC_D10  |------------------+

       | PD15 <-> FSMC_D1  | PE14 <-> FSMC_D11  |

       |                   | PE15 <-> FSMC_D12  |

       +-------------------+--------------------+

      */

      int bsp_FSMC_init()

      {

      #define GPIOGETPORT(gpio)   ((GPIO_TypeDef*)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)*(uint32_t)4) + (uint32_t)GPIOA))

      #define GPIOPORTNUM(gpio)   (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8)

          gpio_t LCD_DBxList[]={

              PD0 ,PD1 ,PD4 ,PD5 ,PD8 ,PD9 ,PD10,PD11,PD12,PD13,PD14,PD15,

              PE0 ,PE1 ,PE3 ,PE4 ,PE7 ,PE8 ,PE9 ,PE10,PE11,PE12,PE13,PE14,

              PE15,PF0 ,PF1 ,PF2 ,PF3 ,PF4 ,PF5 ,PF12,PF13,PF14,PF15,PG0 ,

              PG1 ,PG2 ,PG3 ,PG4 ,PG5 ,PG9 ,PG10

                               };

          for(int i=0;i<43;i++)

          {

              gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]);

              LCD_DBx |=  gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype;

              gpiosetconfig(&LCD_DBx);

              GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC);

          }

          FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;

          FSMC_NORSRAMTimingInitTypeDef  p;

          /* Enable FSMC clock */

          RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);

          /*-- FSMC Configuration ------------------------------------------------------*/

          /*----------------------- SRAM Bank 3 ----------------------------------------*/

          /* FSMC_Bank1_NORSRAM3 configuration */

          p.FSMC_AddressSetupTime = 1;

          p.FSMC_AddressHoldTime = 0;

          p.FSMC_DataSetupTime = getCpuFreq()/14545450  ;// 11;

          p.FSMC_BusTurnAroundDuration = 0;

          p.FSMC_CLKDivision = 0;

          p.FSMC_DataLatency = 0;

          p.FSMC_AccessMode = FSMC_AccessMode_A;

          /* Color LCD configuration ------------------------------------

             LCD configured as follow:

                - Data/Address MUX = Disable

                - Memory Type = SRAM

                - Data Width = 16bit

                - Write Operation = Enable

                - Extended Mode = Enable

                - Asynchronous Wait = Disable */

          FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;

          FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;

          FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;

          FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;

          FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;

          FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;

          FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;

          FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;

          FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;

          FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;

          FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;

          FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;

          FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;

          FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;

          FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;

          FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

          /* Enable FSMC NOR/SRAM Bank1 */

          FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);

          p.FSMC_AddressSetupTime = getCpuFreq()/50000000;

          p.FSMC_AddressHoldTime = 0;

          p.FSMC_DataSetupTime = getCpuFreq()/25000000;

          p.FSMC_BusTurnAroundDuration = 1;

          p.FSMC_CLKDivision = 0;

          p.FSMC_DataLatency = 0;

          p.FSMC_AccessMode = FSMC_AccessMode_A;

          FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;

          FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;

          FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;

          FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;

          FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;

          FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;

          FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;

          FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;

          FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;

          FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;

          FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;

          FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;

          FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;

          FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;

          FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;

          FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

          /*!< Enable FSMC Bank1_SRAM2 Bank */

          FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);

        jeandet
    
Factorised stream device structure to reduce memory usage....

              r51
            
          lcd0.init(&lcd0);

        jeandet
    
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              r47
            
          return 1;

      }

      void bsp_spi_init()

      {

      }

      void bsp_iic_init()

      {

          //i2copenandconfig(i2c2,0,400000,PF0,PF1);

      }

      void bsp_SD_init()

      {

        jeandet
    
sync

              r49
            
          gpio_t SDIO_DBxList[]={PC8 ,PC9 ,PC10 ,PC11 ,PC12,PD2};

          for(int i=0;i<6;i++)

          {

              gpio_t SDIO_DBx = gpioopen(SDIO_DBxList[i]);

              SDIO_DBx |=  gpiohighspeed | gpioaf | gpiopushpulltype | gpionopulltype;

              gpiosetconfig(&SDIO_DBx);

              GPIO_PinAFConfig(GPIOGETPORT(SDIO_DBx), (uint8_t)(SDIO_DBx & 0xF), GPIO_AF_SDIO);

          }

        jeandet
    
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              r47
            
      }

      void vs10XXclearXCS(){}

      void vs10XXsetXCS(){}

      int vs10XXDREQ()

      {

          return 1;

      }

      void bsppowersdcard(char onoff)   //always ON

      {

      }

      char bspsdcardpresent()

      {

          return 0;

      }

      char bspsdcardwriteprotected()

      {

          return 0;

      }

      void bspsdcardselect(char YESNO)

      {

      }

      void bsp_lcd0_write_reg(uint32_t reg,uint32_t data)

      {

          *lcd0_CMD=(uint16_t)reg;

          *lcd0_DATA=(uint16_t)data;

      }

      uint32_t bsp_lcd0_read_reg(uint32_t reg)

      {

          *lcd0_CMD=(uint16_t)reg;

          return (uint16_t)*lcd0_DATA;

      }

      void bsp_lcd0_writeGRAM(void* buffer,uint32_t count)

      {

          *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM;

          uint16_t* castedBuff=(uint16_t*)buffer;

          for(int i=0;i<(int)count;i++)

          {

              *lcd0_DATA=castedBuff[i];

          }

      }

      void bsp_lcd0_readGRAM(void* buffer,uint32_t count)

      {

          *lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM;

          uint16_t* castedBuff=(uint16_t*)buffer;

          castedBuff[0]=*lcd0_DATA;

          for(int i=0;i<(int)count;i++)

          {

              castedBuff[i]=*lcd0_DATA;

          }

      }

        jeandet
    
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              r51
            
      void bsp_GTerm_init()

      {

          if(__opnfiles__[1]==NULL)

          {

              //uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));

              streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));

              ili9328paintFilRect(&lcd0,0,0,240,320,0x7FFF,5,0);

              terminal_init(&terminal0,&lcd0,&ComicSansMS_8,fd1);

              __opnfiles__[1] = fd1;

          }

          else

          {

          }

      }

        jeandet
    
New version totaly integrated to Qt through custom sdk build!...

              r47

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jeandet New version totaly integrated to Qt through custom sdk build!...	r47	/*------------------------------------------------------------------------------
		-- This file is a part of the libuc, microcontroler library
		-- Copyright (C) 2011, Alexis Jeandet
		--
		-- This program is free software; you can redistribute it and/or modify
		-- it under the terms of the GNU General Public License as published by
		-- the Free Software Foundation; either version 3 of the License, or
		-- (at your option) any later version.
		--
		-- This program is distributed in the hope that it will be useful,
		-- but WITHOUT ANY WARRANTY; without even the implied warranty of
		-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		-- GNU General Public License for more details.
		--
		-- You should have received a copy of the GNU General Public License
		-- along with this program; if not, write to the Free Software
		-- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		-------------------------------------------------------------------------------
		-- Author : Alexis Jeandet
		-- Mail : alexis.jeandet@gmail.com
		-------------------------------------------------------------------------------*/
		#include "bsp.h"
		#include <streamdevices.h>
		#include <malloc.h>
		#include <gpio.h>
		#include <uart.h>
		#include <stdio.h>
		#include <stm32f4xx_gpio.h>
		#include <stm32f4xx_fsmc.h>
		#include <i2c.h>
		#include <core.h>
jeandet Factorised stream device structure to reduce memory usage....	r51	#include <terminal.h>
jeandet New version totaly integrated to Qt through custom sdk build!...	r47	uint32_t OSC0 =8000000;
		uint32_t INTOSC =16000000;
		uint32_t RTCOSC =32768;
		uint32_t currentCpuFreq=0;
		extern streamdevice* __opnfiles__[__MAX_OPENED_FILES__];

		LCD_IF_t lcdIF0={
		.init = &bsp_FSMC_init,
		.writereg = &bsp_lcd0_write_reg,
		.readreg = &bsp_lcd0_read_reg,
		.writeGRAM = &bsp_lcd0_writeGRAM,
		.readGRAM = &bsp_lcd0_readGRAM
		};

		LCD_t lcd0={
		.interface = &lcdIF0,
		.init = &ili9328init,
		.paint = &ili9328paint,
		.paintText = &ili9328paintText,
		.paintFilRect = &ili9328paintFilRect,
		.refreshenable = &ili9328refreshenable,
		.width= 240,
		.height = 320
		};

jeandet Factorised stream device structure to reduce memory usage....	r51	terminal_t terminal0;


jeandet New version totaly integrated to Qt through custom sdk build!...	r47	volatile int16_t* lcd0_CMD=(volatile int16_t*) (0x60000000 \| 0x08000000);
		volatile int16_t* lcd0_DATA=((volatile int16_t*)(0x60000000 \| 0x08000002));

		float VREF0 =(float)3.3;

		int bsp_init()
		{
		int i=0;
		for(i=0;i<32;i++)
		{
		__opnfiles__[i] = NULL;
		}
		bsp_GPIO_init();
		bsp_uart_init();
		bsp_iic_init();
		bsp_FSMC_init();
jeandet Factorised stream device structure to reduce memory usage....	r51	bsp_GTerm_init();
		printf("\r=====================\n\r");
		printf( "=====================\n\r");
jeandet New version totaly integrated to Qt through custom sdk build!...	r47	printf(BSP);
		printf(" initialised\n\r");
jeandet Factorised stream device structure to reduce memory usage....	r51	printf( "=====================\n\r");
jeandet New version totaly integrated to Qt through custom sdk build!...	r47	return 1;
		}

		void bsp_GPIO_init()
		{
		gpio_t gpio1 = gpioopen(LED1);
		gpio_t gpio2 = gpioopen(LED2);
		gpio_t gpio3 = gpioopen(LED3);
		gpiosetspeed(&gpio1,gpiohighspeed);
		gpiosetspeed(&gpio2,gpiohighspeed);
		gpiosetspeed(&gpio3,gpiohighspeed);
		gpiosetdir(&gpio1,gpiooutdir);
		gpiosetdir(&gpio2,gpiooutdir);
		gpiosetdir(&gpio3,gpiooutdir);
		}

		void bsp_uart_init()
		{
jeandet Factorised stream device structure to reduce memory usage....	r51	//if(__opnfiles__[1]==NULL)
		//{
		//uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));
		// streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));
		// uart_t uart = uartopenandconfig(uart1,uartparitynone \| uart8bits \| uartonestop,115200,PA9,PA10,-1,-1);
		//uartmkstreamdev(uart,fd1);
		//__opnfiles__[1] = fd1;
		//}
		//else
		//{
		uartopenandconfig(0,uartparitynone \| uart8bits \| uartonestop,115200,PA9,PA10,-1,-1);
		//}
jeandet New version totaly integrated to Qt through custom sdk build!...	r47	}

		/*
		D0 PD14 D1 PD15 D2 PD0 D3 PD1 D4 PE7
		D5 PE8 D6 PE9 D7 PE10 D8 PE11 D9 PE12
		D10 PE13 D11 PE14 D12 PE15 D13 PD8 D14 PD9
		D15 PD10
		A0 PF0 = RS FSMC_NE3 PG10 CS FSMC_NWE PD5 W/S
		FSMC_NOE PD4 RD
		*/
		/-- GPIOs Configuration -----------------------------------------------------/
		/*
		+-------------------+--------------------+------------------+------------------+
		+ SRAM pins assignment +
		+-------------------+--------------------+------------------+------------------+
		\| PD0 <-> FSMC_D2 \| PE0 <-> FSMC_NBL0 \| PF0 <-> FSMC_A0 \| PG0 <-> FSMC_A10 \|
		\| PD1 <-> FSMC_D3 \| PE1 <-> FSMC_NBL1 \| PF1 <-> FSMC_A1 \| PG1 <-> FSMC_A11 \|
		\| PD4 <-> FSMC_NOE \| PE3 <-> FSMC_A19 \| PF2 <-> FSMC_A2 \| PG2 <-> FSMC_A12 \|
		\| PD5 <-> FSMC_NWE \| PE4 <-> FSMC_A20 \| PF3 <-> FSMC_A3 \| PG3 <-> FSMC_A13 \|
		\| PD8 <-> FSMC_D13 \| PE7 <-> FSMC_D4 \| PF4 <-> FSMC_A4 \| PG4 <-> FSMC_A14 \|
		\| PD9 <-> FSMC_D14 \| PE8 <-> FSMC_D5 \| PF5 <-> FSMC_A5 \| PG5 <-> FSMC_A15 \|
		\| PD10 <-> FSMC_D15 \| PE9 <-> FSMC_D6 \| PF12 <-> FSMC_A6 \| PG9 <-> FSMC_NE2 \|
		\| PD11 <-> FSMC_A16 \| PE10 <-> FSMC_D7 \| PF13 <-> FSMC_A7 \|------------------+
		\| PD12 <-> FSMC_A17 \| PE11 <-> FSMC_D8 \| PF14 <-> FSMC_A8 \|
		\| PD13 <-> FSMC_A18 \| PE12 <-> FSMC_D9 \| PF15 <-> FSMC_A9 \|
		\| PD14 <-> FSMC_D0 \| PE13 <-> FSMC_D10 \|------------------+
		\| PD15 <-> FSMC_D1 \| PE14 <-> FSMC_D11 \|
		\| \| PE15 <-> FSMC_D12 \|
		+-------------------+--------------------+
		*/
		int bsp_FSMC_init()
		{
		#define GPIOGETPORT(gpio) ((GPIO_TypeDef)(((((uint32_t)gpio) & (uint32_t)0x0000FF00)(uint32_t)4) + (uint32_t)GPIOA))
		#define GPIOPORTNUM(gpio) (((uint32_t)(gpio) & (uint32_t)0x0000FF00)>>(uint32_t)8)

		gpio_t LCD_DBxList[]={
		PD0 ,PD1 ,PD4 ,PD5 ,PD8 ,PD9 ,PD10,PD11,PD12,PD13,PD14,PD15,
		PE0 ,PE1 ,PE3 ,PE4 ,PE7 ,PE8 ,PE9 ,PE10,PE11,PE12,PE13,PE14,
		PE15,PF0 ,PF1 ,PF2 ,PF3 ,PF4 ,PF5 ,PF12,PF13,PF14,PF15,PG0 ,
		PG1 ,PG2 ,PG3 ,PG4 ,PG5 ,PG9 ,PG10
		};

		for(int i=0;i<43;i++)
		{
		gpio_t LCD_DBx = gpioopen(LCD_DBxList[i]);
		LCD_DBx \|= gpiohighspeed \| gpioaf \| gpiopushpulltype \| gpionopulltype;
		gpiosetconfig(&LCD_DBx);
		GPIO_PinAFConfig(GPIOGETPORT(LCD_DBx), (uint8_t)(LCD_DBx & 0xF), GPIO_AF_FSMC);
		}

		FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
		FSMC_NORSRAMTimingInitTypeDef p;

		/* Enable FSMC clock */
		RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);

		/-- FSMC Configuration ------------------------------------------------------/
		/----------------------- SRAM Bank 3 ----------------------------------------/
		/* FSMC_Bank1_NORSRAM3 configuration */
		p.FSMC_AddressSetupTime = 1;
		p.FSMC_AddressHoldTime = 0;
		p.FSMC_DataSetupTime = getCpuFreq()/14545450 ;// 11;
		p.FSMC_BusTurnAroundDuration = 0;
		p.FSMC_CLKDivision = 0;
		p.FSMC_DataLatency = 0;
		p.FSMC_AccessMode = FSMC_AccessMode_A;
		/* Color LCD configuration ------------------------------------
		LCD configured as follow:
		- Data/Address MUX = Disable
		- Memory Type = SRAM
		- Data Width = 16bit
		- Write Operation = Enable
		- Extended Mode = Enable
		- Asynchronous Wait = Disable */

		FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
		FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
		FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
		FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
		FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
		FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
		FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
		FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
		FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
		FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
		FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
		FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
		FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
		FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
		FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;

		FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

		/* Enable FSMC NOR/SRAM Bank1 */
		FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);


		p.FSMC_AddressSetupTime = getCpuFreq()/50000000;
		p.FSMC_AddressHoldTime = 0;
		p.FSMC_DataSetupTime = getCpuFreq()/25000000;
		p.FSMC_BusTurnAroundDuration = 1;
		p.FSMC_CLKDivision = 0;
		p.FSMC_DataLatency = 0;
		p.FSMC_AccessMode = FSMC_AccessMode_A;

		FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
		FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
		FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;
		FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
		FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
		FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
		FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
		FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
		FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
		FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
		FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
		FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
		FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
		FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
		FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;

		FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

		/!< Enable FSMC Bank1_SRAM2 Bank /
		FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE);
jeandet Factorised stream device structure to reduce memory usage....	r51	lcd0.init(&lcd0);
jeandet New version totaly integrated to Qt through custom sdk build!...	r47	return 1;
		}

		void bsp_spi_init()
		{

		}


		void bsp_iic_init()
		{
		//i2copenandconfig(i2c2,0,400000,PF0,PF1);
		}

		void bsp_SD_init()
		{
jeandet sync	r49	gpio_t SDIO_DBxList[]={PC8 ,PC9 ,PC10 ,PC11 ,PC12,PD2};
		for(int i=0;i<6;i++)
		{
		gpio_t SDIO_DBx = gpioopen(SDIO_DBxList[i]);
		SDIO_DBx \|= gpiohighspeed \| gpioaf \| gpiopushpulltype \| gpionopulltype;
		gpiosetconfig(&SDIO_DBx);
		GPIO_PinAFConfig(GPIOGETPORT(SDIO_DBx), (uint8_t)(SDIO_DBx & 0xF), GPIO_AF_SDIO);
		}
jeandet New version totaly integrated to Qt through custom sdk build!...	r47	}

		void vs10XXclearXCS(){}
		void vs10XXsetXCS(){}
		int vs10XXDREQ()
		{
		return 1;
		}


		void bsppowersdcard(char onoff) //always ON
		{

		}

		char bspsdcardpresent()
		{
		return 0;
		}

		char bspsdcardwriteprotected()
		{
		return 0;
		}

		void bspsdcardselect(char YESNO)
		{

		}


		void bsp_lcd0_write_reg(uint32_t reg,uint32_t data)
		{
		*lcd0_CMD=(uint16_t)reg;
		*lcd0_DATA=(uint16_t)data;
		}

		uint32_t bsp_lcd0_read_reg(uint32_t reg)
		{
		*lcd0_CMD=(uint16_t)reg;
		return (uint16_t)*lcd0_DATA;
		}

		void bsp_lcd0_writeGRAM(void* buffer,uint32_t count)
		{
		*lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM;
		uint16_t* castedBuff=(uint16_t*)buffer;
		for(int i=0;i<(int)count;i++)
		{
		*lcd0_DATA=castedBuff[i];
		}
		}

		void bsp_lcd0_readGRAM(void* buffer,uint32_t count)
		{
		*lcd0_CMD=(uint16_t)ILI9328_REGISTER_WRITEDATATOGRAM;
		uint16_t* castedBuff=(uint16_t*)buffer;
		castedBuff[0]=*lcd0_DATA;
		for(int i=0;i<(int)count;i++)
		{
		castedBuff[i]=*lcd0_DATA;
		}
		}

jeandet Factorised stream device structure to reduce memory usage....	r51	void bsp_GTerm_init()
		{
		if(__opnfiles__[1]==NULL)
		{
		//uart_t* uart1 = (uart_t*)malloc(sizeof(uart_t));
		streamdevice* fd1 = (streamdevice*)malloc(sizeof(streamdevice));

		ili9328paintFilRect(&lcd0,0,0,240,320,0x7FFF,5,0);
		terminal_init(&terminal0,&lcd0,&ComicSansMS_8,fd1);
		__opnfiles__[1] = fd1;
		}
		else
		{

		}
		}
jeandet New version totaly integrated to Qt through custom sdk build!...	r47