HG_REPOSITORIES/LPP/INSTRUMENTATION/VHD_Lib Files · designs/ICI4-Integ1/res.txt

Moved Validation_LFR_TIME_MANAGEMENT from designs to tests directory...

Moved Validation_LFR_TIME_MANAGEMENT from designs to tests directory Changed test directory Validation_LFR_TIME_MANAGEMENT in LFR_time_management. Added LFR_MANAGMENT_TIME_FINE_DELTA register into apb_lfr_management module at address 0x30 : * LFR_MANAGMENT_TIME_FINE_DELTA ( 8 downto 0) : ft_counter_lsb value * LFR_MANAGMENT_TIME_FINE_DELTA (24 downto 9) : ft value * LFR_MANAGMENT_TIME_FINE_DELTA (26 downto 25) : + ft_counter_lsb_MAX_VALUE = 379 when "00" + ft_counter_lsb_MAX_VALUE = 380 when "01" + ft_counter_lsb_MAX_VALUE = 381 when "10" Updated LFR_time_managment testbench.

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				SPARTAN6 50 MHz, MIG DDR2, 2x8 + 2x4 cache, GRFPU

				LEON3 LEON3FTV2
				Dhrystone 78.4 78.4
				Whetstone DP 27.7 27.7
				gzip 43.98 s 41.38 s
				bzip2 248.22 s 200.10 s
				176.gcc 208.62 s 180.48 s
				coremark 100.12 i/s 100.12 i/s
				aocs_v8 12388.7 i/s 12388.7 i/s
				basicmath_large 13245.0 i/s 13245.0 i/s
				linpack_unroll_dp_v8 3265 KFLOPS 3563 KFLOPS

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