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Preliminary working IAP Memctrlr integration....
Preliminary working IAP Memctrlr integration. Tested UT8ER1M32-test-board design..
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default.pdc
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# Actel Physical design constraints file
# Generated file
# Version: 9.1 SP3 9.1.3.4
# Family: ProASIC3E , Die: A3PE3000 , Package: 324 FBGA
# Date generated: Tue Dec 23 19:40:04 2014
#
# IO banks setting
#
#
# I/O constraints
#
set_io LED0 \
-pinname R13 \
-fixed yes \
-DIRECTION Inout
set_io LED1 \
-pinname P13 \
-fixed yes \
-DIRECTION Inout
set_io LED2 \
-pinname N11 \
-fixed yes \
-DIRECTION Inout
set_io RXD1 \
-pinname N10 \
-fixed yes \
-DIRECTION Inout
set_io RXD2 \
-pinname F6 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_A[0]} \
-pinname T12 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[1]} \
-pinname U13 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[2]} \
-pinname T13 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[3]} \
-pinname N15 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[4]} \
-pinname P17 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[5]} \
-pinname N13 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[6]} \
-pinname M16 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[7]} \
-pinname M13 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[8]} \
-pinname U12 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[9]} \
-pinname V11 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[10]} \
-pinname V13 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[11]} \
-pinname V14 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[12]} \
-pinname V15 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[13]} \
-pinname P16 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[14]} \
-pinname N16 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[15]} \
-pinname V16 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[16]} \
-pinname V17 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[17]} \
-pinname U18 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_A[18]} \
-pinname R18 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io {SRAM_DQ[0]} \
-pinname T18 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[1]} \
-pinname L15 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[2]} \
-pinname K18 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[3]} \
-pinname G17 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[4]} \
-pinname K17 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[5]} \
-pinname H18 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[6]} \
-pinname L18 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[7]} \
-pinname J18 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[8]} \
-pinname M17 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[9]} \
-pinname J17 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[10]} \
-pinname N18 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[11]} \
-pinname J13 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[12]} \
-pinname N17 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[13]} \
-pinname K13 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[14]} \
-pinname P18 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[15]} \
-pinname K14 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[16]} \
-pinname K15 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[17]} \
-pinname B18 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[18]} \
-pinname D16 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[19]} \
-pinname D15 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[20]} \
-pinname C18 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[21]} \
-pinname E15 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[22]} \
-pinname D18 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[23]} \
-pinname F15 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[24]} \
-pinname E18 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[25]} \
-pinname G15 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[26]} \
-pinname F17 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[27]} \
-pinname H15 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[28]} \
-pinname F18 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[29]} \
-pinname J15 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[30]} \
-pinname D11 \
-fixed yes \
-DIRECTION Inout
set_io {SRAM_DQ[31]} \
-pinname C16 \
-fixed yes \
-DIRECTION Inout
set_io SRAM_MBE \
-pinname D13 \
-fixed yes \
-DIRECTION Inout
set_io SRAM_nBUSY \
-pinname D12 \
-fixed yes \
-DIRECTION Inout
set_io SRAM_nCE1 \
-pinname C17 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io SRAM_nCE2 \
-pinname B17 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io SRAM_nOE \
-pinname J14 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io SRAM_nWE \
-pinname B16 \
-fixed yes \
-DIRECTION Inout \
-register yes
set_io TXD1 \
-pinname N12 \
-fixed yes \
-DIRECTION Inout
set_io TXD2 \
-pinname G6 \
-fixed yes \
-DIRECTION Inout
#set_io clk_49 \
# -pinname F8 \
# -fixed yes \
# -DIRECTION Inout
set_io clk_50 \
-pinname F7 \
-fixed yes \
-DIRECTION Inout
set_io nCTS1 \
-pinname L13 \
-fixed yes \
-DIRECTION Inout
#set_io nRTS1 \
# -pinname M9 \
# -fixed yes \
# -DIRECTION Inout
set_io reset \
-pinname F16 \
-fixed yes \
-DIRECTION Inout