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Clone from https://hephaistos.lpp.polytechnique.fr/rhodecode/HG_REPOSITORIES/LPP/INSTRUMENTATION/USERS/PELLION/VHD_Lib

removed dependency to Xonsh for Validation LFR Filters
Jeandet Alexis -
r648:0343834a1e0e default draft
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@@ -0,0 +1,10
1 import os
2 import shutil
3 import datetime as dt
4 import glob
5
6 folder=dt.datetime.today().strftime("%Y-%m-%d_%H-%M-%S")
7 os.mkdir(folder)
8 shutil.copy("input.txt",folder+"/input.txt")
9 for file in glob.glob("output_f*.txt"):
10 shutil.copy(file, folder)
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@@ -0,0 +1,10
1 import os
2 import shutil
3 import datetime as dt
4 import glob
5
6 folder=dt.datetime.today().strftime("%Y-%m-%d_%H-%M-%S")
7 os.mkdir(folder)
8 shutil.copy("input.txt",folder+"/input.txt")
9 for file in glob.glob("output_f*.txt"):
10 shutil.copy(file, folder)
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@@ -1,86 +1,86
1 1 VHDLIB=../..
2 2 SELFDIR := $(dir $(lastword $(MAKEFILE_LIST)))
3 3 SCRIPTSDIR=$(VHDLIB)/scripts/
4 4 GRLIB := $(shell sh $(VHDLIB)/scripts/lpp_relpath.sh)
5 5 TOP=testbench
6 6 BOARD=LFR-EQM
7 7 include $(VHDLIB)/boards/$(BOARD)/Makefile_RTAX.inc
8 8 DEVICE=$(PART)-$(PACKAGE)$(SPEED)
9 9 UCF=
10 10 QSF=
11 11 EFFORT=high
12 12 XSTOPT=
13 13 SYNPOPT=
14 14 VHDLSYNFILES=
15 15 VHDLSIMFILES= $(SELFDIR)/tb.vhd
16 16 SIMTOP=testbench
17 17 CLEAN=soft-clean
18 18
19 19 TECHLIBS = axcelerator
20 20
21 21 LIBSKIP = core1553bbc core1553brm core1553brt gr1553 corePCIF \
22 22 tmtc openchip hynix ihp gleichmann micron usbhc opencores fmf ftlib gsi
23 23
24 24 DIRSKIP = b1553 pcif leon2 leon3v3 leon2ft crypto satcan ddr usb ata i2c \
25 25 pci grusbhc haps slink ascs can pwm greth coremp7 spi ac97 srmmu atf \
26 26 grlfpc \
27 27 ./dsp/lpp_fft_rtax \
28 28 ./amba_lcd_16x2_ctrlr \
29 29 ./general_purpose/lpp_AMR \
30 30 ./general_purpose/lpp_balise \
31 31 ./general_purpose/lpp_delay \
32 32 ./lpp_bootloader \
33 33 ./lfr_management \
34 34 ./lpp_sim/CY7C1061DV33 \
35 35 ./lpp_cna \
36 36 ./lpp_uart \
37 37 ./lpp_usb \
38 38 ./dsp/lpp_fft \
39 39 ./lpp_leon3_soc \
40 40 ./lpp_debug_lfr
41 41
42 42 FILESKIP = i2cmst.vhd \
43 43 APB_MULTI_DIODE.vhd \
44 44 APB_MULTI_DIODE.vhd \
45 45 Top_MatrixSpec.vhd \
46 46 APB_FFT.vhd \
47 47 lpp_lfr_ms_FFT.vhd \
48 48 lpp_lfr_apbreg.vhd \
49 49 CoreFFT.vhd \
50 50 lpp_lfr_ms.vhd \
51 51 lpp_lfr_sim_pkg.vhd \
52 52 mtie_maps.vhd \
53 53 ftsrctrlc.vhd \
54 54 ftsdctrl.vhd \
55 55 ftsrctrl8.vhd \
56 56 ftmctrl.vhd \
57 57 ftsdctrl64.vhd \
58 58 ftahbram.vhd \
59 59 ftahbram2.vhd \
60 60 sramft.vhd \
61 61 nandfctrlx.vhd
62 62
63 63 include $(GRLIB)/bin/Makefile
64 64 include $(GRLIB)/software/leon3/Makefile
65 65 ################## project specific targets ##########################
66 66 distclean:myclean
67 67 vsim:cp_for_vsim
68 68
69 69 myclean:
70 70 rm -f input.txt output_f*.txt *.log
71 71 rm -rf ./2016*
72 72
73 73 generate :
74 74 python ./generate.py
75 75
76 76 cp_for_vsim: generate
77 77 cp ./input.txt simulation/
78 78
79 79 archivate:
80 xonsh ./archivate.xsh
80 python ./archivate.py
81 81
82 82 test-common: | generate ghdl ghdl-run archivate
83 83
84 84 test:
85 85 @echo "not a Test"
86 86
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